JVC GZ-MC200US Diagram
SCHEMATIC DIAGRAMS
DIGITAL MEDIA CAMERA
YF059200411
GZ-MC200US
CD-ROM No.SML200412
GZ-MC200US [M4S527]
COPYRIGHT © 2004 Victor Company of Japan, Limited
No.YF059SCH
2004/11
CHARTS AND DIAGRAMS
NOTES OF SCHEMATIC DIAGRAM
Safety precautions
The Components indentified by the symbol are
critical for safety. For continued safety, replace safety
critical components only with manufacturer's recommended parts.
1. Units of components on the schematic diagram
Unless otherwise specified.
1) All resistance values are in ohm. 1/6 W, 1/8 W (refer to
parts list).
Chip resistors are 1/16 W.
K: KΩ(1000Ω), M: MΩ (1000KΩ)
2) All capacitance values are in µF, (P: PF).
3) All inductance values are in µH, (m: mH).
4) All diodes are 1SS133, MA165 or 1N4148M (refer to parts
list).
Note: The Parts Number, value and rated voltage etc. in
the Schematic Diagram are for references only.
When replacing the parts, refer to the Parts List.
2. Indications of control voltage
AUX : Active at high.
AUX or AUX(L) : Active at low.
!
4. Voltage measurement
1) Regulator (DC/DC CONV) circuits
REC : Colour bar signal.
PB : Alignment tape (Colour bar).
— : Unmeasurable or unnecessary to measure.
2) Indication on schematic diagram
Voltage indications for REC and PB mode on the schematic diagram are as shown below.
REC mode
12 3
2.5
(5.0)
PB mode
1.8
PB and REC modes
(Voltage of PB and REC modes
are the same)
Note: If the voltages are not indicated on the schematic
diagram, refer to the voltage charts.
5. Signal path Symbols
The arrows indicate the signal path as follows.
NOTE : The arrow is DVC unique object.
Playback signal path
Playback and recording signal path
3. Interpreting Connector indications
1
2
Removable connector
3
1
2
Wire soldered directly on board
3
1
Non-removable Board connector
2
3
1
2
4
Board to Board
3
Connected pattern on board
The arrows indicate signal path
Note: For the destination of each signal and further line
connections that are cut off from the diagram,
refer to "BOARD INTERCONNECTIONS"
Recording signal path
(including E-E signal path)
Capstan servo path
Drum servo path
(Example)
R-Y
Playback R-Y signal path
Y
Recording Y signal path
6. Indication of the parts for adjustments
The parts for the adjustments are surrounded with the circle
as shown below.
7. Indication of the parts not mounted on the circuit board
“OPEN” is indicated by the parts not mounted on the circuit
board.
R216
2-1
OPEN
CIRCUIT BOARD NOTES
1. Foil and Component sides
1) Foil side (B side) :
Parts on the foil side seen from foil face (pattern face)
are indicated.
2) Component side (A side) :
Parts on the component side seen from component face
(parts face) indicated.
rts location are indicated by guide scale on the circuit board.
2. Parts location guides
Parts location are indicated by guide scale on the circuit board.
LOCATION
IC
Category : IC
Horizontal “A” zone
Vertical “6” zone
(A : Component side)
D : Discrete component)
B : Foil side
C : Chip component
REF No.
IC101 B C 6 A
Note: For general information in service manual, please
refer to the Service Manual of GENERAL INFORMATION Edition 4 No. 82054D (January 1994).
2-2
PMA
PMA
2
BOARD INTERCONNECTION
BCHI4
(Page2-43)
CN5101
YTU94128A-4
CN201
DRIVE-IS
HGout+IS
DRIVE+IS
CN202
DS2a
DS2b
DS1b
DS1a
DS1b
DS2b
DS1a
DS2a
GND
BCHI8
BCHI12
BCHI11
BCHI10
BCHI9
BCHI13
BCHI6
BCHI7
CDS_STBY
(Page2-50)
POWER UNIT
YTU94074-11
YTU94077-11
CN209
BCHI5
REG_3.1V
REG_4.8V
DRV_4.8V
GND
S_SHUT
MIC/L
MIC/R
SPKSPK+
AIBD
HGVcc+IS
AOBD
AIOLRCK
PD_L
BUZZER
Z_LED
F_VCC
ZOOM01
ZOOM04
ZOOM02
ZOOM03
HGout-IS
HGVss-IS
GATE_PLS
ISO200
IR_OUT
AIOBCK
AOMCLK
(Page2-21)
AUD_CLK
L_MUTE
A_MUTE
AUD_DATA
AUEE_CTL
AUDIO_CS
YTU94129A-33
YTU94109-33
FOCUS02
MAIN_IF(Page2-35)
FOCUS01
FOCUS04
FOCUSO3
ASPECT_S
AC_AUD/L
AC_AUD/R
REG_4.8V
REG_3.1V
HGVcc+ND
CAM_OUT
VDIRS
AU_SIG/L
AU_SIG/R
HP_SIG/L
HP_SIG/R
M_AUD/L
M_AUD/R
HGout-ND
HDIRS
GND
CN204
DRIVE-ND
HGout+ND
HGVss-ND
DRIVE+ND
(Page2-25)
F/Z_CS
CAM_VD
CLK1MO
CLK4M5
LENS_LED
CN203
TG_RST
NDHAL_LV
IRIS_PS
ND_O/C
M_AUD/L
M_AUD/R
AC_AUD/L
AC_AUD/R
REG_4.8V
IRIS_CS
NDPWM
CAM_CLK
CAM_IN
AUDIN
AUDOUT
AUDSYNC
AUDBITCLK
nAUDRESET
(Page2-19)
IR_OUT
(Page2-15)
AL_3.3V
GND
REG_3.1V
CLK27A
ACPLLOFF
REG_3.1V
GND
REG_3.1V
LCD_R
GND
LCD_G
LCD_B
VDCVF
LIT_3V
LCD_OPEN
LCD_RVS
HDCVF
VIF_CLK
VIF_OUT
BLKB
BLKA
VIOYSOUT
VIOCOUT
BLKC
OUTV2
VC0
VIF_IN
VC2
VC1
DV2OUT0
DV2OUT1
VC3
DOT_CLK
DV2OUT3
DV2OUT2
VCO
VC1
VC2
VC3
BLKA
BLKB
BLKC
OSD_HD
OSD_VD
DOT_CLK
OSD_VD
OSD_HD
DV2OUT4
DV2OUT5
YTU94074-10
YTU94077-10
(Page2-23)
DV2OUT7
DV2CKOUT
VI6
VI7
DV2OUT6
MPGHSYNC
MPGFLD
MPGVSYNC
LIT_3V
AL_3.3V
REG_DATA
REG_CLK
BATT_L
ADP_L
HP_DET
REG_CS
P_DET
VI5
VI4
REG_3.1V
VI3
VI2
VI1
GND
CHRG_LED
STIL_LED
VOIC_LED
VI0
VENC_RST
(Page
PLAY_SW
VIDE_LED
REG_2.5V
AUD_CLK
AUDIO_CS
AUEE_CTL
POFF_SW
MODE_SW
REC_SW
L_MUTE
BUZZER
AUD DATA
CN5201
CN5103
5
H2
H1
HL
RG
OV3
OV1
OV2
OV4
REG-7.5V
REG_12V
CCD-7.5V
REG_3.1V
REG_4.8V
GND
TG_ID
TG_HD
MCLKI
TG_VD
TG_CS
FLSH_RST
TG_FLD
CCDOUT1
CCDOUT2
REG_4.8V
REG_3.1V
ACHI0
ACHI3
ACHI5
ACHI2
ACHI6
ACHI1
ACHI4
4
REG_3.1V
G_RST
P_GYAMP
GND
(Page2-27)
CN5102
(Page2-33)
CAM_OUT
CAM_CLK
(Page2-31)
ACHI13
ACHI7
ACHI8
ACHI12
ACHI11
ACHI10
ACHI9
CPOB2
CPOB2
TG_VCC
TG_VCC
BCHI0
SUB
BCHI1
CPOB
CPOB
BCHI2
PBLK
ADCLK
PBLK
ADCLK
BCHI3
CN101
CN102
3
CN103
CN106
2
Z_PTR_AD
F_PTR_AD
OP_THRMO
STRB_SNS
STRB_AD
STRB_CHG
VDIRS
HDIRS
LENS_LED
F/Z_CS
CAM_VD
CLK1M0
CLK4M5
TG_RST
NDHAL_LV
ND_D/C
IRIS_PS
IRIS_CS
CAM_IN
Y_GYAMP
SCPU_CS
SCPU_SCK
SCPU_SI
SCPU_SO
S_SHUT
VENC_RST
VENC_CS
PS_CTL
VIF_CLK
VIF_OUT
VIF_IN
S2_DET
OUTV2
LCD_BL
LCD_CS
PMA1
PMA2
PMA3
CAM_CLK
CAM_OUT
PMA5
PMA4
G_RST
PMA6
PMA7
MCLKI
P_GYAMP
PMA8
PMA9
TG_CS
PMA10
TG_HD
PMA11
PMD0
TG_ID
PMD1
TG_VD
ACHI0
PMD2
ACHI1
PMD3
ACHI3
ACHI5
ACHI2
ACHI6
ACHI7
ACHI4
ACHI8
(Page2-13)
PMD10
PMD8
PMD9
PMD7
PMD6
PMD5
PMD4
PMD11
ACHI9
ACHI10
PMD12
ACHI11
PMD13
ACHI12
PMD14
ACHI13
PMD15
BCHI0
nPMWE
BCHI1
nPMDE
BCHI2
BCHI3
BCHI4
BCHI5
nCREQ
BCHI6
nCACK
BCHI7
CLK27B
BCHI8
BCHI9
S_IN_L
BCHI11
BCHI10
REG_3.1V
REG_1.5V
VLD_PIX
SSGFLD
DMACLR
DMABREQ
DMASREQ
nPMBLS1
nPMBLSO
nPMCS1
AFE_RST
ANA_IN_H
BCHI12
PPRD0
PPRD1
PPRD2
PPRD3
PPRD4
PPRD5
PPRD6
PPRD7
PPRD8
PPRD9
PPRD10
PPRD11
PMINT
FLDCPU
VDCPU
ID_LAT
CLK27A
BCHI13
CDS_STBY
GND
SOF
VCLK
PMA0
nPMWAIT
FLSH_RST
REG_3.1V
GND
SDR_DQ31
SDR_DQ30
SDR_DQ31
SDR_DQ30
TG_FLD
STRB_EVR
PPRD0
PPRD1
PPRD2
PPRD3
PPRD4
PPRD5
PPRD6
PPRD7
PPRD8
PPRD9
PPRD10
PPRD11
VLD_PIX
SOF
VCLK
SSGFLD
DMACLR
DMABREQ
DMASREQ
nPMBLS1
nPMBLS0
nPMCS1
PMINT
FLDCPU
VDCPU
ID_LAT
AFE_RST
CLK27A
DV2CKOUT
SDR_DQ29
SDR_DQ28
SDR_DQ27
SDR_DQ27
SDR_DQ28
SDR_DQ29
SDR_DQ26
SDR_DQ25
SDR_DQ24
SDR_DQ24
SDR_DQ26
SDR_DQ25
SDR_DQ23
SDR_DQ22
SDR_DQ21
SDR_DQ22
SDR_DQ23
SDR_DQ21
SDR_DQ20
SDR_DQ19
SDR_DQ18
SDR_DQ18
SDR_DQ19
SDR_DQ20
(Page2-11)
SDR_DQ15
SDR_DQ17
SDR_DQ16
SDR_DQ14
SDR_DQ13
SDR_DQ12
SDR_DQ11
SDR_DQ16
SDR_DQ15
SDR_DQ14
SDR_DQ17
SDR_DQ13
SDR_DQ11
SDR_DQ12
CFD3
CFD5
CFD4
CFD11
CFD12
nCFCD1
SDR_DQ10
SDR_DQ9
SDR_DQ8
SDR_DQ9
SDR_DQ8
SDR_DQ10
CFD6
CFD14
CFD13
SDR_DQ7
SDR_DQ6
SDR_DQ7
SDR_DQ6
CFD7
CFD15
SDR_DQ5
SDR_DQ4
SDR_DQ4
SDR_DQ5
nCFCE1
nCFCE0
SDR_DQ3
SDR_DQ2
SDR_DQ2
SDR_DQ3
nCFOE
CFA10
SDR_DQ1
SDR_DQ0
SDR_DQ1
SDR_DQ0
nCFIORD
CFA9
SDR_DQM2
SDR_DQM3
SDR_DQM3
SDR_DQM2
nCFWE
nCFIOWR
CFA8
SDR_DQM1
SDR_DQM0
SDR_WE
SDR_WE
SDR_DQM0
SDR_DQM1
CFRDY
CFA7
SDR_CAS
SDR_RAS
SDR_CAS
SDR_RAS
CFCSEL
CFA6
SDR_CSO
SDR_BA1
SDR_BA1
SDR_CSO
CFA5
CFA4
SDR_BA0
SDR_CKE
SDR_CKE
SDR_BAO
CFRESET
CFA3
SDR_CLK
SDR_CLK
nCFWAIT
SDR_A10
SDR_A9
SDR_A8
SDR_A7
SDR_A6
SDR_A5
SDR_A9
SDR_A8
SDR_A5
SDR_A6
SDR_A7
SDR_A10
(Page2-9)
nCFREG
CFD0
CFA0
CFBVD2
CFA2
CFA1
SDR_A4
SDR_A4
CFD1
CFBVD1
SDR_A3
SDR_A2
SDR_A3
SDR_A2
CFD8
SDR_A1
SDR_A1
CFD2
SDR_A0
SDR_A0
CFD9
SDR_A11
SDR_A11
CFWP
CFD10
SDR_A12
nPMCS7
nPMCS7
SDR_A12
nCFCD2
PMA16
PMA16
PMA17
PMA17
SDCMD
SDDAT3
PMA18
PMA18
PMA19
PMA19
SDCLK
PMA20
PMA20
SDDAT1
SDDAT0
PMA21
PMA21
SDCD
SDDAT2
PMA1
PMA1
SDWP
1
NOTE: The number of patch cords () are indicated by interconnected.
2-3
A
BCD
CN105
CN205
SDR
A11
SDR
A11
REG
3
1V
CN207
CN302
CN306
CN7802
(Page2-49)
CN7801
YTU94074-24
YTU94077-24
LCD MODULE
CN305
CN304
YTU94074-12
YTU94077-12
(Page2-50)(Page2-50)
REAR UNIT
LCD_BLK
VBB
BATT_L
BATT_+
Y_OUT
V_OUT
C_OUT
REG_3.1V
GND
GND
HP_GND
(Page2-27)
REG_14V
MLT_GND
GND
REG_CS
REG_CLK
SJIG_RST
REG_DATA
PWR_CHEK
REG_3.1V
REG_8.5V
REG_4.8V
GND
REG_14V
CHRG_EVR
I_MTR
V_BATT
T_BATT
DC_CHEK
REG_3.1V
REG_4.8V
(Page2-41)
STH
3)
VI3
VI2
REG_2.5V
VI1
VI0
VI4
VENC_RST
.
GND
_
CHRG_LED
STIL_LED
VOIC_LED
L_MUTE
AUD_CLK
AUDIO_CS
AUEE_CTL
(Page2-17)
POFF_SW
PLAY_SW
MODE_SW
REC_SW
VIDE_LED
BUZZER
AUD_DATA
PD_L
A_MUTE
DC_CHEK
V_BATT
T_BATT
I_MTR
LCD_RVS
LCD_OPEN
KEY_C
CF_SLOT
KEY_A
CHRG_EVR
ZOOM_SW
KEY_B
ACES_LED
MD_THRMO
DSP_RST
SCPU_SO
SCPU_CS
SCPU_SI
SCPU_SCK
FLSH_RST
SJIG_TX
SJIG_RX
SJIG_RST
VPP
SC
XSTH
CN301
CSH
VHVDD
CN206
DSD
CKH1
XDSG
CKH2
REG_12V
REG-7.5V
REG_1.5V
REG_1.2V
BATT_+
TT_BATT
BATT_L
ADP_L
DRV_3.3V
ADP_DC
REG_8.5V
DRV_4.8V
AL_3.3V
STV
CSV
ENB
DSG
XSTV
CKV2
XENB
LCD_BLK
(Page2-29)
LCD_R
VDCVF
HDCVF
LCD_B
LCD_G
VIOYSOUT
VIOCOUT
ASPECT_S
(Page2-39)
PS_CTL
CN303
CN208
CKV1
LCD_BL
LCD_CS
MON_B
VIF_CLK
VIF_OUT
MON_R
MON_G
VCOM
MON_RPD
REG_4.8V
Y_GYAMP
G_RST
ANA_IN_H
GND
TT_BATT
(Page2-37)
V_OUT
ADP_DC
Y_OUT
C_OUT
CENTER
HALF_PSH
ANA_IN_H
RIGHTUP
LEFTDOWN
AU_SIG/L
AU_SIG/R
INFO
GOMI
REG_3.1V
ADP_L
HP_SIG/R
HP_SIG/L
TL1
LEFTUP
HP_DET
CN310
TL2
P_DET
CN308
CN307
CN309
ZOOM UNIT
YTU94074-6
YTU94077-6
CN9904
(Page2-50)
_
SDR_A12
nPMCS7
PMA16
PMA17
PMA18
PMA19
PMA20
PMA21
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMD0
PMD1
PMA2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
REG_2.5V
PMD14
PMD13
PMA12
PMA13
PMA14
PMA15
PMD15
nPMWE
CN9802
CN104
CN9803
nPMOE
CN9902
_
PMA17
PMA16
nPMCS7
SDR_A12
CFD10
nCFCD2
SDDAT3
PMA18
SDCMD
PMA19
SDCLK
PMA20
SDDAT1
SDDAT0
PMA21
SDCD
SDDAT2
SDWP
PMA1
PMA2
PMA3
PMA4
PMA5
PMA7
PMA6
nPMWAIT
PMA0
PMA8
PMA9
PMA10
PMA11
PMD0
PMD1
ARMTDO
PMD2
ARMTCK
PMD3
ARMTMS
PMD4
ARMTDI
PMD6
PMD5
nARMTRST
nJRESET
PMD7
PMD8
NU_RX
PMD9
NU_TX
MOD0
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
nPMWE
nPMOE
DV1CLKIN
MPEG_RST
ACPLLOFF
AUDSYNC
AUDBITCLK
nAUDRESET
PWR_CHEK
nUSBDP_PU
nUSB_DET
PMA15
PMA14
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1INH
DV1INV
nCINT
nVOEN
nPMCS0
PLLSTOP
DV1IN7
DV2OUT7
DV2OUT6
DV2OUT5
DV2OUT4
DV2OUT3
DV2OUT2
DV2OUT1
DV2OUT0
AUDOUT
AUDIN
NDPWM
DSP_RST
USBDP
USBDN
REG_2.5V
REG_3.1V
REG_1.2V
REG_4.8V
PMA13
GND
PMA12
PMD15
REG_1.5V
REG_2.5V
REG_3.1V
GND
PMA0
nPMWAIT
PMD14
PMD13
MPGFLD
nUSBDP_PU
nUSB_DET
USBDP
USBDN
S_PDIF
PMD10
PMD11
PMD12
VI0
MPGVSYNC
MPGHSYNC
PMD9
VI1
PMD7
PMD8
VI3
VI2
(Page2-5)
PMD6
PMD5
PMD4
PMD3
VI5
VI6
VI4
VI7
GND
PMA9
PMD0
PMD1
PMD2
PMA11
PMA10
(Page2-7)
AIOLRCK
AIBD
AOMCLK
AOBD
AIOBCK
REG_3.1V
PMA8
PMA7
DRV_3.3V
ANA_IN_H
S_IN_L
PMA6
PMA5
PMA4
PMA3
PMA2
PMA1
nPMOE
nPMWE
DV2CKOUT
CLK27B
nCREQ
PMA15
nCACK
PMA14
PMA12
PMA13
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1IN7
DV1INH
DV1INV
DV1CLKIN
nCINT
nVOEN
nPMCSO
MPEG_RST
PLLSTOP
S_PDIF
CN9801
(Page2-47)
CN9903
CN9901
(Page2-45)
y10480001a_rev0
DE F G
2-4
ACHI9
SJIG TX
TO CN102
T
DIGITAL(DIGI IF) SCHEMATIC DIAGRAM
CN104
5
4
QGF0309F1-51W
TO CF SUB
(CN9803)
R657
0Ω
47k
TO CDS(CN5102)
CN101
QGF0309F1-51W
TG_ID
MD_THRMO
nCFCD1
CFD3
CFD11
CFD4
CFD12
CFD5
CFD13
CFD6
CFD14
CFD7
CFD15
nCFCE0
nCFCE1
CFA10
nCFOE
nCFIORD
CFA9
nCFIOWR
CFA8
nCFWE
CFA7
CFRDY
CFA6
CFCSEL
C602
0.1
47k
47k
47k
47k
47k
47k
47k
47k
47k
47k
CFA5
CFA4
CFRESET
CFA3
nCFWAIT
CFA2
CFA1
nCFREG
CFA0
CFBVD2
CFD0
CFBVD1
CFD1
CFD8
CFD2
CFD9
CFWP
CFD10
GND
nCFCD2
TO NUCORE
MCLKI
TG_CS
CAM_CLK
TO P.PRCS
TG_VD
CAM_OUT
TG_HD
TG_FLD
FLSH_RST
TO NUCORE
TO MEMORY
ACHI0
ACHI1
ACHI2
ACHI3
ACHI4
ACHI5
ACHI6
TO P.PRCS
ACHI7
ACHI8
R653
R655
R656
R644
R645
R646
R647
R648
R649
R650
R654
3
REG_3.1V
nUSBDP_PU
nUSB_DET
GND
USBDP
USBDN
D402
RSA6.1J4-W
L401
NQR0129-002X
TO NUCORE
REG_3.1V
SDDAT2
SDDAT3
SDCMD
GND
SDCLK
SDDAT0
SDDAT1
SDCD
SDWP
TO NUCORE
TO NUCORE
REG_3.1V
NU_TX
nJRESET
ARMTCK
ARMTDO
0Ω
R702
CN105
QGB0512L1-30X
ARMTMS
ARMTDI
nARMTRST
0Ω
R703
NU_RX
TO JIG CONNEC
AL_3.3V
0Ω
R704
J101
QNZ0497-001
Q202
2SA2029/QRS/-X
TL103
L201L201
L201L201
NQR0536-001X
R204
6.8k
R203
47K
R202
R201
47K
Q201
DTC144EM-X
TO USB
R405
R403
22k
22k
R402
R406
R404
22k
22k
22k
R401
C401
/6.3
10
22k
T
D401
RSA6.1J4-W
R408
R409
C402
R412
R413
R407
22k
22
22
0.1
22
22
2
CN106
NNZ0058-001X
TO SD CARD
1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
2-5
A
BCD
C
S
TO REG(CN308)
CN103
QGA1002F1-07X
CN102
QGB0402K2-B0X
TO ANALOG
(CN203)
SJIG_RST
SJIG_RX
SJIG_TX
DSP_RST
PWR_CHEK
LCD_BL
LCD_CS
OUTV2
S2_DET
VIF_OUT
VIF_IN
VIF_CLK
PS_CTL
REG_2.5V
VENC_CS
DV2OUT0
DV2OUT1
DV2OUT2
DV2OUT3
DV2OUT4
DV2OUT5
DV2OUT6
DV2OUT7
MPGFLD
DV2CKOUT
MPGHSYNC
MPGVSYNC
CLK27A
VENC_RST
ACPLLOFF
AUDIN
AUDOUT
AUDSYNC
AUDBITCLK
nAUDRESET
AIBD
AOBD
AIOLRCK
AOMCLK
AIOBCK
S_SHUT
FLSH_RST
SCPU_CS
SCPU_SCK
SCPU_SI
SCPU_SO
G_RST
Y_GYAMP
NDPWM
NDHAL_LV
ND_O/C
CAM_IN
IRIS_CS
IRIS_PS
CLK1M0
VDIRS
HDIRS
Z_PTR_AD
F_PTR_AD
OP_THRMO
F/Z_CS
LENS_LED
CLK4M5
CAM_VD
CAM_CLK
CAM_OUT
TG_RST
STRB_CHG
STRB_EVR
STRB_AD
STRB_SNS
AL_3.3V
MD_THRMO
REG_4.8V
GND
VPP
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
ACHI2
ACHI3
ACHI4
ACHI5
ACHI6
ACHI7
ACHI8
ACHI9
ACHI10
ACHI11
ACHI12
TO P.PRCS
ACHI13
REG_3.1V
REG_3.1V
REG_4.8V
REG_4.8V
BCHI0
BCHI1
BCHI2
BCHI3
BCHI4
BCHI5
BCHI6
BCHI7
TO P.PRCS
BCHI8
BCHI9
BCHI10
BCHI11
BCHI12
BCHI13
CDS_STBY
GND
G_RST
P_GYAMP
TO P.PRCS
REG_3.1V
REG_3.1V
REG_1.5V
REG_1.5V
REG_1.2V
GND
GND
TO NUCORE, SUB CPU
TO P.PRCS, LCD DRV
TO JIG, SUB CPU
TO P.PRCS, LCD DRV, V I/O
TO NUCORE, V I/O
TO NUCORE, MPEG2, V I/O
TO P.PRCS, NUCORE, MPEG2, AC97
TO NUCORE, AC97
TO MPEG2, AUDIO
TO P.PRCS, AUDIO
TO MEMORY, SUB CPU
TO P.PRCS, SUB CPU
TO P.PRCS, GYRO
TO NUCORE, OP DRV
TO P.PRCS, OP DRV
TL101
TL102
TL104
S_PDIF
ANA_IN_H
S_IN_L
TO MEMORY
TO P.PRCS
TO P.PRCS,OP DRV,MDA,V I/O
TO NUCORE
P.PRCS
STROBE
TO CN104
MON_G
MON_R
MON_B
MON_RPD
VCOM
GND
TO NUCORE
ARMTDI
nARMTRST
nJRESET
0Ω
R703
L1-30X
REG_3.1V
NU_RX
NU_TX
AL_3.3V
0Ω
R704
TO NUCORE
TO CN102
MOD0
SJIG_TX
SJIG_RX
TO CN102
VPP
GND
SJIG_RST
MON_B
VCOM
TO CN102
MON_R
GND
MON_G
MON_RPD
DIGITAL(DIGI IF
10
)
TO JIG
LCD DRV
IG CONNECTOR
ONS".
y10481001a_rev0
DE F G
2-6
#
DIGITAL(MPEG2) SCHEMATIC DIAGRAM
R3043
VO0
VO1
VO2
VO3
VO4
VO5
VO6
VO7
VOCLK
nVOEN
VOHSYNC
VOVSYNC
0
IC3002
R3048
C3018
R3045
R3044
100
CLK27B
TO P.PRCS
MPEG_RST
TO NUCORE
PLLSTOP
5
REG_1.5V
REG_2.5V
TO REG
REG_3.1V
MPGFLD
MPGHSYNC
MPGVSYNC
DV2CKOUT
DV1IN0
DV1IN1
DV1IN2
DV1IN3
DV1IN4
DV1IN5
DV1IN6
DV1IN7
DV1CLKIN
nVOEN
DV1INH
DV1INV
GND
MPGFLD
MPGHSYNC
MPGVSYNC
VI0
VI0
VI1
VI1
VI2
VI2
VI3
VI3
VI4
VI4
VI5
VI5
VI6
VI6
VI7
VI7
#
R3049
#
R3050
#
R3051
#
R3052
#
R3053
#
R3054
#
R3055
#
R3056
#
R3057
R3058
R3059
4
TO CN102
3
TO NUCORE
L3001
NQR0129-002X
L3002
NQR0129-002X
L3006
L3003
NQR0129-002X
L3004
NQR0129-002X
C3001
C3003
T
C3004
T
L3005
NQR0006-001X
4.7k
R3037
NDI/JTDI
NDO/JTDO
OPEN
R3042
47k
4.7k 4.7k
R3035 R3034
R3036
NCLK/JTCLK
nNRST/nJTRST
OPEN
4.7k
R3033 R3041
JMOD
PSTOP
NMOD/JTMS
PWM
STCLK
PCICLK
C3017
C3016
C3015
C3014
C3013
C3012
VDD1
C3011
0.1
0.1
0.1
10k
10k
4.7k
VDD1
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
VDD3
R3040
VDD3
GPIO5
R3039
GPIO4
GPIO0
GPIO1
GPIO2
GPIO3
IC3001
UPD61152F1-A03
R3038
0.1
0.1
0.1
0.1
C3002
T
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDR
VDDH
VDDH
VDDH
VDDH
VDDH
VDDH
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PVDD
PVDD
PGND
PGND
CSCLK
CSDI
CSDO
VDD1
0.1
C3006
0.1
C3007
T
0.1
C3008
0.1
C3009
C3005
C3010
0.1
T
10
/6.3
R3001
10k
R3002
10k
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
VIHSYNC
VIVSYNC
VICLK
VO0
VO1
VO2
VO3
VO4
VO5
VO6
VO7
VOCLK
nVOEN
VOHSYNC
VOVSYNC
AILRCK
AIBCK
AIBD
AIOLRCK
AIOBCK
AIOBD
ATX
AIMCLK
AOMCLK
R3010
SIREQ
0
R3008
10k
10k
R3011
2
VI0
VI1
VI2
VI3
VI4
AIBD
AIOLRCK
TO CN105
AIOBCK
AOBD
AOMCLK
1
TO DIGI IF
(TL101)
S_PDIF
VIFLD/VIVLD
0
0
R3012
VI5
VI6
VI7
MPGHSYNC
VO0
VO1
VO2
VO3
VO4
VO5
VO6
MPGVSYNC
MPGFLD
VO7
VOCLK
nVOEN
VOHSYNC
VOVSYNC
10k
R3003
R3004
R3013
10k
10k
R3009
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
2-7
A
BCD
SISYNC
SICLK/SISTB
SIVLD
SI0
SI1
SI2
SI3
SI4
SI5
SI6
R3036
47k
OPEN
R3042
4.7k 4.7k
R3035 R3034
R3033 R3041
NMOD/JTMS
NCLK/JTCLK
nNRST/nJTRST
SIVLD
SI0
SI1
JMOD
SI2
0
nCINT
nCACK
nCREQ
nPMWAIT
nPMOE
nPMWE
nPMCS0
PMD15
PMD14
PMD13
PMD12
PMD11
PMD10
PMD9
PMD8
PMD7
PMD6
PMD5
PMD4
PMD3
PMD2
PMD1
PMD0
PMA15
PMA14
PMA13
PMA12
PMA11
PMA10
PMA9
PMA8
PMA7
PMA6
PMA5
PMA4
PMA3
PMA2
PMA1
PMA0
TO NUCORE
TO P.PRCS
TO NUCORE, P.PRCS
TO NUCORE,
MEMORY, P.PRCS
TO NUCORE
TO
NUCORE
MEMORY
P.PRCS
TO
NUCORE
P.PRCS
TO
NUCORE
MEMORY
P.PRCS
TO NUCORE, P.PRCS
R3024
OPEN
4.7k
10k
10k
10k
R3032
R3031
R3030
PWM
nGNT
nREQ
nPME
IDSEL
SI7
SOCLK/SOSTB
nSOREQ nCLKRUN
SOSYNC
SOVLD/SORDY
nCBE3
SO0
PSTOP
SI3
STCLK
PCICLK
SI4
SI5
SI6
R3029
10k
nCBE2
SO1
R3028
10k
nCBE1
SO2
R3027
10k
nCBE0
SO3
10k
R3026
nRESET
SO4
10k
10k
R3020
R3021
CB16
nCINT
nCACK1
SO5
SO6
SO7
10k
R3014
R3022
nCREQ1
nSOEN
R3023
nCACK0
MA0
nCREQ0
MA1
nCWAIT
MA2
nCRE
MA3
nCWE
MA4
4.7k
R3025
nCCS
MA5
CD11
CD12
CD13
CD14
CD15
MA6
CD9
CD8
CD7
CD6
CD5
CD4
CD3
CD2
CD1
CD0
CA15
CA14
CA13
CA12
CA11
CA10
CA9
CA8
CA7
CA6
CA5
CA4
CA3
CA2
CA1
CA0
HMODE2
HMODE1
HMODE0
MDQM
nMWE
nMCAS
nMRAS
nMCS
MCLKE
R3015
MCLK
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MA13
MA12
MA7
MA8
MA9
MA10
MA11 CD10
C3019
MDQM
nMWE
nMCAS
nMRAS
nMCS
MMCLKE
22
MMCLK
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
MA13
MA12
MA11
MA10
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
C3312
0.1
C3318
0.1
T
MD0
TL3301
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MDQM
nMWE
TL3302
nMCAS
TL3303
nMRAS
TL3304
nMCS
TL3305
MA13
TL3306
MA12
TL3307
MA10
TL3308
MA0
MA1
MA2
MA3
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23 MD24
MDQM
C3321
0.1
C3311
/6.3
10
R3016
R3017
R3018
R3019
IC3301
K4S283233F-HN75
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
VDD
DQM0
WE_
CAS_
RAS_
CS_
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD VSS
VDD
DQ16
VDDQ
DQ17
DQ18
VSSQ
DQ19
DQ20
VDDQ
DQ21
DQ22
VSSQ
DQ23
VDDQ
DQM2
NC
NC
VDDQ
IC3301
0Ω
VSSQ
VDDQ
VSSQ
VDDQ
DQM1
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
DQM3
VSSQ
2.2k
VSS
MD15
DQ15
MD14
DQ14
MD13
DQ13
MD12
DQ12
MD11
DQ11
MD10
DQ10
MD9
DQ9
DQ8
VSS
NC
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
VSS
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
NC
NC
MD8
MDQM
MMCLKE
MA11
MA9
MA8
MA7
MA6
MA5
MA4
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MDQM
R3301
0
C3316
0.1
C3322
0.1
MMCLK
# EXCHANGE PARTS LIST
R3012
GZ-MC200**
GZ-MC100**
R3013 R3048 R3049 R3050 R3051 R3052 R3053 R3054 R3055 R3056 R3057
0
1000100
0
100
0
10001000100010001000100010001000100
L3302
L3301
NQR0129-002X
DIGITAL(MPEG2
10
)
ONS".
y10483001a_rev0
DE F G
2-8
C
S
1
DIGITAL(NUCORE) SCHEMATIC DIAGRAM
VLD_PIX
AFEVPIX
VCLK
AFECLK
3CCDCLK
PPRO11
AFED11
PPRO10
AFED10
TO P.PRCS
PPRO7
PPRO8
PPRO9
AFED7
AFED8
AFED9
PPRO6
AFED6
PPRO5
AFED5
PPRO4
AFED4
PPRO3
AFED3
PPRO2
AFED2
PPRO1
AFED1
PPRO0
SDR_CKE
AFED0
SDR_DQ31
MCKE
SDR_DQ31
SDR_DQ29
SDR_DQ30
SDRAM_D30
SDRAM_D31
SDR_DQ30
SDR_DQ31
SDR_DQ30
SDR_DQ29
SDR_DQ27
SDR_DQ28
SDRAM_D28
SDRAM_D29
SDR_DQ28
SDR_DQ29
SDR_DQ28
SDR_DQ27
SDR_DQ25
SDR_DQ26
SDRAM_D26
SDRAM_D27
SDR_DQ26
SDR_DQ27
SDR_DQ26
SDR_DQ25
SDR_DQ23
SDR_DQ24
SDRAM_D24
SDRAM_D25
SDR_DQ24
SDR_DQ25
SDR_DQ24
SDR_DQ23
SDR_DQ21
SDR_DQ22
SDRAM_D22
SDRAM_D23
SDR_DQ21
SDR_DQ22
SDR_DQ23
SDR_DQ22
SDR_DQ21
SDR_DQ19
SDR_DQ20
SDRAM_D19
SDRAM_D20
SDRAM_D21
SDR_DQ19
SDR_DQ20
SDR_DQ20
SDR_DQ19
SDR_DQ17
SDR_DQ18
SDRAM_D17
SDRAM_D18
SDR_DQ17
SDR_DQ18
SDR_DQ18
SDR_DQ17
SDR_DQ15
SDR_DQ16
SDRAM_D15
SDRAM_D16
SDR_DQ16
SDR_DQ16
SDR_DQ15
SDR_DQ13
SDR_DQ14
SDRAM_D14
SDR_DQ13
SDR_DQ14
SDR_DQ15
SDR_DQ14
SDR_DQ13
SDR_DQ11
SDR_DQ12
SDRAM_D11
SDRAM_D12
SDRAM_D13
SDR_DQ11
SDR_DQ12
SDR_DQ12
SDR_DQ11
SDR_DQ9
SDR_DQ10
SDRAM_D9
SDRAM_D10
SDR_DQ10
SDR_DQ8
TO P.PRCS
TO MPEG2
TO CN105
PMINT
SOF
nCINT
MOD0
VDCPU
ID_LAT
5
R4081
47k
10k
0603
R4058
R4061
47k
0Ω
R4062
TO CN104
PWR_CHEK
PLLSTOP
SSGFLD
MPEG_RST
CFWP
nCFWE
nCFWAIT
CFRESET
nCFREG
CFRDY
nCFOE
nCFIOWR
nCFIORD
CFCSEL
CFD0
CFD1
CFD2
CFD3
CFD4
CFD5
CFD6
CFD7
CFD8
CFD9
CFD10
CFD11
CFD12
CFD13
CFD14
CFD15
nCFCE0
nCFCE1
nCFCD1
nCFCD2
CFBVD1
CFBVD2
CFA0
CFA1
CFA2
CFA3
CFA4
CFA5
CFA6
CFA7
CFA8
CFA9
CFA10
NDPWM
STRB_EVR
R4063
R4064
R4065
R4066
R4101
R4102
R4103
R4104
R4105
R4106
R4107
RA4007
RA4008
RA4009
RA4010
R4110
R4111
R4112
RA4011
RA4012
RA4013
TO CN102
TO MPEG2
TO P.PRCS
TO MPEG2
4
3
TO CN102
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
TL4015
TL4016
GPIO7
0Ω
GPIO26
0Ω
GPIO28
0Ω
GPIO25
GPIO27
0Ω
GPIO29
0Ω
CFWP
0Ω
nCFWE
0Ω
nCFWAIT
0Ω
CFRESET
0Ω
nCFREG
0Ω
CFRDY
0Ω
nCFOE
nCFIOWR
nCFIORD
CFCSEL
CFD0
CFD1
CFD2
CFD3
CFD4
CFD5
CFD6
CFD7
CFD8
CFD9
CFD10
CFD11
CFD12
CFD13
CFD14
CFD15
nCFCE0
0Ω
nCFCE1
nCFCD1
0Ω
nCFCD2
CFBVD1
CFBVD2
CFA0
CFA1
CFA2
CFA3
CFA4
CFA5
CFA6
CFA7
CFA8
CFA9
CFA10
PWM0
PWM1
PWM2
PWM3
GPIO5
GPIO4
GPIO3
GPIO2
GPIO6
AFESOF
SDR_DQ9
SDR_DQ10
SDR_DQ9
SDR_DQ7
SDRAM_D7
SDRAM_D8
SDR_DQ8
SDR_DQ8
SDR_DQ7
SDR_DQ5
SDR_DQ6
SDRAM_D6
SDR_DQ6
SDR_DQ7
SDR_DQ6
SDR_DQ5
SDR_DQ3
SDR_DQ4
SDRAM_D4
SDRAM_D5
TO MEMORY
SDR_DQ3
SDR_DQ4
SDR_DQ5
SDR_DQ4
SDR_DQ3
SDR_DQ1
SDR_DQ2
SDRAM_D1
SDRAM_D2
SDRAM_D3
SDR_DQ2
SDR_DQ2
SDR_DQ0
SDRAM_D0
SDR_DQ0
SDR_DQ1
SDR_DQ1
SDR_DQ0
SDR_DQM2
SDR_DQM3
DQM2
DQM3
SDR_DQM2
SDR_DQM3
SDR_DQM3
SDR_DQM2
SDR_DQM0
SDR_DQM1
DQM0
DQM1
SDR_DQM0
SDR_DQM1
SDR_DQM1
SDR_DQM0
SDR_WE
SDR_CAS
nCAS
nMWE
SDR_WE
SDR_WE
SDR_CAS
SDR_CS0
SDR_RAS
nRAS
SDR_RAS
SDR_CAS
SDR_RAS
SDR_BA1
nMCS0
SDRAMBS1
SDR_CS0
SDR_CS0
SDR_BA0
SDRAMBS0
SDR_BA0
SDR_BA1
SDR_BA1
SDR_BA0
SDR_CLK
R4055
33
R4056
SDRAMCLK
SDRAMCLKR
SDR_CKE
SDR_CLK
SDR_CKE
SDR_CLK
SDR_A11
SDR_A12
SDRAM_A11
SDRAM_A12
SDR_A10
SDR_A10
SDR_A9
SDR_A9
SDR_A10
SDRAM_A10
SDR_A9
SDR_A8
SDR_A8
SDR_A7
SDR_A8
SDRAM_A8
SDRAM_A9
SDR_A7
SDR_A6
SDR_A6
SDR_A5
SDR_A5
SDR_A4
SDR_A4
SDR_A3
SDR_A3
SDR_A2
SDR_A2
SIP1280I
SDR_A1
SDR_A1
SDR_A0
SDR_A6
SDR_A7
SDRAM_A7
I
SDR A0
SDRAM A6USBPHYCLK
GPIO31
TL4017
R4068
NC3
47k
NC4
R4001
GPIO39
MCLKINNCAMBACLKIN
0Ω
nRESET
3.3k
R4005
DSP_RST
TO CN102
SCANE
nRESETPERH
47k
TL4001
R4009
0Ω
R4006
nJRESET
AFE_RST
TO CN105
TO P.PRCS
TESTSCAN
47k
R4010
R4008
TRACESYNC
TRACECLK
DBGRQ
OPEN
DBQACK
PMA0
PMA1
TL4002
PMA1
PMA0
P.PRCS
TO MPEG2
nPMCS7
nPMCS1
nPMCS0
nPMWE
nPMOE
nPMBLS0
nPMBLS1
nPMWAIT
nARMTRST
TCK
TMS
TDI
R4018
nPMBLS1
nPMWAIT
nARMTRST
P.PRCS
TO MPEG2
0Ω0Ω0Ω0Ω0Ω0Ω0Ω0Ω0Ω
R4019
ARMTCK
ARMTMS
AMBATDO
TL4026
47k6847k
R4020
R4069
ARMTDI
ARMTDO
TO CN105
GPIO24
SIO1
SIO0
TL4027
47k
R4021
R4022
1k
R4007
10k
0Ω
R4023
nVOEN
TO MPEG2
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
PMA18
PMA19
PMA20
PMA21
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
R4017
R4016
R4015
R4014
R4013
R4012
R4011
TL4003
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
P.PRCS
MEMORY
TO MPEG2
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
MEMORY
TO MPEG2
PMA21
PMA20
PMA19
PMA18
TO MEMORY
PMD2
PMD1
PMD0
PMD9
PMD8
PMD7
PMD6
PMD5
PMD4
PMD3
P.PRCS
MEMORY
TO MPEG2
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
nPMWE
nPMCS0
nPMCS1
nPMCS7
TO MPEG2
TO MPEG2
TO P.PRCS
TO MEMORY
nPMOE
nPMBLS0
P.PRCS
MEMORY
TO P.PRCS
PMA2
TO CN102
ACPLLOFF
2
TO CN102
P.PRCS
CLK27A
1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
2-9
A
BCD
DMASREQ
DMABREQ
0Ω
R4024
DMABREQ
DMASREQ
TO P.PRCS
DMACLR
NQR006-001X
47k
R4025
DMACLR
L4010
T
/6.3
C4045
10
R4029
L4007
NQR0006-001X
L4011
NAX0710-00
C4043
0Ω
R4028
0Ω
X4001
0.1
SDR_A8
SDR_A7
SDR_A6
_
SDR_A7
SDR_A6
SDR_A5
SDRAM_A8DMACLR
L4010
NQR006-001X
47k
C4045
R4025
L4007
NQR0006-001X
DMACLR
ONS".
SDR_A5
SDR_A4
T
/6.3
10
R4029
SDR_A4
SDR_A3
SDR_A3
SDR_A2
SIP1280ISD-DVA2
L4011
X4001
NAX0710-001X
C4043
SDR_A2
SDR_A1
SDR_A1
SDR_A0_SDR_A12
SDR_A6
SDR_A7
SDRAM_A7
IC4001
0Ω
R4028
0Ω
0.1
SDR_A0
SDR_A11
SDR_A11
SDR_A4
SDR_A5
SDRAM_A6
SDRAM_A5
USBPHYCLK
USBVSS
SDR_A12
SDR_A2
SDR_A3
SDRAM_A4
SDRAM_A3
USBVSS
USBVDD
0.1
C4042
R4030
0Ω
SDR_A1
SDRAM_A1
SDRAM_A2
USBVSS
USBVDD
0.1
C4041
SDR_A0
SDRAM_A0
USBREXT
6.8k
R4031
SDCLK
22
R4054
SD_CLK
USB4XCLK
USBDp
6.8k
R4032
USBDP
SDWP
SDCD
22
R4053
SD_CD
SD_WP
USBDn
USBVDD
0.1
C4040
USBDN
nUSB_DET
TO DIGI IF
TO CN106
SDCMD
SD_CMD
USBVSS
GND
(USB)
SDDAT2
SDDAT3
SD_DAT3
SD_DAT2
GPIO0
GPIO1
nUSBDP_PU
SDDAT0
SDDAT1
DV1INV
SD_DAT0
SD_DAT1
DV1VSYNC
AUDIN/GPIO13
AUDOUT/GPIO12
AUDSYNC/GPIO10
AUDIN
AUDOUT
AUDSYNC
TO CN102
DV1IN7
DV1CLKIN
DV1INH
DV1UV7
DV1CLKIN
DV1HSYNC
AUDBITCLK/GPIO9
nAUDRESET/GPIO8
GPIO11
0Ω
R4036
AUDBITCLK
nAUDRESET
nAUDRESET
TO MPEG2
DV1IN5
DV1IN6
DV1UV6
DV1UV5
GPIO41
GPIO40
TL4008
DV1IN4
DV1UV4
GPIO43
TL4010
DV1IN2
DV1IN3
DV1UV3
DV1UV2
GPIO42
UART2RXD
TL4011
FLDCPU
TO P.PRCS
DV1IN0
DV1IN1
TL4019
DV1UV0
DV1UV1
DV1CLKOUT
UART2TXD
VCLKIN
220
R4040
CLK27A
TG_FLD
TO CN101
TO CN102
R4050
R4051
R4052
VSS42
VSS43
VSS44
GPIO32/PHASEERR
GPIO33/nVRESET
GPIO34/ZEBRASKIN
47k
R4042
47k
R4041
47k
47k
VSS39
VSS40
VSS41
GPIO35/CSYNC
GPIO36/HSYNC
GPIO37/VSYNC
47k
R4044
TL4013
VSS38
FSADJp
VSS37
FSADJn
VSS36
TVOUTG
VSS35
TVOUTR
VSS34
TVOUTB
VSS33
TVOUTY
VSS31
VSS32
TVOUTCHR
DV2CLKIN
220
47k
R4046
R4045
VSS29
VSS30
DV2CLKOUT
DV2HSYNC
TL4004
DV2CKOUT
VSS27
VSS28
DV2VSYNC
DV2UV7
TL4005
DV2OUT7
DIGITAL(NUCORE
10
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
CVDD1
CVDD2
CVDD3
CVDD4
CVDD5
CVDD6
DV2UV6
DV2UV5
DV2OUT5
DV2OUT6
DV2UV4
RA4002
DV2OUT4
220
DV2UV3
DV2UV2
DV2OUT2
DV2OUT3
DV2UV1
RA4001
DV2OUT1
DV2UV0
220
DV2OUT0
CVDD7
0.1 0.1
C4036 C4035
IC4002
SN74AHC1G04DC-X
TO NUCORE
VSS9
VSS10
VSS11
VSS12
CVDD8
CVDD9
CVDD10
CVDD11
0.1 0.1 0.1
C4034 C4033 C4032
0.1
C4018
VSS8
CVDD12
R4070
4.7k
1SS376-X
CVDD13
R4071
VSS6
CVDD14
4.7k
D4002
D4003
VSS5
CVDD15
VSS4
CVDD16
R4072
Q4001
VSS3
PLLDVDD2
PLLDVDD1
PLLAVDD2
PLLAVDD1
PLLDVSS2
PLLDVSS1
PLLAVSS2
PLLAVSS1
CVDD17
NU_RX
VSS2
nMCS3
nMCS2
nMCS1
MVDD11
MVDD10
MVDD9
MVDD8
MVDD7
MVDD6
MVDD5
MVDD4
MVDD3
MVDD2
MVDD1
VDD26
VDD25
VDD24
VDD23
VDD22
VDD21
VDD20
VDD19
VDD18
VDD17
VDD16
VDD15
VDD14
VDD13
VDD
VDD10
VDD9
VDD8
VDD7
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
AVDD5
AVDD4
AVDD3
AVDD2
AVDD1
AVDD0
AVSS10
AVSS9
AVSS8
AVSS7
AVSS6
AVSS5
AVSS4
AVSS3
AVSS2
AVSS1
AVSS0
PLLPVDD
PLLPVSS
D4001
NU_TX
TO CN108
)
C4031
0.01
C4021
2SC5658/QRS/-X
C4028
C4030
T
R4033
C4027
C4029
0.1
C4006
/6.3
22
MM1613DN-X
C4019
C4007
C4008
C4009
C4010
C4014
C4015
C4016
0.1
C4011
C4012
C4013
C4017
0.1
IC4003
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0Ω
0.1
0.1
1
L4003
L4001
NQR0129-002X
C4001
T
/6.3
10
L4002
NQR0129-002X
C4002
T
/6.3
10
L4004
C4004
10
L4005
T
C4005
T
/6.3
10
R4049
0Ω
L4006
NQR0448-002X
C4020
1
R4057
0Ω
REG_2.5V
TO REG
REG_3.1V
NQR0006-001X
REG_1.2V
GND
TO REG
REG_4.8V
y10482001a_rev0
DE F G
2-10
T
DIGITAL(MEMORY) SCHEMATIC DIAGRAM
10
DIGITAL(
5
REG_2.5V
TO REG
REG_3.1V
GND
PMA1
PMA2
PMA3
PMA4
TO MPEG2
NUCORE
P.PRCS
4
TO MPEG2
NUCORE
TO NUCORE
TO MPEG2
3
NUCORE
P.PRCS
TO NUCORE
TO MPEG2
NUCORE
P.PRCS
TO CN101
CN102
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
PMA18
PMA19
PMA20
PMA21
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
nPMCS7
nPMWE
nPMOE
FLSH_RST
R4316
2
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMA14
PMA15
PMA16
PMA17
PMA18
PMA19
PMA20
PMA21
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
nPMCS7
nPMWE
nPMOE
0Ω
nFLSHRST
L4301
NQR0129-002X
MEMORY
C4301
T
10
R4306
/6.3
PMA17
PMA16
A16
A15
C4303
BYTE
A14
PMA15
47k
0.1
Vss
A13
PMA14
PMD15
PMD7
DQ15/A-1
A12
PMA13
)
PMD14
DQ7
A11
PMA12
PMD6
DQ14
A10
PMA11
PMD13
DQ6
A9
PMA10
R4301
PMA9
C4302
PMD5
PMD12
PMD4
Vcc
DQ4
DQ5
DQ12
DQ13
IC4301
MBPL32BM90PBB04
RESET
WE_
NC
A19
A8
nPMWE
nFLSHRST
PMA20
PMA21
0Ω
PMD11
0.1
DQ11
NC
R4302
PMD3
DQ3
NC
PMD10
DQ10
RY/BY
PMD2
DQ2
A18
PMA19
PMD9
DQ9
PMA18
PMD1
DQ1
PMA8
PMD8
DQ8
A6A7A17
PMA7
PMD0
PMA6
DQ0
nPMOE
OE_
PMA5
Vss
PMA4
PMA1
nPMCS7
CE_
PMA3
PMA2
100k
SDR_DQ31
R4318 R4317
SDR_DQ30
100k
100k
R4320
R4321
SDR_DQ29
SDR_DQ28
SDR_DQ27
SDR_DQ26
SDR_DQ25
SDR_DQ24
SDR_DQ23
100k
SDR_DQ22
SDR_DQ21
SDR_DQ20
SDR_DQ19
SDR_DQ18
SDR_DQ17
SDR_DQ16
A0
100k
R4324
100k
R4326
100k
100k
R4347R4348
100k
R4331R4332
100k
R4346 R4345
R4330
100k
R4343
R4328
100k
R4342
R4340 R4339
100k
R4338 R4337
100k
R4336 R4335
100k
R4334 R4333
100k
A1A2A3A4A5
1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
2-11
A
BCD
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
TL4302
TL4303
TL4304
TL4305
TL4306
TL4307
TL4308
NQR0129-002X
C4326
10
C4314
C4321
C4323
L4302L4303
T
/6.3
SDR_DQ0
SDR_DQ1
SDR_DQ2
SDR_DQ3
SDR_DQ4
SDR_DQ5
0.1
SDR_DQ6
SDR_DQ7
SDR_DQM0
SDR_WE
SDR_CAS
SDR_RAS
SDR_CS0
SDR_BA0
SDR_BA1
SDR_A10
SDR_A0
SDR_A1
SDR_A2
SDR_A3
0.1
SDR_DQ16
SDR_DQ17
SDR_DQ18
SDR_DQ19
SDR_DQ20
SDR_DQ21
SDR_DQ22
SDR_DQ23 SDR_DQ24
SDR_DQM2
0.1
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
VDD
DQM0
WE_
CAS_
RAS_
CS_
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD VSS
VDD
DQ16
VDDQ
DQ17
DQ18
VSSQ
DQ19
DQ20
VDDQ
DQ21
DQ22
VSSQ
DQ23
VDDQ
DQM2
NC
NC
VDDQ
IC4302
K4S563233F-HN75
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VDDQ
DQ8
DQM1
CKE
VSS
DQ31
VSSQ
DQ30
DQ29
VDDQ
DQ28
DQ27
VSSQ
DQ26
DQ25
VDDQ
DQ24
VSSQ
DQM3
VSSQ
VSS
VSS
CLK
A12
A11
SDR_A0
SDR_A1
SDR_A2
SDR_A3
SDR_A4
SDR_A5
SDR_A6
SDR_A7
SDR_A8
SDR_DQ15
SDR_DQ14
SDR_DQ13
SDR_DQ12
SDR_DQ11
SDR_DQ10
SDR_DQ9
SDR_DQ8
NC
NC
NC
SDR_DQM1
SDR_CLK
SDR_CKE
SDR_A12
R4310
SDR_A11
SDR_A9
A9
SDR_A8
A8
SDR_A7
A7
SDR_A6
A6
SDR_A5
A5
SDR_A4
A4
SDR_DQ31
SDR_DQ30
SDR_DQ29
SDR_DQ28
SDR_DQ27
SDR_DQ26
SDR_DQ25
SDR_DQM3
C4318
0.1
C4325
0.1
SDR_A9
SDR_A10
SDR_DQ0
SDR_DQ1
SDR_DQ2
SDR_DQ3
SDR_DQ4
SDR_DQ5
SDR_DQ6
SDR_DQ7
SDR_DQ8
SDR_DQ9
SDR_DQ10
SDR_DQ11
SDR_DQ12
SDR_DQ13
SDR_DQ14
SDR_DQ15
SDR_DQ16
SDR_DQ17
SDR_DQ18
SDR_DQ19
SDR_DQ20
SDR_DQ21
SDR_DQ22
SDR_DQ23
SDR_DQ24
SDR_DQ25
SDR_DQ26
SDR_DQ27
SDR_DQ28
SDR_DQ29
SDR_DQ30
SDR_DQ31
SDR_DQM0
SDR_DQM1
SDR_DQM2
SDR_DQM3
SDR_WE
SDR_CAS
SDR_RAS
SDR_CS0
SDR_BA0
SDR_BA1
SDR_CKE
SDR_CLK
SDR_A11
SDR_A12
TO NUCORE
SDR_A0
SDR_A1
SDR_A2
SDR_A3
SDR_A4
SDR_A5
SDR_A6
SDR_A7
SDR_A8
SDR_A9
SDR_A10
SDR_DQ0
SDR_DQ1
SDR_DQ2
SDR_DQ3
SDR_DQ4
SDR_DQ5
SDR_DQ6
SDR_DQ7
SDR_DQ8
SDR_DQ9
SDR_DQ10
SDR_DQ11
SDR_DQ12
SDR_DQ13
SDR_DQ14
SDR_DQ15
SDR_DQ16
SDR_DQ17
SDR_DQ18
SDR_DQ19
SDR_DQ20
SDR_DQ21
SDR_DQ22
SDR_DQ23
SDR_DQ24
SDR_DQ25
SDR_DQ26
SDR_DQ27
SDR_DQ28
SDR_DQ29
SDR_DQ30
SDR_DQ31
SDR_DQM0
SDR_DQM1
SDR_DQM2
SDR_DQM3
SDR_WE
SDR_CAS
SDR_RAS
SDR_CS0
SDR_BA0
SDR_BA1
SDR_CKE
SDR_CLK
SDR_A11
SDR_A12
ONS".
y20352001a_rev0
DE F G
2-12
PMD1
MODE
DIGITAL(P.PRCS) SCHEMATIC DIAGRAM
CLK1M0
CLK4M5
CAM_VD
TO CN102
5
TO CN101
TG_HD
4
ACHI10
ACHI11
ACHI12
ACHI13
TO CN101
BCHI10
BCHI11
BCHI12
BCHI13
TO CN102
TO CN101
TO CN102
TO CN102
TO CN102
TO TL104
TO TL102
TO CN102
TO CN102
TO CN102
TO CN102
TO CN102
CDS_STBY
TG_RST
F/Z_CS
IRIS_CS
IRIS_PS
ND_O/C
SCPU_CS
STRB_CHG
STRB_SNS
LENS_LED
VENC_CS
LCD_CS
VENC_RST
LCD_BL
ANA_IN_H
PS_CTL
CAM_CLK
CAM_IN
CAM_OUT
VIF_CLK
VIF_OUT
SCPU_SCK
SCPU_SI
SCPU_SO
ID_LAT
VDCPU
FLDCPU
CLK27A
CLK27B
S_SHUT
AFE_RST
3
TO CN101, CN102
TO CN101, CN102
2
TO CN101, CN102
TO NUCORE
TO MPEG2
TO NUCORE
1
HDIRS
VDIRS
MCLKI
TG_VD
TG_ID
ACHI0
ACHI1
ACHI2
ACHI3
ACHI4
ACHI5
ACHI6
ACHI7
ACHI8
ACHI9
BCHI0
BCHI1
BCHI2
BCHI3
BCHI4
BCHI5
BCHI6
BCHI7
BCHI8
BCHI9
TG_CS
G_RST
S_IN_L
VIF_IN
CLK1M0
CLK4M5
CAM_VD
ACHI0
ACHI1
ACHI2
ACHI3
ACHI4
ACHI5
ACHI6
ACHI7
ACHI8
ACHI9
ACHI10
ACHI11
ACHI12
ACHI13
BCHI0
BCHI1
BCHI2
BCHI3
BCHI4
BCHI5
BCHI6
BCHI7
BCHI8
BCHI9
BCHI10
BCHI11
BCHI12
BCHI13
TG_RST
F/Z_CS
IRIS_CS
IRIS_PS
ND_O/C
SCPU_CS
STRB_CHG
STRB_SNS
LENS_LED
VENC_CS
LCD_CS
G_RST
ID_LAT
FLDCPU
CLK27A
CLK27B
S_SHUT
AFE_RST
HDIRS
VDIRS
TG_HD
TG_VD
TG_ID
TG_CS
CAM_CLK
CAM_IN
CAM_OUT
SCK2
SI2
SO2
SCPU_SCK
SCPU_SI
SCPU_SO
VDCPU
ENCFLD
DIGITAL(P.PRCS
10
ACHI0
ACHI1
ACHI2
ACHI3
ACHI4
ACHI5
ACHI6
ACHI7
ACHI8
ACHI9
ACHI10
ACHI11
ACHI12
ACHI13
BCHI0
BCHI1
BCHI2
BCHI3
BCHI4
BCHI5
BCHI6
BCHI7
BCHI8
BCHI9
BCHI10
BCHI11
BCHI12
BCHI13
TG_RST
F/Z_CS
470
R4558
IRIS_CS
470
R4559
IRIS_PS
ND_O/C
SCPU_CS
470
R4563
TG_CS
470
R4564
STRB_CHG
0
R4566
STRB_SNS
0
R4568
LENS_LED
0
R4569
0
R4578
VENC_CS
470
R4571
LCD_CS
470
R4572
G_RST
0
R4573
100
R4580
R4562
R4565
R4567
R4514
100
C4539
0.1
C4540
0.1
R4515
10k
TL4517
TG_ID
TG_VD
TG_HD
)
TL4516
TL4515
100
100
R4557
VDD
VDD
VDD
0.1
C4507
IC4502
M95320-WDW6-X
VCCCS
SO
HOLD
WP
SCK
VSS SI
HDAFE
R4556
VDAFESCK0
470
R4501
CAM_CLK
CAM_IN
OBCP
FLDAFE
SI0
SO0
470
R4502
CAM_OUT
C4537
0.1
C4538
0.1
3.3V_VDD
3.3V_GND
ACHI0
ACHI1
ACHI2
ACHI3
ACHI4
ACHI5
ACHI6
ACHI7
ACHI8
ACHI9
ACHI10
ACHI11
ACHI12
ACHI13
BCHI0
BCHI1
BCHI2
BCHI3
BCHI4
BCHI5
BCHI6
BCHI7
BCHI8
BCHI9
BCHI10
BCHI11
BCHI12
BCHI13
VDD
VDD
VDD
GND
GND
GND
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
22k
GPIO6
GPIO7
22k
GPIO8
GPIO9
GPIO10
22k
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
PWMO0
PWMO1
PWMO2/TO0
PWMO3/TO1
PWMO4/TO2
3.3V_VDD
3.3V_GND
C4508
0.1
470
R4503
ID
SCK1
470
R4504
TL4514
MCLKI
MSHUT1
SI1
SO1
SCK2
SI2
SO2
470
470
470
470
R4505
R4506
R4507
R4509
SI2
SCK2
SO2
SCPU_SCK
STROB
MSHUT2
HSCK
HSI
470
R4510
SCPU_SI
CLK4M5
CLK1M0
R4555
CLK1M0
HSO
470
R4512
SCPU_SO
CAM_VD
R4554
CLK4M5
HDIRS
R4553
VDMDA
GND
HDIRS
GND
VDIRS
R4552
VDIRS
GND
1K1K1K1K1K
R4551
C4535
C4536
10
0.1
AVDDP1
OMT0
TL4501
L4507
NQL38DK-100X
T
PLLI1
AGNDP1
OMT1
VDCPU
R4518
ID_LAT
VDCPU
PLLSEL1
FLDCPU
R4519
FLDCPU
ENCFLD
000
R4520
ENCFLD
3.3V_VDD
IC4501
JCY0209
3.3V_GND
3.3V_VDD
0.1
C4509
C4534
0.1
3.3V_VDD
R4521
CLK27A
SYSSEL0
3.3V_GND
CLK27A
CLK27B
INH
220
R4522
NQR0305-001X
C4510
0.01
CLK27B
R4548
R4547
0
TVSEL
SYSSEL1
INVKOCLR
1k
R4523
AFE_RST
S_SHUT
R4546
R4545
0
R4524
CTRI
ADHTEST
AVDDP2
L4505
NQL38DK-100X
TMC1
AGNDP2
C4512
0.1
T
C4511
10
TMC2
PLLREF2
PLLFB2
SSGFLD
0
R4544
JTEST0
PLLI2
OUTV2
000
R4543
JTEST1
PLLSEL2
ANA_IN_H
R4542
JTEST2
R4541
JTEST3
PMD0
PMD0
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
2-13
A
BCD
CTRI
AVDDP2
TMC1
TMC2
AGNDP2
PLLREF2
C4512
0.1
T
C4511
10
L4505
NQL38DK-100X
PLLFB2
SSGFLD
0
R4544
JTEST0
PLLI2
OUTV2
000
R4543
JTEST1
JTEST2
PLLSEL2
ANA_IN_H
R4541
R4542
MODE
JTEST3
PMD1
PMD0
C4533
PMD2
L4501L4502
NQL38DK-100X
0
C4504
10
SOF
PPRO0
PPRO1
PPRO2
PPRO3
PPRO4
PPRO5
PPRO6
PPRO7
PPRO8
PPRO9
0.1
VDD
GND
PMD3
PMD4
GND
PMD5
PMD6
DOUT0
PMD7
DOUT1
PMD8
DOUT2
PMD9
DOUT3
PMD10
DOUT4
PMD11
DOUT5
PMD12
DOUT6
PMD13
DOUT7
PMD14
DOUT8
PMD15
DOUT9
PPRO10
PPRO11
VLD_PIX
100
100
R4540
R4539
SOF
VPIX
DOUT11
DOUT10
3.3V_VDD
VDD
VDD
VDD
C4513 C4514
0.1 0.1
VCLK
100
R4538
VCLK
3.3V_VDD
3.3V_GND
TRST
3.3V_VDD
3.3V_VDD
3.3V_GND
AVDDA
AGNDA
AVREFP
AVREFM
CREQ
CACK
PMCS
PMWE
PMOE
PMWAIT
PMINT
PMBLS0
PMBLS1
DMAREQ
DMAREQ_B
DMACLR
PMA10
PMA11
3.3V_GND
PMA0
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
L4503
NQL38DK-100X
L4504
0
C4506
10
C4531
0.1
VDD
VDD
VDD
GND
TDI
TMS
TCK
TDO
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
VDD
GND
GND
VDD
VDD
GND
C4519
0.1
C4530
0.1
C4529
0.1
C4528
0.1
C4518
10
C4517
0.1
C4516
0.1
L4506
NQL38DK-100X
T
C4520
0.01
R4528
R4527
R4526
C4521
0.01
C4515
TL4506
TL4505
TL4504
TL4503
TL4502
R4579
470k
C4522
0.01
C4523
0.01
nPMCS1
nPMWE
nPMOE
nPMWAIT
PMINT
nPMBLS0
0
nPMBLS1
DMASREQ
DMABREQ
0
DMACLR
0
IC4503
TC7SH32FU-X
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
C4524
0.01
R4577
47K
R4575
22K
C4525
0.01
R4525
0
C4526
0.01
PPRO0
PPRO1
PPRO2
PPRO3
PPRO4
PPRO5
PPRO6
PPRO7
PPRO8
PPRO9
PPRO10
PPRO11
VLD_PIX
SOF
VCLK
PMA0
R4576
39K
C4527
0.01
R4537
R4536
R4535
R4534
R4533
R4532
R4531
R4530
ANA_IN_H
SSGFLD
OUTV2
nPMCS1
nPMWE
nPMOE
nPMWAIT
PMINT
nPMBLS0
nPMBLS1
DMASREQ
DMABREQ
DMACLR
PMA0
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
REG_3.1V
REG_1.5V
GND
ANA_IN_H
TO TL102
SSGFLD
TO NUCORE
OUTV2
TO CN102
PPRO0
PPRO1
PPRO2
PPRO3
PPRO4
PPRO5
PPRO6
PPRO7
TO NUCORE
PPRO8
PPRO9
PPRO10
PPRO11
VLD_PIX
SOF
VCLK
Z_PTR_AD
8.2K
F_PTR_AD
12K
OP_THRMO
0
0
0
0
0
0
TO CN102
NDHAL_LV
STRB_AD
P_GYAMP
TO CN101
Y_GYAMP
TO CN102
S2_DET
nCREQ
TO MEPG2
nCACK
nPMCS1
TO NUCORE
nPMWE
TO MPEG2, NUCORE, MEMORY
nPMOE
nPMWAIT
TO MPEG2, NUCORE
PMINT
nPMBLS0
nPMBLS1
TO NUCORE
DMASREQ
DMABREQ
DMACLR
PMA0
TO MPEG2, NUCORE
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMD0
TO MPEG2
PMD1
NUCORE
PMD2
MEMORY
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
PMD0
PMD2
PMD1
PMD3
PMD4
PMD5
PMD6
PMD7
PMD8
PMD9
PMD10
PMD11
PMD12
PMD13
PMD14
PMD15
ONS".
y10486001a_rev0
DE F G
2-14
STH
ANALOG(ANA IF) SCHEMATIC DIAGRAM
T
CN204
5
4
3
QGF0306F2-33X
TO OP DRV
CN209
QGF0532F2-11X
TO OPE1
DRIVE-IS
DRIVE+IS
HGVcc+IS
HGout+IS
HGVss-IS
HGout-IS
Z_LED
Z_PTR_AD
ZOOM02
ZOOM03
ZOOM04
ZOOM01
F_VCC
F_PTR_AD
OP_THRMO
GND
FOCUS02
FOCUS03
FOCUS04
FOCUS01
GND
HGVcc+ND
HGout-ND
GND
DRIVE-ND
DRIVE+ND
GND
HGVss-ND
HGout+ND
GND
MODE_SW
POFF_SW
REC_SW
PLAY_SW
VIDE_LED
STIL_LED
VOIC_LED
REG_3.1V
CHRG_LED
AL_3.3V
TO SUB CPU
CN205
QGF0532F2-10X
STRB_EVR
GATE_PLS
STRB_CHG
TO STROBE UNIT
GND
GND
ISO200
STRB_AD
DRV_4.8V
DRV_4.8V
STRB_SNS
TO SUB CPU
TL202 LCD_OPEN
TL203 LCD_RVS
TALY_LED
470
R6816
NRSA63J-102X
R6817
NRSA63J-471X
1k
D6801
RB706D-40-X
BT6801
QAB0040-001
R1009
2.2k
D6802
RB715F-X
TO SUB CPU
D1003
SML-A12UT-X
AL_3.3V
LIT_3V
GND
REG_3.1V
2
L101
10Ω
DRV_4.8V
REG_3.1V
DRV_4.8V
REG_3.1V
REG_4.8V
REG_4.8V
R101
3k
REG_8.5V
AL_3.3V
TO OP DRV
IR_OUT
C101
/6.3
10
T
Q101
RPM-22PB
GND
GND
GND
PS_CTL
GND
TO V I/O
TO V I/O
TO OP DRV
ASPECT_S
VIOYSOUT
VIOCOUT
GND
T_BATT
DC_CHEK
I_MTR
V_BATT
TO SUB CPU
CHRG_EVR
KEY_A
KEY_B
1
CN206
QGA1002F1-10X
TO REG(CN301) TO REG(CN302)
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS". 2.
2-15
A
BCD
CN207
QGA0401F1-25W
KEY_C
CF_SLOT
ZOOM_SW
XSTH
ACES_LED
KEY
A
B CPU
REG_3.1V
TO MIC TO SPEAKER
CN202CN201
QGA1001F1-02XQGA1001F1-04X
GND
MIC/R
GND
MIC/L
SPK+
SPK-
TO AUDIO TO AUDIO
20
ANALOG(
ANA IF
TO NUCORE, SUB CPU
TO P.PRCS, LCD DRV
TO P.PRCS, LCD DRV, V I/O
TO NUCORE, MPEG2, V I/O
TO P.PRCS, NUCORE, MPEG2, AC97
TO NUCORE, AC97
TO MPEG2, AUDIO
TO P.PRCS, AUDIO
TO MEMORY, SUBCPU
TO P.PRCS, SUBCPU
TO P.PRCS, GYRO
TO NUCORE, OP DRV
TO P.PRCS, OP DRV
TO P.PRCS, OP DRV, V I/O
TO P.PRCS, NUCORE, STROBE
)
TO JIG, SUB CPU
TO NUCORE, V I/O
TO MPEG2, V I/O
TO SUB CPU
SJIG_RST
SJIG_RX
SJIG_TX
DSP_RST
PWR_CHEK
LCD_BL
LCD_CS
OUTV2
VIF_OUT
VIF_IN
VIF_CLK
PS_CTL
REG_2.5V
VENC_CS
DV2OUT0
DV2OUT1
DV2OUT2
DV2OUT3
DV2OUT4
DV2OUT5
DV2OUT6
DV2OUT7
MPGFLD
DV2CKOUT
MPGHSYNC
MPGVSYNC
CLK27A
VENC_RST
ACPLLOFF
AUDIN
AUDOUT
AUDSYNC
AUDBITCLK
nAUDRESET
AIBD
AOBD
AIOLRCK
AOMCLK
AIOBCK
S_SHUT
FLSH_RST
SCPU_CS
SCPU_SCK
SCPU_SI
SCPU_SO
G_RST
Y_GYAMP
NDPWM
NDHAL_LV
ND_O/C
CAM_IN
IRIS_CS
IRIS_PS
CLK1M0
VDIRS
HDIRS
Z_PTR_AD
F_PTR_AD
OP_THRMO
F/Z_CS
LENS_LED
CLK4M5
CAM_VD
CAM_CLK
CAM_OUT
TG_RST
STRB_CHG
STRB_EVR
STRB_AD
STRB_SNS
AL_3.3V
MD_THRMO
REG_4.8V
GND
VPP
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
GND
CN203
QGB0402J2-B0X
TO DIGITAL
(CN102)
MON_G
MON_R
MON_B
MON_RPD
VCOM
y10484001a_rev0
2-16
CF_SLOT
ACES_LED
XSTH
STH
TO LCD DRV
VHVDD
CKH1
CKH2
VHVDD
GND
GND
XDSG
DSD
MON_G
MON_R
MON_B
CSH
SC
CN208
QGA0503F1-30X
TO REG(CN303)
TO LCD DRV
XENB
CSV
DSG
TO SUB CPU
TO SUB CPU
TO AUDIO
TO AUDIO
TO JIG, LCD DRV
HP_SIG/L
HP_SIG/R
HP_DET
AU_SIG/L
AU_SIG/R
P_DET
REG_DATA
REG_CLK
REG_CS
SJIG_RST
BATT_L
ADP_L
PWR_CHEK
VCOM
CKV1
CKV2
STV
XSTV
ENB
LCD_BLK
TO SUB CPU
_
KEY_B
KEY_C
ZOOM_SW
ONS". 2. The parts with marked () is not used.
DE F G
T
A
A
T
ANALOG(SUB CPU) SCHEMATIC DIAGRAM
TO REG
TO CN208
5
TO CN203, 208
4
TO AUDIO
TO CN209
TO CN207
TO ANA IF
TO CN203
3
TO CN208
LIT_3V
BATT_L
ADP_L
AL_3.3V
REG_3.1V
SJIG_RST
BUZZER
VOIC_LED
STIL_LED
VIDE_LED
CHRG_LED
ACES_LED
TALY_LED
REG_DATA
REG_CLK
10K
R1027
IC1003
RS5C314-X
CLKCSXin
SIO
INTR
X1002
VDD
NAX0491-001X
Xout
C1005
8p
C1007
C1010
R1048
2.2K
L1001
10µ
GND
VPP
10/
C1037
C1001
6.3V
10/
L1002
10µ
0.1
C1002
6.3V VSS
R1002
Q1001
2SC4617/QR/-X
10K
R1005
R1006
4.7K
0.1
C1003
R1003
150K 2.7K
R1004
UN9212J-X
DTC124EE-X
PDTC124EE-X
R1039
R1025
R1015
R1008
R1049
R1007
470
470
470
2.2K
470
Q1002
IC1002
S-80823CNNB-G-W
18K
D1001
DA221-X
C1006
1
47K
100K
R1001
0.1
C1004
IC1004
SN74LV32ADGV-X
0.01
C1008
V_BAT
T_BAT
I_MTR
KEY_C
VPP
AVDD
VDD
OSC2
OSC1
VSS
XI
XO
MMOD
RESET
REG_D
RTC_D
IC1006
100K
100K
R1050
TO CN209
TO TL202
POFF_SW
LCD_OPEN
2
SCPU_SI
SCPU_SCK
TO CN203
TO CN208
TO CN203
SCPU_SO
REG_CS
FLSH_RST
DSP_RST
R1052
R1053
R1051
R1054
100K
1K
100K
1K
R1055
C1018
SN74LV86ADGV-X
NAX0647-001X
X1001
R1011
C1011
C1012
C1013
C1014
C1015
C1016
C1017
0.01
0.01
0.01
0.01
0.01
0.01
0.01
100K
C1020
C1019
0.1
0.1
0.01
0.1
C1021
1
NOTES: 1. For the destination of each signal and further line connections that are cut off from this diagram, refer to "BOARD INTERCONNECTIONS".
2. The parts with marked () is not used.
2-17
A
BCD
IC1004
SN74LV32ADGV-X
0.01
C1008
R1028
IC1007
MB90097PFV155-X
HD
SCLK
VD
CS
VC0
DATA
RST
1K
0.1
C1036
VDD
SDR
BLKA
XD
EXD
BLKB
TEST
TST0
VSS BLKC
VC1
VC2
VC3
OSD_HD
OSD_VD
VC0
VC1
VC2
BLKA
VC3
BLKB
BLKC
DOT_CLK
TO V I/O
V_BATT
T_BATT
I_MTR
KEY_C
VPP
AVDD
VDD
OSC2
OSC1
VSS
XI
XO
MMOD
RESET
REG_DATA
RTC_DATAIN
KEY_B
KEY_A
AVSS
ZOOM_SW
REG_CLK
SUB_CPU_SO
TALLY
CHRG_LED
MN101C77CJA
SUB_CPU_SI
SUB_CPU_SCK
REG_CS
FLSH_RST
STILLLED
VIDEOLED
ACCESS_LED
IC1001
RTC_CS
DSP_RST
OSD_CS
A_MUTE
VOICELED
P_DET
CF_SLOT
AUDIO_CLK
AUDIO_DATA
DC_CHEK
CHRG_WKUP
BZ_ENV
BZ_FREQ
CHRG_EVR
LCD_OPEN_SW
SUB_CPU_CS
REMOTE
OSD_VD
HP_DET
AUEE_CTL
SD_SLOT
L_MUTE
LCD_RVS_SW
PLAY_SW
POFF_SW
REC_SW
MODE_SW
PD_L
AUDIO_CS
JIG_CLK
JIG_DATA
KEY_WKUP
SYSTEM_SIG
R1046
R1030
1K
1K
R1031
2.2K
R1012
2.2K
R1020
TL1002
100K
R1033
R1017
100K
R1044
IC1005
SN74AHC2G53T-X
R1042
R1043
R1041
R1038
R1036
TL1001
A_MUTE
CHRG_EVR
100K
R1058
1K
1K
1K
1K
1K
100k
R1018
100k
R1016
R1060
47K
P_DET
AUEE_CTL
HP_DET
CF_SLOT
L_MUTE
LCD_RVS
PLAY_SW
REC_SW
MODE_SW
SJIG_RX
SJIG_TX
AUD_CLK
AUD_DATA
PD_L
AUDIO_CS
MD_THRMO
TO AUDIO
TO CN207
TO CN208
TO AUDIO
TO CN208
TO CN207
TO AUDIO
TO TL203
TO CN209
TO CN203
TO AUDIO
TO CN203
0.01
R1059
470K
1K
R1024
ANALOG(SUB CPU
20
C1038
R1021
R1022
R1023
R1013
1K
1K
1K
1K
KEY_B
KEY_A
ZOOM_SW
KEY_C
I_MTR
T_BATT
V_BATT
DC_CHEK
SCPU_CS
TO CN207
TO CN207
TO CN203
)
ONS".
y20337001a_rev0
DE F G
2-18
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