How it Works
JVC
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DR-MV1
User Manual
96 pgs8.6 Mb0
Service manual
88 pgs7.89 Mb0
SCHEMATIC
32 pgs5.19 Mb0
Table of contents
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JVC DR-MV1 SCHEMATIC

Preliminary
CHARTS AND DIAGRAMS
NOTES OF SCHEMATIC DIAGRAM
Safety precautions The Components indentified by the symbol are
critical for safety. For continued safety, replace safety critical components only with manufacturer's recom­mended parts.
Unless otherwise specified.
1) All resistance values are in ohm. 1/6 W, 1/8 W (refer to parts list). Chip resistors are 1/16 W.
K: KΩ(1000Ω), M: MΩ (1000KΩ)
2) All capacitance values are in µF, (P: PF).
3) All inductance values are in µH, (m: mH).
4) All diodes are 1SS133, MA165 or 1N4148M (refer to parts list).
Note: The Parts Number, value and rated voltage etc. in the Schematic Diagram are for references only. When replacing the parts, refer to the Parts List.
2. Indications of control voltage
AUX : Active at high.
AUX or AUX(L) : Active at low.
!
4. Voltage measurement
1) Regulator (DC/DC CONV) circuits REC : Colour bar signal. PB : Alignment tape (Colour bar). — : Unmeasurable or unnecessary to measure.
2) Indication on schematic diagram Voltage indications for REC and PB mode on the sche­matic diagram are as shown below.
REC mode
12 3
2.5
(5.0)
PB mode
1.8
PB and REC modes (Voltage of PB and REC modes are the same)
Note: If the voltages are not indicated on the schematic
diagram, refer to the voltage charts.
5. Signal path Symbols
The arrows indicate the signal path as follows.
NOTE : The arrow is DVC unique object.
Playback signal path
Playback and recording signal path
CIRCUIT BOARD NOTES
1. Foil and Component sides
1) Foil side (B side) : Parts on the foil side seen from foil face (pattern face) are indicated.
2) Component side (A side) : Parts on the component side seen from component face (parts face) indicated.
rts location are indicated by guide scale on the circuit board.
2. Parts location guides
Parts location are indicated by guide scale on the circuit board.
REF No.
IC101 B C 6 A
(A : Component side)
D : Discrete component)
B : Foil side
C : Chip component
Note: For general information in service manual, please
refer to the Service Manual of GENERAL INFORMA­TION Edition 4 No. 82054D (January 1994).
LOCATION
IC
Category : IC
Horizontal “A” zone
Vertical “6” zone
3. Interpreting Connector indications
1
2
Removable connector
3
1
2
Wire soldered directly on board
3
1
Non-removable Board connector
2
3
1
2
4
Board to Board
3
Connected pattern on board The arrows indicate signal path
Note: For the destination of each signal and further line connections that are cut off from the diagram, refer to "BOARD INTERCONNECTIONS"
Recording signal path (including E-E signal path)
Capstan servo path
Drum servo path
(Example)
R-Y
Playback R-Y signal path
Y
Recording Y signal path
6. Indication of the parts for adjustments
The parts for the adjustments are surrounded with the circle as shown below.
7. Indication of the parts not mounted on the circuit board
“OPEN” is indicated by the parts not mounted on the circuit board.
R216
OPEN
2-1 2-2

BOARD INTERCONNECTIONS

5
NCNCAL5.8V
CN1901
CN6204
4
3
SW12V
GND
BS_I2C_DATA
BS_I2C_CLKNCNCNCTU_VIDEO2
GR_ON[H]
GR_TU_VIDEO2
CN6202 CN7503
REAR_V_IN
GND A.IN[R] A.IN[L]
GND
SELD_AUDIO[R] SELD_AUDIO[L]
GND
SELD_V_IN
SW-7V
NC
CN6201
AL5.8V
M26V
SW12V
BS_I2C_CLK
BS_I2C_DATA
GND
GND
BS_ANT/AFC ANT_CTL[H]
BIT_IN[H]
BS_P.CTL[H]
INPUT_SEL3
GR_ON[H]
GND
AL5.8V
SW12V
SW5V
BT2
I2C_CLK2
I2C_DATA2
GND
DEMOD2[L] DEMOD2[R]
GND
TU_VIDEO2
DEMOD Page 2-33 RF AUDIO AGC Page 2-34
CN2301
SW12V NC LINE_OUT[R] GND RF_AUDIO NC GND NC NC GND LINE_OUT[L]
CN3107
CN6001CN6203
CN6701
CN6501
JUST_CLK
I2C_DATA
I2C_CLKNCR_OUT
L_OUT
SW5V
OPENOPEN
CN5001
LIVE
CN5303
CN1404
NEUTRAL
CN5302
FAN12V
GND
CN2201
Page 2-5
Page 2-32
GND
SIF
CN8501
AD_IEC956
V3.3V
CN501
CN7502
CHARA_DATA
SW5V
V_FROM_OSD
GND
GND
GND
GND
C_OUT
Y_OUT
SELD_YV/F_IN
SELD_C_IN
CN502
CN2
PB_COLOR
GND
Fsc
GND
TO_SUB_EMPH
KILLER
FROM_SUB_EMPH
V_FROM_AV
CN504
CN3
GND
Y_TO_SUB
VHS[H]
GND
SYNC_OUT
REC_COLOR
GND
Y_TO_AV
V_TO_OSD_SSUB
CN503
CN3106
P.MUTE_VHS[L]
I2C_CLK_A/V
I2C_DATA_A/V
GND
V.P_CTL
V.REF
D.FF
TRICK[H]
SLOW_PULSE
GND
FW7504
Page 2-35
GND
S.DATA_TOSYS
P.MUTE_VHS[L]
OSD_CS
SYNC_DET[H]
S.CLK
S.DATA_FRSYS
EDS_CS[L]
JUST/EDS[H]
VIDEO/N.AUDIO Page 2-19 VIDEO SW Page 2-21 FMA/DEMOD Page 2-23 AUDIO I/O Page 2-25 SYSCON Page 2-27 TUNER Page 2-29 TERMINAL Page 2-31
2Fsc
CN7505
CHARA_DATA
V_TO_OSD
V_FROM_OSD
SW5V
CN5301
CN5311
SW5V
SW12V
BT2
45V
FAN_CTL[H]
SW-7V
GND
GND
P.SAVE[L]
AL5.8V
P.CTL[H]
M12V
GND[M]
GND[M]
M26V
CN501
CN7501
CN2601 CN8001
CN7104
CN7107
CN5304CN5501
P.CTL[H]
D1.8V
D1.8V
AL3V
AL5.8V
AL5.8V
GND
GND
GND
GND
SW12V
SW-7V
-29V
DC3.5[-]
DC3.5[+]
CN7106 D3.3V
JLIP_TX
GND
JLIP_RX
CN7105
JLIP_RX
GND
JLIP_TX
D3.3V
CN7108
CN3103
D_PG+
D_PG-
M_GND
D_COM
D_W_OUT
D_V_OUT
D_U_OUT
2
L1
L2
BLK
RED
1
CN3001
QGB2032M4-12
CAP.M_FG CAP.M_Vcc Vcc5V CAP.M_F/R LM_VCTL M_GND S_GND Vcc12V CAP.M_VCTL LM_F/R/S DRUM_PG/FG DRUM_VCTL
CN2001
R/P A.E CTL
FULL_ERASE
QGB2532J1-02
CN2002
F.E
GND
CN1
EP
CH1EPCH2SPCH1SPCH2
CN3104
CN7201
FMA
FMA
CH2
CH1
Page 2-39
## CN3901
CN7001 CN3102
FW7001CN7202
Page 2-37
CN7102
CN7103CN7002
REG Page 2-7 VIDEO Page 2-39 AUDIO AD/DA Page 2-41
CN7109
VIDEO IF Page 2-7 FLASH Page 2-9 MEDIA PROCESSOR DDR SDRAM Page 2-13 1394PHY Page 2-15 ATAPI IF Page 2-17
CN4104
Page 2-11
Page 2-38
p10611001a_rev0
A
BCDEFG
2-3 2-4
SW.REG AND
5
4
3
2
!
CN5001
JUNCTION
!
SCHEMATIC DIAGRAMS
!
F5001 /250
!
#
VA5001 QAF0039-431 QAF0024-431 QAF0023-431 QAF0055-431
OCP/
FB S D Vcc GND
# B5001
SG5001
!!
##
# C5005
R5001
4.7M
100p
1/2W
/250
# QAF0039-431 QAF0024-431 QAF0023-431 QAF0055-431
# LF5002
!
C5001
0.068 /250
STR-G6653-F9
R5106
R5107
680
C5105 470p /50
GROUND POINT FOR PRIMARY VOLTAGE
VA5003
3.9k
R5108
0.33 1W
!
IC5101
DANGEROUS VOLTAGE
##
C5002
0.022 /250
C5104
470p /1k
D5104 1SS133 1SS270A
# C5004
/250
#
D5202
L5207
33
L5206
33
D5307
RK34
IC5302 PQ5EV3
C5209 18
/50
C5210 220 /6.3
2SC5739/QP/ 2SD2394/EF/
C5202
/100
C5205 1500
/10
D5204 D1FS4A
D5207 D1FS4A
D5212 D1FS4A
µ
µ
R5319
4.7k
FR
R5326
47
1/4W
R5325
4.7
C5307
100 /10
D5306 RK34
8.2
Q5301
#
D5201 1SR156-400
!
T5001
QQS0245-001
R5103
C5102 4700p
/1k
2W
D5001 D3SBA60 GBJ4J
#
C5003
R5101
68k 2W
D5103 1F4G 10ERB20 ERA18-02 AU01Z 1SR153-400
D5106 1F4G 10ERB20 ERA18-02 AU01Z
/50
!
MY MY
C5301
0.15
C5302
0.033
/50
/50
R5303
1.5k
1SR153-400
C5106
0.01
PC5101 PC123Y22 LTV-817M/BC/
R5301 220
!
R5302
4.7k
IC5301 L5431 MM1431AT UTCTL431
C5107 220p /50
C5103 27
R5306
3.9k
FR
/35
R5304
6.8k
R5305
24k
!
R5109
47
1/4W
D5101 SARS01
R5105
68
D5105 1F4G 10ERB20 ERA18-02 AU01Z 1SR153-400
R5102
1.2k
R5104
1k
C5101
100p
/1k
GROUND POINT FOR SECONDARY VOLTAGE
D5211 1F4G 10ERB20 ERA18-02
# C5201 120 /35
D5209 RK34
D5208 RK34
D5308 RK34
R5318
47k
C5313 470p /50
D5210 1F4G 10ERB20 ERA18-02 PG104RS 1SR153-400
!
CP5301
1.5A /125
CP
1SR156-400
D5213 1F4G 10ERB20 ERA18-02 AU01Z 1SR153-400
D5203 RL2Z
D5301 MTZJ15A RD15ES/B1/
D5205 RK34
##
D5206 RK34
C5208 1000 /10
C5207 1500 /6.3
I O G ref SW
C5315
0.01 /50
D5309 AW04 1S4
C5314 100 /6.3
!
#
D5302 MTZJ27D RD27ES/B4/
R5324
C5204 680 /16
C5308
100 /10
L5302 SHORT
47k
C5203 1200 /16
C5206 1200 /10
#
R5307
4.7k
L5201
33
L5202
33
L5204
33
L5205
33
µ
µ
µ
µ
C5316
OPEN
C5306
100 /10
# C5309 47
#
B5302
C5303 100 /16
100
/35
C5304
100 /16
C5305
TO MAIN(SYSCON) CN5311
CN5301
GND[M]
M26V
GND[M]
M12V
P.CTL[H]
AL5.8V
P.SAVE[L]
GND
GND
SW-7V
45V
BT2
SW12V
SW5V
TO FAN
CN5302
FAN
GND
TO DVD UNIT
CN5303
DV12V
GND
GND
DV5V
D1.8V
D2.5V
D5V
D3.3V
TO JUNCTION (VIDEO)
V3.3V
SW5V[2]
GND
SW12V
SW-7V
-29V
DC[-]
DC[+]
B5303
## Q5313
Q5304 UMD12N XP4313
Q5307
2SA1585S/QR/
R5317
1k
Vout
Vout
Vout
IC5503
## R5328
1k
NC
C5502
100
NC
100
NC
## Q5309 2SA1585S/QR/
##
R5322
D5313 1A3G 10EDB20 ERA15-02
Q5308 DTC114EUA UN5211 RN1302 PDTC114EU
C5503
470p
/6.3
C5506
470p
/50
C5505
/10
C5508 100 /10
# B5305
1k
##
Q5310 UMD12N XP4313
## R5323
## Q5315
B5304
## R5329
10k
R5501 R5503R5502
1/2W 1/2W
820 1k680
/50
D5501 1A3G 10EDB20
C5509 470p /50
## Q5314
## R5330
1k
C5513
/10
1
## D5312 1SS133 1SS270A
Q5502 UN5111 DTA114EUA
IC5504 MM1563EF
Sub
Vout
Vin
C5510
/10
1
IC5505 MM1563DF
Cont Cn
Sub
VoutVin
D5502 D5503
1SS133
MTZJ27C
1SS270A
RD27ES/B3/
Q5501 2SD1819A/QRS/ 2SC4081/QRS/ 2PC4081/R/
C5512 470p
CnCont
GND
NC
C5511 100 /6.3
C5515 470p /50
GND
NC
C5514
/6.3
100
/50
## B5501
## R5321
## R5327
R5316 10k
IC5501
MM1662GH
10k
C5501 1
C5504 1
C5507 1
5.6k
Cont Cn
GND GND
GND
Vin
/10
IC5502 MM1565AF
Cont Cn
GND GND
GND
Vin
/10
Cont Cn
GND GND
GND
Vin
MM1565AF
/10
##
R5315
39
1/2W
R5320
## B5502
# Q5302 DTA144WUA UN511E RN2309 PDTA144WU
B5301
R5309
R5308
1k68k
1.2k
R5313
10k
R5505
2.2k
C5311
100 /10
##
Q5303
2SA1576A/QR/
##
C5312 100 /10
R5504
1k
Q5503 2SD2144S/UV/ 2SC3576
R5311
27k
## R5310
27k
Q5305 2SD2144S/UV/ 2SC3576-JVC
# R5312 10k
C5310
2.2 /50
D5303 MTZJ11C RD11ES/B3/
/10
L5301 SHORT
Q5306
R5314
470
Q5504 UN5211 DTC114FUA
CN5304
2SC5739/QP/
D5304 MTZJ5.6C RD5.6ES/B3/
CN5501
1
p20371001a_rev0
A
BCD EFG
2-5 2-6

DIGITAL(VIDEO IF) SCHEMATIC DIAGRAM

TO MEDIA PROCESSOR
5
4
TO MEDIA PROCESSOR
3
2
TO MEDIA PROCESSOR
VDDI1.8
DIGI3.3V
K_BUS_OUT
K_BUS_IN
P_CTL[H]
SYS_RESET[L]
K_BUS_REQ
A_MUTE2[H]
K_BUS_CLK
TO JUNCTION(VIDEO)
CN7109
CN1002
AO_IEC958
TO JUNCTION(VIDEO)
CN7108
CN1001
AO_D[0]
SPI_CLK
AO_SCLK
SPI_MOSI
AO_MCLKO
A_DAC_CS
DAC_RST[L]
AO_FSYNC
DAC_CVBS_OUT
DAC_SY_OUT
DAC_SC_OUT
DAC_Y_OUT
DAC_PB_OUT
DAC_PR_OUT
AI_D[0]
DIGITAL(VIDEO IF)
A5A4A3
PLL_RST
C1011
OPEN OPEN
A0A1A2
0VDDI
0VDDI
OPEN
02
R1010 OPEN
WE
RAS
CAS
WEA2A1
A0
CAS
RAS
OUTH
VDOUT
CLKOSD
HDOUT
HDCVF
0VDDI
CSYNC
VDCVF
0VDDI
RESVD
MONI1
RESHD
MONI2
0VDDE
0VDDE
INV
INH
0VSS
YSI1
YSI4
YSI7
YSI0 OUTV
VO_D[1]
VO_D[4]
VO_D[7]
VO_D[0]
TL1031
TL1032
TL1033
TL1034
YSO3
YSO3
YSO2
YSO2
VSS
TL1035
C1021
OPEN
YSO1
YSO1
YSO0
YSO0
VDDE
0VSS
CSO3
CSO2
VSS
CSO1
CSO0
VSS
VO_D[14]
CSI6
VO_D[15]
CSI7
ZCNT
VDDI
VO_D[11]
CSI3
VO_D[12]
CSI4
VO_D[13]
CSI5
VDDI
VSS
VO_D[8]
CSI0
VO_D[9]
CSI1
VO_D[10]
CSI2
VO_D[5]
YSI5
VO_D[2]
YSI2
VO_D[6]
YSI6
VO_D[3]
C1020
0.1
CSO3
CSO2
CSO1
C1016
OPEN
CSO0 R1006
R1007
0
R1004
10k
0
R1005
10k
R1003
C1014
0.1
0
C1013
OPEN
C1012
0.1
27M_VIDEO
RA1001
0
YSO3
YSO2
YSO1
YSO0
CSO3
CSO2
CSO1
CSO0
C1015
0.1
VI_D[9]
VI_D[8]
VI_D[7]
VI_D[6]
VI_D[5]
VI_D[4]
VI_D[3]
VI_D[2]
RA1002
0
TO MEDIA PROCESSOR
VI_D[2-9]
VO_D[0-15]
0
R1019
0
R1017
]
VI_D[2-9
VO_D[0-15]
VIDEO_27M
VIDEO_MUTE[H]
VIDEO_RXD
VIDEO_RST[L]
SPI_MOSI
VIDEO_CS
SPI_CLK
480I[H]
IC1002
DQ14
DQ14
SCLKCSSDIN
R1013
UDQM
DQ13
DQ13
000
R1015
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
WE
CAS
RAS
AP
A0
A1
A2
A3
DQ12
DQ11
DQ12
0
R1029
R1014
DQ11
TRST
DQ10
DQ10
TMS
HY57V161610DTC8 K4S161622D-TC80
DQ9
DQ9
0VDDI
TCK
0VDDE
VDD
DQ0
DQ1
VSSQ
DQ2
DQ3
VDDQ
DQ4
DQ5
VSSQ VSSQ
DQ6
DQ7
VDDQ VDDQ
LDQM
N.C/RFU
WE( L)
CAS( L)
RAS( L)
CS( L)
BA
A10/AP
A0
A1
A2
A3
VDD
C1041
10
T
/6.3
DQ8
DQ7
DQ6
DQ5
DQ4
DQ5
DQ6
DQ7
DQ8
0VSS
0VDDE
TDO
SDOUT
0VSS
ADY_RL
ADYI
TDI
0
R1012
C1005
0.1
VSS
DQ15
DQ15
DQ14
DQ14
VSSQ
DQ13
DQ13
DQ12
DQ12
VDDQ
DQ11
DQ11
DQ10
DQ10
DQ9
DQ9
DQ8
DQ8
27M_SDRAM
A9
A8
A7
A6
A5
A4
DQ2
DQ1
DQ0
DQ0
DQ1
DQ2
VSS
0VDDE
0VDDI
IC1001
JCP8059
ADY_AVDD2
ADY_AVSS2
ADC_RL
ADCI
ADC_RH
ADC_AVDD1
0.1
0.1
0
TL1091
C1017
C1018
22k
R1060 R1002
0.1 0.1 0.1
TL1092
C1019
0.01
R1033
A9
A9
ADC_AVSS1
UDQM
CLK
CKE
N.C
A9
A8
A7
A6
A5
A4
VSS
DQ3
DQ3
DQ4
VDDE
ADY_RH
ADY_AVDD1
ADY_AVSS1
C1006 C1007 C1008 C1009
OPEN
C1047
0.1
C1088
OPEN
C1046
0.1
470
R1032
10k
AP
UDQM
A10
LUDQM
ADC_AVDD2
ADC_AVSS2
R1001
R1061
RA1005RA1003
10k10k
RA1006
10k
C1025 C1024C1026C1027C1028C1029C1030C1031 OPEN OPENOPENOPENOPENOPEN
0.10.1
A3
A4
RST
1SS355
AMUTE
A5
A8A7A6
0VSS
0VDDE
ANATST
0VDDI
PLL_VSS
CLK
VPD
0
R1072
OPEN
C1010
R1009 10k
27M_8059
1SS355
D1002
R1020 C1023
0
R1018
D1001
A6A7A8
VSS
VDDI
VSS
VDDE
_0.5%
TL1093
220
22k
OPEN
C1022
D2.5V
D1.8V
GND
R1036
CR
1k
R1035
Q1002
0
R1037 100
K1002
SHORT
NQR0129-002X
K1003
SHORT
K1004
NQR0129-002X
K1005
SHORT
K1006
SHORT
K1007
SHORT
K1008
SHORT
K1009
NQR0129-002X
K1010
D5.0V
V3.3V
GND
TL1001
TL1002
TL1003
TL1005
TL1006
TL1009
TL1010
TL1011
TL1014
SHORT
SHORT
SHORT
SHORT
SHORT
SHORT
LC1004
D3.3V
TL1018
K1011
TL1020
K1012
K1013
K1014
K1015
K1016
K1017
SHORT
K1018
SHORT
OPEN
OPEN
C1048
B1008
LC1001
OPEN
C1067
C1066 OPEN
OPEN
D5.0V
K1001 SHORT
C1078
C1079
C1054 C1055 C1056
OPEN OPEN
0.1 0.1 0.1
C1061
C1059C1057
0.1
0.10.1
B1004
B1007
LC1002
OPEN
OPEN
OPEN
OPEN
C1053
C1049
C1050
OPEN
L1004
C1069
10µ
OPEN
T
C1052
C1051
10
##
R1034 10k
## Q1001
UN221E-X DTC144WKA-X RT1N44HC-X
/6.3
C1063
OPEN
0.1
CB
R1038
0
Y
R1041
0
C
R1044
0
RY
R1048
##
0
RC
##
R1052
0
C1065
4.7
R1056
2.2k
R1057
33
C1076
OPEN
C1077
0.1
R1068
2.2k _0.5%
R1069
Q1010
2.2k _0.5%
Q1011
R1070
1.2k _0.5%
C1098C1097
0.10.1
_0.5%
C1070 OPEN
R1039 1k
Q1003
R1040 100 _0.5%
OPEN
C1071
R1042 1k
Q1004
R1043 150 _0.5%
OPEN
C1072
R1045 1k
Q1005
## R1047
C1073 OPEN
## R1049
1k
## Q1006
## R1051
270
_0.5%
C1074 OPEN
## R1053 1k
## Q1007
## R1055
180
_0.5%
C1075 OPEN
Q1009
Q1008 UMZ1N BC847PN BC846PN
TL1097
R1059 470
R1066
R1062 OPEN
100
TL1098
D3.3V
K1020
TL1099
NQR0129-002X
R1065
R1067 120
120
K1019 SHORT
C1095 10 /6.3
C1096
0.1
C1036
0.1
C1032
0.1
R1021
R1022
1.5k
_0.5%
R1050
1.5k
_0.5%
C1092
0.1
3.3k
_0.5%
OPEN
C1037
0.1
C1038
0.1
C1039
OPEN
C1040
C1034
C1035
OPEN
C1087
0.1
C1060
0.1
C1089
0.1
C1090
0.1
C1093
R1046
3.3k
_0.5%
0.1
C1091
0.1
C1094
R1054
R1071
3.3k
1.5k
_0.5%
_0.5%
B1001
LC1003
OPEN
C1001 22
T
/6.3
C1042
0.1
C1043
0.1
C1044
RA1004
R1024
##
C1058
2.7k
0.1
10k
R1030
10k
R1031
10k
C1045
0.1
DQ15
DQ15
VC2
VC3
VC0
OPEN
VC1
0VDDI
0VSS
0.1 DAY_COMP
DAY_VREF
C1033
DAY_AVSS1
DAY_VRO
_0.5%
DAY_AVDD1
DAYO
DAY_AVDD2
DAY_AVSS2
DACB_AVSS2
DACB_AVDD2
DACBO
DACB_AVDD1
0.1 DACB_COMP
DACB_AVSS1
DACR_AVSS1
0.1 DACR_COMP
DACR_AVDD1
DACRO
DACR_AVDD2
DACR_AVSS2
DARC_AVSS1
DARC_AVDD1
DARCO
DARYO
DARY_AVDD1
0.01
C1062
DARY_AVSS1
DARY_VREF
DARY_VRO
R1028
DACO
_0.5%
2.7k DAC_AVDD1
DAC_AVSS1
DAC_VREF
DAC_VRO
R1027
0VDDI
2.7k 0VSS
BLK1
BLK2
BLK3 YSI3
SIMTST
C1002
C1003
C1004
0.1
0.1 T
10
/6.3
1
p10593001a_rev0
A
BCDEFG
2-7 2-8

DIGITAL(FLASH) SCHEMATIC DIAGRAM

5
C1207
IC1203
0.1 SN74LVC373APW-X
LH_AR[22]
LH_AR[14]
IC1201
LH_AR[16]
LH_AR[15]
LH_AR[14]
LH_AR[13]
LH_AR[12]
R1217
R1218
R1219
R1220
R1221
R1222
R1223
R1224
LH_AR[11]
LH_AR[10]
LH_AR[9]
LH_AR[19]
LH_AR[18]
LH_AR[8]
LH_AR[7]
LH_AR[6]
LH_AR[5]
LH_AR[4]
LH_AR[3]
LH_AR[2]
LH_AR[1]
LH_AR[22]
R1216
B1202
100
OPEN
B1204
R1225
10k
MADD[1]
MADD[2]
MADD[3]
MADD[4]
MADD[5]
LH_AR[21]
4
LH_AR[20]
3
TO MEDIA PROCESSOR
D3.3V
UART2_RX
UART2_TX
CS[0]
CS[1]
E5_RESET[L]
MADD[1-5]
MADD[6-21]
MADD[22]
GND
ALE
MADD[1-5]
MADD[6-21]
2
TO MEDIA PROCESSOR
DTACK[L]
WAIT[L]
ELINK_INT[L]
OE[L]/LDS[L]
UWE[L]/UDS[L]
RD/WR[L]
MBPL65LM90TN
A15
A14
A13
A12
A11
A10
A9
A8
A21
A20
64MBIT
WE
0‘
4.7k
4.7k
LH_AR[1]
100
LH_AR[2]
100
LH_AR[3]
100
LH_AR[4]
100
LH_AR[5]
100
FLASH
RESET
MEMORY
ACC
WP
A19
A18
A17
A7
A6
A5
A4
A3
A2
A1 A0
MADD[21]
MADD[20]
MADD[19]
MADD[18]
MADD[17]
MADD[16]
MADD[15]
MADD[14]
MADD[13]
MADD[12]
MADD[11]
MADD[10]
MADD[9]
MADD[8]
MADD[7]
MADD[6]
VCCQ
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
LH_AR[17]
A16
VSS
MADD[21]
MADD[13]
DQ7
MADD[20]
MADD[12]
DQ6
MADD[19]
MADD[11]
DQ5
MADD[18]
MADD[10]
DQ4
VCC
MADD[17]
MADD[9]
DQ3
MADD[16]
MADD[8]
DQ2
MADD[15]
DQ9
MADD[7]
DQ1
MADD[14]
DQ8
MADD[6]
DQ0
OE
VSS
CE
R1226
4.7k
RA1201 10k
RA1202 10k
RA1203 10k
RA1204 10k
K1201 SHORT
47
C1203
0.1
C1204
/6.3
MADD[14]
MADD[15]
LH_AR[15]
LH_AR[16]
MADD[16]
MADD[17]
LH_AR[17]
LH_AR[6]
MADD[6]
MADD[7]
LH_AR[7]
LH_AR[8]
MADD[8]
MADD[9] MADD[10]
LH_AR[9]
C1206
0.1
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
IC1202 SN74LVC373APW-X
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
VCC
VCC
LH_AR[21]
Q7
MADD[21]
D7
MADD[20]
D6
LH_AR[20]
Q6
LH_AR[19]
Q5
MADD[19]
D5
MADD[18]
D4
LH_AR[18]
Q4
LE
LH_AR[13]
Q7
MADD[13]
D7
MADD[12]
D6
LH_AR[12]
Q6
LH_AR[11]
Q5
MADD[11]
D5
D4
LH_AR[10]
Q4
LE
D3.3V
4.7k
4.7k
R1229
R1230
DIGITAL(FLASH)
02
OPEN
B1205
R1227
100
R1228
100
OPEN
B1206
4.7k
R1231
C1208 OPEN
TL1217
B1207 OPEN
B1208
TL1215
MADD[5]
MADD[4]
MADD[3]
MADD[2]
MADD[1]
MADD[21]
MADD[20]
MADD[19]
MADD[18]
MADD[17]
MADD[16]
MADD[15]
MADD[14]
MADD[13]
MADD[12]
MADD[11]
MADD[10]
MADD[9]
MADD[8]
MADD[7]
MADD[6]
TL1216
GND
TO ELINK BOARD
CN1202
GND
UART2_CTS
UART2_RX
UART2_TX
UART2_RTS
CS_L[1]
ALE
RST[L]
MADD[5]
MADD[4]
MADD[3]
MADD[2]
MADD[1]
MADD[21]/MDT[15]
MADD[20]/MDT[14]
MADD[19]/MDT[13]
MADD[18]/MDT[12]
MADD[17]/MDT[11]
MADD[16]/MDT[10]
MADD[15]/MDT[9]
MADD[14]/MDT[8]
GND
MADD[13]/MDT[7]
MADD[12]/MDT[6]
MADD[11]/MDT[5]
MADD[10]/MDT[4]
MADD[9]/MDT[3]
MADD[8]/MDT[2]
MADD[7]/MDT[1]
MADD[6]/MDT[0]
DTACK[L]/WAIT[L]
MEDUSA_INT[L]
OE[L]/LDS[L]
UWE[L]/UDS[L]
RD/WR[L]
GND
1
p20402001a_rev0
A
BCD EFG
2-9 2-10

DIGITAL(MEDIA PROCESSOR) SCHEMATIC DIAGRAM

TO VIDEO IF
AO_D[0]
AO_SCLK
AO_FSYNC
AO_IEC958
AO_MCLKO
AI_D[0]
VIDEO_MUTE[H]
480I[H]
TO 1394PHY
5
4
3
2
PHY_CNA
TO VIDEO IF
VIDEO_27M
VI_D[2-9]
VO_D[0-15]
TO VIDEO IF
DAC_CVBS_OUT
DAC_SY_OUT
DAC_SC_OUT
DAC_Y_OUT
DAC_PB_OUT
DAC_PR_OUT
TO 1394PHY
PHY_DATA[0-7]
PHY_CTL[1]
PHY_CTL[0]
PHY_LREQ
PHY_LPS
PHY_LINK_ON
PHY_CLK
TO VIDEO IF
DIGI3.3V
TO VIDEO IF
TO DDR SDRAM
SSTL2_VDD
VDDI1.8
V3.3V
D2.5V
D1.8V
GND
D5.0V
D1.8V
D2.5V
GND
D3.3V
GND
TL1402
TL1437
R1408
1k
D3.3V
TL1403
TL1404
R1409
10k
R1410
10k
TL1407
R1411
100
R1412
10k
R1413
10k
VI_D[2]
VI_D[3]
VI_D[4]
VI_D[5]
VI_D[6]
VI_D[7]
VI_D[8]
VI_D[9]
R1414
1k
R1415
V3.3V
K1407
VI_D[2-9]
VO_D[0-15]
PHY_DATA[0-7]
02
SHORT
C1450
0.1
C1433
0.1
R1402
0Ω
X1401
NAX0580-001X
R1421
OPEN
R1422
OPEN
R1423
OPEN
R1424
OPEN
R1425
OPEN
R1426
OPEN
VDDI1.8
0.1
C1452
R1493
C1453
0Ω
0.1
K1408 SHORT
OPEN
C1454
C1455
0.1
C1456
OPEN
PHY_DATA[7]
PHY_DATA[6]
PHY_DATA[5]
PHY_DATA[4]
PHY_DATA[3]
PHY_DATA[2]
PHY_DATA[1]
PHY_DATA[0]
B1401
LC1401
OPEN NQR0415-002X
C1440
0.1
C1426C1431
0.10.1
C1441
0.1
LC1403 NQR0415-002X
C1413 C1414
/6.3
100 0.1 /6.3
C1405
0.1
LC1402 NQR0415-002X
C1449
0.1
C1411 100
/6.3
C1406
0.1
C1412
0.1
C1415 C1416
OPEN
C1443
0.1
C1401
C1402
0.1
0.1
B1402 OPEN
C1408
C1409
0.1
0.1
B1403 OPEN
C1432
0.1
DIGITAL(MEDIA PROCESSOR)
1k
R1416
1k
R1417
1k
TL1489
VO_D[0]
VO_D[1]
RA1401
VO_D[2]
VO_D[3]
100
VO_D[4]
VO_D[5]
VO_D[6]
RA1402
VO_D[7]
100
VO_D[8]
VO_D[9]
VO_D[10]
RA1403
VO_D[11]
100
VO_D[12]
VO_D[13]
VO_D[14]
RA1404
VO_D[15]
100
100
R1419
TL1412
TL1490
TL1491
R1420
100
R1485
OPEN
R1486
OPEN
R1487
OPEN
R1488
OPEN
R1489
OPEN
R1490
OPEN
D1402D1401
TL1413
TL1414
TL1415
R1491
1k
TL1417
TL1418
TL1419
R1427
100
TL1420
RA1405
100
RA1406
100
R1428
100
R1429
100
R1430
100
R1431
100
C1403
0.1
C1417
0.1 C1418
0.1
0.1 C1410
C1407
0.10.1
SSTL2_VDD
CLKI
CLKX
CLKO_DAC/GPIOExt[35]
BYPASS_PLL
EPD[L]
RSTO[L]
TCK
TDI
TDO
TMS
TRST[L]
VI_D[0]
VI_D[1]
VI_D[2]
VI_D[3]
VI_D[4]
VI_D[5]
VI_D[6]
VI_D[7]
VI_D[8]
VI_D[9]
VI_E[0]
VI_VSYNC[0]
VI_CLK[0]
VI_CLK[1]
VI_VSYNC[1]/IvGPIOExt[45]
VI_E[1]/IvGPIOExt[29]
VO2_D[0]
VO2_D[1]
VO2_D[2]
VO2_D[3]
VO2_D[4]
VO2_D[5]
VO2_D[6]
VO2_D[7]
VO2_D[8]
VO2_D[9]
VO_D[0]/IvGPIOExt[0]
VO_D[1]/IvGPIOExt[1]
VO_D[2]/IvGPIOExt[2]
VO_D[3]/IvGPIOExt[3]
VO_D[4]/IvGPIOExt[4]
VO_D[5]/IvGPIOExt[5]
VO_D[6]/IvGPIOExt[6]
VO_D[7]/IvGPIOExt[7]
VO_D[8]/IvGPIOExt[8]
VO_D[9]/IvGPIOExt[9]
VO_D[10]/IvGPIOExt[10]
VO_D[11]/IvGPIOExt[11]
VO_D[12]/IvGPIOExt[12]
VO_D[13]/IvGPIOExt[13]
VO_D[14]/IvGPIOExt[14]
VO_D[15]/IvGPIOExt[15]
VO_E/IvGPIOExt[30]
VO_ACTIVE
VO_HSYNC
VO_VSYNC
VO_CLK
DAC1_OUT
DAC2_OUT
DAC3_OUT
DAC4_OUT
DAC5_OUT
DAC6_OUT
DAC_DVSS_1
DAC_DVDD
DAC_VDD_0
DAC_VDD_3
DAC4_OUTB
DAC2_OUTB
USB_AVDD_0
USB_AVDD_1
USB_AGND_0
USB_AGND_1
DPLUS_0
DMINUS_0
HOST_PO_0
HOST_OC_0
DPLUS_1
DMINUS_1
HOST_PO_1/GPIOExt[43]
HOST_OC_1/GPIOExt[44]
USB_48MHz/GPIOExt[36]
1394_PHY_DATA[7]
1394_PHY_DATA[6]
1394_PHY_DATA[5]
1394_PHY_DATA[4]
1394_PHY_DATA[3]
1394_PHY_DATA[2]
1394_PHY_DATA[1]
1394_PHY_DATA[0]
1394_PHY_CTL[1]
1394_PHY_CTL[0]
1394_LREQ
1394_LPS
1394_LINK_ON
1394_PHY_CLK
T
C1419 OPEN
T
/6.3
K1401 SHORT
T
OPEN
VDD_15
VDD_00
VDD_01
VDDP_01
VDDP_02
VDDP_03
VDDP_04
VDDP_21
VDDP_20
VDDP_19
VDDP_19A
T
C1421
C1420C1404
/6.3
T
/6.3
VDDP_10
VDDP_09
VDDP_08A
C1425C1424C1423
C1422
0.10.10.1
0.10.110100
C1430C1429C1428C1427
0.10.10.110
C1438C1437C1436C1434 C1435
C1439
0.1
0.10.10.110
VDD_02
VDD_14
VDD_30
VDD_23
0‘
0‘
100
0‘
100
100
R1481
AI_FSYNC
VDD25_02
100
TL1435
TL1434
R1477
R1478
R1479
R1476
R1480
AI_D[0]
AI_SCLK
AO_MCLKO
AO_IEC958
AI2_D/GPIO[7]
AI_D[1]/GPIO[6]
AO_MCLKI/GPIOExt[33]
BIAS_5V01
BIAS_5V00
VDD25_08
VDD25_03
VDD25_04
VDD25_05
VDD25_06
K1402 SHORT
C1442
0.1
K1403 SHORT
K1404
#
K1405 OPEN
C1445
0.1
OPEN
R1482
R1483
AI_MCLKO
AI_MCLKI/GPIOExt[32]
VDD25_00
VDD_03
VDD_09
VDD_08
VDD25_01
100
100
TL1433
TL1432
R1474
R1475
AO2_D[0]
AO_FSYNC
A2_SCLK/GPIOExt[31]
A2_FSYNC/GPIOExt[34]
AVDD_1
AVDD_0
AVDD_2
C1444
0.1
#
C1446
0.1
AO_SCLK
AVDD_3
K1406
TL1431
AO_D[3]
XTALVDD
TL1429
TL1430
100
R1473
SDRAM_CLK_L[0]
SDRAM_CLK[1]
SDRAM_CLK_L[1]
AO_D[2]
AO_D[1]
AO_D[0]
SDRAM_VREF
SDRAM_CLK[1]
SDRAM_CLK_L[1]
AGND_2
AGND_1
AGND_3
AGND_0
XTALVSS
D5.0V
1
SDRAM_WE_L
SDRAM_CLK[0]
SDRAM_WE[L]
SDRAM_CLK[0]
SDRAM_CLK_L[0]
GROUND
GROUND
GROUND
SDRAM_RAS_L
SDRAM_CKE
SDRAM_CKE
IC1401
GROUND
SDRAM_A[17]
SDRAM_CAS_L
SDRAM_CAS[L]
SDRAM_RAS[L]
GROUND
GROUND
TL1488
SDRAM_A[16]
SDRAM_A[17]
GROUND
GROUND
SDRAM_A[15]
SDRAM_A[14]
SDRAM_A[15]
GROUND
TL1487
SDRAM_A[14]
SDRAM_A[13]
GROUND
GROUND
SDRAM_A[11]
SDRAM_A[12]
SDRAM_A[12]
GROUND
SDRAM_A[10]
SDRAM_A[10]
SDRAM_A[11]
GROUND
GROUND
SDRAM_A[8]
SDRAM_A[9]
SDRAM_A[9]
GROUND
SDRAM_A[7]
SDRAM_A[8]
SDRAM_A[7]
GROUND
GROUND
SDRAM_A[5]
SDRAM_A[6]
SDRAM_A[6]
GROUND
SDRAM_A[4]
SDRAM_A[5]
GROUND
SDRAM_A[3]
SDRAM_A[4]
SDRAM_A[3]
GROUND
GROUND
SDRAM_A[2]
SDRAM_A[2]
GROUND
SDRAM_A[0]
SDRAM_A[1]
SDRAM_A[1]
GROUND
SDRAM_DQS[3]
SDRAM_DQM[3]
SDRAM_A[0]
SDRAM_DQM[3]
GROUND
GROUND
SDRAM_DQ[31]
SDRAM_DQ[30]
SDRAM_DQS[3]
SDRAM_DQ[31]
GROUND
GROUND
SDRAM_DQ[28]
SDRAM_DQ[29]
SDRAM_DQ[29]
SDRAM_DQ[30]
GROUND
GROUND
SDRAM_DQ[26]
SDRAM_DQ[27]
SDRAM_DQ[27]
SDRAM_DQ[28]
GROUND
GROUND
SDRAM_DQ[24]
SDRAM_DQ[25]
SDRAM_DQ[25]
SDRAM_DQ[26]
GROUND
GROUND
SDRAM_DQS[2]
SDRAM_DQM[2]
SDRAM_DQM[2]
SDRAM_DQ[24]
GROUND
GROUND
TL1495
TX
CN1403
OPEN
SDRAM_DQ[22]
SDRAM_DQ[23]
SDRAM_DQ[22]
SDRAM_DQ[23]
SDRAM_DQS[2]
GROUND
GROUND
GROUND
TL1493
TL1494
RX
GND
SDRAM_DQ[20]
SDRAM_DQ[21]
SDRAM_DQ[21]
SDRAM_DQ[20]
REFVSS
TL1492
D5.0V
SDRAM_DQ[17]
SDRAM_DQ[18]
SDRAM_DQ[19]
SDRAM_DQ[18]
SDRAM_DQ[19]
SDRAM_DQ[17]
REFVDD
VREF
_1%
1.18k
0.1
0.01
C1447
C1448
R1401
A_MUTE2[H]
VIDEO_RST[L]
TO VIDEO IF
SDRAM_DQS[1]
SDRAM_DQM[1]
SDRAM_DQ[16]
SDRAM_DQM[1]
SDRAM_DQS[1]
SDRAM_DQ[16]
SIO_IRTX1/GPIOExt[40]
SIO_IRTX2
SIO_IRRX/GPIOExt[39]
TL1436
CN1404
SPI_CLK
SPI_MOSI
##
SDRAM_DQ[14]
SDRAM_DQ[15]
SDRAM_DQ[14]
SDRAM_DQ[15]
SIO_SDA
SIO_SCL
OPEN
OPEN
R1433
R1432
D3.3V
JLIP_TX
CN7105
(VIDEO)
SDRAM_DQ[13]
GND
SDRAM_DQ[8]
SDRAM_DQ[9]
SDRAM_DQ[10]
SDRAM_DQ[11]
SDRAM_DQ[12]
SDRAM_DQ[9]
SDRAM_DQ[12]
SDRAM_DQ[11]
SDRAM_DQ[10]
SDRAM_DQ[13]
SIO_UART2_CTS
SIO_UART1_RX
SIO_UART2_RX/GPIOExt[37]
SIO_UART2_TX/GPIOExt[38]
SIO_UART2_RTS
100
100
R1434
R1435
TL1422
OPEN
R1492
D3.3V
CN1402
JLIP_TX
JRIP_RX
##
OPEN
SDRAM_DQ[6]
SDRAM_DQ[7]
SDRAM_DQM[0]
SDRAM_DQS[0]
SDRAM_DQ[7]
SDRAM_DQ[6]
SDRAM_DQ[8]
SDRAM_DQS[0]
SDRAM_DQM[0]
SIO_SPI_MISO
SIO_UART1_TX
SIO_UART1_RTS/GPIOExt[41]
SIO_UART1_CTS/GPIOExt[42]
SIO_SPI_MOSI
100
0‘
R1437
TL1423
TL1424
R1436
GND
JRIP_RX
TO VIDEO IF
SDRAM_DQ[1]
SDRAM_DQ[2]
SDRAM_DQ[3]
SDRAM_DQ[4]
SDRAM_DQ[5]
SDRAM_DQ[5]
SDRAM_DQ[3]
SDRAM_DQ[2]
SDRAM_DQ[4]
SIO_SPI_CS[2]
SIO_SPI_CS[3]
SIO_SPI_CS[0]/GPIOExt[24]
SIO_SPI_CS[1]/GPIOExt[25]
100
100
100
R1440
R1439
TL1425
TL1448
R1438
SPI_MOSI
VIDEO_CS
A_DAC_CS
VIDEO_RXD
SDRAM_DQ[0]
SDRAM_DQ[0]
SDRAM_DQ[1]
SIO_SPI_CLK
SPI_CLK
SN74HCT08APW
IC1404
LDS[L]/OE[L]
UDS[L]/UWE[L]
GPIO[4] /PCMCIA_IOW[L]
GPIO[5] /PCMCIA_IOR[L]
WR[L]/LWE[L]
MADDR[21]/MDATA[15]
MADDR[20]/MDATA[14]
MADDR[19]/MDATA[13]
MADDR[18]/MDATA[12]
MADDR[17]/MDATA[11]
MADDR[16]/MDATA[10]
MADDR[15]/MDATA[9]
MADDR[14]/MDATA[8]
MADDR[13]/MDATA[7]
MADDR[12]/MDATA[6]
MADDR[11]/MDATA[5]
MADDR[10]/MDATA[4]
MADDR[9]/MDATA[3]
MADDR[8]/MDATA[2]
MADDR[7]/MDATA[1]
MADDR[6]/MDATA[0]
ATAPI_ADDR[0]
ATAPI_ADDR[1]
ATAPI_ADDR[2]
ATAPI_ADDR[3]
ATAPI_ADDR[4]
ATAPI_DATA[15]
ATAPI_DATA[14]
ATAPI_DATA[13]
ATAPI_DATA[12]
ATAPI_DATA[11]
ATAPI_DATA[10]
ATAPI_DATA[9]
ATAPI_DATA[8]
ATAPI_DATA[7]
ATAPI_DATA[6]
ATAPI_DATA[5]
ATAPI_DATA[4]
ATAPI_DATA[3]
ATAPI_DATA[2]
ATAPI_DATA[1]
ATAPI_DATA[0]
ATAPI_RESET
ATAPI_DMAACK[L]
ATAPI_DMARQ
ATAPI_IORDY
ATAPI_INTRQ
ATAPI_DIOR[L]
ATAPI_DIOW[L]
ATAPI2_RESET
ATAPI2_DMAACK[L]
ATAPI2_DMARQ
ATAPI2_IORDY
ATAPI2_INTRQ
ATAPI2_DIOR[L]
ATAPI2_DIOW[L]
ATAPI2_ADDR[0]
ATAPI2_ADDR[1]
ATAPI2_ADDR[2]
ATAPI2_ADDR[3]
ATAPI2_ADDR[4]
ATAPI2_DATA[15]
ATAPI2_DATA[14]
ATAPI2_DATA[13]
ATAPI2_DATA[12]
ATAPI2_DATA[11]
ATAPI2_DATA[10]
ATAPI2_DATA[9]
ATAPI2_DATA[8]
ATAPI2_DATA[7]
ATAPI2_DATA[6]
ATAPI2_DATA[5]
ATAPI2_DATA[4]
ATAPI2_DATA[3]
ATAPI2_DATA[2]
ATAPI2_DATA[1]
ATAPI2_DATA[0]
CS0_8BIT
DTACK[L]
MADDR[26]
MADDR[25]
MADDR[24]
MADDR[23]
MADDR[22]
MADDR[5]
MADDR[4]
MADDR[3]
MADDR[2]
MADDR[1]
RST[L]
MCONFIG
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
WAIT[L]
R1471
100
ALE
R1469
R1468
R1467
R1466
R1465
R1462
R1461
R1460
R1459
R1458
CS[5]
CS[4]
CS[3]
CS[2]
R1453
CS[1]
R1452
CS[0]
R1451
R1450
RA1411
100
RA1410
100
RA1409
100
RA1408
100
RA1407
100
R1498
R1497
R1496
R1472R1470
0‘1k
C1459
1k
100
100
100
100
TL1486
TL1485 100
100
100
100
100
100
100
100
100
10k
10k
10k
TL1464
TL1463
TL1462
TL1461
TL1460
TL1459
TL1458
TL1457
TL1456
TL1455
TL1454
TL1453
TL1452
TL1451
TL1450
TL1449
R1441 10k
CS[1]
CS[0]
MADD[22]
MADD[5]
MADD[4]
MADD[3]
MADD[2]
MADD[1]
MADD[21]
MADD[20]
MADD[19]
MADD[18]
MADD[17]
MADD[16]
MADD[15]
MADD[14]
MADD[13]
MADD[12]
MADD[11]
MADD[10]
MADD[9]
MADD[8]
MADD[7]
MADD[6]
ATA_ADD[0]
ATA_ADD[1]
ATA_ADD[2]
ATA_ADD[3]
ATA_ADD[4]
ATA_DAT[15]
ATA_DAT[14]
ATA_DAT[13]
ATA_DAT[12]
ATA_DAT[11]
ATA_DAT[10]
ATA_DAT[9]
ATA_DAT[8]
ATA_DAT[7]
ATA_DAT[6]
ATA_DAT[5]
ATA_DAT[4]
ATA_DAT[3]
ATA_DAT[2]
ATA_DAT[1]
OPEN
S1401
C1458C1457
0.10.1
SN74LV08APW
IC1405
OPEN
SDRAM_A[14-17]
SDRAM_VREF
SDRAM_CLK_L[1]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK[0]
SDRAM_WE_L
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_DQM[0-3]
SDRAM_DQS[0-3]
SDRAM_A[0-12]
SDRAM_DQ[16-31]
SDRAM_DQ[0-15]
MADD[1-5]
MADD[6-21]
ATA_ADD[0-4]
ATA_DAT[0-15]ATA_DAT[0]
D1403
1SS355
4.7k
4.7k
R1443
R1444
TO DDR SDRAM
SDRAM_A[14-17]
SDRAM_VREF
SDRAM_CLK_L[1]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK[0]
SDRAM_WE_L
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_DQM[0-3]
SDRAM_DQS[0-3]
SDRAM_A[0-12]
SDRAM_DQ[16-31]
SDRAM_DQ[0-15]
TO FLASH
ALE
OE[L]/LDS[L]
UWE[L]/UDS[L]
ELINK_INT[L]
RD/WR[L]
WAIT[L]
DTACK[L]
CS[1]
CS[0]
MADD[22]
MADD[1-5]
MADD[6-21] /MDT[0-15]
TO 1394PHY
PHY_RESET[L]
TO VIDEO IF
DAC_RST[L]
TO ATAPI IF
ATA_ADD[0-4]
ATA_DAT[0-15]
ATA_RESET
ATA_DMAACK[L]
ATA_DMARQ
ATA_IORDY
ATA_INTRQ
ATA_DIOR[L]
ATA_DIOW[L]
TO VIDEO IF
R1445
100
K_BUS_CLK
R1446
100
K_BUS_REQ
R1447
100
SYS_RESET[L]
R1448
100
K_BUS_OUT
R1449
100
K_BUS_IN
TO FLASH
E5_RESET[L]
UART2_TX
UART2_RX
TO JUNCTION
p10594001a_rev1
A
BCDEFG
2-11 2-12

DIGITAL(DDR SDRAM) SCHEMATIC DIAGRAM

5
C1637 OPEN
C1638
0.1
C1639 OPEN
C1640
4
K1702 SHORT
3
2
TO MEDIA PROCESSOR
SSTL2_VDD
SDRAM_DQ[0-15]
SDRAM_DQ[16-31]
SDRAM_A[14-17]
SDRAM_A[0-12]
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_WE_L
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
SDRAM_CLK[0]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
SDRAM_VREF
D3.3V
GND
GND
K1701 SHORT
D3.3V
C1701
SDRAM_DQ[0-15]
SDRAM_DQ[16-31]
SDRAM_A[14-17]
SDRAM_A[0-12]
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_WE_L
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
SDRAM_CLK[0]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
C1703
0.1
C1702
100
0.1
C1653
OPEN
C1654
0.1
0.1
IC1701 PQ015YZ01Z
C1704 100
/6.3
/6.3
C1647
OPEN
C1648
0.1
RA1601
100
RA1602
100
RA1603
100
RA1604
100
RA1605
100
RA1606
100
RA1607
100
RA1608
100
R1702
1k
R1701 270
R1707
OPEN
T
C1707
0.1
R1703
2.2k _0.5%
R1704
2.2k _0.5%
OPEN
R1645
OPEN
R1646
OPEN
R1647
R1648
OPEN
R1649
100
R1650
100
R1651
100
R1652
100
R1609
OPEN
R1610
OPEN
R1611
OPEN
R1612
OPEN
SDRAM_DQ[0]
SDRAM_DQ[1]
SDRAM_DQ[2]
SDRAM_DQ[3]
SDRAM_DQ[4]
SDRAM_DQ[5]
SDRAM_DQ[6]
SDRAM_DQ[7]
SDRAM_DQ[8]
SDRAM_DQ[9]
SDRAM_DQ[10]
SDRAM_DQ[11]
SDRAM_DQ[12]
SDRAM_DQ[13]
SDRAM_DQ[14]
SDRAM_DQ[15]
SDRAM_DQ[16]
SDRAM_DQ[17]
SDRAM_DQ[18]
SDRAM_DQ[19]
SDRAM_DQ[20]
SDRAM_DQ[21]
SDRAM_DQ[22]
SDRAM_DQ[23]
SDRAM_DQ[24]
SDRAM_DQ[25]
SDRAM_DQ[26]
SDRAM_DQ[27]
SDRAM_DQ[28]
SDRAM_DQ[29]
SDRAM_DQ[30]
SDRAM_DQ[31]
OS
C1709
C1710C1708
/6.3T/6.3
OPEN
4747
C1705
OPEN
C1706
0.1
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
SDRAM_CLK[0] SDRAM_CLK[0]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQS[2]
SDRAM_DQS[3]
SDRAM_CLK[1]
SDRAM_CLK_L[0]
SDRAM_CLK_L[1]
SDRAM_DQ[0]
SDRAM_DQ[1]
SDRAM_DQ[2]
SDRAM_DQ[3]
SDRAM_DQ[4]
SDRAM_DQ[5]
SDRAM_DQ[6]
SDRAM_DQ[7]
SDRAM_DQ[8]
SDRAM_DQ[9]
SDRAM_DQ[10]
SDRAM_DQ[11]
SDRAM_DQ[12]
SDRAM_DQ[13]
SDRAM_DQ[14]
SDRAM_DQ[15]
SDRAM_DQ[16]
SDRAM_DQ[17]
SDRAM_DQ[18]
SDRAM_DQ[19]
SDRAM_DQ[20]
SDRAM_DQ[21]
SDRAM_DQ[22]
SDRAM_DQ[23]
SDRAM_DQ[24]
SDRAM_DQ[25]
SDRAM_DQ[26]
SDRAM_DQ[27]
SDRAM_DQ[28]
SDRAM_DQ[29]
SDRAM_DQ[30]
SDRAM_DQ[31]
SDRAM_A[0]
SDRAM_A[1]
SDRAM_A[2]
SDRAM_A[3]
SDRAM_A[4]
SDRAM_A[5]
SDRAM_A[6]
SDRAM_A[7]
SDRAM_A[8]
SDRAM_A[9]
SDRAM_A[10]
SDRAM_A[11]
SDRAM_A[12]
SDRAM_A[14]
SDRAM_A[15]
SDRAM_CKE
SDRAM_RAS_L
SDRAM_CAS_L
SDRAM_WE_L
DIGITAL(DDR SDRAM)
02
RA1609
22
RA1610
22
RA1611
22
RA1612
22
RA1613
RA1614
22
RA1615
22
RA1616
22
RA1625
10
RA1626
10
RA1627
10
RA1628
10
R1642
R1601
R1602
R1603
R1604
RA1629
C1645
OPEN
RA1630
C1646
0.1
RA1631
RA1632
R1653
R1654
R1655
R1656
R1657
R1658
R1659
R1660
R1613
R1614
R1615
R1616
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
DDR_DQ[0]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
DDR_BA[0]
DDR_BA[1]
DDR_CS[0]SDRAM_A[17]
DDR_CKE
10
DDR_RAS_L
10
DDR_CAS_L
10
DDR_WE_L
10
DDR_A[0]
47
47
47
47
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[11]
DDR_A[12]
DDR_BA[0]
DDR_BA[1]
DDR_A[10]
R1644
47
R1605
47
DDR_CKE
R1606
47
DDR_RAS_L
R1607
47
DDR_CAS_L
R1608
47
DDR_WE_L
0‘
DDR_DQM[0]
0‘
DDR_DQM[1]
0‘
DDR_DQM[2]
0‘
DDR_DQM[3]
DDR_DQS[0]
22
DDR_DQS[1]
22
DDR_DQS[2]
22
DDR_DQS[3]
DDR_CLK[0]
0‘
DDR_CLK[1]
0‘
DDR_CLK_L[0]
0‘
DDR_CLK_L[1]SDRAM_CLK[1]
0‘
VTT
R1617
DDR_DQM[0]
27
R1618
DDR_DQM[1] DDR_DQM[3]
27
R1619
100
R1620
100
DDR_DQS[1] DDR_DQS[3]
R1621
DDR_CLK[0]
27
R1622
DDR_CLK_L[0]
27
C1649 C1651 OPEN OPEN
C1650
0.1
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
DDR_BA[0] DDR_BA[0]
DDR_BA[1]
DDR_CKE
DDR_RAS_L
DDR_CAS_L
DDR_WE_L
DDR_DQM[0]
DDR_DQM[1]
DDR_DQS[0]
DDR_DQS[1]
C1655
C1656
39
C1605 C1606
0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1220.1 0.1 0.1 0.1 0.1 0.1
#1
IC1601
IC1601IC1601
IC1601
IC1601 IC1602
IC1601
DDR_DQ[7]
D0
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
CS
CKE
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
CLK
VREF
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
15 55 61 1 18 33
C1607 C1608 C1609 C1610 C1611 C1612
DDR_DQ[6]
D1
DDR_DQ[5]
D2
DDR_DQ[4]
D3
DDR_DQ[3]
D4
DDR_DQ[2]
D5
DDR_DQ[1]
D6
DDR_DQ[0]
D7
DDR_DQ[15]
D8
DDR_DQ[14]
D9
DDR_DQ[13]
D10
DDR_DQ[12]
D11
DDR_DQ[11]
D12
DDR_DQ[10]
D13
DDR_DQ[9]
D14
DDR_DQ[8]
D15
NC
NC
NC
NC
NC
NC
NC
GND
GND
GND
GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
OS
C1601 C1602
/4V /4V
220 220
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
RA1617
100
RA1618
100
RA1619
100
RA1620
100
SSTL2_VDD
C1624
C1621
0.1 0.1
R1623
27
DDR_DQM[2]
R1624
27
R1625
100
DDR_DQS[2]DDR_DQS[0]
R1626
100
R1627
DDR_CLK[1]
27
R1628
DDR_CLK_L[1]
27
C1652
0.1
DDR_A[0]
DDR_A[1]
DDR_A[2]
DDR_A[3]
DDR_A[4]
DDR_A[5]
DDR_A[6]
DDR_A[7]
DDR_A[8]
DDR_A[9]
DDR_A[10]
DDR_A[11]
DDR_A[12]
DDR_BA[1]
DDR_CKE
DDR_RAS_L
DDR_CAS_L
DDR_WE_L
DDR_DQM[2]
DDR_DQM[3]
DDR_DQS[2]
DDR_DQS[3]
C1657 OPENOPEN
C1658
0.10.1
0.1100.1220.1
C1623
C1622
C1625
IC1602IC1602
IC1602
#2
IC1602
IC1602
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
BA0
BA1
CS
CKE
RAS
CAS
WE
LDM
UDM
LDQS
UDQS
CLK
CLK
VREF
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
3 9 15 55 61 1 18 33
C1613 C1614
C1615 C1616 C1617 C1618 C1619 C1620
DDR_DQ[16]
D0
DDR_DQ[17]
D1
DDR_DQ[18]
D2
DDR_DQ[19]
D3
DDR_DQ[20]
D4
DDR_DQ[21]
D5
DDR_DQ[22]
D6
DDR_DQ[23]
D7
DDR_DQ[24]
D8
DDR_DQ[25]
D9
DDR_DQ[26]
D10
DDR_DQ[27]
D11
DDR_DQ[28]
D12
DDR_DQ[29]
D13
DDR_DQ[30]
D14
DDR_DQ[31]
D15
NC
NC
NC
NC
NC
NC
NC
GND
GND
GND
GNDQ
GNDQ
GNDQ
GNDQ
GNDQ
OS
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
DDR_DQ[31]
RA1621
RA1622
RA1623
RA1624
100
100
100
100
C1643C1641 OPENOPEN
C1644C1642
0.10.1
1
p10595001a_rev0
A
BCD EFG
2-13 2-14

DIGITAL(1394PHY) SCHEMATIC DIAGRAM

5
/6.3
D3.3V
C1814 OPEN
#
R1819 750 _0.5%
TPA0-
TPB0+
TPB0-
#
R1818
5.6k _0.5%
TPA0+
565656
565.1k
DIGITAL(1394PHY)
02
T1801T1801T1801T1801T1801T1801T1801T1801
#
NQR0444-001X
NQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001XNQR0444-001X
TPA+
TPA-
TPB+
TPB-
TO JACK CN4104
# CN1801 QGB2027L1-10X
#
#
/6.3
C1813 OPEN
12p
12p
#
X1801
4
TO MEDIA PROCESSOR
3
D3.3V
PHY_RESET[L]
PHY_LREQ
PHY_CLK
PHY_CNA
PHY_CTL[0]
PHY_CTL[1]
PHY_DATA[0-7]
PHY_LPS
PHY_LINK_ON
GND
PHY_DATA[0-7]
#
R1801
R1802
#
PHY_DATA[0]
PHY_DATA[1]
PHY_DATA[2]
PHY_DATA[3]
PHY_DATA[4]
PHY_DATA[5]
PHY_DATA[6]
PHY_DATA[7]
0Ω
0Ω
NAX0551-001X NAX0666-001X
# IC1801 TSB41AB2PAP
LREQ
SYSCLK
CNA
CTL0
CTL1
D0
D1
D2
D3
D4
D5
D6
D7
PD
LPS
NC AGND
DGND
DGND
DGND
DGND
C1809
DVDD
DVDD
C/LKON
PC0
###
1801_X0
XO
PC1
C1808
XI
PC2
1801_XI
PLLGND
ISO
# C1805
0.1
C1810
#
PLLGND
PLLVDD
CPS
DVDD
OPEN
OPEN
K1801
SHORT
C1807 #
NC
DVDD
0.1
NC
TESTM
B1801B1802
#
L1801L1802 C1804
#
R1820
10k
0Ω
R1822
AVDD
RESET
BRIDGE
TEST0
OPEN
10
AVDD
AVDD
µ
AGND
TPBIAS0
AVDD
AGND
AGND
AVDD
AGND
TPA0+
TPA0-
TPB0+
TPB0-
AGND
#
# C1803C1806
0.1
1010
NC
NC
NC
NC
NC
R1
R0
R1805
#
0Ω
390k
10k
OPEN
##
#
R1808 R1807
10k 10k
2
## R1823
0Ω
RA1801 10k
RA1802
10k
10k
R1803
10k
R1806
R1804
R1809 #
R1810 #
0.1
C1811 #
OPEN
R1811
R1812 #
1k
R1821 #
0Ω
0.1
C1812 #
TPBIAS0
#
R1813
1
C1801 #
R1814 #
R1815 #
270p
C1802 #
R1816R1817
#
#
GND
1
p30122001a_rev1
A
BCDEFG
2-15 2-16

DIGITAL(ATAPI IF) SCHEMATIC DIAGRAM

DIGITAL(ATAPI IF)
02
5
ATA_DAT[7]
ATA_DAT[8]
ATA_DAT[6]
ATA_DAT[9]
ATA_DAT[5]
ATA_DAT[10]
ATA_DAT[4]
ATA_DAT[11]
ATA_DAT[3]
ATA_DAT[12]
ATA_DAT[2]
ATA_DAT[13]
ATA_DAT[1]
ATA_DAT[14]
ATA_DAT[0]
ATA_DAT[15]
RA2201
0Ω
RA2202
0Ω
RA2203
0Ω
RA2204
0Ω
RA2205
0Ω
FE_DAT[7]
FE_DAT[8]
FE_DAT[6]
FE_DAT[9]
FE_DAT[5]
FE_DAT[10]
FE_DAT[4]
FE_DAT[11]
FE_DAT[3]
FE_DAT[12]
FE_DAT[2]
FE_DAT[13]
FE_DAT[1]
FE_DAT[14]
FE_DAT[0]
FE_DAT[15]
4
SN74CBTD16210##
IC2201
NC
ATA_DAT[7]
ATA_DAT[8]
ATA_DAT[6]
ATA_DAT[9]
ATA_DAT[5]
ATA_DAT[10]
ATA_DAT[4]
ATA_DAT[11]
ATA_DAT[3]
ATA_DAT[12]
ATA_DAT[2]
3
TO MEDIA PROCESSOR
D5.0V
D3.3V
P_CTL[H]
ATA_RESET
ATA_DAT[0-15]
GND
ATA_DAT[0-15]
GND
ATA_DAT[13]
ATA_DAT[1]
ATA_DAT[14]
ATA_DAT[0]
ATA_DAT[15]
ATA_ADD[0]
ATA_ADD[1]
ATA_ADD[2]
R2203
4.7k
C2201
0.1
1A1
1A2
1A3
1A4
1A5
1A6
GND
1A7
1A8
1A9
1A10
2A1
2A2
VCC
2A3
GND GND
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2
C2202
IC2202
TO MEDIA PROCESSOR
ATA_DIOW[L]
ATA_DIOR[L]
ATA_DMAACK[L]
ATA_DMARQ
ATA_IORDY
ATA_INTRQ
ATA_ADD[0-4]
ATA_ADD[0-4]
R2201
ATA_ADD[3]
ATA_ADD[4]
R2202
10k
5.6k
NC
A1
A2
A3
A4
A5
A6
A7
A8
GND
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
0.1
SN74CBT3245A##
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
DIOR
FE_DAT[7]
FE_DAT[8]
FE_DAT[6]
FE_DAT[9]
FE_DAT[5]
FE_DAT[10]
FE_DAT[4]
FE_DAT[11]
FE_DAT[3]
FE_DAT[12]
FE_DAT[2]
FE_DAT[13]
FE_DAT[1]
FE_DAT[14]
FE_DAT[0]
FE_DAT[15]
##
Q2201 UN221E-X DTC144WKA-X RT1N44HC-X
D5.0V
## R2217 22k
ATA_ADD[3]
ATA_ADD[4]
RA2206
RA2207
TO DVD UNIT
R2204
FE_DAT[7]
FE_DAT[8]
FE_DAT[6]
FE_DAT[9]
FE_DAT[5]
FE_DAT[10]
FE_DAT[4]
FE_DAT[11]
FE_DAT[3]
FE_DAT[12]
FE_DAT[2]
FE_DAT[13]
FE_DAT[1]
FE_DAT[14]
FE_DAT[0]
FE_DAT[15]
R2205
R2206
0Ω
0Ω
R2207
R2208
R2209
R2210
R2211
R2212
R2213
R2214
R2215
33
#
K2201
#
K2202
RA2208
#
33
K2203
#
K2204
#
K2205
#
RA2209
K2206
#
33
K2207
#
K2208
#
K2209
#
RA2210
K2210
#
33
K2211
#
K2212
#
K2213
#
K2214
RA2211
#
33
K2215
#
K2216
82
22
22
82
22
82
33
33
33
33
33
D3.3V
#
#
#
#
#
K2217
K2218
K2219
K2220
K2221
R2216
OPEN
D2201 OPEN
CN2201
RSTAT
GND
HD_AT[7]
HD_AT[8]
HD_AT[6]
HD_AT[9]
HD_AT[5]
HD_AT[10]
HD_AT[4]
HD_AT[11]
HD_AT[3]
HD_AT[12]
HD_AT[2]
HD_AT[13]
HD_AT[1]
HD_AT[14]
HD_AT[0]
HD_AT[15]
GND
DMARQ
GND
DIOW
GND
DIOR
GND
IORDY
CAB_SEL
DMACK
GND
INT_ATA
ATA_A1
ATA_A0
ATA_A2
CS1FX
CS3FX
GND
A
1
p20403001a_rev1
A
BCD EFG
2-17 2-18

MAIN(VIDEO/N.AUDIO) SCHEMATIC DIAGRAM

5
TO FMA/DEMOD
NA_REC
NA_PB
Fsc
GND
0.01
#
R21
2.2k
L2001 SHORT
#
1.2k
/6.3
# C63
4
TO SYSCON
SW12V
SW5V
TO FMA/DEMOD
FMA_CH1
FMA_COM
FMA_CH2
TO DRUM
GND
CN1
B10 SHORT
OPEN
D1
!
10µ
L10
#
Q7 2SC4081/QRS/ 2PC4081/R/
#
Q8 2SC4081/QRS/ 2PC4081/R/
#
C61 100
/6.3
#
0.1
C60
3
TO SYSCON
CTL[+]
CTL[-]
R2051
CN2001
P/R
A.E
CTL
CN2002
FE
C2051
OPEN
330p
6.8k
R2053
MY
#
C2052
R2052
OPEN
#
C2053
#
T2051
C2055 10
/25
2
TO SYSCON
N.REC[H]
N.REC_ST[H]
R2054
# C2054
#
R2057
Q2051
47k
R2058
18k
Q2053
R2060
DTC144WUA PDTC144WU
UN521E RN1309
18k
Q2055 DTC144WUA PDTC144WU UN521E RN1309
Q2003 UN511E DTA144WKA
Q2002 2SC4081/QRS/ 2SD1819A/QRS/ 2PC4081/R/
Q2001 2SC4081/QRS/ 2SD1819A/QRS/ 2PC4081/R/
R2018
4.7k
R2019
4.7k
R2056
# R2055
2SA1576A/QR/ 2SB1218A/QR/ 2PA1576/R/
R2059
47k
Q2054 2SA1576A/QR/ 2SB1218A/QR/ 2PA1576/R/
#
12k
Q2052
R24 OPEN
R27
B6
#
L9 10
µ
#
C52 12p
C57
C58
C59
0.1
R2021
C2004C2003
0.0147
C2005
4.7
/50
R2015
330
Q6 OPEN
33k
R2014
C2007 22
/16
R2017
22k
C2009 R2016
820p 33k
C62
0.01
390k
C2006
0.0068
C2008
C2010
C2011
C2012
4.7
820p
4.7
4.7
0.1
R2013
C55C56 OPEN
TP111
D.FF
R2023 10k
10k
R2022
D2001
1SS133 1SS270A
12k
/50
/50
/50
#
IC1
R2024
R2007
#
Q1 DTC144WUA PDTC144WU UN521E RN1309
0.01
R37 15k
10k
12k
12k
R2010
#
R4
6.8k
/50
C49
4.7
TP106 PB.FM
# C50
/50
C2001
4.7
R1
6.2k
/50 1
SHORT#
C4 10
L2
/25
#
C2002
C3
# R5 33k
150p
1.5k
R25
OPEN
C1
R2
R26
OPEN
C6
0.110.1
C5
0.1
/50
C47
0.47
R11
4.7k
# R3
/50
/50
C44
C46
C48
0.022
# L1
# C2
0.1
#
X2
QAX0739
C7
C43
C45
2.2
3.3
0.0047
R12 1k
C8 147p
C11
C9
1
2.2 /50
/6.3
/50
C36
C39
C41
C38
1
100
0.1
0.01
R14
1.8k
#
D4
D3
OPEN
OPEN
D5
OPEN
C13
#
C12
1
R18
OPEN
L7
12µ
C40
0.01
C35
0.01
#
C16
0.01
#
C17
0.1
C15
0.1
C10
C14
1
100
/6.3
Q15 OPEN
B7
C37 4p
# C18
R31 OPEN
C34
0.01
C33
/25
10
#
Q2 2SD601A/QRS/ 2SC2412K/QRS/
C19
0.1
B1 OPEN
OPEN
Q4 OPEN
C42
R17 OPEN
B4
R38
4.7M
B3
OPEN
C29
# R19
0.01µ
C26
/25
10
C24
0.1
#
0.1
C23
#
#
C21
0.01
C22
0.1
#
R7
4700.1
L4
OPEN
SHORT
OPEN
L5
L6
!
10µ
R20
Q3 OPEN
OPEN
C28
10µ
C31 100
/6.3
330p
C30
0.1
C32
0.01
C27
C25
/50
3.3
0.1
C20
B8 #
L3
10µ
1
TO SYSCON
2Fsc
SP_SHORT[H]
VIDEO_ENV
D.FF
A.MUTE_VHS[H]
I2C_DATA_A/V
I2C_CLK_A/V
TO SYSCON
C.SYNC/V.REF
V.PULSE
S_DET[H]
SB_GAIN
V_TO_OSD
TO TERMINAL
GND
SELD_YV/F_IN
REAR_V_IN
TU_VIDEO1
DVD_V_IN
Fsc
OPEN
#
CN2 FROM_SUB_EMPH
GND
TO_SUB_EMPH
KILLER
Fsc
GND
PB_COLOR
OPEN
#
CN3 V_TO_OSD_SSUB
GND
Y_TO_AV
GND
REC_COLOR
SYNC_OUT
VHS[H]
Y_TO_SUB
GND
V_FROM_AV
p10604001a_rev0
A
BCDEFG
2-19 2-20
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