The NJW1136 is a sound processor with subwoofer
output includes all of functions processing audio signal for
TV, such as tone control, balance, volume, mute, and AGC
functions.
Also the NJW1136 includes the LPF for subwoofer output
and bass boost function.
The original surround system reproduces natural surround
sound and clear vocal orientation.
All of internal status and variables are controlled by I
BUS interface.
Low Level Output Voltage (3mA at SDA pin) VOL 0 - 0.4 V
Maximum Output Current IOL -3.0 - - mA
Maximum Clock Frequency f
Data Change Minimum Waiting Time t
Data Transfer Start Minimum Waiting Time t
Low Level Clock Pulse Width t
High Level Clock Pulse Width T
Minimum Start Preparation Waiting Time t
Minimum Data Hold Time t
Minimum Data Preparation Time t
0 - 100 kHz
SCL
4.7 - - µs
BUF
4.0 - - µs
HD:STA
4.7 - - µs
LOW
4.0 - - µs
HIGH
4.7 - - µs
SU:STA
5.0 - - µs
HD:DAT
250 - - ns
SU:DAT
Rise Time tR - - 1.0 µs
Fall Time tF - - 300 ns
Minimum Stop Preparation Waiting Time t
2
C BUS Load Condition: Pull up resistance 4kΩ (Connected to +5V)
I
4.7 - - µs
SU:STO
Load capacitance 200pF (Connected to GND)
SDA
SCL
t
LOW
tR
t
HD:DA
t
BU
t
HD:ST
t
HIGH
tF
t
HD:ST
t
t
SU:DA
SU:ST
t
SU:ST
Sr
NJW1136
(
TERMINAL DESCRIPTION
No. SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE
V+
1
32
6
7
26
INa
INb
OUTw
OUTa
OUTb
Ach input terminal
Bch input terminal
Subwoofer output terminal
Ach output terminal
Bch output terminal
2 SRFIL Surround filter terminal
1,32 pin
FB
FB
20k
80k
Vref
100
1.8k
V+/2
6, 7, 26pin
V+/2
2pin
V+/2
3 SSFIL Simulated stereo filter terminal
4
28
TONE-Ha
TONE-Hb
Treble(tone control) filter terminal
FB
FB
5.3k
18k
3pin
V+/2
4, 28pin
V+/2
6/24)
(7/24)
NJW1136
TERMINAL DESCRIPTION
No. SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE
5
TONE-La
27
TONE-Lb
8 AGC1
9 AUX0
Bass(tone control) filter terminal
Capacitor connection terminal for
AGC attack and recovery time setting
Auxiliary 3 values voltage output terminal
12k
FB
400
12k
12k
1.4V
400
5, 27pin
V+/2
8pin
1k
9pin
FB
0V, 2.5V,
5.0V
10 AUX1
11
12
13
PORT0
PORT1
ADR
Auxiliary 2 values voltage output terminal
(Open collector type output)
Logic input terminal
Logic input terminal
Slave address setting terminal
(Don’t apply over 5V to these terminals)
12k
11, 12, 13pin
10pin
0V
3.5 to V+
5V
560
-
NJW1136
(
TERMINAL DESCRIPTION
No. SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE
14 SDA I2C data terminal
15 SCL I2C clock terminal
16
17
GND
V+
Ground terminal
Supply voltage terminal
15pin
14pin
4k
-
8k
4k
-
8k
- V+/2
18 Vref Reference voltage terminal
19 CSR
DAC output for surround control terminal
18pin
19pin
200k
V+/2
200k
0V
32k
8/24)
(9/24)
TERMINAL DESCRIPTION
NJW1136
No. SYMBOL FUNCTION EQUIVALENT CIRCUIT VOLTAGE
20
21
22
23
24
CTL
CTH
CVW
CVB
CVA
25 AGC2
DAC output for tone control terminal
DAC output terminal for trimmer control
DAC output terminal for Bch volume control
DAC output terminal for Ach volume control
Resistance connection terminal for AGC
boost level setting
20, 21pin
22, 23,
24pin
25pin
36k
V+/2
V+/2
0V
29
30
LF3
LF2
LPF filter terminal
31 LF1 LPF filter terminal
29, 30pin
V+/2+0.7V
24k 4k
FB
V+/2
NJW1136
(
■■■■ MEASUREMENT CIRCUIT
Input Ach Input Bch
Output Wc h
Outp ut A ch
47k
AUX0
AUX1
(✳1)
PO R T0
PO R T1
ADR
SDA
SCL
V
PTIN0
V
PTIN1
V
ADRIN
(✳3)
47k
(✳2)
0.47µ
100n
100n
2.2n
100n
4.7µ
4.7µ
330nF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
INa
SR-FIL
SS-FIL
TONE-Ha
TONE-La
OUTw
OUTa
AGC1
AUX0
AUX1
PORT0
PORT1
ADR
SDA
SCL
GND
INb
LF1
LF2
LF3
TONE-Hb
TONE-Lb
OUTb
AGC2
CVA
CVB
CVW
CTH
CTL
CSR
Vref
V+
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
0.47µ
0.033µ
0.047µ
0.022µ
2.2n
100n
4.7µ
100k
4.7µ
4.7µ
4.7µ
4.7µ
4.7µ
4.7µ
4.7µ
22µ
Vin Vin
Output Bch
Ic c
V+
47k
Vref
V+
(✳1)
I
V
AUX0
AUX0
Output High +2mA
Output Low -120µA
(✳2)
I
V
AUX1
AUX1
Output Low -3mA
(✳3)
I
V
OL
OL
Output Low -3mA
10/24)
(11/24)
A
A
f
■■■■ APPLICATION CIRCUIT
NJW1136
5V
100n
100n
2.2n
100n
4.7µ
4.7µ
330nF
4.7k
0.47µ
220
220
1
2
3
4
5
6
7
8
9
10
11
12
INa
SR-FIL
SS-FIL
TONE-Ha
TONE-La
OUTw
OUTa
AGC1
AUX0
AUX1
PORT0
PORT1
INb
LF1
LF2
LF3
TONE-Hb
TONE-Lb
OUTb
GC2
CV
CVB
CVW
CTH
32
31
30
29
28
27
26
25
24
23
22
21
0.47µ
0.033µ
0.047µ
0.022µ
2.2n
100n
4.7µ
100k
4.7µ
4.7µ
4.7µ
4.7µ
(✳4)
13
100
14
220
15
16
(✳4) Set the Slave Address by “ADR” terminal.
ADR pin (13pin) “ADR” bit
GND 0
+5V 1
ADR
SDA
SCL
GND
CTL
CSR
Vre
V+
20
19
18
17
4.7µ
4.7µ
4.7µ
22µ
NJW1136
(
C
G
■■■■ LPF Characteristics
R=24k
+
gm1
-
gm2
+
-
+
-
Primary LPF Secondary LPF
LF1 LF2 LF3
C1 C2 C3
LPF Block Diagram
The NJW1136 includes the LPF for subwoofer output and bass boost function. The LPF consists of primary and
secondary LPF and it is enable to adjust “cut off frequency”, “Q” and “Roll off”.
The expression of LPF characteristics is as follows.
<Primary LPF>
f
c
1
1
==
1**2
CR
π
<Secondary LPF>
6
−
109.42
f
=
c
2
∗
322
CC
∗
π
<LPF Frequency Response>
C2 = 47nF, C3 = 22nF
5
0
C1=33nF
C1=22nF
-5
C1=15nF
-10
Gain[dB]
-15
-20
0.1
1
Frequency [kHz]
π
C1=68nF
C1=47nF
1
Q =
2
−
3
1*10*24*2
C
3
C
*46.1
2
C
5
0
C2=47nF
-5
C2=68nF
C2=100nF
-10
-15
-20
5.01=Q
C1 = 33nF, C
C2=33nF
0.11
Fr
-10
Gain[dB]
-15
-20
5
0
C3=22nF
C3=15nF
-5
C1 = 33nF, C2 = 47nF
C3=47nF
C3=33nF
C3=10nF
0.11
Frequency [kHz]
12/24)
(13/24)
■■■■ DEFINITION OF I2C REGISTER
2
♦♦♦♦I
C BUS FORMAT
MSB LSB MSB LSB MSB LSB
NJW1136
S Slave Address ASelect Address AData A P
1bit 8bit 1bit 8bit 1bit 8bit 1bit 1bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
♦♦♦♦SLAVE ADDRESS
R/W : Set the Write Mode or Read Mode.
ADR : Set the Slave Address by “ADR” terminal. (See Application Circuit)
Slave Address Hex
MSB LSB -
1 0 0 0 0 0 ADR R/W
◆◆◆◆ R/W = 0 : Write Mode, ADR = 0/1 -
1 0 0 0 0 0 0 0 80(h)
1 0 0 0 0 0 1 0 82(h)
◆◆◆◆ R/W = 1 : Read Mode, ADR = 0/1 -
1 0 0 0 0 0 0 1 81(h)
1 0 0 0 0 0 1 1 83(h)
-
♦♦♦♦CONTROL REGISTER TABLE
The select address sets each function (Volume, Balance, Bass Boost Select, AGC, Surround, Tone Control, AUX).
The auto increment function cycles the select address as follows.
00H→01H→02H→03H→04H→05H→00H
<Write Mode>
Select
Address
00H
01H
02H TRIM
03H BCB BASS
04H BCT TREB
05H SUR AUX1 AUX0 AGCL AGC
<Read Mode>
D7 D6 D5
D7 D6 D5
CHS BAL BBSW
✴ : Don’t Care
1 1 1 1 1 1
•PORT1, PORT0 terminal setting
D1/D0 Remarks
0 D1/D0 output “0” at PORT1/PORT0 terminal receive High signal “1” (more than 3.5V)
1 D1/D0 output “1” at PORT1/PORT0 terminal receive Low signal “0” (less than 1.0V)
•VOL Attenuation level : 0 to –80dB(0.33dB/step) , MUTE
The attenuator is consisted of both the VOL1(0.165dB/step)and VOL2(0.165dB/step) and is enable to adjust 0.33dB/step.
The attenuation for both the VOL1and VOL2 are always synchronized to have the same attenuation levels for each other,
and are not controllable independently for each other.
ex) VOL(-30dB) = VOL1(-15dB) + VOL2(-15dB)
D7 D6 D5
BIT
D4 D3 D2 D1 D0
VOL
b) BALANCE AND BASS BOOST FUNCTION SETTING
Select
Address
01H
•CHS : Channel select for balance control
“0” : Ach “Bch is attenuated”
“1” : Bch “Ach is attenuated”
•BAL : Balance control for both Ach and Bch
Balance Level : 0 to –60dB (1dB/Step) , MUTE
•BBSW : Bass Boost ON/OFF Switch
“0” = Bass Boost OFF
“1” = Bass Boost ON
D7 D6 D5
CHS BAL BBSW
BIT
D4 D3 D2 D1 D0
c) TRIMMER LEVEL SETTING
Select
Address
02H
•TRIM : Trimmer Level
Trimmer Level : +18 to –44dB (0.5dB/Step) , MUTE
D7 D6 D5
BIT
D4 D3 D2 D1 D0
TRIM
Don’t Care
d) TONE CONTROL BASS SETTING
Select
Address
03H
•BCB : Boost cut select for Bass control
“0” : Cut
“1” : Boost
•BASS : BASS Level Setting
Cut Level : -15 to 0dB(0.5dB/Step)
Boost Level : 0 to +15dB(0.5dB/Step)
D7 D6 D5
BCB BASS
BIT
D4 D3 D2 D1 D0
Don’t Care
d) TONE CONTROL TREBLE SETTING
Select
Address
04H
•BCT : Boost cut select for Treble control
“0” : Cut
“1” : Boost
•TREB : TREBLE Level Setting
Cut Level : -15 to 0dB(0.5dB/Step)
Boost Level : 0 to +15dB(0.5dB/Step)
Purchase of I
conveys a license under the Philips I
the system conforms to the I
2
C components of New Japan Radio Co., Ltd or one of its sublicensed Associated Companies
2
C Standard Specification as defined by Philips.
2
C Patent Rights to use these components in an I2C system, provided that
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
24/24)
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