ISSI IS62V6416BLL-12TI, IS62V6416BLL-12T, IS62V6416BLL-12KI, IS62V6416BLL-12K, IS62V6416BLL-12BI Datasheet

Integrated Silicon Solution, Inc. — 1-800-379-4774

1

Rev. A

03/17/00

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.

IS62V6416BLL ISSI

®

FEATURES

• Access time: 100 and 120 ns

• CMOS low power operation

• TTL compatible interface levels

• Single 2.7V-3.3V power supply

• Fully static operation: no clock or refresh
required

• Three state outputs

• Data control for upper and lower bytes

• Industrial temperature available

• Available in Jedec Std 44-pin SOJ package,
44-pin TSOP (Type II), and 48-pin mini BGA

64K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM

DESCRIPTION

The ISSI IS62V6416BLL is an ultra-low power, 1,048,576-bit
static RAM organized as 65,536 words by 16 bits. It is
fabricated using ISSI's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques yields access times as fast as 100 ns with
low power consumption.

When CS is HIGH (deselected) or when CS is LOW and both
LB and UB are HIGH, the device assumes a standby mode at
which the power dissipation can be reduced down with CMOS
input levels.

Easy memory expansion is provided by using Chip Select and
Output Enable inputs, CS and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

FUNCTIONAL BLOCK DIAGRAM

MARCH 2000

A0-A15

CS

OE
WE

64K x 16

MEMORY ARRAY

DECODER

COLUMN I/O

CONTROL

CIRCUIT

GND

VCC

I/O

DATA

CIRCUIT

I/O0-I/O7

Lower Byte

I/O8-I/O15

Upper Byte

UB

LB

2

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

03/17/00

IS62V6416BLL ISSI

®

PIN DESCRIPTIONS

A0-A15 Address Inputs

I/O0-I/O15 Data Inputs/Outputs

CS Chip Enable Input
OE Output Enable Input
WE Write Enable Input
LB Lower-byte Control (I/O0-I/O7)
UB Upper-byte Control (I/O8-I/O15)

NC No Connection

Vcc Power

GND Ground

48-Pin mini BGA (Top View)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23

A4
A3
A2
A1
A0

CS
I/O0
I/O1
I/O2
I/O3

Vcc

GND

I/O4
I/O5
I/O6
I/O7

WE
A15
A14
A13
A12

NC

A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC

PIN CONFIGURATIONS

44-Pin SOJ 44-Pin TSOP

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

A4

A3

A2

A1

A0

CS

I/O0

I/O1

I/O2

I/O3

Vcc

GND

I/O4

I/O5

I/O6

I/O7

WE

A15

A14

A13

A12

NC

A5

A6

A7

OE

UB

LB

I/O15

I/O14

I/O13

I/O12

GND

Vcc

I/O11

I/O10

I/O9

I/O8

NC

A8

A9

A10

A11

NC

1 2 3 4 5 6

A

B

C

D

E

F

G

H

LB

OE

A0

A1

A2

N/C

UB A3

A4

CS

I/O

0

A5

A6

GND

NC

A7

Vcc

Vcc

NC

NC

GND

I/O

14

I/O

15

I/O

13

I/O

12

I/O

11

I/O

10

I/O

1

I/O

3

I/O

2

I/O

5

I/O

4

I/O

6

I/O

7

I/O

9

I/O

8

A14

A15

NC

A12

A13

WE

NC

A8

A9

A10

A11 NC

1
2
3
4
5
6
7
8
9
10
11
12

Integrated Silicon Solution, Inc. — 1-800-379-4774

3

Rev. A

03/17/00

IS62V6416BLL ISSI

®

TRUTH TABLE

I/O Pin

Mode WE CS OE LB UB I/O0-I/O7 I/O8-I/O15 Vcc Current

Not Selected X H X X X High-Z High-Z ISB1, ISB2

X L X H H High-Z High-Z ISB1, ISB2

Output Disabled H L H L L High-Z High-Z ICC

Read H L L L H DOUT High-Z ICC

H L L H L High-Z DOUT
HLLLL DOUT DOUT

Write L L X L H DIN High-Z ICC

L L X H L High-Z DIN
LLXLL DIN DIN

AC TEST LOADS

Figure 1.

AC TEST CONDITIONS

Parameter Unit

Input Pulse Level 0 to 3V

(1)

Input Rise and Fall Times 5 ns
Input and Output Timing and Reference Level 1.5V

(1)

Output Load See Figures 1 and 2

1076 Ω

30 pF

Including

jig and

scope

1262 Ω

OUTPUT

3V

1076 Ω

5 pF

Including

jig and

scope

1262 Ω

OUTPUT

3V

Figure 2.

Figure 3.

581 Ω

THEVENIN EQUIVALENT

OUTPUT 1.61V

4

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. A

03/17/00

IS62V6416BLL ISSI

®

OPERATING RANGE

Range Ambient Temperature VCC

Commercial 0°C to +70°C 2.7V (Min.) to 3.3V (Max.)

Industrial –40°C to +85°C 2.7V (Min.) to 3.3V (Max.)

DC ELECTRICAL CHARACTERISTICS (Over Operating Range Unless Otherwise Specified)

Symbol Parameter Test Conditions Min. Max. Unit

VOH Output HIGH Voltage VCC = Min., IOH = –1 mA 2.2 — V

VOL Output LOW Voltage VCC = Min., IOL = 2.1 mA — 0.4 V

VIH Input HIGH Voltage 2.0 VCC + 0.3 V

VIL

(1)

Input LOW Voltage –0.2 0.4 V

ILI Input Leakage GND ≤ VIN ≤ VCC –11µA

ILO Output Leakage GND ≤ VOUT ≤ VCC, Outputs Disabled –11µA

Note:

1. V

IL (min.) = –1.5V for pulse width less than 30 ns.

ABSOLUTE MAXIMUM RATINGS

(1)

Symbol Parameter Value Unit

VTERM Terminal Voltage with Respect to GND –0.5 to Vcc +0.5 V

TSTG Storage Temperature –65 to +150 °C

PT Power Dissipation 1.5 W

IOUT DC Output Current (LOW) 20 mA

Note:

1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.