IS62U6416LL
IS62U6416LL
ISSI
ISSI
®
®
64K x 16 LOW VOLTAGE,
ULTRA-LOW POWER CMOS STATIC RAM
FEATURES
• Access time: 200 ns
• CMOS low power operation
– 40 mW (typical) operating
– 90 µW (typical) standby
• TTL compatible interface levels
• Single 1.8V-2.7V power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in Jedec Std 44-pin SOJ package,
44-pin TSOP (Type II), and 48-pin mini BGA
DESCRIPTION
The ISSI IS62U6416LL is an ultra-low power, 1,048,576-bit
static RAM organized as 65,536 words by 16 bits. It is
fabricated using ISSI's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques yields access times as fast as 200 ns with
low power consumption.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
ADVANCE INFORMATION
DECEMBER 1998
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2
3
4
5
FUNCTIONAL BLOCK DIAGRAM
A0-A15
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
CE
OE
WE
UB
LB
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
64K x 16
MEMORY ARRAY
COLUMN I/O
6
7
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The specification contains ADVANCE INFORMATION. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible
product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1998, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
1
IS62U6416LL
PIN CONFIGURATIONS
ISSI
®
44-Pin SOJ
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
44-Pin TSOP
44
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A5
43
A6
42
A7
41
OE
40
UB
39
LB
38
I/O15
37
I/O14
36
I/O13
35
I/O12
34
GND
33
Vcc
32
I/O11
31
I/O10
30
I/O9
29
I/O8
28
NC
27
A8
26
A9
25
A10
24
A11
23
NC
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
48-Pin mini BGA (Top View)
1 2 3 4 5 6
A1
OE
UB A3
I/O
10
I/O
11
I/O
12
I/O
A14
13
A12
NC
A8
A0
A5
NC
NC
A4
A6
A7
NC
A15
A13
A10
A9
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
Vcc
I/O
14
I/O
15
NC
A2
N/C
I/O
CE
I/O
I/O
1
I/O
Vcc
3
I/O
GND
4
I/O
I/O
5
I/O
WE
A11 NC
PIN DESCRIPTIONS
A0-A15 Address Inputs
I/O0-I/O15 Data Inputs/Outputs
CE
OE
WE
0
2
LB
UB
NC No Connection
Vcc Power
6
7
GND Ground
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
IS62U6416LL
TRUTH TABLE
ISSI
®
I/O Pin
Mode
Not Selected X H X X X High-Z High-Z ISB1, ISB2
Output Disabled H L H X X High-Z High-Z ICC
Read H L L L H DOUT High-Z ICC
Write L L X L H DIN High-Z ICC
WEWE
WE
WEWE
X L X H H High-Z High-Z
H L L H L High-Z DOUT
HLLLL DOUT DOUT
L L X H L High-Z DIN
LLXLL DIN DIN
CECE
CE
CECE
OEOE
OE
OEOE
LBLB
LB
LBLB
UBUB
UB
UBUB
I/O0-I/O7 I/O8-I/O15 Vcc Current
AC TEST CONDITIONS
Parameter Unit
Input Pulse Level 0.4 to 1.8V
Input Rise and Fall Times 5 ns
Input and Output Timing and Reference Level 0.9V
Output Load See Figures 1 and 2
(1)
(1)
1
2
3
4
5
6
AC TEST LOADS
3070 Ω
1.8V
OUTPUT
100 pF
Including
jig and
scope
Figure 1.
3150 Ω
1.8V
OUTPUT
30 pF
Including
jig and
scope
Figure 2.
3070 Ω
3150 Ω
THEVENIN EQUIVALENT
1554 Ω
OUTPUT 0.91V
Figure 3.
7
8
9
10
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Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION SR034-0C
12/09/98
3