ISSI IS62LV5128LL-85BI, IS62LV5128LL-70B, IS62LV5128LL-85B, IS62LV5128LL-70BI Datasheet
®
IS62LV5128LL
512K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
FEATURES
• Access times of 70, 85 ns
• CMOS low power operation:
— 135 mW (typical) operating
— 16.5 µW (typical) standby
• Low data retention voltage: 2V (min.)
• Output Enable (OE) and Chip Enable
(CE) inputs for ease in applications
• TTL compatible inputs and outputs
• Fully static operation:
— No clock or refresh required
Single 2.7V (min) to 3.15V (max) VCC power supply
•
• Available in 36-pin mini BGA
DESCRIPTION
The
ISSI
8 bits, CMOS SRAM. It is fabricated using
six transistor (6T),
satisfy the demands of the state-of-the-art technologies
such as cell phones and pagers.
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation
down with CMOS input levels. Additionally, easy memory
expansion is provided by using Chip Enable and Output
Enable inputs, CE and OE. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IS62LV5128LL is available in a 36-pin mini BGA
package (8mm x 10mm).
ISSI
MAY 2001
IS62LV5128LL is a low voltage, 524,288 words by
ISSI
’
s low
voltage,
CMOS technology.
The device
can be reduced
is
targeted
to
FUNCTIONAL BLOCK DIAGRAM
A0-A18
VCC
GND
I/O0-I/O7
CE
OE
WE
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
512K x 8
MEMORY ARRAY
COLUMN I/O
ISSI
reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
1
IS62LV5128LL
PIN CONFIGURATION
ISSI
®
36-pin mini BGA (B)
1 2 3 4 5 6
A
B
C
D
E
F
G
H
A0
I/O4
I/O5
GND
Vcc
I/O6
I/O7
A9
A1
A2
OE
A10
NC
WE
NC
A18
CE
A11
A3
A4
A5
A17
A16
A12
A6
A7
A15
A13
A8
I/O0
I/O1
Vcc
GND
I/O2
I/O3
A14
PIN DESCRIPTIONS
A0-A18 Address Inputs
CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input
I/O0-I/O7 Input/Output
NC No Connection
Vcc Power
GND Ground
TRUTH TABLE
Mode WE CE OE I/O Operation Vcc Current
Not Selected X H X High-Z ISB1, ISB2
Output Disabled H L H High-Z ICC
Read H L L DOUT ICC
Write L L X DIN ICC
OPERATING RANGE
Range Ambient Temperature VCC Min. VCC Max.
Commercial 0°C to +70°C 2.7V 3.15V
Industrial –40°C to +85°C 2.7V 3.15V
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
IS62LV5128LL
ISSI
®
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VTERM Terminal Voltage with Respect to GND –0.5 to Vcc + 0.3 V
VCC Vcc related to GND –0.3 to +3.3 V
TBIAS Temperature Under Bias –40 to +85 °C
TSTG Storage Temperature –65 to +150 °C
PT Power Dissipation 1 W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
CAPACITANCE
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 6 pF
COUT Output Capacitance VOUT = 0V 8 pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
(1,2)
A = 25°C, f = 1 MHz, Vcc = 3.0V.
(1)
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VCC = 3.0V, IOH = –1.0 mA 2.2 — V
VOL Output LOW Voltage VCC = 3.0V, IOL = 2.1 mA — 0.4 V
VIH Input HIGH Voltage 2.2 VCC + 0.3 V
VIL Input LOW Voltage
ILI Input Leakage GND ≤ VIN ≤ VCC –11µA
ILO Output Leakage GND ≤ VOUT ≤ VCC, OUTPUTS Disabled –11µA
Note:
IL = –2.0V for pulse width less than 10 ns.
1. V
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
05/04/01
(1)
–0.2 0.4 V
3
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