PD -93991A
AUTOMOTIVE MOSFET
IRF1405
Typical Applications
● Electric Power Steering (EPS)
● Anti-lock Braking System (ABS)
● Wiper Control
● Climate Control
● Power Door
Benefits
● Advanced Process Technology
● Ultra Low On-Resistance
● Dynamic dv/dt Rating
● 175°C Operating Temperature
● Fast Switching
● Repetitive Avalanche Allowed up to Tjmax
G
HEXFET® Power MOSFET
D
V
= 55V
DSS
R
DS(on)
= 5.3mΩ
ID = 169A
S
Description
Specifically designed for Automotive applications, this
Stripe Planar design of HEXFET
utilizes the lastest processing techniques to achieve
extremely low on-resistance per silicon area. Additional
features of this HEXFET power MOSFET are a 175°C
junction operating temperature, fast switching speed
and improved repetitive avalanche rating. These benefits
combine to make this design an extremely efficient and
reliable device for use in Automotive applications and a
wide variety of other applications.
®
Power MOSFETs
TO-220AB
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 169
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 118 A
I
DM
PD @TC = 25°C Power Dissipation 330 W
V
GS
E
AS
I
AR
E
AR
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
T
J
T
STG
Pulsed Drain Current 680
Linear Derating Factor 2.2 W/°C
Gate-to-Source Voltage ± 20 V
Single Pulse Avalanche Energy 560 mJ
Avalanche Current See Fig.12a, 12b, 15, 16 A
Repetitive Avalanche Energy mJ
Operating Junction and -55 to + 175
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)
°C
Thermal Resistance
Parameter Typ. Max. Units
R
θJC
R
θCS
R
θJA
Junction-to-Case ––– 0.45 °C/W
Case-to-Sink, Flat, Greased Surface 0.50 –––
Junction-to-Ambient ––– 62
www.irf.com 1
3/25/01
IRF1405
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
∆V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
C
oss
C
oss
C
eff. Effective Output Capacitance ––– 1500 ––– VGS = 0V, VDS = 0V to 44V
oss
Drain-to-Source Breakdown Voltage 55 –– – –– – V VGS = 0V, ID = 250µA
/∆T
Breakdown Voltage Temp. Coefficient ––– 0.057 ––– V/°C Reference to 25°C, ID = 1mA
J
Static Drain-to-Source On-Resistance ––– 4.6 5.3 mΩ VGS = 10V, ID = 101A
Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA
Forward Transconductance 69 ––– ––– S VDS = 25V, ID = 110A
Drain-to-Source Leakage Current
––– ––– 20
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200
VDS = 55V, VGS = 0V
µA
nA
VGS = -20V
Total Gate Charge –– – 170 2 6 0 ID = 101A
Gate-to-Source Charge ––– 44 66 nC VDS = 44V
Gate-to-Drain ("Miller") Charge ––– 62 93 VGS = 10V
Turn-On Delay Time ––– 13 ––– VDD = 38V
Rise Time ––– 190 ––– ID = 110A
Turn-Off Delay Time ––– 130 ––– RG = 1.1Ω
ns
Fall Time ––– 110 ––– VGS = 10V
4.5
Internal Drain Inductance
Internal Source Inductance ––– –––
––– –––
7.5
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
Input Capacitance ––– 5480 ––– VGS = 0V
Output Capacitance ––– 1210 ––– pF VDS = 25V
Reverse Transfer Capacitance ––– 280 ––– ƒ = 1.0MHz, See Fig. 5
Output Capacitance ––– 5210 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance ––– 900 ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz
D
G
S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current MOSFET symbol
(Body Diode)
Pulsed Source Current integral reverse
(Body Diode)
––– –––
––– –––
169
680
showing the
A
p-n junction diode.
G
Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 101A, VGS = 0V
Reverse Recovery Time ––– 88 130 ns TJ = 25°C, IF = 101A
Reverse RecoveryCharge – –– 250 380 nC di/dt = 100A/µs
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Starting T
RG = 25Ω, I
I
SD
= 25°C, L = 0.11mH
J
= 101A. (See Figure 12).
AS
≤ 101A, di/dt ≤ 210A/µs, V
DD
≤ V
(BR)DSS
TJ ≤ 175°C
Pulse width ≤ 400µs; duty cycle ≤ 2%.
C
eff. is a fixed capacitance that gives the same charging time
oss
as C
oss
while V
is rising from 0 to 80% V
DS
DSS
.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
,
Limited by T
, see Fig.12a, 12b, 15, 16 for typical repetitive
Jmax
avalanche performance.
2 www.irf.com
D
S
IRF1405
1000
100
10
D
I , Drain-to-Source Current (A)
1
0.1 1 10 100
1000
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 25 C
J
V , Drain-to-Source Voltage (V)
DS
°
T = 25 C
J
°
T = 175 C
J
1000
100
D
I , Drain-to-Source Current (A)
10
0.1 1 10 100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
4.5V
4.5V
20µs PULSE WIDTH
T = 175 C
V , Drain-to-Source Voltage (V)
DS
°
J
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
3.0
°
2.5
169A
I =
D
100
10
D
I , Drain-to-Source Current (A)
V = 25V
DS
1
4 6 8 10 12
V , Gate-to-Source Voltage (V)
GS
20µs PULSE WIDTH
Fig 3. Typical Transfer Characteristics
2.0
1.5
(Normalized)
1.0
0.5
DS(on)
R , Drain-to-Source On Resistance
0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
V =
10V
GS
°
Vs. Temperature
www.irf.com 3
IRF1405
100000
10000
1000
C, Capacitance(pF)
100
1 10 100
V
= 0V, f = 1 MHZ
GS
C
= C
= C
= C
gs
gd
ds
Ciss
Coss
Crss
+ Cgd, C
+ C
gd
iss
C
rss
C
oss
VDS, Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
°
T = 175 C
J
100
SHORTED
ds
20
I =
101A
D
16
12
8
4
GS
V , Gate-to-Source Voltage (V)
0
0 60 120 180 240 300
Q , Total Gate Charge (nC)
G
V = 44V
DS
V = 27V
DS
FOR TEST CIRCUIT
SEE FIGURE
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10000
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
13
10us
100us
1ms
10ms
°
T = 25 C
J
10
SD
I , Reverse Drain Current (A)
V = 0 V
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0
V ,Source-to-Drain Voltage (V)
SD
GS
Fig 7. Typical Source-Drain Diode
100
D
I , Drain Current (A)I , Drain Current (A)
10
°
= 25 C
C
T T= 175 C
Single Pulse
1
1 10 100
°
J
V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Forward Voltage
4 www.irf.com
IRF1405
200
LIMITED BY PACKAGE
160
120
80
D
I , Drain Current (A)
40
0
25 50 75 100 125 150 175
T , Case Temperature ( C)
C
°
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
R
V
DS
V
GS
R
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
D
D.U.T.
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)tr
t
d(off)tf
Fig 10b. Switching Time Waveforms
+
V
DD
-
D = 0.50
thJC
0.20
0.1
0.10
0.05
0.02
0.01
0.01
Thermal Response (Z )
0.001
0.00001 0.0001 0.001 0.01 0.1
SINGLE PULSE
(THERMAL RESPONSE)
t , Rectangular Pulse Duration (sec)
1
P
DM
t
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
1
t
2
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com 5
IRF1405
A
15V
DRIVER
+
-
V
R
20V
V
DS
G
t
L
D.U.T
I
AS
0.01
p
Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
I
AS
Fig 12b. Unclamped Inductive Waveforms
Q
G
10 V
Q
GS
Q
GD
DD
1200
TOP
1000
800
600
400
200
AS
E , Single Pulse Avalanche Energy (mJ)
0
25 50 75 100 125 150 175
Starting T , Junction Temperature ( C)
J
BOTTOM
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
4.0
I
D
41A
71A
101A
°
V
G
Charge
3.5
3.0
ID = 250µA
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
V
GS
.3µF
D.U.T.
3mA
I
G
Current Sampling Resistors
+
V
-
I
D
Fig 13b. Gate Charge Test Circuit
DS
, Variace ( V )
2.5
GS(th)
V
2.0
1.5
-75 -50 -25 0 25 50 75 100 125 150 175
TJ , Temperature ( °C )
Fig 14. Threshold Voltage Vs. Temperature
6 www.irf.com
IRF1405
1000
Duty Cycle = Single Pulse
Allowed avalanche Current vs
100
0.01
0.05
0.10
10
Avalanche Current (A)
1
1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses
600
500
400
300
200
Avalanche Energy (mJ)
AR ,
E
100
TOP Single Pulse
BOTTOM 10% Duty Cycle
ID = 101A
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
every part type.
2. Safe operation in Avalanche is allowed as long asT
not exceeded.
. This is validated for
jmax
jmax
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. P
avalanche pulse.
= Average power dissipation per single
D (ave)
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
= Allowable avalanche current.
av
7. ∆T = Allowable rise in junction temperature, not to exceed
T
(assumed as 25°C in Figure 15, 16).
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
jmax
t
Average time in avalanche.
av =
D = Duty cycle in avalanche = t
Z
(D, tav) = Transient thermal resistance, see figure 11)
thJC
P
= 1/2 ( 1.3·BV·Iav) =
D (ave)
∆∆
I
2
∆T/ [1.3·BV·Zth]
∆∆
av =
E
AS (AR)
= P
·f
av
D (ave)·tav
∆∆
∆T/ Z
∆∆
thJC
www.irf.com 7
is
IRF1405
Peak Diode Recovery dv/dt Test Circuit
D.U.T*
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
+
-
-
+
R
G
V
GS
• dv/dt controlled by R
• ISD controlled by Duty Factor "D"
G
• D.U.T. - Device Under Test
+
V
DD
-
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D =
P.W.
Period
VGS=10V
[ ] ***
D.U.T. ISDWaveform
Reverse
Recovery
Current
Re-Applied
Voltage
D.U.T. VDSWaveform
Inductor Curent
*** V
= 5.0V for Logic Level and 3V Drive Devices
GS
Fig 17. For N-channel HEXFET
Body Diode Forward
Current
di/dt
Diode Recovery
dv/dt
Body Diode Forward Drop
Ripple ≤ 5%
®
power MOSFETs
V
DD
[ ]
I
[ ]
SD
8 www.irf.com
Package Outline
A
TO-220AB
Dimensions are shown in millimeters (inches)
10.54 (.415)
2.87 (.113)
2.62 (.103)
15.24 (.600)
14.84 (.584)
14.09 (.555)
13.47 (.530)
10.29 (.405)
1 2 3
6.47 (.255)
6.10 (.240)
4
1.15 (.045)
MIN
4.06 (.160)
3.55 (.140)
3.78 (.149)
3.54 (.139)
- A -
4.69 (.185)
4.20 (.165)
- B -
1.32 (.052)
1.22 (.048)
IRF1405
LEAD ASSIGNMENTS
1 - GAT E
2 - DRA IN
3 - SOU R C E
4 - DRA IN
1.40 (.055)
3X
1.15 (.045)
2.54 (.100)
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTR O L LIN G DIM E N S ION : INC H 4 H E ATSINK & LE AD MEAS U R E M E N T S DO N OT INCLUDE BURRS.
2X
Part Marking Information
TO-220AB
EXAMPLE : THIS IS AN IRF1010
W IT H A SSEMB L Y
LOT CO D E 9B1 M
This product has been designed and qualified for the Automotive [Q101] market.
0.93 (.037)
3X
0.69 (.027)
0.36 (.0 14) M B A M
INTERN A TION A L
RE CTIFIER
L OGO
ASSEMBLY
LOT CODE
Data and specifications subject to change without notice.
0.55 (.022)
3X
0.46 (.018)
2.92 (.115)
2.64 (.104)
PART NUMB ER
I RF1010
9246
9B 1 M
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 3/01
www.irf.com 9
Loading...