intersil ISL95310 DATA SHEET

®

www.BDTIC.com/Intersil

ISL95310

Digitally Controlled Potentiometer (XDCP™)

Datasheet May 6, 2005 FN8083.0

Terminal Voltage 0V to 13.2V, 128 Taps
Up/Down Interface

The Intersil ISL95310 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by an Up/Down interface.

The potentiometer is implemented by a resistor array
composed of 127 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The wiper of each
potentiometer has an associated volatile Wiper Counter
Register (WR) and a non-volatile Initial Value Register (IVR)
that can be directly written to and read by the user. The
contents of the WR controls the position of the wiper on the
resistor array through the switches. At power-up, the device
recalls the contents of the default data registers to the
corresponding WR. The position of the wiper element is
controlled by the CS

, U/D, and INC inputs. The position of
the wiper can be stored in nonvolatile memory and then be
recalled upon a subsequent power-up operation.

The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:

• LCD contrast control

• Parameter and bias adjustments

• Mechanical potentiometer replacement

• Industrial and automotive control

Ordering Information

RESISTANCE

OPTION

PART NUMBER

ISL95310WIU10Z
(See Note)

ISL95310UIU10Z
(See Note)

Add “-TK” suffix for tape and reel.

(Ω)

10K -40 to +85 10 Ld MSOP

50K -40 to +85 10 Ld MSOP

TEMP

RANGE

(°C) PACKAGE

(Pb-Free)

(Pb-Free)

Features

• Non-volatile solid-state potentiometer

• Up/down interface with chip select enable

• DCP terminal voltage, 0 to +13.2V

• 128 wiper tap points - 0.8% resolution

- Wiper position stored in nonvolatile memory and
recalled on power-up

• 127 resistive elements

- Temperature compensated

- Low wiper resistance 70Ω typical @ 3.3V

• Low power CMOS

- Standby current, 2µA at V

= +3.6V

CC

• High reliability

- Endurance, 200,000 data changes per bit

- Register data retention 50 years @ T ≤ 75°C

•R

values = 10kΩ, 50kΩ

TOTAL

• 10-lead MSOP package

- Pb-free plus anneal available (RoHS compliant)

Pinout

ISL95310

(10 LD MSOP)

TOP VIEW

U/D

GND

V

CC

CS
NC

1
2
3
4
5

INC

10

9

V+

8

R

L

7

R

W

R

6

H

NOTE: Intersil Pb-free plus anneal products employ special Pb­free material sets; molding compounds/die attach materials and
100% matte tin plate termination finish, which are RoHS compliant
and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Block Diagram

www.BDTIC.com/Intersil

ISL95310

Up/Down

(U/D

Increment

(INC

Device Select

(CS

VCC

)

CONTROL

)

)

AND

MEMORY

GND

SIMPLE BLOCK DIAGRAM

V+

U/D
INC

CS

R

H

R

W

R

L

7-BIT
UP/DOWN
COUNTER

7-BIT

NONVOLATILE

MEMORY

STORE AND

RECALL

CONTROL

CIRCUITRY

ONE

OF

128

DECODER

DETAILED BLOCK DIAGRAM

Pin Descriptions

PIN NUMBER SYMBOL DESCRIPTION

1U/DControls the direction of wiper movement and whether the counter is incremented or decremented
2 GND Ground
3V

CC

4CSChip select; the device is selected when the CS input is LOW; also used to initiate a nonvolatile store
5 NC No connect; pin is to be left unconnected
6R
7R
8R

H

W

L

9 V+ Positive bias voltage for the potentiometer wiper control

10 INC

Positive logic supply voltage

A fixed terminal for one end of the potentiometer resistor
The wiper terminal which is equivalent to the movable terminal of a potentiometer
A fixed terminal for one end of the potentiometer resistor

Increment input; negative edge triggered

127

126

125

124

R

H

TRANSFER

GATES

2

1

0

RESISTOR

ARRAY

R

L

R

W

2

FN8083.0

May 6, 2005

ISL95310

www.BDTIC.com/Intersil

Absolute Maximum Ratings Recommended Operating Conditions

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Voltage on CS

with respect to GND. . . . . . . . . . . . . . . . . . . . -0.3V to V

Voltage on V+ (referenced to GND). . . . . . . . . . . . . . . . . . . . +13.2V

ΔV = |V

, RL, RW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V+

R

H

Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . .+300°C

(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA

I

W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +6V

V

CC

Power rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . .20mW

CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

Analog Specifications Over recommended operating conditions unless otherwise stated.

SYMBOL PARAMETER TEST CONDITIONS MIN

R

TOTAL

V

R

C

H/CL/CW

I

LkgDCP

VOLTAGE DIVIDER MODE (0V @ R

INL

(Note 6)

(RH)-V(RL)

RH

W

, INC, U/D

+0.3V

CC

|. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V+

RH to RL resistance W option 10 k Ω

U option 50 kΩ

R

to RL resistance tolerance -20 +20 %

H

RH terminal voltage VRL = 0V 0 V+ V
Wiper resistance V+ = 12V, wiper current = V+ / R
Potentiometer Capacitance (Note 13) 10/10/

Leakage on DCP pins Voltage at pin from GND to V+ 0.1 1 µA

; V+ @ RH; measured at RW, unloaded)

L

Integral non-linearity -1 1 LSB

Temperature Range (Industrial). . . . . . . . . . . . . . . . .-40°C to +85°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V

V

CC

V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 13.2V

Wiper current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . .±3.0mA

TYP

(Note 1) MAX UNIT

TOTAL

70 200 Ω

pF

25

(Note 2)

DNL

(Note 5)

ZSerror
(Note 3)

FSerror
(Note 4)

(Note 7) Ratiometric Temperature Coefficient DCP register set to 40 hex ±4 ppm/°C

TC

V

RESISTOR MODE (Measurements between R

RINL

(Note 11)

RDNL

(Note 10)

Roffset

(Note 9)

TC

(Note 12)

Differential non-linearity W option -0.75 0.75 LSB

U option -0.5 0.5

Zero-scale error U option 0 1 7 LSB

W option 0 0.5 2

Full-scale error U option -7 -1 0 LSB

W option -2 -1 0

and RL with RH not connected, or between RW and RH with RL not connected)

W

Integral non-linearity DCP register set between 20 hex and 7F hex;

monotonic over all tap positions

Differential non-linearity W option -0.75 0.75 MI

U option -0.5 0.5

Offset DCP Register set to 00 hex, W option 0 1 7 MI

DCP Register set to 00 hex, U option 0 0.5 2 MI

Resistance Temperature Coefficient DCP register set between 20 hex and 7F hex ±45 ppm/°C

R

-1 1 MI

(Note 2)

(Note 2)

(Note 2)

(Note 8)

(Note 8)

(Note 8)

(Note 8)

3

FN8083.0

May 6, 2005