intersil ISL6252, ISL6252A DATA SHEET

®

ISL6252, ISL6252A

Data Sheet July 19, 2007

Highly Integrated Battery Charger Controller for Notebook Computers

The ISL6252, ISL6252A is a highly integrated battery charger controller for Li-Ion/Li-Ion polymer batteries. High Effici ency is achieved by a synchronous buck topology. The low side MOSFET emulates a diode at light loads to improve the light load efficiency and prevent system bus boosting.

The constant output voltage can be selected for 2, 3 and 4 series Li-Ion cells with 0.5% accuracy over-temperature. It can also be programmed between 4.2V + 5%/cell and

4.2V - 5%/cell to optimize battery capacity. When supplying the load and battery charger simultaneously, the input current limit for the AC adapter is programmable to within 3% accuracy to avoid overloading the AC adapter , and to all ow the system to make efficient use of available adapter power for charging. It also has a wide range of programmable charging current. The ISL6252, ISL6252A provides outputs that are used to monitor the current drawn from the AC adapter, and monito r for the presence of an AC adapter. The ISL6252, ISL6252A automatically transitions from regulatin g current mode to regulating voltage mode.

Ordering Information

PART

NUMBER

(Notes 1, 2)

ISL6252HRZ* ISL 6252HRZ -10 to +100 28 Ld 5x5 QFN L28.5×5 ISL6252HAZ* ISL 6252HAZ -10 to +100 24 Ld QSOP M24.15 ISL6252AHRZ* ISL6252 AHRZ -10 to +100 28 Ld 5x5 QFN L28.5×5 ISL6252AHAZ* ISL6252 AHAZ -10 to +100 24 Ld QSOP M24.15

NOTES:

1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-0 20.

2. Add “-T” for Tape and Reel. Please refer to TB347 for details on reel specifications.

PART

MARKING

TEMP

RANGE

(°C)

PACKAGE

(Pb-free)

PKG.

DWG. #

FN6498.1

Features

• ±0.5% Charge Voltage Accuracy (-10°C to +100°C)

• ±3% Accurate Input Current Limit

• ±3% Accurate Battery Charge Current Limit

• ±25% Accurate Battery Trickle Charge Current Limit

• Programmable Charge Current Limit, Adapter Current Limit and Charge Voltage

• Fixed 300kHz PWM Synchronous Buck Controller with Diode Emulation at Light Load

• Overvoltage Protection

• Output for Current Drawn from AC Adapter

• AC Adapter Present Indicator

• Fast Input Current Limit Response

• Input Voltage Range 7V to 25V

• Support 2-, 3- and 4-Cells Battery Pack

• Up to 17.64V Battery-Voltage Set Point

• Thermal Shutdown

• Less than 10µA Battery Leakage Current

• Supports Pulse Charging

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Notebook, Desknote and Sub-notebook Computers

• Personal Digital Assistant

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Pinouts

ISL6252, ISL6252A

(28 LD QFN)

TOP VIEW

ISL6252, ISL6252A

(24 LD QSOP)

TOP VIEW

EN

CELLS

ICOMP

VCOMP

ICM

VREF

CHLIM

ACSET

NA

28 27 26 25 24 23 22

1

2

3

4

5

6

7

8 9 10 11 12 13 14

VADJ

ACLIM

VDD

GND

DCIN

PGND

NA

LGATE

ACPRN

VDDP

CSON

21

20

19

18

17

16

15

BOOT

CSOP

CSIN

CSIP

NA

PHASE

UGATE

VDD

EN CELLS ICOMP

VCOMP

ICM

VREF CHLIM ACLIM

VADJ LGATE

GND PGND

124 223 322 421 520

619 718 817 916 10 15 11 14 12 13

DCIN ACPRN ACSET CSON CSOP CSIN CSIP PHASE UGATE BOOT VDDP

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ISL6252, ISL6252A

ICM CSIP CSIN

ACSET

ACPRN

ACLIM

ICOMP

VCOMP

VADJ

CELLS

VREF

152kΩ

VREF

514kΩ

VOLTAGE

SELECTOR

REFERENCE

VDD

+

-

ADAPTER CURRENT LIMIT SET

gm1

+

2.1V

1.26V

-

gm3

+

CURRENT

MIN VOLTAGE BUFFER

-

BUFFER

288kΩ

32kΩ

16kΩ

48kΩ

MIN

Σ

-0.25

CA2

X19.9

-

+

gm2

X19.9

CA1

+

-

300kHz RAMP

+

-

PWM

+

LDO

REGULATOR

-

+

DCIN

VDD

BOOT

UGATE

PHASE

VDDP

LGATE

PGND

1.065V

EN

GND

FB

CSON

CSOP

CHLIM

FIGURE 1. FUNCTIONAL BLOCK DIAGRAM

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TO HOST CONTROLLER

VREF

4.7k

CHARGE

ENABLE

R12

2.6A CHARGE LIMIT

20k 1%

253mA TRICKLE CHARGE

1.87k

TRICKLE

CHARGE

AC ADAPTER

R8

130k

1%

R9

10.2k

10.2k 1%

1%

C7

1µF

1

3.3V

R5

100k

C6

6.8nF

C5

R6

FLOATING

4.2V/CELL

R13

R11

130k

1%

Q6

10nF

1%

R10

4.7

4.7Ω

C9

1µF

1

ISL6252, ISL6252A

0.1µF

CSON

DCIN

CSIP

ACSET

IS6252

VDDP

VDD

ACPRN

ICOMP

VCOMP

VADJ

EN

ACLIM

VREF

CHLIM

ISL6252

ISL6252 ISL6252A

ISL

ISL6252

CSIP

CSIN

BOOT

UGATE

PHASE

LGATE

PGND

CSOP

CSON

CELLS

ICM

GND

R7: 100Ω

R21

C2

0.1

0.1µF

R22

D2

C4

0.1µF

0.1

VDD

VDD 4 CELLS

4 CELLS

2.2Ω

22Ω

VDDP

Q2

R2

R2 20m

20m

20mΩ

Q1

R11

C3C3

0.047µF

R12

C11

C11 3300pF

3300pF

C1:10

D1

OPTIONAL

µ

22Ω

SYSTEM LOAD

F

L

4.7µH

R1

20mΩ

BAT+

C10

22µF

BATTERY

PACK

BAT-

FIGURE 2. ISL6252, ISL6252A TYPICAL APPLICATION CIRCUIT WITH FIXED CHARGING PARAMETERS

4

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VCC

DIGITAL

INPUT

D/A OUTPUT

OUTPUT

A/D INPUT

HOST

AVDD/VREF

SCL

SCL SDL

SDL

A/D INPUT

GND

ADAPTER

R16 100k

100k

C11

C11 3300pF

3300pF

R11, R12 R13: 10k

R8

130k

1%

R9

10.2k

10.2k 1%

1%

C7

1

µF

C9

1µF

1

R5

R5 100k

100k

R7: 100Ω

R7:

5.15A INPUT

CURRENT LIMIT

R6

4.7k

ISL6252, ISL6252A

C8

0.1µF

0.1

CSON

DCIN

ACSET

ISL6252

ISL6252A

ISL

ISL6252

VDDP

R10

4.7

4.7Ω VDD

VDD

C6

6.8nF

C5

C5 10nF

VDD

ACPRN

CHLIM

EN

ICM

ACLIM

VREF

ICOMP

VCOMP

UGATE

PHASE

LGATE

CSIP

CSIN

BOOT

UGATE

PHASE

LGATE

PGND

CSOP

CSON

CELLS

VADJ

GND

R21

C2

0.1µF

0.1

R22

D2

C4

0.1µF

0.1

Q2

GND

GND 3-CELLS

FLOATING

4.2V/CELL

2.2Ω

22Ω

VDDP

R11

C3

0.047µF

R12

R2

R2 20m

20m

20mΩ

C1:10µF

C1:10

Q1

D1

OPTIONAL

22Ω

L

4.7µH

R1

R1 20mΩ

C10 22µF

SYSTEM LOAD

BAT+

BATTERY

PACK

SCL

SCL SDL

SDL

SDL TEMP

TEMP

TEMP BAT-

BAT-

FIGURE 3. ISL6252, ISL6252A TYPICAL APPLICATION CIRCUIT WITH µP CONTROL

5

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ISL6252, ISL6252A

Absolute Maximum Ratings Thermal Information

ACSET to GND (Note 3) . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V

DCIN, CSIP, CSON to GND. . . . . . . . . . . . . . . . . . . . .-0.3V to +28V

CSIP-CSIN, CSOP-CSON. . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V

PHASE to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to 30V

BOOT to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +35V

BOOT to VDDP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to 28V

ACLIM, ACPRN, CHLIM, VDD to GND . . . . . . . . . . . . . .-0.3V to 7V

BOOT-PHASE, VDDP-PGND . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V

ICM, ICOMP, VCOMP to GND. . . . . . . . . . . . . . -0.3V to VDD +0.3V

VREF, CELLS to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V

EN, VADJ, PGND to GND . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V

UGATE. . . . . . . . . . . . . . . . . . . . . . . . PHASE -0.3V to BOOT +0.3V

LGATE. . . . . . . . . . . . . . . . . . . . . . . . . PGND -0.3V to VDDP +0.3V

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.

NOTES:

3. ACSET may be operated 1V below GND if the current through ACSET is limited to less than 1mA.

is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See T ech

4. θ

JA

Brief TB379.

5. For θ

, the “case temp” location is the center of the exposed metal pad on the package underside.

JC

Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP= CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ= Floating,

EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C T

≤+125°C, Unless Otherwise Noted.

J

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

SUPPLY AND BIAS REGULATOR

DCIN Input Voltage Range 7 25 V DCIN Quiescent Current EN = VDD or GND, 7V ≤ DCIN ≤ 25V 1.4 3 mA Battery Leakage Current (Note 6) DCIN = 0, no load 3 10 µA VDD Output Voltage/Regulation 7V ≤ DCIN ≤ 25V, 0 ≤ I VDD Undervoltage Lockout Trip Point VDD Rising 4.0 4.4 4.6 V

Hysteresis 200 250 400 mV

Reference Output Voltage VREF 0 ≤ I

≤ 300µA 2.365 2.39 2.415 V

VREF

Battery Charge Voltage Accuracy CSON = 16.8V, CELLS= VDD, VADJ = Float -0.5 0.5 %

CSON = 12.6V, CELLS = GND, VADJ = Float -0.5 0.5 % CSON = 8.4V, CELLS= Float, VADJ = Float -0.5 0.5 % CSON = 17.64V, CELLS= VDD, VADJ= VREF -0.5 0.5 % CSON = 13.23V , CELLS = GND, VADJ = VREF -0.5 0.5 % CSON = 8.82V, CELLS= Float, VADJ= VREF -0.5 0.5 % CSON = 15.96V, CELLS= VDD, VADJ = GND -0.5 0.5 % CSON = 11.97V, CELLS = GND, VADJ = GND -0.5 0.5 % CSON = 7.98V, CELLS = Float, VADJ = GND -0.5 0.5 %

TRIP POINTS

ACSET Threshold 1.24 1.26 1.28 V ACSET Input Bias Current Hysteresis 2.4 3.4 4.4 µA ACSET Input Bias Current ACSET ≥ 1.26V 2.4 3.4 4.4 µA ACSET Input Bias Current ACSET < 1.26V -1 0 1 µA

VDD

Thermal Resistance θ

(°C/W) θJC (°C/W)

JA

QFN Package (Notes 4, 5). . . . . . . . . . 39 9.5

QSOP Package (Note 4) . . . . . . . . . . . 80 NA

Junction Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +150°C

Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C

Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

VDD

=1µF, I

=0mA, TA= -10°C to +100°C,

VDD

≤ 30mA 4.925 5.075 5.225 V

6

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ISL6252, ISL6252A

Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating,

EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C T

≤+125°C, Unless Otherwise Noted. (Continued)

J

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

OSCILLATOR

Frequency 245 300 355 kHz PWM Ramp Voltage (peak-peak) CSIP = 18V 1.6 V

CSIP = 11V 1 V

SYNCHRONOUS BUCK REGULATOR

Maximum Duty Cycle 97 99 99.6 % UGATE Pull-Up Resistance BOOT-PHASE = 5V, 500mA source current 1.8 3.0 Ω UGATE Source Current BOOT-PHASE= 5V, BOOT-UGATE= 2.5V 1.0 A UGATE Pull-down Resistance BOOT-PHASE = 5V, 500mA sink current 1.0 1.8 Ω UGATE Sink Current BOOT-PHASE= 5V, UGATE-PHASE = 2.5V 1.8 A LGATE Pull-Up Resistance VDDP-PGND = 5V, 500mA source current 1.8 3.0 Ω LGATE Source Current VDDP-PGND = 5V, VDDP-LGATE = 2.5V 1.0 A LGATE Pull-Down Resistance VDDP-PGND = 5V, 500mA sink current 1.0 1.8 Ω LGATE Sink Current VDDP-PGND = 5V, LGATE = 2.5V 1.8 A Dead Time Falling UGATE to rising LGATE or

CHARGING CURRENT SENSING AMPLIFIER

Input Common-Mode Range 0 18 V Input Bias Current at CSOP 5 < CSOP < 18V 0.25 2 µA Input Bias Current at CSON 5 < CSON < 18V 75 100 µA CHLIM Input Voltage Range 0 3.6 V ISL6252

CSOP to CSON Full-Scale Current Sense Voltage

ISL6252A CSOP to CSON Full-Scale Current Sense Voltage

ISL6252 CSOP to CSON Full-Scale Current Sense Voltage formula

ISL6252A CSOP to CSON Full-Scale Current Sense Voltage formula

CHLIM Input Bias Current CHLIM = GND or 3.3V, DCIN = 0V -1 1 µA CHLIM Power-Down Mode Threshold

Voltage CHLIM Power-Down Mode Hysteresis

Voltage

ADAPTER CURRENT SENSING AMPLIFIER

Input Common-Mode Range 7 25 V Input Bias Current at CSIP and CSIN

Combined Input Bias Current at CSIN 0 < CSIN < DCIN 0.10 µA

falling LGATE to rising UGATE

ISL6252: CHLIM = 3.3V 160 165 170 mV ISL6252: CHLIM = 2.0V 95 100 105 mV ISL6252: CHLIM = 0.2V 5.0 10 15.0 mV ISL6252A: CHLIM = 3.3V 161.7 165 168.3 mV ISL6252A: CHLIM = 2.0V 97 100 103 mV ISL6252A: CHLIM = 0.2V 7.5 10 12.5 mV Charge current limit mode

0.2V < CHLIM < 3.3V Charge current limit mode

0.2V < CHLIM < 3.3V

CHLIM rising 80 88 95 mV

CSIP = CSIN = 25V 100 130 µA

CHLIM*49.72

=1µF, I

VDD

10 30 ns

CHLIM*50

-5

-2.4

15 25 40 mV

=0mA, TA= -10°C to +100°C,

VDD

CHLIM*50

+5

CHLIM*50.28

+2.4

mV

7

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ISL6252, ISL6252A

Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating,

EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C T

≤+125°C, Unless Otherwise Noted. (Continued)

J

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

ADAPTER CURRENT LIMIT THRESHOLD

CSIP to CSIN Full-Scale Current Sense Voltage

ACLIM = VREF 97 100 103 mV ACLIM = Float 72 75 78 mV ACLIM = GND 47 50 53 mV

ACLIM Input Bias Current ACLIM = VREF 10 16 20 µA

ACLIM = GND -20 -16 -10 µA

VOLTAGE REGULATION ERROR AMPLIFIER

Error Amplifier Transconductance from

CELLS = VDD 30 µA/V

CSON to VCOMP

CURRENT REGULATION ERROR AMPLIFIER

Charging Current Error Amplifier Transconductance

Adapter Current Error Amplifier Transconductance

BATTERY CELL SELECTOR

CELLS Input Voltage for 4 Cell Select 4.3 V CELLS Input Voltage for 3 Cell Select 2V CELLS Input Voltage for 2 Cell Select 2.1 4.2 V

LOGIC INTERFACE

EN Input Voltage Range 0VDDV EN Threshold Voltage Rising 1.030 1.06 1.100 V

Falling 0.985 1.000 1.025 V

Hysteresis 30 60 90 mV EN Input Bias Current EN = 2.5V 1.8 2.0 2.2 µA ACPRN Sink Current ACPRN = 0.4V 3 8 11 mA ACPRN Leakage Current ACPRN = 5V -0.5 0.5 µA ICM Output Accuracy

(V

= 19.9 x (V

ICM

CSIP

- V

CSIN

))

CSIP-CSIN = 100mV -3 0 +3 %

CSIP-CSIN = 75mV -4 0 +4 %

CSIP-CSIN = 50mV -5 0 +5 % Thermal Shutdown Temperature 150 °C Thermal Shutdown Temperature

Hysteresis

NOTE:

6. This is the sum of currents in these pins (CSIP, CSIN, BOOT, UGATE, PHASE, CSOP, CSON) all tied to 16.8V. No current in pins EN, ACSET, VADJ, CELLS, ACLIM, CHLIM.

VDD

=1µF, I

=0mA, TA= -10°C to +100°C,

VDD

50 µA/V

25 °C

8

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