intersil ISL6251, ISL6251A DATA SHEET

ISL6251, ISL6251A

Data Sheet May 10, 2006

Low Cost Multi-Chemistry Battery Charger Controller

The ISL6251, ISL6251A is a highly integrated battery charger controller for Li-Ion/Li-Ion polymer batteries and NiMH batteries. High Efficiency is achieved by a synchronous buck topology and the use of a MOSFET, instead of a diode, for selecting power from the adapter or battery. The low side MOSFET emulates a diode at light loads to improve the light load efficiency and prevent system bus boosting.

The constant output voltage can be selected for 2, 3 and 4 series Li-Ion cells with 0.5% accuracy over temperature. It can be also programmed between 4.2V+5%/cell and

4.2V-5%/cell to optimize battery capacity. When supplying the load and battery charger simultaneously, the input current limit for the AC adapter is programmable to within 3% accuracy to avoid overloading the AC adapter, and to allow the system to make efficient use of available adapter power for charging. It also has a wide range of programmable charging current. The ISL6251, ISL6251A provides outputs that are used to monitor the current drawn from the AC adapter, and monitor for the presence of an AC adapter. The ISL6251, ISL6251A automatically transitions from regulating current mode to regulating voltage mode.

Ordering Information

PART

NUMBER

(Notes 1, 2)

ISL6251HRZ ISL6251HRZ -10 to 100 28 Ld 5x5 QFN L28.5×5 ISL6251HAZ ISL6251HAZ -10 to 100 24 Ld QSOP M24.15 ISL6251AHRZ ISL6251AHRZ -10 to 100 28 Ld 5x5 QFN L28.5×5 ISL6251AHAZ ISL6251AHAZ -10 to 100 24 Ld QSOP M24.15

NOTES:

1. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

2. Add “-T” for Tape and Reel.

PART

MARKING

TEMP

RANGE

(°C)

PACKAGE

(Pb-Free)

PKG.

DWG. #

FN9202.2

Features

• ±0.5% Charge Voltage Accuracy (-10°C to 100°C)

• ±3% Accurate Input Current Limit

• ±3% Accurate Battery Charge Current Limit

• ±25% Accurate Battery Trickle Charge Current Limit (ISL6251A)

• Programmable Charge Current Limit, Adapter Current Limit and Charge Voltage

• Fixed 300kHz PWM Synchronous Buck Controller with Diode Emulation at Light Load

• Output for Current Drawn from AC Adapter

• AC Adapter Present Indicator

• Fast Input Current Limit Response

• Input Voltage Range 7V to 25V

• Support 2, 3 and 4 Cells Battery Pack

• Up to 17.64V Battery-Voltage Set Point

• Thermal Shutdown

• Support Pulse Charging

• Less than 10µA Battery Leakage Current

• Charge Any Battery Chemistry: Li-Ion, NiCd, NiMH, etc.

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Notebook, Desknote and Sub-notebook Computers

• Personal Digital Assistant

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Pinouts

ISL6251, ISL6251A

(28 LD QFN)

TOP VIEW

ISL6251, ISL6251A

(24 LD QSOP)

TOP VIEW

CELLS

ICOMP

VCOMP

ICM

VREF

CHLIM

ACSET

28 27 26 25 24 23 22

8 9 10 11 12 13 14

VADJ

ACLIM

VDD

GND

DCIN

PGND

LGATE

ACPRN

VDDP

CSON

BOOT

CSOP

CSIN

CSIP

PHASE

UGATE

VDD

CELLS

ICOMP

VCOMP

ICM

VREF

CHLIM

ACLIM

VADJ LGATE

GND PGND

124

223

322

421

520

619

718

817

916

10 15

11 14

12 13

DCIN

ACPRN ACSET

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

FN9202.2

May 10, 2006

ISL6251, ISL6251A

Absolute Maximum Ratings Thermal Information

DCIN, CSIP, CSON to PGND . . . . . . . . . . . . . . . . . . .-0.3V to +28V

CSIP-CSIN, CSOP-CSON. . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V

PHASE to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to 30V

BOOT to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +35V

ACLIM, ACPRN, CHLIM, VDD to GND . . . . . . . . . . . . . .-0.3V to 7V

BOOT-PHASE, VDDP-PGND . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V

ICM, ICOMP, VCOMP to GND. . . . . . . . . . . . . . -0.3V to VDD+0.3V

VREF, CELLS to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V

EN, VADJ, PGND to GND . . . . . . . . . . . . . . . . . .-0.3V to VDD+0.3V

UGATE. . . . . . . . . . . . . . . . . . . . . . . . . PHASE-0.3V to BOOT+0.3V

LGATE. . . . . . . . . . . . . . . . . . . . . . . . . . PGND-0.3V to VDDP+0.3V

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

3. When the voltage across ACSET is below 0V, the current through ACSET should be limited to less than 1mA.

is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See T ech

4. θ

Brief TB379.

5. θ

is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

6. For θ

, the “case temp” location is the center of the exposed metal pad on the package underside.

Thermal Resistance θ

(°C/W) θJC (°C/W)

QFN Package (Notes 4, 6). . . . . . . . . . 39 9.5

QSOP Package (Note 5) . . . . . . . . . . . 88 N/A

Junction Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +150°C

Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C

Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Lead Temperature (Soldering, 10s). . . . . . . . . . . . . . . . . . . . +300°C

Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating,

EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C T

≤ 125°C, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

SUPPLY AND BIAS REGULATOR

DCIN Input Voltage Range 7 25 V DCIN Quiescent Current EN = VDD or GND, 7V ≤ DCIN ≤ 25V 1.4 3 mA Battery Leakage Current (Note 7) DCIN = 0, no load 3 10 µA VDD Output Voltage/Regulation 7V ≤ DCIN ≤ 25V, 0 ≤ I

≤ 30mA 4.925 5.075 5.225 V

VDD

VDD Undervoltage Lockout Trip Point VDD Rising 4.0 4.4 4.6 V

Hysteresis 200 250 400 mV

Reference Output Voltage VREF 0 ≤ I

≤ 300µA 2.365 2.39 2.415 V

VREF

Battery Charge Voltage Accuracy CSON = 16.8V, CELLS = VDD, VADJ = Float -0.5 0.5 %

CSON = 12.6V, CELLS = GND, VADJ = Float -0.5 0.5 % CSON = 8.4V, CELLS = Float, VADJ = Float -0.5 0.5 % CSON = 17.64V, CELLS = VDD, VADJ = VREF -0.5 0.5 % CSON = 13.23V , CELLS = GND, VADJ = VREF -0.5 0.5 % CSON = 8.82V, CELLS = Float, VADJ = VREF -0.5 0.5 % CSON = 15.96V, CELLS = VDD, VADJ = GND -0.5 0.5 % CSON = 11.97V, CELLS = GND, VADJ = GND -0.5 0.5 % CSON = 7.98V, CELLS = Float, VADJ = GND -0.5 0.5 %

TRIP POINTS

ACSET Threshold 1.24 1.26 1.28 V ACSET Input Bias Current Hysteresis 2.2 3.4 4.4 µA ACSET Input Bias Current ACSET ≥ 1.26V 2.2 3.4 4.4 µA ACSET Input Bias Current ACSET < 1.26V -1 0 1 µA

VDD

= 1µF, I

= 0mA, TA = -10°C to +100°C,

VDD

FN9202.2

May 10, 2006

ISL6251, ISL6251A

Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating,

EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C T

≤ 125°C, unless otherwise noted. (Continued)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

OSCILLATOR

Frequency 245 300 355 kHz PWM Ramp Voltage (peak-peak) CSIP = 18V 1.6 V

CSIP = 11V 1 V

SYNCHRONOUS BUCK REGULATOR

Maximum Duty Cycle 97 99 99.6 % UGATE Pull-Up Resistance BOOT-PHASE = 5V, 500mA source current 1.8 3.0 Ω UGATE Source Current BOOT-PHASE = 5V, BOOT-UGATE = 2.5V 1.0 A UGATE Pull-DOWN Resistance BOOT-PHASE = 5V, 500mA sink current 1.0 1.8 Ω UGATE Sink Current BOOT-PHASE = 5V, UGATE-PHASE = 2.5V 1.8 A LGATE Pull-UP Resistance VDDP-PGND = 5V, 500mA source current 1.8 3.0 Ω LGATE Source Current VDDP-PGND = 5V, VDDP-LGATE = 2.5V 1.0 A LGATE Pull-DOWN Resistance VDDP-PGND = 5V, 500mA sink current 1.0 1.8 Ω LGATE Sink Current VDDP-PGND = 5V, LGATE = 2.5V 1.8 A

CHARGING CURRENT SENSING AMPLIFIER

Input Common-Mode Range 0 18 V Input Offset Voltage Guaranteed by design -2.5 0 2.5 mV Input Bias Current at CSOP 0 < CSOP < 18V 0.25 2 µA Input Bias Current at CSON 0 < CSON < 18V 75 100 µA CHLIM Input Voltage Range 0 3.6 V CSOP to CSON Full-Scale Current

Sense Voltage

CHLIM Input Bias Current CHLIM = GND or 3.3V, DCIN = 0V -1 1 µA CHLIM Power-Down Mode Threshold

Voltage CHLIM Power-Down Mode Hysteresis

Voltage

ADAPTER CURRENT SENSING AMPLIFIER

Input Common-Mode Range 7 25 V Input Offset Voltage Guaranteed by design -2 2 mV Input Bias Current at CSIP and CSIN

Combined Input Bias Current at CSIN 0 < CSIN < DCIN, Guaranteed by design 0.10 1 µA

ISL6251: CHLIM = 3.3V 157 165 173 mV ISL6251A, CHLIM = 3.3V 160 165 170 mV ISL6251: CHLIM = 2.0V 95 100 105 mV ISL6251A: CHLIM = 2.0V 97 100 103 mV ISL6251: CHLIM = 0.2V 5.0 10 15.0 mV ISL6251A: CHLIM = 0.2V 7.5 10 12.5 mV

CHLIM rising 80 88 95 mV

CSIP = CSIN = 25V 100 130 µA

= 1µF, I

VDD

15 25 40 mV

= 0mA, TA = -10°C to +100°C,

VDD

FN9202.2

May 10, 2006

ISL6251, ISL6251A

Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = 1.5V, ACLIM = VREF, VADJ = Floating,

EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, C T

≤ 125°C, unless otherwise noted. (Continued)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

ADAPTER CURRENT LIMIT THRESHOLD

CSIP to CSIN Full-Scale Current Sense Voltage

ACLIM Input Bias Current ACLIM = VREF 10 16 20 µA

VOLTAGE REGULATION ERROR AMPLIFIER

Error Amplifier Transconductance from CSON to VCOMP

CURRENT REGULATION ERROR AMPLIFIER

Charging Current Error Amplifier Transconductance

Adapter Current Error Amplifier Transconductance

BATTERY CELL SELECTOR

CELLS Input Voltage for 4 Cell Select 4.3 V CELLS Input Voltage for 3 Cell Select 2V CELLS Input Voltage for 2 Cell Select 2.1 4.2 V

LOGIC INTERFACE

EN Input Voltage Range 0 VDD V EN Threshold Voltage Rising 1.030 1.06 1.100 V

EN Input Bias Current EN = 2.5V 1.8 2.0 2.2 µA ACPRN Sink Current ACPRN = 0.4V 3 8 11 mA ACPRN Leakage Current ACPRN = 5V -0.5 0.5 µA ICM Output Accuracy

(Vicm = 19.9 x (Vcsip-Vcsin))

Thermal Shutdown Temperature 150 °C Thermal Shutdown Temperature

Hysteresis

NOTE:

7. This is the sum of currents in these pins (CSIP, CSIN, BOOT, UGA TE, PHASE, CSOP, CSON) all tied to 16.8V. No current in pins EN, ACSET, VADJ, CELLS, ACLIM, CHLIM.

ACLIM = VREF 97 100 103 mV ACLIM = Float 72 75 78 mV ACLIM = GND 47 50 53 mV

ACLIM = GND -20 -16 -10 µA

CELLS = VDD 30 µA/V

Falling 0.985 1.000 1.025 V Hysteresis 30 60 90 mV

CSIP - CSIN = 100mV -3 0 +3 % CSIP - CSIN = 75mV -4 0 +4 % CSIP - CSIN = 50mV -5 0 +5 %

VDD

= 1µF, I

= 0mA, TA = -10°C to +100°C,

VDD

50 µA/V

25 °C

FN9202.2

May 10, 2006

ISL6251, ISL6251A

Typical Operating Performance DCIN = 20V, 4S2P Li-Battery, T

0.6

VDD=5.075V

VDD=5.075V EN=0

0.3

-0.3

-0.6

VDD LOAD REGULATION ACCURACY (%)

0 8 16 24 32 40

LOAD CURRENT (mA)

FIGURE 1. VDD LOAD REGULATION

9 8

(%)

7 6 5 4 3

ICM ACCURACY

2 1 0

10 20 30 40 50 60 70 80 90

CSIP-CSIN (mV)

EN=0

100

= 25°C, unless otherwise noted.

0.1

VREF=2.390V

0.08

0.06

0.04

0.02

VREF LOAD REGULATION ACCURA CY ( %)

0 100 200 300 400

LOAD CURRENT (µA)

VREF=2.390V

FIGURE 2. VREF LOAD REGULATION

0.96

VCSON=12.6V

0.92

0.88

0.84

EFFICIENCY (%)

0.8

0.76

00.511.522.533.54

VCSON=12.6V

(3 CELLS)

VCSON=16.8V

VCSON=16.8V 4 CELLS

4 CELLS

CHARGE CURRENT (A)

VCSON=8.4V

VCSON=8.4V 2 CELLS

2 CELLS

FIGURE 3. ICM ACCURACY vs AC ADAPTER CURRENT FIGURE 4. SYSTEM EFFICIENCY vs CHARGE CURRENT

LOAD STEP: 0-4A CHARGE CURRENT: 3A

C ADAPTER CURRENT LIMI T: 5.15

LOAD CURRENT 5A/div

DAPTER CURRENT 5A/div

CHARGE CURRENT 2A/div

BATTERY VOLTAGE 2V/div

CSON

CSON 5V/div

5V/div

EN 5V/div

5V/div

INDUCTOR

INDUCTOR CURRENT

CURRENT 2A/div

2A/div

CHARGE

CHARGE CURRENT

CURRENT 2A/div

2A/div

FIGURE 5. LOAD TRANSIENT RESPONSE FIGURE 6. CHARGE ENABLE AND SHUTDOWN

FN9202.2

May 10, 2006

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