The ISL6185 USB power controller family provides fully
independent overcurrent (OC) fault protection for two or more
USB ports.
This product family consists of sixteen individual functional
product variants and three package options. It is operation
rated for a nominal +2.5V to +5V range and is specified over the
full commercial and industrial temperature ranges.
Each ISL6185 type incorporates in a single package two 71mΩ
P-channel MOSFET power switches for power control. Each
features internal current monitoring, accurate current limiting,
and current limited delay to turn-off, for system supply
protection along with control and communication I/O.
The ISL6185 family offers product variants with specified
continuous output current levels of 0.6A, 1.1A, 1.5A or 1.8A; enable
active high or low inputs; and latch off or automatic retry after
overcurrent turn-off, making these devices well suited for many
low-power applications.
This family of ICs is offered in an industry-standard SOIC pinout
and also in the 70% smaller 3x3 DFN packages providing similar
or enhanced performance in the smallest possible package.
Features
• 2.5V to 5V Operating Range
•71mΩ Integrated Power P-channel MOSFET Switches
• Continuous Current Options for 0.6A, 1.1A, 1.5A and 1.8A
• Thermally Insensitive 12ms of Current Limiting Prior to
Turn-O ff
• Output Discharges with Reverse Current Blocking When
Disabled
• Latch-off or Auto Restart Options
• 1µA Off-State Supply Current
• Enable Polarity Options
• Industry-standard Pin for Pin SOIC, and Smaller DFN Packages
Available
• UL Recognized, File Number: E333469
Applications
• USB 1, 2, 3 Port Power Management
• Low Power (18W) Electronic Circuit Limiting and Breaker
D+
D-
U
S
B
C
O
N
+5V
T
R
O
L
L
E
R
FIGURE 1. TYPICAL APPLICATIONFIGURE 2. NORMALIZED r
ENABLE_1
FAULT_1
VIN
FAULT_2
ENABLE_2
USB PORT POWER
OUT_1
GND
ISL6185
OUT_2
D+
D-
USB
PORT 1
VBUS
VBUS
USB
PORT_2
1.3
1.2
1.1
DS(ON)
1.0
0.9
NORMALIZED r
0.8
0.7
-40-25025457585115
CHARACTERISTIC CURVE
TEMPERATURE (°C)
TEMPERATURE
DS(ON)
March 8, 2012
FN6937.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
|Copyright Intersil Americas Inc. 2010, 2011, 2012. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Simplified Block Diagram
GND
ISL6185
CHANNEL 1 LIKE CHANNEL 2
-
-V
comp
+
FAULT_1
VIN
POR
EN_1
EN_2FAULT_2
CURRENT AND TEMP.
MONITORING, GATE,
DELAY & OUTPUT CONTROL
LOGIC
OUT_1
OUT_2
Ordering Information
V
= 5V
IN
PART
NUMBER
(Notes 1, 2, 3)PART MARKING
EN/EN
INPUT
ISL61851ACBZ61851A CBZEN0.6LATCH0 to +708 Lead SOIC M8.15
ISL61851BCBZ61851B CBZEN0.6RETRY0 to +708 Lead SOIC M8.15
ISL61851CCBZ61851C CBZEN1.1LATCH0 to +708 Lead SOIC M8.15
ISL61851DCBZ61851D CBZEN1.1RETRY0 to +708 Lead SOIC M8.15
ISL61851ECBZ61851E CBZEN
ISL61851FCBZ61851F CBZEN0.6RETRY0 to +708 Lead SOIC M8.15
ISL61851GCBZ61851G CBZEN1.1LATCH0 to +708 Lead SOIC M8.15
ISL61851HCBZ61851H CBZEN1.1RETRY0 to +708 Lead SOIC M8.15
ISL61851ICBZ61851I CBZEN1.5LATCH0 to +708 Lead SOIC M8.15
ISL61851JCBZ61851J CBZEN1.5RETRY0 to +708 Lead SOIC M8.15
ISL61851KCBZ61851K CBZEN
ISL61851LCBZ61851L CBZEN1.5RETRY0 to +708 Lead SOIC M8.15
ISL61852ACRZ52ACEN0.6LATCH0 to +708 Lead DFNL8.3x3J
ISL61852BCRZ52BCEN0.6RETRY0 to +708 Lead DFNL8.3x3J
ISL61852CCRZ52CCEN1.1LATCH0 to +708 Lead DFNL8.3x3J
ISL61852DCRZ52DCEN1.1RETRY0 to +708 Lead DFNL8.3x3J
ISL61852ECRZ52ECEN
MAXIMUM
CONTINUOUS IOUT
(A)
LATCH/AUTO
RETRY
TEMP.
RANGE (°C)
PACKAGE
(Pb-free)
0.6LATCH0 to +708 Lead SOIC M8.15
1.5LATCH0 to +708 Lead SOIC M8.15
0.6LATCH0 to +708 Lead DFNL8.3x3J
PKG.
DWG. #
2
FN6937.3
March 8, 2012
ISL6185
Ordering Information (Continued)
V
= 5V
IN
PART
NUMBER
(Notes 1, 2, 3)PART MARKING
ISL61852FCRZ52FCEN0.6RETRY0 to +708 Lead DFNL8.3x3J
ISL61852GCRZ52GCEN1.1LATCH0 to +708 Lead DFNL8.3x3J
ISL61852HCRZ52HCEN
ISL61852ICRZ52ICEN1.5LATCH0 to +708 Lead DFNL8.3x3J
ISL61852JCRZ52JCEN1.5RETRY0 to +708 Lead DFNL8.3x3J
ISL61852KCRZ52KCEN
ISL61852LCRZ52LCEN1.5RETRY0 to +708 Lead DFNL8.3x3J
ISL61853ACRZ53ACEN0.6LATCH0 to +7010 Lead DFN L10.3x3
ISL61853BCRZ53BCEN0.6RETRY0 to +7010 Lead DFN L10.3x3
ISL61853CCRZ53CCEN1.1LATCH0 to +7010 Lead DFN L10.3x3
ISL61853DCRZ53DCEN1.1RETRY0 to +7010 Lead DFN L10.3x3
ISL61853ECRZ53ECEN
ISL61853FCRZ53FCEN0.6RETRY0 to +7010 Lead DFN L10.3x3
ISL61853GCRZ53GCEN
ISL61853HCRZ53HCEN1.1RETRY0 to +7010 Lead DFN L10.3x3
ISL61853ICRZ53ICEN1.5LATCH0 to +7010 Lead DFN L10.3x3
ISL61853JCRZ53JCEN1.5RETRY0 to +7010 Lead DFN L10.3x3
ISL61853KCRZ53KCEN
ISL61853LCRZ53LCEN1.5RETRY0 to +7010 Lead DFN L10.3x3
ISL61853MCRZ53MCEN1.8LATCH0 to +7010 Lead DFN L10.3x3
ISL61853NCRZ53NCEN1.8RETRY0 to +7010 Lead DFN L10.3x3
ISL61853OCRZ53OCEN
ISL61853PCRZ53PCEN1.8RETRY0 to +7010 Lead DFN L10.3x3
ISL61851AIBZ61851A IBZEN0.6LATCH-40 to +858 Lead SOICM8.15
ISL61851BIBZ61851B IBZEN0.6RETRY-40 to +858 Lead SOICM8.15
ISL61851CIBZ61851C IBZEN1.1LATCH-40 to +858 Lead SOICM8.15
ISL61851DIBZ61851D IBZEN1.1RETRY-40 to +858 Lead SOICM8.15
ISL61851EIBZ61851E IBZEN
ISL61851FIBZ61851F IBZEN
ISL61851GIBZ61851G IBZEN1.1LATCH-40 to +858 Lead SOICM8.15
ISL61851HIBZ61851H IBZEN1.1RETRY-40 to +858 Lead SOICM8.15
ISL61851IIBZ61851I IBZEN1.5LATCH-40 to +858 Lead SOICM8.15
ISL61851JIBZ61851J IBZEN1.5RETRY-40 to +858 Lead SOICM8.15
ISL61851KIBZ61851K IBZEN
ISL61851LIBZ61851L IBZEN1.5RETRY-40 to +858 Lead SOICM8.15
ISL61852AIRZ52AIEN0.6LATCH-40 to +858 Lead DFN L8.3x3J
ISL61852BIRZ52BIEN0.6RETRY-40 to +858 Lead DFN L8.3x3J
ISL61852CIRZ52CIEN1.1LATCH-40 to +858 Lead DFN L8.3x3J
ISL61852DIRZ52DIEN1.1RETRY-40 to +858 Lead DFN L8.3x3J
ISL61852EIRZ52EIEN
EN/EN
INPUT
MAXIMUM
CONTINUOUS IOUT
(A)
1.1RETRY0 to +708 Lead DFNL8.3x3J
1.5LATCH0 to +708 Lead DFNL8.3x3J
0.6LATCH0 to +7010 Lead DFN L10.3x3
1.1LATCH0 to +7010 Lead DFN L10.3x3
1.5LATCH0 to +7010 Lead DFN L10.3x3
1.8LATCH0 to +7010 Lead DFN L10.3x3
0.6LATCH-40 to +858 Lead SOICM8.15
0.6RETRY-40 to +858 Lead SOICM8.15
1.5LATCH-40 to +858 Lead SOICM8.15
0.6LATCH-40 to +858 Lead DFN L8.3x3J
LATCH/AUTO
RETRY
TEMP.
RANGE (°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
3
FN6937.3
March 8, 2012
ISL6185
Ordering Information (Continued)
V
= 5V
IN
PART
NUMBER
(Notes 1, 2, 3)PART MARKING
ISL61852FIRZ52FIEN0.6RETRY-40 to +858 Lead DFN L8.3x3J
ISL61852GIRZ52GIEN1.1LATCH-40 to +858 Lead DFN L8.3x3J
ISL61852HIRZ52HIEN
ISL61852IIRZ52IIEN1.5LATCH-40 to +858 Lead DFN L8.3x3J
ISL61852JIRZ52JIEN1.5RETRY-40 to +858 Lead DFN L8.3x3J
ISL61852KIRZ52KIEN
ISL61852LIRZ52LIEN1.5RETRY-40 to +858 Lead DFN L8.3x3J
ISL61853AIRZ53AIEN0.6LATCH-40 to +8510 Lead DFNL10.3x3
ISL61853BIRZ53BIEN0.6RETRY-40 to +8510 Lead DFNL10.3x3
ISL61853CIRZ53CIEN1.1LATCH-40 to +8510 Lead DFNL10.3x3
ISL61853DIRZ53DIEN1.1RETRY-40 to +8510 Lead DFNL10.3x3
ISL61853EIRZ53EIEN
ISL61853FIRZ53FIEN0.6RETRY-40 to +8510 Lead DFNL10.3x3
ISL61853GIRZ53GIEN
ISL61853HIRZ53HIEN1.1RETRY-40 to +8510 Lead DFNL10.3x3
ISL61853IIRZ53IIEN1.5LATCH-40 to +8510 Lead DFNL10.3x3
ISL61853JIRZ53JIEN1.5RETRY-40 to +8510 Lead DFNL10.3x3
ISL61853KIRZ53KIEN
ISL61853LIRZ53LIEN1.5RETRY-40 to +8510 Lead DFNL10.3x3
ISL61853MIRZ53MIEN1.8LATCH-40 to +8510 Lead DFNL10.3x3
ISL61853NIRZ53NIEN1.8RETRY-40 to +8510 Lead DFNL10.3x3
ISL61853OIRZ53OIEN
ISL61853PIRZ53PIEN1.8RETRY-40 to +8510 Lead DFNL10.3x3
ISL61851EVAL1Z8 Lead SOIC Evaluation Platform with ISL61851A installed
ISL61852EVAL1Z8 Lead DFN Evaluation Platform with ISL61852H installed
ISL61853EVAL1Z10 Lead DFN Evaluation Platform with ISL61853I installed
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information pages for ISL6185XXC
For more information on MSL please see techbrief TB363
EN/EN
INPUT
MAXIMUM
CONTINUOUS IOUT
(A)
1.1RETRY-40 to +858 Lead DFN L8.3x3J
1.5LATCH-40 to +858 Lead DFN L8.3x3J
0.6LATCH-40 to +8510 Lead DFNL10.3x3
1.1LATCH-40 to +8510 Lead DFNL10.3x3
1.5LATCH-40 to +8510 Lead DFNL10.3x3
1.8LATCH-40 to +8510 Lead DFNL10.3x3
for details on reel specifications.
.
LATCH/AUTO
RETRY
(commercial version) and ISL6185XXI (industrial version).
TEMP.
RANGE (°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
4
FN6937.3
March 8, 2012
Pin Configurations
ISL6185
ISL6185
(8 LD SOIC/DFN)
TOP VIEW
GND
1
2
3
4
(GND)
EPAD
DFN Only
VINOUT1
EN1/EN1
EN2/EN2
FLT1
8
7
6
OUT2
5
FLT2
GND
VINOUT1
VINNC
EN1/EN1
EN2/EN2
ISL6185
(10 LD DFN)
TOP VIEW
1
2
3
4
5
(GND)
EPAD
FLT1
10
9
8
7
OUT2
6
FLT2
Pin Descriptions
PIN NUMBER
8 Ld
SOIC/DFN10 Ld DFN
11GNDIC ground reference.
2 2, 3VINChip bias, Controlled Voltage Input, Undervoltage Lock Out (UVLO). VIN provides chip bias voltage. At
SYMBOLDESCRIPTION
VIN < 1.7V chip functionality is disabled, FLT
is active and floating, and OUT is held low. Range 0V to
5.5V.
3,
4
5,
8
10
4,
6,
EN1, EN1
5
EN2, EN2
FLT2
FLT1
/
Enable/Disable inputs, Active high (EN) and active low (EN) options enable the power switch. These
inputs have internal 1MΩ pull-off resistors. Range 0V to VIN.
Overcurrent Fault Indicator. FLT floats and is disabled until VIN >V
the current limit time-out period has expired. Fault is not signaled due to over-temperature shut down.
Range 0V to VIN.
6,
7
7,
OUT2,
9
OUT1
Controlled Supply Output. Upon an OC condition, I
within 200µs. This output remains in current limit for a nominal 12ms before being turned off either for
the latch or auto retry versions. Range 0V to VIN.
-8NCThis pin is not electrically connected internally.
PD
PDEPADThermal Dissipation Exposed PAD Range: Connect to GND.
(DFN only)
. This output is pulled low after
UVLO
is current limited. Current limit response time is
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
5. θ
JA
Brief TB379
6. For θ
7. All voltages are relative to GND, unless otherwise specified.
.
, the “case temp” location is the center of the exposed metal pad on the package underside.