intersil ISL6118 DATA SHEET

®

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ISL6118

Data Sheet March 2004

Dual Power Supply Controller

The ISL6118 is a dual channel, fully independent overcurrent
(OC) fault protection IC for the +2.5V to +5.5V environment.
This device features internal current monitoring, accurate
current limiting, integrated power switches and current
limited delay to latch-off for system protection.

The ISL6118 current sense and limiting circuitry sets the
current limit to a nominal 0.6A, which is well suited for the

3.3V AUX ACPI application. The ISL6118 is the ideal
companion chip to the HIP1011D and HIP1011E dual PCI
hot plug controllers. Together these and the ISL6118 fully
control the four legacy PCI voltages (±12V, +3.3V, +5V) and
the 3.3V AUX, respectively, for power control of two PCI
slots compliant to PCI Bus Power Management Interface
Spec Rev 1.1. Designed to be co-located with the HIP1011D
on the motherboard, the ISL6118 provides OC fault
notification, accurate current limiting and a consistent timed
latch-off thus isolating and protecting the voltage bus in the
presence of an OC event or short circuit during all PCI Bus
Power States as defined by the PCI specification. The 12ms
time to latch-off is independent of the adjoining switch’s
electrical or thermal condition and the OC response time is
inversely related to the OC magnitude.

Each ISL6118 incorporates in a single 8-lead SOIC
package two 80mΩ N-channel MOSFET power switches
for power control. Each switch is driven by a constant
current source giving a controlled ramp up of the output
voltage. This provides a soft start turn-on eliminating bus
voltage drooping caused by inrush current while charging
heavy load capacitances. Independent enabling inputs and
fault reporting outputs for each channel are compatible with
3V and 5V logic to allow external control and monitoring.

The ISL6118 undervoltage (UV) feature prevents turn-on of
the outputs unless the correct ENABLE state and
VIN > 2.5V are present. During initial turn-on the ISL6118
prevents fault reporting by blanking the fault signal. Rising
and falling outputs are current-limited voltage ramps so that
both the inrush current and voltage slew rate are limited,
independent of load. This reduces supply droop due to
surge and eliminates the need for external EMI filters.
During operation, once an OC condition is detected the
appropriate output is current limited for 12ms to allow
transient conditions to pass. If still in current limit after the
current limit period has elapsed, the output is latched off
and the fault is reported by pulling the corresponding
FAULT

low. The FAULT signal is latched low until reset by
the ENABLE signal being de-asserted at which time the
FAULT

signal will clear.

FN9008.2

Features

• 80mΩ Integrated Power N-Channel MOSFET Switches

• Accurate Current Sensing and Limiting

• 12ms Fault Delay to Latch-Off, No Thermal Dependency

• 2.5V to 5.5V Operating Range

• Disabled Output Internally Pulled Low

• Undervoltage Lockout

• Controlled Turn-On Ramp Time

• Channel Independent Fault Output Signals

• Channel Independent Logic Level Enable High Inputs
(ISL6118H) or Enable Low Inputs (ISL6118L)

• Pb-Free Package Options Available

• Tape & Reel Packing with ‘-T’ Part Number Suffix

Applications

• ACPI 3.3V AUX Control

• Electronic Circuit Limiting and Breaker

Ordering Information

TEMP.

PART #

ISL6118LIB -40 to 85 8 Ld SOIC M8.15

ISL6118LIBZA (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15

ISL6118HIB -40 to 85 8 Ld SOIC M8.15

ISL6118HIBZA (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15

ISL6118EVAL1 ISL6118 Evaluation Platform

ISL6AHPEVAL1 ACPI (HIP1011D and ISL6118H) Evaluation

NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which is compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J Std-020B.

RANGE (°C) PKG.

Platform

PKG.

DWG. #

Pinout

ISL6118 (SOIC)

TOP VIEW

GND

VIN

ENABLE_1

ENABLE_2

1

2

3

4

8

7

6

5

FAULT_1

OUT_1

OUT_2

FAULT_2

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright © Intersil Americas Inc. 2004. All Rights Reserved

Simplified Block Diagram

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GND

ISL6118

CHANNEL 1 LIKE CHANNEL 2

FAULT_1

VIN

Q-PUMP

POR

EN_1

EN_2 FAULT_2

CURRENT AND TEMP.

MONITORING, GATE AND

OUTPUT CONTROL

LOGIC

OUT_1

OUT_2

Pin Descriptions

PIN NO. DESIGNATOR FUNCTION DESCRIPTION

1 GND IC Reference

2 VIN Chip Bias, Controlled

Supply Input,
Undervoltage Lock-Out

VIN provides chip bias voltage. At VIN < 2.5V chip functionality is disabled, FAULT_X latch
is cleared and floating and OUT is held low.

3, 4 ENABLE_1, 2/

ENABLE_1, 2

5, 8 F

6, 7 OUT_2, 1 Channel 2,1 Controlled

AULT OUT_2, 1 Channel 2, 1

Channel Enable/
Enable not Inputs

Overcurrent Fault not
Indicator

Supply Output

Enables/Disables switch.

Channel overcurrent fault-not indicator. FAULT floats and is disabled until VIN > 2.5V. This
output is pulled low after the OC timeout period has expired and stays latched until ENABLE
is deasserted.

Channel voltage output, connect to load to protect. Upon an OC condition OUT is current
limited to 0.6A. Current limit response time is within 200µs. This output will remain in current
limit for a determined time before being latched off.

2

ISL6118

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Absolute Maximum Ratings Thermal Information

Supply Voltage (VIN to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . 6.0V

EN, FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V

OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND-0.3V to VIN +0.3V

Output Current . . . . . . . . . . . . . . . . . . . . . . .Short Circuit Protected

ESD Rating

Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . 3KV

Thermal Resistance (Typical, Note 1)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C

Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C

(SOIC - Lead Tips Only)

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C

Supply Voltage Range (Typical) . . . . . . . . . . . . . . . . . . 2.7V to 5.5V

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

1. θ

JA

2. All voltages are relative to GND, unless otherwise specified.

θ

JA

(°C/W)

Electrical Specifications Supply Voltages = 3.3V, T

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

POWER SWITCH

ISL6118 On Resistance at 2.7V r

ISL6118 On Resistance at 3.3V r

ISL6118 On Resistance at 5.0V r

Disabled Output Voltage V

OUT Rising Rate t_vout_rt R

Slow V

Fast V

CURRENT CONTROL

Current Limit, VIN = 3.3V - 5V Ilim V

OC Regulation Settling Time tsett

Severe OC Regulation Settling Time tsett

Overcurrent Latch-off Time t

I/O PARAMETERS

Fault Output Voltage V

ENABLE High Threshold Ven_vih VIN = 5.5V 2.0 - - V

ENABLE Low Threshold at 2.7V Ven_vil VIN = 2.7V - - 0.6 V

ENABLE Low Threshold at 5.5V Ven_vil VIN = 5.5V - - 0.8 V

ENABLE Input Current Ien_i ENABLE = 0V to 5V, VIN = 5V, T

BIAS PARAMETERS

Enabled VIN Current I

Disabled VIN Current I

Undervoltage Lockout Threshold V

UV Hysteresis UV

Over Temperature Disable Temp_dis - 150 - °C

Turn-off Rate t_svout_offt RL = 10Ω, CL = 0.1µF, 90%-10% - 8 - V/ms

OUT

Turn-off Rate t_fvout_offt RL = 1Ω, CL = 0.1µF, 90%-10% - 4 - V/µs

OUT

DS(ON)_27

DS(ON)_33

DS(ON)_50

OUT_DIS

Ilim

Ilim_sevRL

OC_loff

FAULT

VDD

VDD

UVLH

HYS

= T

= -40 to 85°C, Unless Otherwise Specified

A

J

VIN = 2.7V, I

T

= TJ = 85°C - 115 130 mΩ

A

VIN = 3.3V, I

T

= TJ = 85°C - 115 130 mΩ

A

VIN = 5V, I

= TJ = 85°C - 115 130 mΩ

T

A

VIN = 5V, Switch Disabled, 50µA Load - 300 450 mV

= 10Ω, CL = 0.1µF, 10%-90% - 8 - V/ms

L

= 0.8V 0.45 0.6 0.75 A

OUT

RL = 3Ω, CL= 0.1µF to within 10% of CR - 2 - ms

< 1Ω, CL= 0.1µF to within 10% of CR - 100 - µs

ISL6118X, TJ = 25°C - 12 - ms

Fault Output Current = 10mA - - 0.4 V

Switches Closed, OUTPUT = OPEN, TJ > 0°C - 120 200 µA

Switches Open, OUTPUT = OPEN - 1 5 µA

VIN Rising, Switch Enabled 1.7 2.25 2.5 V

= 0.4A, TA = TJ = 25°C - 90 105 mΩ

OUT

= 0.4A, TA = TJ = 25°C - 80 100 mΩ

OUT

= 0.4A, TA = TJ = 25°C - 80 95 mΩ

OUT

> 25°C -0.5 0 0.5 µA

J

50 100 - mV

3