intersil ISL6111 DATA SHEET

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ISL6111

Data Sheet March 2004

Current Regulated PCI Hot Plug Power Switch Controller

The ISL6111 is designed for use in PCI and PCI-X applications where active current regulation protection of the motherboard from an abnormal PCI load card is desired.

With the addition of two discrete power MOSFETs and a few passive components, the ISL6111 provides power control for the four legacy supplies (-12V, +12V, +5V, +3.3V) to a PCI or PCI-X slot. This IC integrates the +12V and -12V current sensing and regulation switches. On the 25W capable 3.3V and 5V rails, current regulation (CR) protection is provided by sensing the voltage across external current-sense resistors and modulation of the gate voltage bias on the external N-channel power MOSFETs.

During initial power-up of the +12V bias supply, the ENABLE (EN), Power Good (PG), fault monitoring and reporting function functions are inhibited if bias voltage <10V. Once the FETs are enabled they are soft started into the load thus eliminating supply rail disturbances.

FN9146.1

Features

• Active Current Regulation for Protection

• Adjustable Current Regulation Duration and Magnitude

• Internal MOSFET Switches for +12V and -12V Outputs

• Provides Fault Isolation

• Adjustable Turn-On Slew Rate

• Minimum Parts Count Solution

• No Charge Pump

• 1µs Response Time to Over Current

• Pb-Free leadframe

Applications

•PCI

•PCI-X 1.0

Ordering Information

Upon a failure that quickly causes a load current greater than the programmed CR level on any voltage supply, the ISL6111 enters its current regulation (CR) mode, limiting the load current to the user programmed level for the user determined period of time. The CR level and duration are set by a single resistor and capacitor respectively. At the end of the CR duration all the switches will latch off pulling the outputs low along with the CRTIM (current regulation timer) and FLTN (fault not) pins indicating a latch-off due to an over current (OC) condition. If a severe OC condition should occur, then the ISL6111 immediately latches off all outputs and sets the FLTN output low.

During operation, if any of the positive voltages falls below the minimum PCI specified levels the power good (PG) output will pull low indicating a non compliant voltage to a load. PG is an open drain output as is FLTN.

The CRSET pin allows programming of the current regulation levels to be scaled up or down from the PCI specified levels via a resistor connected between the CRSET pin and ground.

All faults and latches are cleared by ENABLE being deasserted low.

TEMP. RANGE

PART NUMBER

ISL6111CRZA (see Note)

ISL6111EVAL2 Evaluation Platform

NOTE: Intersil Lead-Free products employ special lead-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and lead-free soldering operations. Intersil Lead-Free products are MSL classified at lead-free peak reflow temperatures that meet or exceed the lead-free requirements of IPC/JEDEC J Std-020B.

(°C) PACKAGE

0 to 75 20 Ld 5x5 QFN

(Pb-Free)

PKG.

DWG. #

L20.5x5

Pinout

ISL6111 (5x5 QFN)

TOP VIEW

3VS

3VISEN

CRSET

M12VO

M12VI

20 19 18 17 16

3VG

12VI_A

GND_B

12VI_B

PGOOD

-12V

678910

FLTN

CRTIM

5VISEN

5VS

M12VG

GND_A

12VO_B

12VO_A

5VG

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Typical Application

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ISL6111

3.3V SUPPLY

ENABLE INPUT

-12V SUPPLY

12V SUPPLY

(Note 1)

V(I/O)

(Note 1) (Note 1) (Note 1)

3.3V,

7.6A OUT 0.5A OUT 0.1A OUT 5A OUT

SENSE_3

FAULTN

12V,

M12VIN

CRTIM

3VG

3VISEN

12VI(2)

3VS

FLTN

CRTIM

(Note 2)

POWER GOOD

ISL6111

M12VO

M12VG

GND(2)

12VO(2)

5VISEN

CRSET

(Note 1)

-12V,

5VG

5VS

CRSET

5nF

(Note 1)

5V,

SENSE_5

(Note 1)

5V SUPPLY

NOTES:

1. See Table 1 for CR level formula

2. See Table 2 for CR duration vs C

TIM

FIGURE 1. ISL6111 TYPICAL APPLICATION SCHEMATIC

Simplified Schematic

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ISL6111

CRTIM

12V

20µA

12V

5V ZENER

REFERENCE

12V

POWER-ON

RESET

COMP

REF

LOW WHEN 12VIN < 10V

REF

RESET

2.8V

FAULT LATCH

COMP

WOC COMP

COMP

4.6V

COMP

2.9V

COMP

10.6V

12V

AMP

PGOOD

FAULTN

ISEN

100µA

CRSET

ENABLE

GND

12V

ISEN

OCSET

HIGH = FAULT

12V

WOC COMP

COMP

HIGH = SWITCHES ON

WOC COMP

COMP

12V

12VO

M12V

M12VG

M12V

12V

AMP

M12V

AMP

0.3Ω

0.7Ω

ISL6111

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Pin Descriptions

PIN NO. DESIGNATOR FUNCTION FUNCTION DESCRIPTION

1 3VG 3.3V FET Gate Output Drives the gate of the 3.3V MOSFET. Connect to the gate of the external N-Channel

MOSFET. At turn-on the FET gate capacitance will be charged to 12VIN voltage by a 10µA current source. An optional capacitor from this node to ground will adjust the turn-on ramp.

2, 4 12VI 12V Input +12V IC bias supply and power supply rail input to internal power switch.

3, 14 GND IC Ground Reference Connect to common of power supplies.

5 PGOOD Power Good An open drain logic output that is released to indicate all positive voltage outputs are above

minimum PCI spec. Connect to V(I/O) through resistor.

6 CRTIM Current Regulation

Duration Input

7 FLTN Fault Indication A fault-not open drain output. Latches low once current regulation time has expired. Reset

8 5VISEN 5V Current Sense Connect to the load side of the current sense resistor in series with source of external 5V

9 5VS 5V Source Connect to source of 5V MOSFET switch. This connection along with 5VISEN senses the

10 EN Enable Input Controls all four internal and external switches, initiates turn-on/off

11 5VG 5V FET Gate Output Drives the gate of the 5V MOSFET. Connect to the gate of the external N-Channel

12, 13 12VO Switched 12V Output Switched 12V output.

15 M12VG Gate of Internal NMOS Connect a 5nF capacitor between M12VG and ground to stabilize the start-up ramp for the

16 M12VI -12V Input -12V Supply Input. Also provides power to the -12V current regulation circuitry.

17 M12VO Switched -12V Output Switched -12V Output.

18 CRSET Current Regulation Set Program current regulation levels for all four switches by connecting a resistor to GND. This

19 3VISEN 3.3V Current Sense Connect to the load side of the current sense resistor in series with source of external 3.3V

20 3VS 3.3V Source Connect to source of 3.3V MOSFET. This connection along with 3VISEN senses the voltage

An external capacitor from this pin to ground sets the current regulation duration before latch off. This output will pull low after the current regulation duration has expired. CR duration = 150K x CTIM. This pin sources 20µA and has a threshold trip voltage of 2.83V.

by 12VIN POR condition or enable input signaled low. Connect to V(I/O) through resistor.

MOSFET. Monitors voltage to load.

voltage drop across the sense resistor.

MOSFET. At turn-on the FET gate capacitance will be charged to 12VIN voltage by a 10µA current source. An optional capacitor from this node to ground will adjust the turn-on ramp

M12V supply. This capacitor is charged with 25µA during start-up.

pin sources 100µA. See Table 1 for CR level setting formulae.

MOSFET. Monitors voltage to load.

drop across the sense resistor.

ISL6111

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Absolute Maximum Ratings Thermal Information

12VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +15.0V

12VO, 3VG, 5VG . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 12VI+0.5V

M12VI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -14.0V to +0.5V

M12VO, M12VG. . . . . . . . . . . . . . . . . . . . . . . V

3VISEN, 5VISEN . . . . . . . . . . . -0.5V to the Lesser of 12VI or +7.0V

Voltage, Any Other Pin. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V

12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3A

M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8A

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4KeV (HBM)

-0.5V to +0.5V

M12VI

Operating Conditions

12VIN Supply Voltage Range . . . . . . . . . . . . . . . . +10.8V to +13.2V

5V and 3.3V Input Supply Tolerances. . . . . . . . . . . . . . . . . . . . . . ±10%

12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to +0.5A

M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to +0.1A

Temperature Range (T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See

3. θ

Tech Brief TB379.

4. All voltages are relative to GND, unless otherwise specified.

5. For θ

, the “case temp” location is the center of the exposed metal pad on the package underside.

) . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C

Thermal Resistance (Typical, Notes 3, 5)

QFN Package. . . . . . . . . . . . . . . . . . . . 31 2.5

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C

Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C

(°C/W) θJC (°C/W)

Electrical Specifications Nominal 5.0V and 3.3V Input Supply Voltages,

= T

12VI = 12V, M12VI = -12V, T

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

5V/3.3V CURRENT CONTROL

5V Current Regulation Threshold Voltage

5V WOC Threshold Voltage V

5V Current Regulation Level I

Slow Ramping Current Trip Level CT/CR di/dt = 0.001A/s, Current Trip Level/Current

Current Trip Level Temp Coeff. CT_t dCT/85°C (See Figure 1, Typical Application) - 3.5 - mA/°C

5V Undervoltage Threshold V

5V Turn-On Time (EN to 5VOUT = 4.5V) t

5V Turn-Off Time (EN to 5VOUT = 0.5V) t

3.3V Current Regulation Threshold Voltage

3.3V WOC Threshold Voltage V

3.3V Current Regulation Level I

Slow Ramping Current Trip Level CT/CR di/dt = 0.001A/s, Current Trip Level/Current

OC5V

OC5V_woc

CR5V_3

CR5V_35

CR5V_4

CR5V_46

5VUV

ON5V

OFF5V

OC3V

OC3V_woc

CR3V_3

CR3V_35

CR3V_4

CR3V_46

CRSET

Regulation Level

5VOUT

CRSET

Regulation Level

= 0 to 75°C, Unless Otherwise Specified

= 0.3V - 26.5 - mV

= 0.3V 49 - mV

= 3K (See Figure 1, Typical Application) - 5.3 - A

= 3.5K (See Figure 1, Typical Application) - 5.8 - A

= 4K (See Figure 1, Typical Application) - 6.4 - A

= 4.64K (See Figure 1, Typical Application) - 7.2 - A

-90-%

4.51 4.57 4.64 V

= 3300µF, RL = 1Ω,V

= 0.3V - 39.5 - mV

= 0.3V - 80 - mV

= 3K (See Figure 1, Typical Application) - 7.9 - A

= 3.5K (See Figure 1, Typical Application) - 8.7 - A

= 4K (See Figure 1, Typical Application) - 9.8 - A

= 4.64K (See Figure 1, Typical Application) - 10.9 - A

= 0.35V -7-ms

CRSET

= 0.35V -6-ms

CRSET

-90-%

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