Intersil Corporation ICL7650S Datasheet

ICL7650S

Data Sheet April 2000

2MHz, Super Chopper-Stabilized Operational Ampliﬁer

The ICL7650S Super Chopper-Stabilized Ampliﬁer offers exceptionally low input offset voltage and is extremely stable with respect to time and temperature. It is a direct replacement for the industry-standard ICL7650 offering improved input offset voltage, lower input offset voltage temperature coefﬁcient, reduced input bias current, and wider common mode voltage range. All improvements are highlighted in bold italics in the Electrical Characteristics section. Critical parameters are guaranteed over the

entire commercial temperature range.

Intersil’s unique CMOS chopper-stabilized ampliﬁer circuitry is user-transparent, virtually eliminating the traditional chopper ampliﬁer problems of intermodulation effects, chopping spikes, and overrange lockup.

The chopper ampliﬁer achieves its low offset by comparing the inverting and non-inverting input voltages in a nulling ampliﬁer, nulled by alternate clock phases. Two external capacitors are required to store the correcting potentials on the two ampliﬁer nulling inputs; these are the only external components necessary.

The clock oscillator and all the other control circuitry is entirely self-contained. Howeverthe14leadversion includes a provision for the use of an external clock, if required for a particular application. In addition, the ICL7650S is internally compensated for unity-gain operation.

File Number 2920.5

Features

• Guaranteed Max Input Offset Voltage for All Temperature Ranges

• Low Long-Term and Temperature Drifts of Input Offset Voltage

• Guaranteed Max Input Bias Current. . . . . . . . . . . . . .10pA

• Extremely Wide Common Mode

Voltage Range. . . . . . . . . . . . . . . . . . . . . . . +3.5V to -5V

• Reduced Supply Current . . . . . . . . . . . . . . . . . . . . . . 2mA

• Guaranteed Minimum Output Source/Sink Current

• Extremely High Gain . . . . . . . . . . . . . . . . . . . . . . . .150dB

• Extremely High CMRR and PSRR. . . . . . . . . . . . . .140dB

• High Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5V/µs

• Wide Bandwidth . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2MHz

• Unity-Gain Compensated

• Clamp Circuit to Avoid Overload Recovery Problems and Allow Comparator Use

• Extremely Low Chopping Spikes at Input and Output

• Improved, Direct Replacement for Industry-Standard ICL7650 and other Second-Source Parts

Ordering Information

TEMP.

RANGE

PART NUMBER

(oC) PACKAGE

ICL7650SCPA-1 0 to 70 8 Ld PDIP E8.3 ICL7650SCPD 0 to 70 14 Ld PDIP E14.3 ICL7650SCBA-1 0 to 70 8 Ld SOIC M8.15 ICL7650SCTV-1 0 to 70 8 Pin Metal Can T8.C

PKG.

NO.

Pinouts

ICL7650S (PDIP, SOIC)

EXTA

-IN

+IN

V-

1 2 3 4

TOP VIEW

8 7 6 5

ICL7650S (METAL CAN)

TOP VIEW

EXTB

V+ OUTPUT C

RETN

EXTA

-IN

+IN

EXTB

V+/CASE

4 V-

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

OUTPUT

RETN

C C

NC (GUARD)

ICL7650S (PDIP)

EXTB

EXTA

-IN

+IN

5 6

V-

TOP VIEW

14 13 12 11 10

9 8

EXT

INT/ EXT CLK IN INT CLK OUT V+ OUTPUT OUT CLAMP C

RETN

Functional Diagram

ICL7650S

+IN

-IN A

CAP RETURN

INT/EXT

EXT CLK IN

CLK OUT

NULL

OSC.

EXTA

INTERNAL

A A B C

BIAS

+ MAIN

EXTB

EXT CLK IN

OUTPUT

CLAMP

A = CLK OUT

A B

ICL7650S

Absolute Maximum Ratings Thermal Information

Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +0.3) to (V- -0.3)

Voltage on Oscillator Control Pins. . . . . . . . . . . . . . . . . . . . V+ to V-

Duration of Output Short Circuit. . . . . . . . . . . . . . . . . . . . . Indeﬁnite

Current to Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA

While Operating (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . .100µA

Operating Conditions

Temperature Range

ICL7650SC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

1. Limiting input current to 100µA is recommended to avoid latchup problems. Typically 1mA is safe, however this is not guaranteed.

2. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W)

8 Lead PDIP Package . . . . . . . . . . . . . 120 N/A

14 Lead PDIP Package . . . . . . . . . . . . 80 N/A

8 Lead SOIC Package . . . . . . . . . . . . . 160 N/A

Metal Can Package . . . . . . . . . . . . . . . 160 75

Maximum Junction Temperature (Hermetic Package) . . . . . . . .175oC

Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC

Maximum Storage Temperature Range. . . . . . . . . . -55oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

Electrical Speciﬁcations V

= ±5V. See Test Circuit, Unless Otherwise Speciﬁed

SUPPLY

TEMP.

PARAMETER SYMBOL TEST CONDITIONS

Input Offset Voltage (Note 3) V

(oC) MIN TYP MAX UNITS

25 - ±0.7 ±5 µV

0 to 70 - ±1 ±8 µV

Average Temperature Coefﬁcient of

∆VOS/∆T 0 to 70 - 0.02 - µV/oC

Input Offset Voltage (Note 3)

Change in Input Offset with Time ∆VOS/∆T 25 - 100 - nV/√month

Input Bias Current |I(+)|, |I(-)| I

BIAS

25 - 4 10 pA

0 to 70 - 520pA

Input Offset Current |I(-), |I(+)| I

25 - 820pA

0 to 70 - 10 40 pA Input Resistance R Large Signal Voltage Gain (Note 3) A

VOL

25 - 10

RL = 10kΩ, VO = ±4V 25 135 150 -dB

- Ω

0 to 70 130 --dB Output Voltage Swing (Note 4) V

OUT

RL = 10kΩ 25 ±4.7 ±4.85 - V RL = 100kΩ 25 - ±4.95 - V

Common Mode Voltage Range (Note 3) CMVR 25 -5 -5.2 to +4 3.5 V

0 to 70 -5 - 3.5 V

Common Mode Rejection Ratio

(Note 3)

CMRR CMVR = -5V to +3.5V 25 120 140 -dB

0 to 70 120 --dB Power Supply Rejection Ratio PSRR VS = ±3V to ±8V 25 120 140 -dB Input Noise Voltage e

RS = 100Ω,

25 - 2 - µV

P-P

f = DC to 10Hz

Input Noise Current i

f = 10Hz 25 - 0.01 - pA/√Hz Gain Bandwidth Product GBWP 25 - 2 - MHz Slew Rate SR CL = 50pF, RL = 10kΩ 25 - 2.5 - V/µs Rise Time t

25 - 0.2 - µs Overshoot OS 25 - 20 - % Operating Supply Range V+ to V- 25 4.5 - 16 V Supply Current I

SUPP

No Load 25 - 2 3 mA

0 to 70 - - 3.2 mA

Output Source Current I

O SOURCE

25 2.9 4.5 - mA

0 to 70 2.3 - - mA

ICL7650S

Electrical Speciﬁcations V

PARAMETER SYMBOL TEST CONDITIONS

Output Sink Current I

Internal Chopping Frequency f Clamp ON Current (Note 5) RL = 100kΩ 25 25 70 - µA Clamp OFF Current (Note 5) -4V ≤ V

NOTES:

3. These parametersare guaranteedbydesign andcharacterization, butnottested attemperature extremesbecausethermocoupleeffectsprevent precise measurement of these voltages in automatic test equipment.

4. OUTPUT CLAMP not connected. See typical characteristic curves for output swing vs clamp current characteristics.

5. See OUTPUT CLAMP under detailed description.

6. All significant improvements over the industry-standard ICL7650 are highlighted in bold italics.

Test Circuit

1MΩ

ICL7650S

0.1µF 0.1µF

= ±5V. See Test Circuit, Unless Otherwise Speciﬁed (Continued)

SUPPLY

TEMP.

(oC) MIN TYP MAX UNITS

O SINK

Pins 13 and 14 Open 25 120 250 375 Hz

≤ +4V 25 - 0.001 5 nA

OUT

25 25 30 - mA

0 to 70 20 - - mA

0 to 70 - - 10 nA

amplifier necessitates a small AC signal at the input. This is seen by the zeroing circuit as an error signal, which is chopped and fed back, thus injecting sum and diff erence frequencies and causing disturbances to the gain and phase vs frequency characteristics near the chopping frequency. These effects are substantially reduced in the ICL7650S by

OUTPUT

feeding the nulling circuit with a dynamic current, corresponding to the compensation capacitor current, in such a way as to cancel that portion of the input signal due to finite AC gain. Since that is the major error contribution to the ICL7650S, the intermodulation and gain/phase disturbances

Application Information

Detailed Description

are held to very low values, and can generally be ignored.

CAPACITOR CONNECTION

The null/storage capacitors should be connected to the

AMPLIFIER

The functional diagram shows the major elements of the ICL7650S.Thereare twoamplifiers,themainamplifier,andthe nulling amplifier. Both ha v e offset-n ull capability. The main amplifier is connected continuously from the input to the output, while the nulling amplifier, under the control of the chopping oscillator and clock circuit, alternately nulls itself and the main amplifier. The nulling connections , which are MOSFET gates, are inherently high impedance, and two external capacitors provide the required storage of the nulling potentials and the necessary nulling-looptimeconstants.The nulling arrangement operatesoverthe full common-mode and power-supplyranges, and is also independent of the output level, thus giving exceptionally high CMRR, PSRR, and A

VOL

and C

EXTA

pin. This connection should be made directly by

RETN

pins, with a common connection to the

EXTB

either a separate wire or PC trace to avoid injecting load current IR drops into the capacitive circuitry. The outside foil, where available, should be connected to C

RETN

OUTPUT CLAMP

The OUTPUT CLAMP pin allows reduction of the overload recovery time inherent with chopper-stabilized ampliﬁers. When tied to the inverting input pin, or summing junction, a current path between this point and the OUTPUT pin occurs just before the device output saturates. Thus uncontrolled input differentials are avoided, together with the consequent charge buildup on the correction-storage capacitors. The output swing is slightly reduced.

Careful balancing of the input switches, and the inherent balance of the input circuit, minimizes chopper frequency charge injection at the input terminals, and also the feed forward-type injection into the compensation capacitor, which is the main cause of output spikes in this type of circuit.

INTERMODULATION

Previous chopper-stabilized amplifiers have suffered from intermodulation effects between the chopper frequency and input signals. These arise because the finite AC gain of the

CLOCK

The ICL7650S has an internal oscillator, giving a chopping frequency of 200Hz, availableat the CLOCK OUT pin on the 14 pin devices. Provision has also been made f or the use of an external clock in these parts. The INT/

EXT pin has an internal pull-up and may be left open for normal operation, but to utiliz e an external clock this pin must be tied to V- to disable the internal clock. The external clock signal may then be applied to the EXT CLOCK IN pin. An internal divide-by-two provides the

ICL7650S

desired 50% input switching duty cycle. Since the capacitors are charged only when EXT CLOCK IN is high, a 50% - 80% positive duty cycle is recommended, especially for higher frequencies. The external clock can swing betw een V+ and V-. The logic threshold will be at about 2.5V below V+. Note also that a signal of about 400 Hz, with a 70% duty cycle, will be present at the EXT CLOCK IN pin with INT/ This is the internal clock signal before being fed to the divider.

In those applications where a strobe signal is available, an alternate approach to avoid capacitor misbalancing during overload can be used. If a strobe signal is connected to EXT CLK IN so that it is low during the time that the overload signal is applied to the ampliﬁer, neither capacitor will be charged. Since the leakage at the capacitor pins is quite low at room temperature, the typical ampliﬁer will drift less than 10µV/s, and relatively long measurements can be made with little change in offset.

COMPONENT SELECTION

The two required capacitors, C optimum values depending on the clock or chopping frequency. For the preset internal clock, the correct value is

0.1µF, and to maintain the same relationship between the chopping frequency and the nulling time constant this value should be scaled approximately in proportion if an external clock is used. A high quality ﬁlm type capacitor such as mylar is preferred, although a ceramic or other lower-grade capacitor may prove suitable in many applications. For quickest settling on initial turn-on, low dielectric absorption capacitors (such as polypropylene) should be used. With ceramic capacitors, several seconds may be required to settle to 1µV.

STATIC PROTECTION

All device pins are static-protected by the use of input diodes. Howev er, strong static fields and discharges should beavoided, as they can cause degraded diode junction characteristics, which may result in increased input-leakage currents.

LATCHUP AVOIDANCE

Junction-isolated CMOS circuits inherently include a parasitic 4-layer (PNPN) structure which has characteristics similar to an SCR. Under certain circumstances this junction may be triggered into a low-impedance state, resulting in excessive supply current. To avoid this condition, no voltage greater than

0.3V beyond the supply rails should be applied to any pin. In general, the amplifier supplies must be established either at the same time or before any input signals are applied. If this is not possible, the drive circuits must limit input current flow to under 1mA to avoid latchup , even under fault conditions.

EXTA

EXT high or open.

and C

EXTB

, have

proportional to load resistance. For example, the open-loop gain will be 17dB lower with a 1kΩ load than with a 10kΩ load. If the ampliﬁer is used strictly for DC, this lower gain is of little consequence, since the DC gain is typically greater than 120dB even with a 1kΩ load. However, for wideband applications, the best frequency response will be achieved with a load resistor of 10kΩ or higher. This will result in a smooth 6dB/octave response from 0.1Hz to 2MHz, with phase shifts of less than 10 degrees in the transition region where the main ampliﬁer takes over from the null ampliﬁer.

THERMO-ELECTRIC EFFECTS

The ultimate limitations to ultra-highprecisionDCamplifiersare the thermo-electric or Peltier effects arising in thermocouple junctions of dissimilar metals, alloys, silicon, etc. Unless all junctions are at the same temperature, thermoelectric voltages typically around 0.1µV/ materials, will be generated. In order to realize the extremely low offset voltages that the chopper amplifier can provide, it is essential to take special precautions to avoid temper ature gradients. All components should be enclosed to eliminate air movement, especially that caused by po wer-dissipating elements in the system. Low thermoelectric-efficient connections should be used where possible and power supply voltages and power dissipation should be kept to a minim um. High-impedance loads are preferable , and good separation from surrounding heat-dissipating elements is advisable.

GUARDING

Extra care must be taken in the assembly of printed circuit boards to take full advantage of the low input currents of the ICL7650S. Boards must be thoroughly cleaned with TCE or alcohol and blown dry with compressed air. After cleaning, the boards should be coated with epoxy or silicone rubber to prevent contamination.

Even with properly cleaned and coated boards, leakage currents may cause trouble, particularly since the input pins are adjacent to pins that are at supply potentials. This leakage can be signiﬁcantly reduced by using guarding to lowerthe voltagedifferencebetweentheinputsandadjacent metal runs. Input guarding of the 8-pin TO-99 package is accomplished by using a 10-lead pin circle, with the leads of the device formed so that the holes adjacent to the inputs are empty when it is inserted in the board. The guard, which is a conductive ring surrounding the inputs, is connected to a low impedance point that is at approximately the same voltage as the inputs. Leakage currents from high-voltage pins are then absorbed by the guard.

C, but up to tens of mV/oC for some

OUTPUT STAGE/LOAD DRIVING

The output circuit is a high-impedance type (approximately 18kΩ), and therefore with loads less than this value, the chopper ampliﬁer behaves in some ways like a transconductance ampliﬁer whose open-loop gain is

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