Page 1
®
HIN202A, HIN232A
Data Sheet August 2002
High Speed +5V Powered RS-232
Transmitters/Receivers
The HIN202A and HIN232A high-speed RS-232
transmitter/receiver interface circuits meet all ElA highspeed RS-232E and V.28 specifications, and are particularly
suited for those applications where ±12V is not available.
They require a single +5V power supply and feature onboard
charge pump voltage converters which generate +10V and
-10V supplies from the 5V supply.
The drivers feature true TTL/CMOS input compatibility, slew
rate-limited output, and 300Ω power-off source impedance.
The receivers can handle up to ±30V input, and have a 3kΩ
to 7kΩ input impedance. The receivers also feature
hysteresis to greatly improve noise rejection.
Applications
• Any System Requiring High-Speed RS-232
Communication Ports
- Computer - Portable, Mainframe, Laptop
- Peripheral - Printers and Terminals
- Instrumentation, UPS
- Modems
FN4316.8
Features
• Meets All RS-232E and V.28 Specifications
• Requires Only 0.1µF or Greater External Capacitors
• High Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . 230kbit/s
• Requires Only Single +5V Power Supply
• Onboard Voltage Doubler/Inverter
• Low Power Consumption (Typ) . . . . . . . . . . . . . . . . . 5mA
• Multiple Drivers
- ±10V Output Swing for +5V lnput
-300Ω Power-Off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
• Multiple Receivers
- ±30V Input Voltage Range
-3kΩ to 7kΩ Input Impedance
- 0.5V Hysteresis to Improve Noise Rejection
Ordering Information
PART NO.
HIN202ACBN 0 to 70 16 Ld SOIC (N) M16.15
HIN232ACB 0 to 70 16 Ld SOIC M16.3
HIN232ACB-T 0 to 70 Tape and Reel
HIN232ACBN 0 to 70 16 Ld SOIC (N) M16.15
HIN232ACBN-T 0 to 70 Tape and Reel
HIN232ACP 0 to 70 16 Ld PDIP E16.3
TEMP.
RANGE (oC) PACKAGE PKG. NO.
Selection Table
NUMBER OF
PART
NUMBER
HIN202A +5V 2 2 4 Capacitors No/No 0
HIN232A +5V 2 2 4 Capacitors No/No 0
POWER SUPPLY
VOLTAGE
RS-232
DRIVERS
NUMBER OF
RS-232
RECEIVERS
1
NUMBER OF 0.1µF
EXTERNAL
CAPACITORS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
LOW POWER
SHUTDOWN/TTL THREE-
STATE
| Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
NUMBER OF
RECEIVERS ACTIVE
IN SHUTDOWN
Page 2
Pinouts
HIN202A (PDIP, SOIC)
TOP VIEW
HIN202A, HIN232A
HIN232A (PDIP, SOIC)
TOP VIEW
0.1µF
0.1µF
T1
T2
CC
16
V
CC
15
GND
14
T1
OUT
13
R1
IN
12
R1
OUT
11
T1
IN
10
T2
IN
9
R2
OUT
16
0.1µF
+
2
V+
6
V-
0.1µF
+
14
7
T1
T2
OUT
OUT
1
T2
C1+
C2+
OUT
R2
V+
C1-
C2-
V-
1
2
3
4
5
6
7
8
IN
16
V
CC
15
GND
14
T1
OUT
13
R1
IN
12
R1
OUT
11
T1
IN
10
T2
IN
9
R2
OUT
+5V
T2
C1+
C2+
OUT
R2
V+
C1-
C2-
V-
2
3
4
5
6
7
8
IN
+5V
16
V
1
C1+
+
3
4
+
5
11
IN
10
IN
VOLTAGE INVERTER
C1-
C2+
VOLTAGE INVERTER
C2-
+5V
400kΩ
+5V
400kΩ
CC
+5V TO 10V
+10V TO -10V
T1
T2
V+
V-
0.1µF
+
2
6
0.1µF
+
14
7
T1
T2
OUT
OUT
0.1µF
0.1µF
T1
T2
1
C1+
+
3
C1-
4
C2+
+
5
C2-
+5V
400kΩ
11
IN
+5V
400kΩ
10
IN
V
+5V TO 10V
VOLTAGE INVERTER
+10V TO -10V
VOLTAGE INVERTER
T1
T2
R1
R2
OUT
OUT
R1
R2
GND
5kΩ
5kΩ
1312
89
R1
R2
IN
IN
R1
R2
OUT
OUT
R1
R2
5kΩ
5kΩ
1312
89
R1
R2
IN
IN
GND
15
15
2
Page 3
HIN202A, HIN232A
Pin Descriptions
PIN FUNCTION
V
CC
V+ Internally generated positive supply (+10V nominal).
V- Internally generated negative supply (-10V nominal).
GND Ground Lead. Connect to 0V.
C1+ External capacitor (+ terminal) is connected to this lead.
C1- External capacitor (- terminal) is connected to this lead.
C2+ External capacitor (+ terminal) is connected to this lead.
C2- External capacitor (- terminal) is connected to this lead.
T
IN
T
OUT
R
IN
R
OUT
Power Supply Input 5V ±10%.
Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kΩ pull-up resistor to V
Transmitter Outputs. These are RS-232 levels (nominally ±10V).
Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kΩ pull-down resistor to GND is connected to each input.
Receiver Outputs. These are TTL/CMOS levels.
is connected to each lead.
CC
3
Page 4
HIN202A, HIN232A
Absolute Maximum Ratings Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) <VCC < 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . (V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V)
-0.3V) <V+ < 12V
CC
Input Voltages
T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < VIN < (V+ +0.3V)
IN
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
IN
Output Voltages
T
. . . . . . . . . . . . . . . . . . . .(V- -0.3V) < V
OUT
R
. . . . . . . . . . . . . . . . . (GND -0.3V) < V
OUT
TXOUT
RXOUT
< (V+ +0.3V)
< (V+ +0.3V)
Short Circuit Duration
T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
OUT
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
OUT
ESD Classification . . . . . . . . . . . . . . . . . . . . See Specification Table
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications Test Conditions: V
= +5V ±10%, C1-C4 = 0.1µF; TA = Operating Temperature Range
CC
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY CURRENTS
Power Supply Current, I
CC
No Load,
T
= 25oC
A
LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS
Input Logic Low, V
Input Logic High, V
Transmitter Input Pullup Current, I
lL
lH
P
TTL/CMOS Receiver Output Voltage Low, V
TTL/CMOS Receiver Output Voltage High, V
T
IN
T
IN
TIN = 0V - 15 200 µA
OLIOUT
OHIOUT
= 3.2mA - 0.1 0.4 V
= -1mA 3.5 4.6 - V
RECEIVER INPUTS
RS-232 Input Voltage Range, V
Receiver Input Impedance, R
Receiver Input Low Threshold, V
Receiver Input High Threshold, V
Receiver Input Hysteresis, V
IN
IN
(H-L) VCC = 5V,
IN
(L-H) VCC = 5V,
IN
HYST
TA = 25oC, VIN = ±3V 3.0 5.0 7.0 kΩ
T
= 25oC
A
T
= 25oC
A
VCC = 5V, No Hysteresis in Shutdown Mode 0.2 0.5 1.0 V
TIMING CHARACTERISTICS
Transmitter, Receiver Propagation Delay, t
Transition Region Slew Rate, SR
T
PD
RL = 3kΩ, CL = 1000pF, Measured from +3V to 3V or -3V to +3V, (Note 2) 1 Transmitter Switching
TRANSMITTER OUTPUTS
Output Voltage Swing, T
Output Resistance, R
OUT
OUT
RS-232 Output Short Circuit Current, I
SC
Transmitter Outputs, 3kΩ to Ground ±5 ±9 ±10 V
VCC = V+ = V- = 0V, V
T
Shorted to GND - ±10 - mA
OUT
ESD PERFORMANCE
RS-232 Pins
(T
, RIN)
OUT
Human Body Model - ±15 - kV
IEC1000-4-2 Contact Discharge - ±8-kV
IEC1000-4-2 Air Gap (Note 3) - ±15 - kV
Thermal Resistance (Typical, Note 1)
θ
JA
(oC/W)
16 Ld SOIC (N) Package . . . . . . . . . . . . . . . . . . . . . 110
16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . . 100
16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 90
Maximum Junction Temperature (Plastic Package) . . . . . . 150
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range
HIN2XXCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
HIN202A - 8 15 mA
HIN232A - 5 10 mA
--0.8V
2.0 - - V
-30 - +30 V
Active Mode - 1.2 - V
Shutdown Mode
-1.5- V
HIN213A R4 and R5
Active Mode - 1.7 2.4 V
Shutdown Mode
-1.52.4V
HIN213A R4 and R5
-0.510µs
32045V/µs
= ±2V 300 - - Ω
OUT
o
C to 70oC
o
o
C
C
4
Page 5
HIN202A, HIN232A
Electrical Specifications Test Conditions: V
= +5V ±10%, C1-C4 = 0.1µF; TA = Operating Temperature Range (Continued)
CC
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
All Other Pins Human Body Model - ±2-kV
NOTES:
2. Guaranteed by design.
3. Meets level 4.
Test Circuits (HIN232A)
0.1µF
C3
0.1µF
C1
0.1µF
C2
3kΩ
T2
OUTPUT
RS-232
±30V INPUT
-
+
+
-
+
-
+
0.1µF C4
+4.5V TO
+5.5V INPUT
OUT
IN
T1
R1
R2
V
CC
GND
OUT
R1
OUT
T1
T2
OUT
16
15
14
13
IN
12
11
IN
10
IN
9
3kΩ
T1 OUTPUT
RS-232 ±30V INPUT
TTL/CMOS OUTPUT
TTL/CMOS INPUT
TTL/CMOS INPUT
TTL/CMOS OUTPUT
C1+
1
V+
2
C1-
3
C2+
4
C2-
5
-
V-
6
T2
7
8
R2
R
OUT
C1+
1
V+
2
C1-
3
C2+
4
C2-
5
6
V-
T2
7
R2
8
= VIN/I
V
= ±2V
IN
OUT
IN
T1
R1
R2
V
GND
OUT
R1
OUT
T1
T2
OUT
T2
CC
IN
IN
IN
OUT
T1
A
16
15
14
13
12
11
10
9
OUT
FIGURE 1. GENERAL TEST CIRCUIT FIGURE 2. POWER-OFF SOURCE RESISTANCE
VOLTAGE DOUBLER
V
CC
GND
RC
OSCILLATOR
S1
S3
C1+
C1-
S2
+
C1
-
S4
+
C3
V
FIGURE 3. CHARGE PUMP
Detailed Description
The HIN2XXA family of high-speed RS-232
transmitters/receivers are powered by a single +5V power
supply, feature low power consumption, and meet all ElA
RS232C and V.28 specifications. The circuit is divided into
three sections: the charge pump, transmitter, and receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrated in
Figure 3. The charge pump contains two sections: The
voltage doubler and the voltage inverter. Each section is
driven by a two phase, internally generated clock to
generate +10V and -10V. The nominal clock frequency is
125kHz. During phase one of the clock, capacitor C1 is
CC
CONFIGURATION
VOLTAGE INVERTER
V+ = 2V
GND
S5
CC
S7
charged to V
added to V
V
. During phase two, C2 is also charged to 2VCC, and
CC
C2+
CC
, producing a signal across C3 equal to twice
CC
S6
C2-
+
C2
-
S8
+
C4
-
. During phase two, the voltage on C1 is
then during phase one, it is inverted with respect to ground
to produce a signal across C4 equal to -2V
CC
pump accepts input voltages up to 5.5V. The output
impedance of the voltage doubler section (V+) is
approximately 200Ω, and the output impedance of the
voltage inverter section (V-) is approximately 450Ω. A typical
application uses 0.1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, increasing the values of the reservoir capacitors, C3
and C4, lowers the ripple on the V+ and V- supplies.
GND
V- = - (V+)
. The charge
5
Page 6
HIN202A, HIN232A
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic threshold
is about 26% of V
, or 1.3V for VCC = 5V. A logic 1 at the
CC
input results in a voltage of between -5V and V- at the output,
and a logic 0 results in a voltage between +5V and (V+ -0.6V).
Each transmitter input has an internal 400kΩ pullup resistor so
any unused input can be left unconnected and its output
remains in its low state. The output voltage swing meets the
RS-232C specifications of ±5V minimum with the worst case
conditions of: all transmitters driving 3kΩ minimum load
impedance, V
= 4.5V, and maximum allowable operating
CC
temperature. The transmitters have an internally limited output
slew rate which is less than 30V/µs. The outputs are short
circuit protected and can be shorted to ground indefinitely. The
powered down output impedance is a minimum of 300Ω with
±2V applied to the outputs and V
CC
= 0V.
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance even if the power is off
(V
= 0V). The receivers have a typical input threshold of
CC
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The receiver output is 0V
to V
. The output will be low whenever the input is greater
CC
than 2.4V and high whenever the input is floating or driven
between +0.8V and -30V. The receivers feature 0.5V hysteresis
(except during shutdown) to improve noise rejection.
V+
V
GND < T
CC
T
XIN
XIN
V-
< V
400kΩ
CC
300Ω
FIGURE 4. TRANSMITTER
V- < V
T
OUT
TOUT
< V+
V
CC
R
-30V < R
XIN
GND
XIN
< +30V
5kΩ
GND < V
R
OUT
ROUT
< V
CC
FIGURE 5. RECEIVER
T
IN
OR
R
IN
T
OUT
OR
R
OUT
t
PHL
AVERAGE PROPAGATION DELAY =
t
PLH
t
PHL + tPLH
2
V
OL
V
OL
FIGURE 6. PROPAGATION DELAY DEFINITION
Application Information
The HIN2XXA may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where ±12V power supplies are not available for
conventional RS-232 interface circuits. The applications
presented represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 7. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5kΩ resistor
connected to V+.
In applications requiring four RS-232 inputs and outputs
(Figure 8), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
INPUTS
OUTPUTS
TTL/CMOS
C1
0.1µF
C2
0.1µF
+5V
RTS
RD
CTS
TD
16
1
+
3
-
+
-
11
10
12
4
5
9
HIN232A
T1
R2
T2
R1
-
+
CTR (20) DATA
TERMINAL READY
DSRS (24) DATA
6
-
+
14
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVE DATA
8
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)15
SIGNALING RATE
SELECT
RS-232
INPUTS AND OUTPUTS
FIGURE 7. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING
6
Page 7
HIN202A, HIN232A
INPUTS
OUTPUTS
TTL/CMOS
INPUTS
OUTPUTS
TTL/CMOS
C1
0.1µF
C1
0.1µF
DSRS
TD
RTS
RD
CTS
0.2µF
DTR
DCD
R1
C4
+
R1
R1
T2
T2
4
+
C2
5
0.1µF
-
14
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVE DATA
8
CTS (5) CLEAR TO SEND
15
V
16
26
2
CC
-
CC
+5V
RS-232
INPUTS AND OUTPUTS
C3
+
0.2µF
V
16
4
+
C2
5
0.1µF
-
14
DTR (20) DATA TERMINAL READY
7
DSRS (24) DATA SIGNALING RATE SELECT
13
DCD (8) DATA CARRIER DETECT
8
R1 (22) RING INDICATOR
1
+
+
HIN232A
3
-
-
10
-
10
11
12
11
12
9
1
3
9
T1
R2
V- V +
6
HIN232A
T1
R2
FIGURE 8. COMBINING TWO HIN232As FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
Typical Performance Curves
12
10
8
6
4
V- SUPPLY VOLTAGE (V)
2
0
3.5 4.0 4.5 6.0
V
CC
FIGURE 9. V- SUPPLY VOLTAGE vs V
SIGNAL GROUND (7)15
12
0.1µF
5.0 5.53.0
CC
10
8
6
4
SUPPLY VOLTAGE (|V|)
TA = 25oC
2
TRANSMITTER OUTPUTS
OPEN CIRCUIT
0
V- (VCC = 4V)
|I
LOAD
V+ (VCC = 5V)
| (mA)
FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD
V+ (VCC = 4V)
V- (VCC = 5V)
302520151050
35
7
Page 8
Die Characteristics
DIE DIMENSIONS
160 mils x 140 mils
METALLIZATION
Type: Al
Thickness: 10k
SUBSTRATE POTENTIAL
V+
PAS SIVATIO N
Type: Nitride over Silox
Nitride Thickness: 8k
Silox Thickness: 7kÅ
TRANSISTOR COUNT
238
PROCESS
CMOS Metal Gate
Å ±1kÅ
Å
HIN202A, HIN232A
8
Page 9
Dual-In-Line Plastic Packages (PDIP)
HIN202A, HIN232A
N
D1
-C-
E1
-B-
A1
A2
E
A
L
e
C
C
L
e
A
C
e
B
INDEX
AREA
BASE
PLANE
SEATING
PLANE
D1
B1
12 3 N/2
-AD
e
B
0.010 (0.25) C AM BS
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and are measured with the leads constrained to be perpendic-
7. e
e
A
ular to datum .
and eC are measured at the lead tips with the leads unconstrained.
B
e
must be zero or greater.
C
-C-
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A - 0.210 - 5.33 4
A1 0.015 - 0.39 - 4
A2 0.115 0.195 2.93 4.95 -
B 0.014 0.022 0.356 0.558 -
B1 0.045 0.070 1.15 1.77 8, 10
C 0.008 0.014 0.204 0.355 -
D 0.735 0.775 18.66 19.68 5
D1 0.005 - 0.13 - 5
E 0.300 0.325 7.62 8.25 6
E1 0.240 0.280 6.10 7.11 5
e 0.100 BSC 2.54 BSC -
e
A
e
B
0.300 BSC 7.62 BSC 6
- 0.430 - 10.92 7
L 0.115 0.150 2.93 3.81 4
N16 169
NOTESMIN MAX MIN MAX
Rev. 0 12/93
9
Page 10
HIN202A, HIN232A
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
123
SEATING PLANE
-AD
e
B
0.25(0.010) C AM BS
M
E
-B-
A
-C-
0.25(0.010) BM M
H
α
µ
A1
0.10(0.004)
L
h x 45
o
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
M16.3 (JEDEC MS-013-AA ISSUE C)
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.0926 0.1043 2.35 2.65 -
A1 0.0040 0.0118 0.10 0.30 -
B 0.013 0.0200 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 -
D 0.3977 0.4133 10.10 10.50 3
E 0.2914 0.2992 7.40 7.60 4
e 0.050 BSC 1.27 BSC -
H 0.394 0.419 10.00 10.65 -
h 0.010 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N16 167
o
α
0
o
8
o
0
o
8
Rev. 0 12/93
NOTESMIN MAX MIN MAX
-
10
Page 11
HIN202A, HIN232A
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
123
-AD
E
-B-
SEATING PLANE
A
-C-
e
B
0.25(0.010) C AM BS
M
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
0.25(0.010) BM M
H
α
µ
A1
0.10(0.004)
L
h x 45
o
C
FN
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 -
D 0.3859 0.3937 9.80 10.00 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N16 167
o
α
0
o
8
o
0
o
8
Rev. 0 12/93
NOTESMIN MAX MIN MAX
-
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