intersil EL5102, EL5103, EL5202, EL5203, EL5302 DATA SHEET

®

EL5102, EL5103, EL5202, EL5203, EL5302

Data Sheet June 23, 2006

400MHz Slew Enhanced VFAs

The EL5x02 and EL5x03 families represent high-speed VFAs based on a CFA amplifier architecture. This gives the typical high slew rate benefits of a CFA family along with the stability and ease of use associated with the VFA type architecture. With slew rates of 3500V/µs, this family of devices enables the use of voltage feedback amplifiers in a space where the only alternative has been current feedback amplifiers. This family will also be available in single, dual, and triple versions, with 200MHz, 400MHz, and 750MHz versions. These are all available in single, dual, and triple versions.

Both families operate on single 5V or ±5V supplies from minimum supply current. EL5x02 also features an output enable function, which can be used to put the output in to a high-impedance mode. This enables the outputs of multiple amplifiers to be tied together for use in multiplexing applications.

Typical applications for these families will include cable driving, filtering, A-to-D and D-to-A buffering, multiplexing and summing within video, communications, and instrumentation designs.

FN7331.6

Features

• Operates off 3V, 5V, or ±5V applications

• Power-down to 0µA (EL5x02)

• -3dB bandwidth = 400MHz

• ±0.1dB bandwidth = 50MHz

• Low supply current = 5mA

• Slew rate = 3500V/µs

• Low offset voltage = 5mV max

• Output current = 140mA

VOL

= 2000

•A

• Diff gain/phase = 0.01%/0.01°

• Pb-Free plus anneal available (RoHS compliant)

Applications

• Video amplifiers

• PCMCIA applications

•A/D drivers

• Line drivers

• Portable computers

• High speed communications

• RGB applications

• Broadcast equipment

• Active filtering

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

EL5102, EL5103, EL5202, EL5203, EL5302

Ordering Information

PART

PART NUMBER

EL5102IS 5102IS 8 Ld SOIC - MDP0027

EL5102IS-T7 5102IS 8 Ld SOIC 7” MDP0027

EL5102IS-T13 5102IS 8 Ld SOIC 13” MDP0027

EL5102ISZ (See Note)

EL5102ISZ-T7 (See Note)

EL5102ISZ-T13 (See Note)

EL5102IW-T7 q 6 Ld SOT-23 7”

EL5102IW-T7A q 6 Ld SOT-23 7”

EL5102IWZ-T7 (See Note)

EL5102IWZ-T7A (See Note)

EL5103IC-T7 B 5 Ld SC-70 7”

EL5103IC-T7A B 5 Ld SC-70 7”

EL5103IW-T7 g 5 Ld SOT-23 7”

EL5103IWZ-T7 BBTA 5 Ld SOT-23

EL5103IWZ-T7A BBTA 5 Ld SOT-23

EL5202IY BRAAA 10 Ld MSOP - MDP0043 EL5202IY-T7 BRAAA 10 Ld MSOP 7” MDP0043 EL5202IY-T13 BRAAA 10 Ld MSOP 13” MDP0043

EL5202IYZ (See Note)

EL5202IYZ-T7 (See Note)

EL5202IYZ-T13 (See Note)

EL5203IS 5203IS 8 Ld SOIC - MDP0027

EL5203IS-T7 5203IS 8 Ld SOIC 7” MDP0027

EL5203IS-T13 5203IS 8 Ld SOIC 13” MDP0027

EL5203ISZ (See Note)

MARKING PACKAGE

5102ISZ 8 Ld SOIC

(Pb-free)

5102ISZ 8 Ld SOIC

(Pb-free)

5102ISZ 8 Ld SOIC

(Pb-free)

BBSA 6 Ld SOT-23

(Pb-free)

BBSA 6 Ld SOT-23

(Pb-free)

BAAAD 10 Ld MSOP

(Pb-free)

BAAAD 10 Ld MSOP

(Pb-free)

BAAAD 10 Ld MSOP

(Pb-free)

5203ISZ 8 Ld SOIC

(Pb-free)

TAPE &

REEL

13” MDP0027

(3K pcs)

(250 pcs)

(3K pcs)

(250 pcs)

(3K pcs)

(250 pcs)

(3K pcs)

(250 pcs)

13” MDP0043

DWG. #

- MDP0027

7” MDP0027

MDP0038

7”

MDP0038

7”

MDP0038

P5.049

MDP0038

7”

MDP0038

7”

MDP0038

- MDP0043

7” MDP0043

- MDP0027

PKG.

Ordering Information (Continued)

PART

PART NUMBER

EL5203ISZ-T7 (See Note)

EL5203ISZ-T13 (See Note)

EL5203IY BSAAA 8 Ld MSOP - MDP0043 EL5203IY-T7 BSAAA 8 Ld MSOP 7” MDP0043 EL5203IY-T13 BSAAA 8 Ld MSOP 13” MDP0043

EL5203IYZ (See Note)

EL5203IYZ-T7 (See Note)

EL5203IYZ-T13 (See Note)

EL5302IU 5302IU 16 Ld QSOP - MDP0040 EL5302IU-T7 5302IU 16 Ld QSOP 7” MDP0040 EL5302IU-T13 5302IU 16 Ld QSOP 13” MDP0040

EL5302IUZ (See Note)

EL5302IUZ-T7 (See Note)

EL5302IUZ-T13 (See Note)

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020

MARKING PACKAGE

5203ISZ 8 Ld SOIC

(Pb-free)

5203ISZ 8 Ld SOIC

(Pb-free)

BAAAE 8 Ld MSOP

(Pb-free)

BAAAE 8 Ld MSOP

(Pb-free)

BAAAE 8 Ld MSOP

(Pb-free)

5302IUZ 16 Ld QSOP

(Pb-free)

5302IUZ 16 Ld QSOP

(Pb-free)

5302IUZ 16 Ld QSOP

(Pb-free)

TAPE &

REEL

7” MDP0027

13” MDP0027

- MDP0043

7” MDP0043

13” MDP0043

- MDP0040

7” MDP0040

13” MDP0040

PKG.

DWG. #

2

FN7331.6

June 23, 2006

Pinouts

EL5102

(6 LD SOT-23)

TOP VIEW

EL5102, EL5103, EL5202, EL5203, EL5302

EL5103

(5 LD SOT-23)

TOP VIEW

OUT

VS-

IN+

NC

IN-

IN+

VS-

1

2

+-

3

EL5102

(8 LD SOIC)

TOP VIEW

1

2

-

+

3

4

EL5202

(10 LD MSOP)

TOP VIEW

6

VS+

CE

5

4

IN-

VS-

1

2

3

5

VS+OUT

-+ IN-IN+

4

EL5203

(8 LD SOIC, MSOP)

TOP VIEW

8

CE

7

VS+

OUT

6

NC

5

OUTA

INA-

INA+

VS-

1

2

+

3

4

VS+

8

OUTB

7

INB-

6

INB+

+

5

EL5302

(16 LD QSOP)

TOP VIEW

1

OUT

2

IN-

IN+

VS-

CE CE

+

3

4

5 6

10

+

1

VS+

OUT

9

IN-

8

IN+

7

INA+

CEA

2

3

VS-

CEB

4

INB+

5

NC

6

CEC

7

8 9

INC+

16

INA-

-

+

-

+

-

15

14

13

12

11

10

OUTA

VS+

OUTB

INB-

NC

OUTC

INC-

3

FN7331.6

June 23, 2006

EL5102, EL5103, EL5202, EL5203, EL5302

Absolute Maximum Ratings (T

Supply Voltage between V Maximum Supply Slewrate between V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±4V

Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 80mA

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: T

+ and GND . . . . . . . . . . . . . . . . . 13.2V

S

DC Electrical Specifications V

= 25°C)

A

+ and VS- . . . . . . . . . 1V/µs

S

J

= +5V, VS- = -5V, TA = 25°C, RL = 500Ω, V

S+

= TC = T

S

A

Maximum Current into I

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves

+, IN-, CE . . . . . . . . . . . . . . . . . . . . . ±5mA

N

Storage Temperature Range . . . . . . . . . . . . . . . . . . -65°C to +150°C

Ambient Operating Temperature Range . . . . . . . . . . -40°C to +85°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C

ENABLE

= +5V, unless otherwise specified.

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

V

OS

Offset Voltage EL5102, EL5103, EL5202, EL5203 1 5 mV

EL5302 2 8 mV

TCV

OS

IB Input Bias Current V

I

OS

TCI

OS

Offset Voltage Temperature Coefficient Measured from T

= 0V -12 2 12 µA

IN

Input Offset Current V

Input Bias Current Temperature

= 0V -8 1 8 µA

IN

Measured from T

MIN

to T

MAX

10 µV/°C

50 nA/°C

Coefficient

PSRR Power Supply Rejection Ratio V

CMRR Common Mode Rejection Ratio V

= ±4.75V to ±5.25V -70 -80 dB

S

= -3V to 3.0V -60 -80 dB

CM

CMIR Common Mode Input Range Guaranteed by CMRR test -3 ±3.3 3 V

R

IN

C

IN

I

S,ON

I

S,OFF

AVOL Open Loop Gain V

V

OUT

I

OUT

V

-ON CE Pin Voltage for Power-up (VS+)-5 (VS+)-3 V

CE

V

-OFF CE Pin Voltage for Shut-down (VS+)-1 VS+V

CE

I

-ON Pin Current - Enabled CE = 0V -1 0 +1 µA

EN

I

-OFF Pin Current - Disabled CE = +5V 1 14 25 µA

EN

Input Resistance Common mode 200 400 kΩ

Input Capacitance SO package 1 pF

Supply Current - Enabled per amplifier 4.6 5.2 5.8 mA

Supply Current - Shut-down per amplifier VS++10+25µA

V

--257-1µA

S

= ±2.5V, RL = 1kΩ to GND 58 66 dB

OUT

V

= ±2.5V, RL = 150Ω to GND 60 dB

OUT

Output Voltage Swing RL = 1kΩ to GND ±3.5 ±3.9 V

R

= 150Ω to GND ±3.4 ±3.7 V

L

Output Current AV = 1, RL = 10Ω to 0V ±80 ±150 mA

4

FN7331.6

June 23, 2006

EL5102, EL5103, EL5202, EL5203, EL5302

Closed Loop AC Electrical Specifications V

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

= +5V, VS- = -5V, TA = 25°C, V

S+

ENABLE

GND pin, unless otherwise specified. (Note 1)

= +5V, AV = +1, RF = 0Ω, RL = 150Ω to

BW -3dB Bandwidth (V

SR Slew Rate A

t

R,tF

Rise Time, Fall Time ±0.1V step 2.8 ns

OUT

= 400mV

)AV = 1, RF = 0Ω 400 MHz

P-P

= +2, RL = 100Ω, V

V

R

= 500Ω, V

L

OUT

= -3V to +3V 4000 V/µs

= -3V to +3V 1100 2200 5000 V/µs

OUT

OS Overshoot ±0.1V step 10 %

t

S

dG Differential Gain (Note 2) A

dP Differential Phase (Note 2) A

e

N

i

N

t

DIS

t

EN

0.1% Settling Time VS = ±5V, RL = 500Ω, AV = 1, V

= 2, RF = 1kΩ 0.01 %

V

= 2, RF = 1kΩ 0.01 °

V

= ±3V 20 ns

OUT

Input Noise Voltage f = 10kHz 12 nV/√Hz

Input Noise Current f = 10kHz 11 pA/√Hz

Disable Time (Note 3) 50 ns

Enable Time (Note 3) 25 ns

NOTES:

1. All AC tests are performed on a “warmed up” part, except slew rate, which is pulse tested.

2. Standard NTSC signal = 286mV

, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V.RL is DC coupled.

P-P

3. Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply current has reached half its final value.

5

FN7331.6

June 23, 2006

EL5102, EL5103, EL5202, EL5203, EL5302

Typical Performance Curves

5

V

=±5V

S

4

=+1

A

V

R

=0

F

3

=500Ω

R

L

2

C

=+3.3pF

L

1

0

-1

-2

-3

NORMALIZED GAIN (dB)

-4

-5

0.1 1 10 100 1000

-3dB BW @ 438MHz

FREQUENCY (MHz)

240

VS=±5V

=+1

A

180

V

=0

R

F

=500Ω

R

120

L

C

=+3.3pF

L

60

0

PHASE (°)

-60

-120

-180

-240

0.1 1 10 100 1000 FREQUENCY (MHz)

FIGURE 1. GAIN vs FREQUENCY (-3dB BANDWIDTH) FIGURE 2. PHASE vs FREQUENCY

0.5 VS=±5V

0.4

=+1

A

V

0.3

R

=0

F

=500Ω

R

L

0.2

=+3.3pF

C

L

0.1

0

-0.1

-0.2

-0.3

NORMALIZED GAIN (dB)

-0.4

-0.5 1 10 100

FREQUENCY (MHz)

0.1dB BW @ 35MHz

70

V

=±5V

S

=500Ω

R

60

50

40

GAIN (dB)

30

20

L

GAIN=40dB or 100 FREQ.=1.64 MHz GAIN BW PRODUCT=1.64x100=164MHz

0 1 10 100

FREQUENCY (MHz)

FIGURE 3. 0.1dB BANDWIDTH FIGURE 4. GAIN BANDWIDTH PRODUCT

300

VS=±5V R

=500Ω

L

250

200

150

100

GAIN-BANDWIDTH PRODUCT (MHz)

50

2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

SUPPLY VOLTAGES (±V)

FIGURE 5. GAIN BANDWIDTH PRODUCT vs SUPPLY

VOLTAGES

5

VS=±5V

4

R

=500Ω

L

=+3.3pF

C

L

3

2

1

0

-1

-2

-3

NORMALIZED GAIN (dB)

-4

-5

0.1 1 10 100 1000

AV=+5

=1.6K, RG=400

R

F

FREQUENCY (MHz)

AV=+2 R

F=RG

=400Ω

AV=+1 R

=0

F

FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS +A

V

6

FN7331.6

June 23, 2006