International Rrectifier IRS2153DSPbF User Manual

Data Sheet PD No.60238

IRS2153D(S)PbF

SELF-OSCILLATING HALF-BRIDGE DRIVER IC

Features Product Summary

Integrated 600V Half-Bridge Gate Driver

  CT, RT programmable oscillator  15.4V Zener Clamp on VCC  Micropower Startup  Non-latched shutdown on CT pin (1/6th VCC)

Internal bootstrap FET

  Excellent Latch Immunity on All Inputs & Outputs

 +/- 50V/ns dV/dt immunity  ESD Protection on All Pins  8-lead SOIC or PDIP package  1.1 usec (typ.) internal deadtime

Description

The IRS2153D is based on the popular IR2153 selfoscillating half-bridge gate driver IC using a more advanced silicon platform, and incorporates a high voltage half-bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer. HVIC and latch immune CMOS technologies enable rugged monolithic construction. The output driver features a high pulse current buffer stage designed for minimum driver cross-conduction. Noise immunity is achieved with low di/dt peak of the gate drivers.

Typical Connection Diagram

+ AC Rectified Line



VOFFSET 600V Max

Duty Cycle 50%

Driver source/sink

current

Vclamp 15.4V typ.

Deadtime 1.1us typ.

180/260mA typ.

Package

IRS2153DPBF IRS2153DSPBF

PDIP8 SO8

RVCC

CVCC

- AC Rectified Line

VCC

RT

CT

COM

1

RT

2

CT

3

IRS2153D

4

VB

8

HO

7

VS

6

5

LO

CBOOT

MHS

L

RL

MLS

1

IRS2153D(S)PbF

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions.

Parameter

Symbol Definition Min. Max. Units

VB High Side Floating Supply Voltage -0.3 625 V

VS High Side Floating Supply Offset Voltage VB - 25 VB + 0.3 V

VHO High-Side Floating Output Voltage VS – 0.3 VB + 0.3 V

VLO Low-Side Output Voltage -0.3 VCC + 0.3 V

IRT R

VRT R

VCT C

ICC Supply Current (Note 1) --- 20 mA

IOMAX Maximum allowable current at LO and HO due to external

dVS/dt

PD

R

Thermal Resistance, Junction to Ambient, 8-Pin DIP --- 85 ºC/W

θJA

R

Thermal Resistance, Junction to Ambient, 8-Pin SOIC --- 128 ºC/W

θJA

TJ Junction Temperature -55 150

TS Storage Temperature -55 150 ºC

TL Lead Temperature (Soldering, 10 seconds) --- 300

Pin Current -5 5 mA

T

Pin Voltage -0.3 VCC + 0.3 V

T

Pin Voltage -0.3 VCC + 0.3 V

T

-500 500 power transistor Miller effect. Allowable Offset Voltage Slew Rate -50 50 V/ns

Maximum Power Dissipation @ T

≤ +25ºC, 8-Pin DIP

A

≤ +25ºC, 8-Pin SOIC

A

--- 1.0 W

--- 0.625 W

Note 1:

This IC contains a zener clamp structure between the chip V

and COM which has a nominal

CC

breakdown voltage of 15.4V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the V

specified in the Electrical Characteristics section.

CLAMP

2

f

IRS2153D(S)PbF

Recommended Operating Conditions

For proper operation the device should be used within the recommended conditions.

Parameter

Symbol Definition Min. Max. Units

VBS High Side Floating Supply Voltage VCC - 0.7 V

VS Steady State High Side Floating Supply Offset Voltage -3.0 (Note 2) 600 V

VCC Supply Voltage V

ICC Supply Current (Note 3) 5 mA

TJ Junction Temperature -40 125 ºC

CCUV

+0.1V V

+

CC CLAMP

V

CLAMP

V

Note 2:

Note 3:

Care should be taken to avoid output switching conditions where the V ground by more than 5V.

Enough current should be supplied to the clamping the voltage at this pin.

pin of the IC to keep the internal 15.6V zener diode

V

CC

node flies inductively below

S

Recommended Component Values

Parameter

Symbol Component Min. Max. Units

RT Timing Resistor Value 1

CT C

Pin Capacitor Value 330 --- pF

T

---

kΩ

IRS2153D Frequency vs. RT

Frequency (Hz)

1000000

100000

10000

CT Values

330p

470pF

1nF

1000

2.2nF

4.7nF

100

10nF

10

1000 10000 100000 1000000

RT (Ohm)

3

IRS2153D(S)PbF

Electrical Characteristics

VBIAS (VCC, VBS) = 14V, CT = 1 nF, VS=0V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are referenced to COM and are applicable to the respective output leads: HO or LO.

Symbol Definition Min Typ Max Units

Low Voltage Supply Characteristics

V

CC

Floating Supply Characteristics

V

Rising VCC Undervoltage Lockout Threshold 10.2 10.8 11.5

+

CCUV

-

Falling VCC Undervoltage Lockout Threshold 8.3 8.8 9.4 V

CCUV

CCUVHYS

I

QCCUV

VCC Undervoltage Lockout Hysteresis 1.6 2.0 2.4

Micropower Startup V

Supply Current --- 130 170 µA

CC

IQCC Quiescent VCC Supply Current --- 800 1000 µA

ICC VCC Supply Current --- 1.8 --- mA

VCC Zener Clamp Voltage 14.4 15.4 16.8 V ICC = 5mA

CLAMP

I

Quiescent VBS Supply Current --- 60 80 µA

QBS

VBS Supply Undervoltage Positive Going

BSUV+

8.0 9.0 9.5 V

Threshold

Test Conditions

V

≤ V

CC

R

= 36.9kΩ

T

CCUV-

V

VBS Supply Undervoltage negative Going

BSUV-

7.0 8.0 9.0

Threshold

ILK Offset Supply Leakage Current --- --- 50

µA

VB = VS = 600V

Oscillator I/O Characteristics

f

Oscillator Frequency 18.4 19.0 19.6 kHz

OSC

88 93 100

d RT Pin Duty Cycle --- 50 --- %

ICT CT Pin Current ---

I

UV-Mode CT Pin Pulldown Current 0.20 0.30 0.6 mA

CTUV

V

Upper CT Ramp Voltage Threshold --- 9.32 ---

CT+

V

Lower CT Ramp Voltage Threshold --- 4.66 --- V

CT-

V

CT Voltage Shutdown Threshold 2.2 2.3 2.4

CTSD

V

High-Level RT Output Voltage, VCC - VRT --- 10 50 mV I

RT+

0.02

1.0

µA

--- 100 300 mV I

V

Low-Level RT Output Voltage --- 10 50 mV I

RT-

--- 100 300 mV I

V

UV-Mode RT Output Voltage --- 0 100 mV

RTUV

V

SD-Mode RT Output Voltage, VCC - VRT --- 10 50 mV I

RTSD

--- 100 300 mV I

R

= 36.5kΩ

T

R

= 7.15kΩ

T

fo < 100kHz

VCC = 7V

RT = -100µA

RT = -1mA

RT = 100µA

RT = 1mA

V

≤ V

CC

CCUV-

RT = -100µA,

VCT = 0V

RT = -1mA,

VCT = 0V

4

IRS2153D(S)PbF

Electrical Characteristics

VBIAS (V parameters are referenced to COM and are applicable to the respective output leads: HO or LO.

Symbol Definition Min Typ Max Units

Gate Driver Output Characteristics

CC, VBS) = 14V, CT = 1 nF, VS=0V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO)

Test Conditions

VOH High-Level Output Voltage --- VCC --- I

VOL Low-Level Output Voltage --- COM --- I

V

UV-Mode Output Voltage --- COM --- I

OL_UV

tr

Output Rise Time --- 120 220

V

O = 0A

≤ V

CC

,

CCUV-

tf

tsd

td

Output Fall Time --- 50 80 nsec

Shutdown Propagation Delay --- 350 ---

Output Deadtime (HO or LO) 0.65 1.1 1.75

IO+ Output source current --- 180 ---

IO- Output sink current --- 260 ---

µsec

mA

Bootstrap FET Characteristics

VB_ON VB when the bootstrap FET is on --- 13.7 --- V

IB_CAP VB source current when FET is on 40 55 ---

mA

IB_10V VB source current when FET is on 10 12 ---

CBS=0.1uF

VB=10V

5

Lead Definitions

VCC

IRS2153D(S)PbF

VB

1

8

COM

RT

2

CT

3

4

IRS2153D

HO

7

VS

6

LO

5

Lead

Symbol Description

VCC Logic and internal gate drive supply voltage

RT Oscillator timing resistor input

CT Oscillator timing capacitor input

COM IC power and signal ground

LO Low-side gate driver output

VS High voltage floating supply return

HO High-side gate driver output

VB High side gate driver floating supply

Functional Block Diagram

2

RT

R

+

-

R

RQ

+

-

R/2

+

CT

3

-

R/2

M1

DETECT

UV

Q

S

DEAD

Q

S R1 R2

DEAD

TIME

PULSE

GEN

HV LEVEL SHIFT

PULSE FILTER

DELAY

BOOTSTRAP

DRIVE

R

S

15.4V

8

VB

Q

HO

7

6

VS

VCC

1

LO

5

4

COM

6

Timing Diagram

Operating Mode

VCCUV+

VCC

2/3 VCC

VCT

1/3 VCC

1/6 VCC

VCC

Fault Mode: CT <1/6*VCC

IRS2153D(S)PbF

LO

DT

VCC

HO

DT

VCC

VRT

IRT

Switching Time Waveform Deadtime Waverform

90%

HO LO

tr tf

90%

10%

LO

HO

DTLO

90%

10%

DTHO

10%

7

Functional Description

Under-voltage Lock-Out Mode (UVLO)

The under-voltage lockout mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC. The IRS2153D under voltage lock-out is designed to maintain an ultra low supply current of less than 155uA, and to guarantee the IC is fully functional before the high and low side output drivers are activated. During under voltage lock-out mode, the high and low-side driver outputs HO and LO are both low.

Supply voltage

+ AC Rectified Line

RVCC

VCC

1

RT

2

RT

CT

CVCC

- AC Rectified Line

CT

COM

3

IRS2153D

4

Fig. 1 Typical Connection Diagram

Fig. 1 shows an example of supply voltage. The start-up capacitor (C

) minus the start-up current drawn by the IC. This resistor is

(R

VCC

) is charged by current through supply resistor

VCC

chosen to provide sufficient current to supply the IRS2153D from the DC bus. C

should be large enough to hold the voltage at

VCC

Vcc above the UVLO threshold for one half cycle of the line voltage as it will only be charged at the peak, typically 0.1uF. It will be necessary for RVCC to dissipate around 1W.

The use of a two diode charge pump made of DC1, DC2 and CVS (Fig. 2) from the half bridge (VS) is also possible however the above approach is simplest and the dissipation in R not be unacceptably high.

+ AC Rectified Line

VB

8

CBOOT

HO

7

VS

6

LO

5

MHS

L

MLS

RL

should

VCC

IRS2153D(S)PbF

Bootstrap MOSFET

The internal bootstrap FET and supply capacitor (C comprise the supply voltage for the high side driver circuitry. The internal boostrap FET only turns on when LO is high. To guarantee that the high-side supply is charged up before the first pulse on pin HO, the first pulse from the output drivers comes from the LO pin.

Normal operating mode

Once the VCCUV+ threshold is passed, the MOSFET M1 opens, RT increases to approximately VCC (VCC-VRT+) and the external CT capacitor starts charging. Once the CT voltage reaches VCT- (about 1/3 of VCC), established by an internal resistor ladder, LO turns on with a delay equivalent to the deadtime td. Once the CT voltage reaches VCT+ (approximately 2/3 of VCC), LO goes low, RT goes down to approximately ground (VRT-), the CT capacitor discharges and the deadtime circuit is activated. At the end of the deadtime, HO goes high. Once the CT voltage reaches VCT-, HO goes low, RT goes high again, the deadtime is activated. At the end of the deadtime, LO goes high and the cycle starts over again.

The following equation provides the oscillator frequency:

~

This equation can vary slightly from actual measurements due to internal comparator over- and under-shoot delays. For a more accurate determination of the output frequency, the frequency characteristic curves should be used (RT vs. Frequency, Page 3).

Shut-down

If CT is pulled down below an external circuit, CT doesn’t charge up and oscillation stops.

LO is held low and the bootstrap FET is off. Oscillation will resume once CT is able to charge up again to VCT-.

1

CTRTf××453.1

(approximately 1/6 of VCC) by

V

CTSD

BOOT

)

RVCC

CVCC

- AC Rectified Line

RT

CT

COM

VCC

1

RT

2

CT

3

IRS2153D

4

VB

8

CBOOT

HO

7

VS

6

LO

5

MHS

DC2

L

CVS

MLS

DC1

RL

Fig. 2 Charge pump circuit

The supply resistor (R

) must be selected such that enough

VCC

supply current is available over all operating conditions.

Once the capacitor voltage on VCC reaches the start-up threshold VCCUV+, the IC turns on and HO and LO begin to oscillate.

8

)

IRS2153D(S)PbF

19

100

18.8

18.6

18.4

Frequency (k Hz

18.2

18

11 12 13 14 15 16

VCC(V)

FREQ vs VCC

1.4

1.3

1.2

DT(uS)

1.1

1

98

96

94

Frequency (kHz

92

90

-25 0 25 50 75 100 125

Temperatur e(C)

FREQ vs TEMP

1.25

1.15

1.05

DT(uS)

0.95

0.85

0.9

11 12 13 14 15 16

VCC(V)

DT vs VCC

90

80

70

60

50

40

30

Temperature(C)

20

10

0

20 70 120

Frequency (kHz )

Tj vs. Frequency (SOIC)

0.75

-25 0 25 50 75 100 125

Temper ature(C)

DT vs TEMP

17

16

VCC (V)

15

-25 0 25 50 75 100 125

Temperature (°C)

VCC CLAMP vs TEMP

9

300

)

IRS2153D(S)PbF

300

250

200

150

100

HOCurrent (mA

50

0

-25 0 25 50 75 100 125

IsourceHO,IsinkHO vs Temp

IsinkHO

IsourceHO

Temperature( C)

250

200

150

100

LO Curr ent (mA)

50

0

-25 0 25 50 75 100 125

IsourceLO,IsinkLO vs Temp

Isink HO

IsourceLO

Temperature( C)

80

70

60

50

40

30

20

IB_CAP, IBS_10V (mA)

10

0

-25 0 25 50 75 100 125

IB_ CA P

IBS_10V

Temperature(C)

IBCAP, IBS10 V vs TEMP

10

IRS2153D(S)PbF

IRS2153DSPbF

IRS2153DPbF

12

IRS2153D(S)PbF

ORDER INFORMATION

Leadfree Part

8-Lead PDIP IRS2153D order IRS2153DPbF

8-Lead SOIC IRS2153DS order IRS2153DSPbF

233 Kansas St., El Segundo, California 90245, Tel: (310) 726 8000

WORLD HEADQUARTERS:

Sales Offices, Agents and Distributors in Major Cities Throughout the World.

Data and specifications subject to change without notice.

Qualification: Industrial, MSL2 Leadfree

http://www.irf.com

11

International Rrectifier IRS2153DSPbF User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual