International Rrectifier IR3640MPBF User Manual

PD97401

IR3640MPBF

HIGH FREQUENCY SYNCHRONOUS PWM BUCK CONTROLLER

Features

• 4.5V to 5.5V external supply

• Wide Input voltage from 1.5V to 24V

• Output voltage range: 0.7V to 0.9*Vin

• Programmable switching frequency up to 1.5MHz

• Programmable Soft-start

• Hiccup mode over current protection using Rds(on) sensing

• Programmable OCP

• Reference voltage 0.7V (+/-1%, 0

C <Tj<125oC)

• Enhanced Pre-bias start up

• Output voltage tracking

• Integrated MOSFET drivers and bootstrap diode

• Operating temp: -40

C <Tj<125oC

• External synchronization

• Power Good output

• Thermal shut down

• Over voltage protection

• Enable Input with voltage monitoring capability

• Pb-Free & Halogen-Free (RoHS Compliant)

• 20 -Lead MLPQ package (3mmx4mm)

Applications

• Point of Load Power Architectures

• Server & Netcom Applications

• Game Consoles

• General DC/DC Converters

Description

The IR3640M is a synchronous Buck PWM controller

designed for performance demanding DC/DC

applications. The single loop voltage mode

architecture simplifies design while delivery precise

output voltage regulation and fast transient response.

Because of its wide input and output voltage range it

can be used in a large variety of point of load

applications within a system and across different

markets.

The part is designed to drive a pair of N-Channel

MOSFETs from 250kHz to 1.5Mhz switching

frequency giving designers the flexibility to optimize

the solution for best efficiency or smallest footprint.

The output voltage can be precisely regulated from as

low as 0.7V within a tolerance of +/-1% over

temperature, line and load variations.

The device also integrates a diversity of features

including; programmable soft start, pre-bias start up,

voltage tracking, external synchronization, enable

input and Power Good output. Fault protection

features include thermal shutdown, over voltage and

over current shutdown and under voltage lock out.

Typical Application

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IR3640MPBF

ABSOLUTE MAXIMUM RATINGS

(Voltages referenced to GND unless otherwise specifie d)

• Vcc and PVcc ……………….….…………….……..……. -0.3V to 8V (Note2)

• Boot ……………………………………..……….…….... -0.3V to 40V

• SW …………………………………………..………..... -4V (100ns), -0.3V(DC) to 31V

• Boot to SW ……..…………………………….…..……... -0.3V to Vcc+0.3V (Note1)

• LDrv to PGND ………………………………….………….. -0.3V to Vcc+0.3V (Note1)

• HDrv to SW ……………………………………….……….. -0.3V to BOOT+0.3V (Note1)

• OCSet ………………………………………….……….. -0.3V to 30V, 30mA

• Input / output Pins …………………………………......... -0.3V to Vcc+0.3V (Note1)

• PGND to GND ……………...…………………………….. -0.3V to +0.3V

• Storage Temperature Range .......................................... -55°C To 150°C

• Junction Temperature Range ......................................... -40°C To 150°C (Note2)

• ESD Classification …………………………….………….. JEDEC Class 1C

• Moisture sensitivity level………………...………………… JEDEC Level 2@260 °C

Note1:

Must not exceed 8V

Note2:

Vcc must not exceed 7.5V for Junction Temperature between -10oC and -40oC

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications are not implied.

Package Information

20-Lead MLPQ

(3x4)mm

Ordering Information

PKG DESIG

PACKAGE

DESCRIPTION

IR3640MTRPbF

PIN COUNT

ΘJA= 36o C/W * ΘJC= 4o C/W

*Exposed pad on underside is connected to a copper pad through vias for 4-layer PCB board design

PARTS PER

REEL

3000

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IR3640MPBF

06/15/2009

Fig. 2. Simplified block diagram of the IR3640

Pin Description

Number

IR3640MPBF

DescriptionPin Name

No ConnectNC1

Output driver for Low-side MOSFETLDrv2

Power GroundPGnd3

Switch NodeSW4

Output driver for High-side MOSFETHDrv5

No ConnectNC6

Supply Voltage for High-side DriverBoot7

User programmable EnableEnable8

Sequence. If it is not used connect to VccSeq9

Inverting Pin of E/AFb10

OVP / PGood SenseVsns11

Output of Error AmplifierComp12

IC GroundGnd13

Set the Switching FrequencyRt14

Soft Start/ShutdownSS/SD15

External Resistor connection to set the Over Current LimitOCset16

Power Good Output. Open DrainPGood17

External Synchronization Sync18

Supply Voltage for IC BiasVcc19

Supply Voltage for Driver sectionPVcc20

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IR3640MPBF

Recommended Operating Conditions

Symbol Definition Min Max Units

Vcc and PVcc Supply voltages 4.5 5.5 V Fs Operating frequency 225 1650 kHz Tj Junction temperature -40 125 oC

Electrical Specifications

Unless otherwise specified, these specification apply over 4.5V<Vcc<5.5V, 0oC<Tj<125oC Typical values are specified at 25

Parameter

SYM

Test Condition

Min

TYP

MAX

Units

Voltage Accuracy

Regulated voltage at Fb VFb 0.7 V

Accuracy

0oC<Tj<125oC

-40

C<Tj<125

C, Note3

-1.0

-2 +2

+1.0

Supply Current

Vcc Supply Current (Standby)

Supply Current

(Dyn)

Vcc Supply current I

Under Voltage Lockout / Enable

Vcc-Threshold-Start Vcc_UVLO_Start Vcc Rising Trip Level 4.06 4.26 4.46

Vcc-Threshold-Stop Vcc_UVLO_Stop Vcc Falling Trip Level 3.76 3.96 4.16

Vcc-Hysteresis Vcc-Hys 0.25 0.3 0.38

Enable Threshold-Start En_UVLO_Start Enable Rising Trip Level 1.14 1.2 1.36

Enable Threshold-Stop En_UVLO_Stop Enable Falling Trip Level 0.9 1.0 1.06

Enable-Hysteresis En_Hys 0.16 0.20 0.25

Icc (Standby) No Switching, Enable low 500

Icc (Dynamic) Vcc=5V, Freq=600kHz,

Vcc=5V, Freq=600kHz,

bias

Enable high, C C

=4.4nF

LOAD_L

Enable high, Cload=Open

LOAD_H

=2.2nF

μA

Enable Leakage Current

Ien Enable=3.3V 18

Oscillator

Rt Voltage

Frequency

Ramp Amplitude Vramp

Ramp Offset Ramp (os)

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Rt=59K

Rt=28.7K

Rt=9.31K

Note4 Note4

μA

0.665 0.7 0.735 V

225 250 275

450 500 550

1350 1500 1650

1.8 Vp-p

0.6 V

kHz

IR3640MPBF

Electrical Specifications

Parameter SYM Test Condition Min TYP MAX Units

Oscillator (cont.)

Min Pulse Width Dmin(ctrl) Note4 50 ns

Max Duty Cycle Dmax Fs=250kHz 92 %

Fixed Off Time Hdrv(off) Note4 130 200 ns

Sync Frequency Range 20% above free running

Sync Pulse Duration 100 200 ns

High 2 Sync Level Threshold

frequency

225 1650 kHz

Low

0.6

Error Amplifier

Input Offset Voltage

Input Bias Current IFb(E/A) -1 +1

Input Bias Current IVp(E/A) -1 +1

Sink Current Isink(E/A) 0.40 0.85 1.2

Source Current Isource(E/A) 8 10 13

Slew Rate SR

Gain-Bandwidth Product DC Gain Gain

Maximum Voltage Vmax(E/A) Vcc=4.5V 3.4 3.5 3.7 V

Minimum Voltage Vmin(E/A)

Seq Common Mode Voltage

Vos Vfb-Vseq

GBWP

Seq

Vseq=0.8V

Note4 Note4 Note4

Note4

-10 0 +10 mV

7 12 20

20 30 40 MHz

100 110 120 dB

120 220 mV

0 1 V

V/μs

Soft Start/SD

Soft Start Current ISS Source 14 20 26

μA

Soft Start Clamp Voltage Shutdown Output Threshold

Vss(clamp) 2.7 3.0 3.3

SD 0.3

Over Current Protection

OCSET Current I

OC Comp Offset Voltage SS off time SS_Hiccup 4096 Cycles

OCSET

OFFSET

Fs=250kHz 20.8 23.6 26.4

Fs=500kHz 43 48.8 54.6

Fs=1500kHz 136 154 172

Note4

-10 0 +10 mV

μA

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IR3640MPBF

Electrical Specifications

Parameter SYM Test Condition Min TYP MAX Units

Thermal Shutdown

Hysteresis

Note4

140

Power Good

Power Good Threshold Delay Comparator Threshold Delay Comparator Hysteresis PGood Voltage Low PG(voltage) I

PGood Comparator Delay Leakage Current I

VPG Vsns Rising 83 88 93 %Vref

SS(Delay) Relative to charge voltage,

2.0 2.1 2.2 V

SS rising

Delay(SShys)

Note4

=-5mA 0.5 V

PGood

260 300 340 mV

PG(Delay) 256/Fs s

0 10 uA

leakage

High Side Driver

Source Impedance R

Sink Impedance R

source

sink

(Hdrv)

Rise Time THdrv(Rise) V

1V to 4V

Fall Time THdrv(Fall) V

4V to 1V

Deadband Time Tdead(L to H) Ldrv going Low to Hdrv going

High, 1V to 1V

SW Bias Current Isw SW=0V, Enable=0V 6

Boot-VSW

=5V, Note4

=5V , Note4

=5V, C

load

=2.2nF

2.0 5.0

1.0 2.5

10 20 45

μA

Low Side Driver

Source Impedance R

Sink Impedance R

source

(Ldrv)

Rise Time TLdrv(Rise) Vcc=5V

Fall Time TLdrv(Fall) Vcc=5V C

Deadband Time Tdead(H to L) Hdrv going Low to Ldrv going

Vcc=5V, Note4 Vcc=5V, Note4

=4.4nF 1V to 4V

load

=4.4nF 4V to 1V 40

load

1.0 2.5

0.4 1.0

10 20 45

High, 1V to 1V

Over Voltage Protection

OVP Trip Threshold

OVP(trip)_Vref 110 115 120 %Vref

OVP Fault Prop Delay OVP(delay) 150 ns

Bootstrap Diode

Forward Voltage

I(Boot)=30mA 180 260 470 mV

Note3: Cold temperature performance is guaranteed via correlation using statistical quality control. Not tested in production Note4: Guaranteed by Design, but not tested in production

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IR3640MPBF

TYPICAL OPERATING CHARACTERISTICS: (-40oC - 125oC) Fs= 500 kHz

Icc(Stand by)

300

280

260

240

[uA]

220

200

180

-40 -20 0 20 40 60 80 100 120

Temp[ oC]

25 24 23 22 21 20

[mA]

19 18 17 16 15

-40-200 204060 80100120

Ic(Dyn)

Temp[oC]

Vfb

716

711

706

701

[mV]

696

691

686

-40 -20 0 20 40 60 80 100 120

510 508 506 504 502

500

[kHz]

498 496 494

492 490

-40 -20 0 20 40 60 80 100 120

4.40

4.35

4.30

4.25

4.20

[V]

4.15

4.10

4.05

4.00

-40 -20 0 20 40 60 80 100 120

Temp[oC]

FREQUENCY

Temp[oC]

Vcc(UVLO) Star t

Tem p[oC]

ISS

[uA]

-40 -20 0 20 40 60 80 100 120

50.6

50.4

50.2

50.0

49.8

49.6

[uA]

49.4

49.2

49.0

48.8

48.6

-40 -20 0 20 40 60 80 100 120

4.10

4.05

4.00

3.95

3.90

[V]

3.85

3.80

3.75

3.70

-40 -20 0 20 40 60 80 100 120

Temp [oC]

IOCSET(500k Hz)

Tem p[oC]

Vcc(UVLO) Stop

Temp[ oC]

[V]

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Enable(UVLO) Start

1.36

1.34

1.32

1.30

1.28

1.26

1.24

1.22

1.20

1.18

1.16

1.14

-40-20 0 20406080100120

Temp[oC]

Enable(UVLO) Stop

1.06

1.04

1.02

1.00

0.98

[V]

0.96

0.94

0.92

0.90

-40 -20 0 20 40 60 80 100 120

Tem p[oC]

IR3640MPBF

Circuit Description

THEORY OF OPERATION

Introduction

The IR3640 uses a PWM voltage mode control scheme with external compensation to provide good noise immunity and maximum flexibility in selecting inductor values and capacitor types.

The switching frequency is programmable from 250kHz to 1.5MHz and provides the capability of optimizing the design in terms of size and performance.

IR3640 provides precisely regulated output voltage programmed via two external resistors from 0.7V to 0.9*Vin.

The IR3640 operates with an external bias supply from 4.5V to 5.5V, allowing an extended operating input voltage range from 1.5V to 24V.

The device utilizes the on-resistance of the low side MOSFET as current sense element, this method enhances the converter’s efficiency and reduces cost by eliminating the need for external

current sense resistor

If the input to the Enable pin is derived from the bus voltage by a suitably programmed resistive divider, it can be ensured that the IR3640 does not turn on until the bus voltage reaches the desired level. Only after the bus voltage reaches or exceeds this level will the voltage at Enable pin exceed its threshold, thus enabling the IR3640. Therefore, in addition to being a logic input pin to enable the IR3640, the Enable feature, with its precise threshold, also allows the user to implement an Under-Voltage Lockout for

the bus voltage V

for high output voltage applications, where we might want the IR3640 to be disabled at least

until V

exceeds the desired output voltage level.

. This is desirable particularly

Under-Voltage Lockout and POR

The under-voltage lockout circuit monitors the input supply Vcc and the Enable input. It assures that the MOSFET driver outputs remain in the off state whenever either of these two signals drop below the set thresholds. Normal operation resumes once Vcc and Enable rise above their thresholds.

The POR (Power On Ready) signal is generated when all these signals reach the valid logic level (see system block diagram). When the POR is asserted the soft start sequence starts (see soft start section).

Enable

The Enable features another level of flexibility for start up. The Enable has precise threshold which is internally monitored by Under-Voltage Lockout (UVLO) circuit. Therefore, the IR3640 will turn on only when the voltage at the Enable pin exceeds this threshold, typically, 1.2V.

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Fig. 3a: Normal Start up, Device turns on

when the Bus voltage reaches 10.2V

Figure 3b shows the recommended start-up sequence for the non-sequenced operation of IR3640, when Enable is used as a logic input.

Fig. 3b: Recommended startup sequence,

Non-Sequenced operation

(

Figure 3c shows the recommended startup sequence for sequenced operation of IR3640 with Enable used as logic input.

Fig. 3c. Recommended startup sequence,

Sequenced operation

Pre-Bias Startup

IR3640 is able to start up into pre-charged output, which prevents oscillation and disturbances of the output voltage.

The output starts in asynchronous fashion and keeps the synchronous MOSFET off until the first gate signal for control MOSFET is generated. Figure 4 shows a typical Pre-Bias condition at start up.

The synchronous MOSFET always starts with a narrow pulse width and gradually increases its duty cycle with a step of 25%, 50%, 75% and 100% until it reaches the steady state value. The number of these startup pulses for the synchronous MOSFET is internally programmed. Figure 5 shows a series of 32, 16, 8 startup pulses.

IR3640MPBF

Fig. 5. Pre-Bias startup pulses

Soft-Start

The IR3640 has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. To ensure correct start-up, the soft-start sequence initiates when the Enable and Vcc rise above their UVLO thresholds and generate the Power On Ready (POR) signal. The internal current source (typically 20uA) charges the external capacitor C

linearly from 0V to 3V. Figure 6 shows the

waveforms during the soft start.

The start up time can be estimated by:

)

*0.7-1.4

T =

start

During the soft start the OCP is enabled to protect the device for any short circuit and over current condition.

The SS pin can be used as shutdown signal, pulling low this pin will result to turning off the high side driver and turning on the low side driver.

A20

(1) --

Fig. 4. Pre-Bias startup

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Fig. 6. Theoretical operation waveforms

during soft-start

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