n Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
n Undervoltage lockout
n Programmable oscillator frequency
f =
1.4 (R150 ) C
nMatched propagation delay for both channels
n Micropower supply startup current of 125 µA typ.
n Low side output in phase with R
1
×+×
Ω
TT
T
Description
The IR2155 is a high voltage, high speed, self-oscillating power MOSFET and IGBT driver with both high
and low side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction. The front end features a programmable oscillator which is similar to the
555 timer. The output drivers feature a high pulse current buff er stage and an internal deadtime designed f or
minimum driver cross-conduction. Propagation dela ys
for the two channels are matched to simplify use in
50% duty cycle applications. The floating channel can
be used to drive an N-channel power MOSFET or IGBT
Product Summary
V
OFFSET
Duty Cycle50%
IO+/-210 mA / 420 mA
V
OUT
Deadtime (typ.)1.2 µs
600V max.
10 - 20V
Package
in the high side configuration that operates off a high
voltage rail up to 600 volts.
Typical Connection
up to 600V
V
CC
R
T
C
T
V
HO
V
LOCOM
B
S
TO
LOAD
ONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-199
C
Page 2
IR2155
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Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
ParameterValue
SymbolDefinitionMin.Max.Units
V
B
V
S
V
HO
V
LO
V
RT
V
CT
I
CC
I
RT
dVs/dtAllowable Offset Supply Voltage Transient—50V/ns
P
D
R
θJA
T
J
T
S
T
L
High Side Floating Supply Voltage-0.3625
High Side Floating Supply Offset VoltageVB - 25VB + 0.3
High Side Floating Output VoltageVS - 0.3V
Low Side Output Voltage-0.3VCC + 0.3
RT V oltage-0.3VCC + 0.3
CT Voltage-0.3V
Supply Current (Note 1)—25
RT Output Current-55
Package Power Dissipation @ TA ≤ +25°C(8 Lead DIP)—1.0
(8 Lead SOIC)—0.625
Thermal Resistance, Junction to Ambient(8 Lead DIP)—125
(8 Lead SOIC)—200
Junction Temperature—150
Storage Temperature-55150°C
Lead Temperature (Soldering, 10 seconds)—300
CC
B
+ 0.3
+ 0.3
mA
°C/W
V
W
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V
SymbolDefinitionMin.Max.Units
V
B
V
S
V
HO
V
LO
I
CC
T
A
Note 1:Because of the IR2155’s application specificity toward off-line supply systems, this IC contains a zener clamp
B-200 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
High Side Floating Supply Absolute VoltageVS + 10VS + 20
High Side Floating Supply Offset Voltage—600
High Side Floating Output VoltageV
Low Side Output Voltage0V
Supply Current (Note 1)—5mA
Ambient Temperature-40125°C
structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip V
to COM) and allowing the internal zener clamp circuit to deter mine the nominal supply voltage. There-
V
CC
fore, this circuit should not be driven by a DC, low impedance power source of greater than V
offset rating is tested with all supplies biased at 15V differential.
S
ParameterValue
S
and the rectified line voltage and a local decoupling capacitor from
CC
V
B
CC
CLAMP
V
.
Page 3
Dynamic Electrical Characteristics
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V
(VCC, VBS) = 12V, CL = 1000 pF and TA = 25°C unless otherwise specified.
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-201
Page 4
IR2155
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Functional Block Diagram
R
R
T
RQ
+
R
C
T
-
+
R
Lead Definitions
Lead
SymbolDescription
R
T
C
T
V
B
HOHigh side gate dri ve output
V
S
V
CC
LOLow side gate drive output
COMLow side return
Oscillator timing resistor input,in phase with LO for normal IC operation
Oscillator timing capacitor input, the oscillator frequency according to the following equation:
where 150Ω is the effective impedance of the RT output stage
High side floating supply
High side floating supply return
Low side and logic fixed supply
SQ
UV
DETECT
f =
×+×
1.4 (R150 ) C
HV
LEVEL
SHIFT
TIME
PULSE
DEAD
TIME
GEN
DEAD
1
Ω
TT
UV
DETECT
PULSE
FILTER
DELAY
R
R
S
15.6V
V
B
Q
HO
V
S
V
CC
LO
COM
Lead Assignments
B-202 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
8 Lead DIP
IR2155
Page 5
Device Information
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Process & Design RuleHVDCMOS 4.0 µm
Transistor Count260
Die Size88 X 92 X 26 (mil)
Die Outline
Thickness of Gate Oxide800Å
ConnectionsMaterialPoly Silicon
FirstWidth4 µm
LayerSpacing6 µm
Thickness5000Å
MaterialAl - Si (Si: 1.0% ±0.1%)
SecondWidth6 µm
LayerSpacing9 µm
Thickness20,000Å
Contact Hole Dimension8 µm X 8 µm
Insulation LayerMaterialPSG (SiO2)
Thickness1.5 µm
PassivationMaterialPSG (SiO2)
Thickness1.5 µm
Method of SawFull Cut
Method of Die BondAblebond 84 - 1
Wire BondMethodThermo Sonic
MaterialAu (1.0 mil / 1.3 mil)
LeadframeMaterialCu
Die AreaAg
Lead PlatingPb : Sn (37 : 63)
Pa ckageTypes8 Lead PDIP / SO-8
MaterialsEME6300 / MP150 / MP190
Remarks:
IR2155
CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-203
Page 6
IR2155
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V
CLAMP
R
(HO)
T
50%
R
(LO)
T
t
r
50%
t
f
90%90%
V
HO
V
+
CCUV
CC
R
T
C
T
LO
DT
HO
90%
10%10%
LO
Figure 1. Input/Output Timing DiagramFigure 2. Switching Time Waveform Definitions
R
T
50%50%
HO
LO
10%
90%
Figure 3. Deadtime Wavefor m Definitions
B-204 CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL
10%
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