International Rrectifier IR2131JS User Manual

FAULT

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Preliminary Data Sheet No. PD60032-N

IR2131

(J)(S)

3 HIGH SIDE AND 3 LOW SIDE DRIVER

Features

• Floating channel designed for bootstrap operation

Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune

• Gate drive supply range from 10 to 20V

• Undervoltage lockout for all channels

• Over-current shutdown turns off all six drivers

• Independent 3 high side & 3 low side drivers

• Matched propagation delay for all channels

• 2.5V logic compatible

• Outputs out of phase with inputs

Description

The IR2131(J)(S) is a high voltage, high speed power
MOSFET and IGBT driver with three independent high
and low side referenced output channels. Proprietary
HVIC technology enables ruggedized monolithic con­struction. Logic inputs are compatible with CMOS or
LSTTL outputs, down to 2.5V logic. A current trip func­tion which terminates all six outputs can be derived from
an external current sense resistor. A shutdown input is
provided for a customized shutdown function. An open
drain
the shutdowns has occurred. The output drivers fea­ture a high pulse current buffer stage designed for mini­mum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications.
The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration
which operate up to 600 volts.

signal is provided to indicate that any of

Product Summary

V

OFFSET

I

+/- 160 mA / 360 mA

O

V

OUT

t

(typ.) 1.3 & 0.6 µs

on/off

Deadtime (typ.) 700 ns

600V max.

10 - 20V

Packages

28-Lead

SOIC

44-Lead PLCC

w/o 12 Leads

28-Lead PDIP

Typical Connection

(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.

www.irf.com 1

IR2131

HIN1,2,3

LIN1,2,3

FLT-CLR

FAULT

HIN1,2,3

LIN1,2,3

FLT-CLR

FAULT

(J)(S)

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param­eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under
board mounted and still air conditions. Additional Information is shown in Figures 7 through 10.

Parameter Value

Symbol Definition Min. Max. Units

V

B1,2,3

V

S1,2,3

V

HO1,2,3

V

CC

V

SS

V

LO1,2,3

V

IN

V

FLT

dVS/dt Allowable Offset Supply Voltage Transient — 50 V/ns

P

D

Rth

JA

T

J

T

S

T

L

High Side Floating Supply Voltage -0.3 625
High Side Floating Offset Voltage V
High Side Floating Output Voltage V

B1,2,3

S1,2,3

- 25 V

- 0.3 V

B1,2,3
B1,2,3

+ 0.3

+ 0.3

Low Side and Logic Fixed Supply Voltage -0.3 25
Logic Ground VCC - 25 V
Low Side Output Voltage -0.3 V
Logic Input Voltage (

,

,

, SD & ITRIP) VSS - 0.3 V

Output Voltage VSS - 0.3 V

CC
CC

SS

CC

+ 0.3
+ 0.3
+ 15
+ 0.3

Package Power Dissipation @ TA ≤ +25°C (28 Lead DIP) — 1.5

(28 Lead SOIC) — 1.6 W

(44 Lead PLCC) — 2.0

Thermal Resistance, Junction to Ambient (28 Lead DIP) — 83

(28 Lead SOIC) — 78 °C/W

(44 Lead PLCC) — 63
Junction Temperature — 150
Storage Temperature -55 150 °C
Lead Temperature (Soldering, 10 seconds) — 300

V

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to COM. The V
tested with all supplies biased at 15V differential.

Parameter Value

Symbol Definition Min. Max. Units

V

B1,2,3

V

S1,2,3

V

HO1,2,3

V

CC

V

SS

V

LO1,2,3

V

IN

V

FLT

T

A

Note 1: Logic operational for VS of -5V to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode.

2 www.irf.com

High Side Floating Supply Voltage V

S1,2,3

+ 10 V
High Side Floating Offset Voltage Note 1 600
High Side Floating Output Voltage V

S1,2,3

Low Side and Logic Fixed Supply Voltage 10 20
Logic Ground -5 5
Low Side Output Voltage 0 V
Logic Input Voltage (

Output Voltage V

,

,

, SD & ITRIP) V

SS
SS

Ambient Temperature -40 125 °C

offset rating is

S

+ 20

S1,2,3

V

B1,2,3

CC

VSS + 5

V

CC

V

IR2131

FLT-CLR

FLT-CLR

FAULT

FLT-CLR

FAULT

HIN1,2,3

LIN1,2,3

(J)(S)

Dynamic Electrical Characteristics

V

BIAS

(VCC, V

BS1,2,3

) = 15V, V

= VSS = COM, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic

S1,2,3

electrical characteristics are defined in Figures 4 through 5.

Parameter Value

Symbol Definition Min. Typ. Max. Units Test Conditions

t

on

t

off

t

t

itrip

t
t

t

flt,in

t

fltclr

t

sd

DT Deadtime 400 700 1200 V

NOTE: For high side PWM, HIN pulse width must be ≥ 1.5µsec

Turn-On Propagation Delay 0.6 1.3 2.0
Turn-Off Propagation Delay 0.2 0.6 1.0 V
Turn-On Rise Time — 80 150 V

r

t

Turn-Off Fall Time — 40 100

f

ITRIP to Output Shutdown Propagation Delay 400 700 1000 VIN, V
ITRIP Blanking Time — 400 — V

bl

ITRIP to

flt

Indication Delay 400 700 1000 ns V

Input Filter Time (All Six Inputs) — 310 — V

to

Clear Time 400 800 1200 V

SD to Output Shutdown Propagation Delay 400 700 1000 VIN, V

µs

S1,2,3

, V

IN

, VIT, V

IN

= 0 & 5V

IN

= 0 to 600V

= 0 & 5V

ITRIP

= 1V

ITRIP

= 0 & 5V

ITRIP

= 0 & 5V

IN

= 0&5V

FC

= 0 & 5V

SD

= 0 & 5V

IN

Static Electrical Characteristics

V

(VCC, V

BIAS

parameters are referenced to VSS and are applicable to all six logic input leads:
parameters are referenced to COM and V

BS1,2,3

) = 15V, V

= VSS = COM and TA = 25°C unless otherwise specified. The VIN, VTH and I

S1,2,3

and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.

S1,2,3

&

. The VVO and I

IN

O

Parameter Value

Symbol Definition Min. Typ. Max. Units Test Conditions

V
V

V

FCLR,IH

V

FCLR,IL

V

SD,TH+

V

SD,TH-

V

IT,TH+

V

IT,TH-

V

OH

V

I

LK

I

QBS

I

QCC

I

IN+

I

IN-

I

ITRIP+

I

ITRIP-

I

FCLR+

I

FCLR-

I

SD+

I

SD-

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OL

Logic “0” Input Voltage (OUT = LO) 2.2 — —

IH

Logic “1” Input Voltage (OUT = HI) — — 0.8

IL

Logic “0” Fault Clear Input Voltage 2.2 — —
Logic “1” Fault Clear Input Voltage — — 0.8

V

Shutdown Input Positive Going Threshold 1.2 1.8 2.1
Shutdown Input Negative Going Threshold 0.9 1.5 1.8
ITRIP Input Positive Going Threshold 250 485 600
ITRIP Input Negative Going Threshold 200 400 550
High Level Output Voltage, V

- VO — — 100 VIN = 0V, IO = 0A

BIAS

mV

Low Level Output Voltage, VO — — 100 VIN = 5V, IO = 0A
Offset Supply Leakage Current — — 50 VB = VS = 600V
Quiescent VBS Supply Current — 30 100 VIN = 0V or 5V

µA

Quiescent VCC Supply Current — 3.0 4.5 mA VIN = 0V or 5V
Logic “1” Input Bias Current (OUT = HI) — 190 300 VIN = 0V
Logic “0” Input Bias Current (OUT = LO) — 50 100 µA VIN = 5V
“High” ITRIP Bias Current — 75 150 ITRIP = 5V
“Low” ITRIP Bias Current — — 100 nA ITRIP = 0V
Logic “1” Fault Clear Bias Current — 125 250
Logic “0” Fault Clear Bias Current — 75 150 µA
Logic “1” Shutdown Bias Current — 75 150 SD = 5V
Logic “0” Shutdown Bias Current — — 100 nA SD = 0V

= 0V
= 5V