International Rectifier IR2132S, IR2132 Datasheet

Data Sheet No. PD-6.033E

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IR2132

3-PHASE BRIDGE DRIVER

Features

n Floating channel designed for bootstrap operation

Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune

n Gate drive supply range from 10 to 20V
n Undervoltage lockout for all channels
n Over-current shutdown turns off all six drivers
n Independent half-bridge drivers
n Matched propagation delay for all channels
n Outputs out of phase with inputs

Description

The IR2132 is a high voltage, high speed power
MOSFET and IGBT driver with three independent high
and low side referenced output channels . Proprietary
HVIC technology enables ruggedized monolithic con­struction. Logic inputs are compatible with 5V CMOS
or LSTTL outputs. A ground-referenced oper ational
amplifier provides analog feedback of bridge current
via an external current sense resistor. A current tr ip
function which terminates all six outputs is also de­rived from this resistor. An open drain
indicates if an over-current or undervoltage shutdo wn
has occurred. The output drivers feature a high pulse
current buffer stage designed for minimum dri ver
cross-conduction. Propagation delays are matched
to simplify use at high frequencies. The floating chan­nels can be used to drive N-channel power MOSFETs
or IGBTs in the high side configuration which oper­ate up to 600 volts.

FAULT signal

Product Summary

V

OFFSET

IO+/- 200 mA / 420 mA

V

OUT

t

(typ.) 675 & 425 ns

on/off

Deadtime (typ.) 0.8 µs

600V max.

10 - 20V

Packages

Typical Connection

CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-165

IR2132

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Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param­eters are absolute voltages referenced to VS0. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 50 through 53.

Parameter Value

Symbol Definition Min. Max. Units

V

B1,2,3

V

S1,2,3

V

HO1,2,3

V

CC

V

SS

V

LO1,2,3

V

IN

V

FLT

V

CAO

V

CA-

dVS/dt Allowable Offset Supply Voltage Transient — 50 V/ns

P

D

R

θJA

T

J

T

S

T

L

High Side Floating Supply Voltage -0.3 525
High Side Floating Offset Voltage V
High Side Floating Output Voltage V

B1,2,3

S1,2,3

- 25 V

- 0.3 V

B1,2,3
B1,2,3

+ 0.3

+ 0.3

Low Side and Logic Fixed Supply Voltage -0.3 25
Logic Ground VCC - 25 V
Low Side Output Voltage -0.3 V
Logic Input Voltage (

HIN1,2,3 , LIN1,2,3 & ITRIP) V

FAULT Output Voltage V

- 0.3 V

SS

- 0.3 V

SS

Operational Amplifier Output Voltage VSS - 0.3 V
Operational Amplifier Inverting Input Voltage VSS - 0.3 V

CC
CC
CC
CC
CC
CC

+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3
+ 0.3

V

Package Power Dissipation @ TA ≤ +25°C (28 Lead DIP) — 1.5

(28 Lead SOIC) — 1.6 W

(44 Lead PLCC) — 2.0

Thermal Resistance, Junction to Ambient (28 Lead DIP) — 83

(28 Lead SOIC) — 78 °C/W

(44 Lead PLCC) — 63
Junction Temperature — 150
Storage Temperature -55 150 °C
Lead Temperature (Soldering, 10 seconds) — 300

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to VS0. The VS offset rating is tested
with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.

Parameter Value

Symbol Definition Min. Max. Units

V

B1,2,3

V

S1,2,3

V

HO1,2,3

V

CC

V

SS

V

LO1,2,3

V

IN

V

FLT

V

CAO

V

CA-

T

A

Note 1: Logic operational for VS of (VS0 - 5V) to (VS0 + 600V). Logic state held for VS of (VS0 - 5V) to (VS0 - VBS).

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High Side Floating Supply Voltage V

S1,2,3

+ 10 V

S1,2,3

High Side Floating Offset Voltage Note 1 600
High Side Floating Output Voltage V

S1,2,3

V
Low Side and Logic Fixed Supply Voltage 10 20
Logic Ground -5 5
Low Side Output Voltage 0 V
Logic Input Voltage (

Output Voltage V

FAULT

HIN1,2,3 , LIN1,2,3 & ITRIP) V

Operational Amplifier Output Voltage V
Operational Amplifier Inverting Input Voltage V

SS
SS
SS
SS

VSS + 5

Ambient Temperature -40 125 °C

+ 20

B1,2,3

CC

V

CC

5
5

V

Dynamic Electrical Characteristics

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V

BIAS

(VCC, V

BS1,2,3

) = 15V, V

= VSS, CL = 1000 pF and TA = 25°C unless otherwise specified. The dynamic

S0,1,2,3

electrical characteristics are defined in Figures 3 through 5.

Parameter Value

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

t

on

t

off

t
t

t

itrip

t

bl

t

flt

t

flt,in

t

fltclr

DT Deadtime 18 0.4 0.8 1.2 V

SR+ Operational Amplifier Slew Rate (+) 19 4.4 6.2 —

SR- Operational Amplifier Slew Rate (-) 20 2.4 3.2 —

Tur n-On Propagation Delay 11 500 675 850
Tur n-Off Propagation Delay 12 300 425 550 V
Turn-On Rise Time 13 — 80 125 V

r

Tur n-Off Fall Time 14 — 35 55

f

ITRIP to Output Shutdown Prop. Delay 15 4 00 6 60 920 VIN, V
ITRIP Blanking Time — — 400 — V
ITRIP to

Indication Delay 16 335 590 845 V

FAULT

Input Filter Time (All Six Inputs) — — 310 — V

LIN1,2,3

to

Clear Time 17 6.0 9.0 12.0 V

FAULT

Static Electrical Characteristics

V

(VCC, V

BIAS

are referenced to VSS and are applicable to all six logic input leads:
are referenced to V

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

V

IH

V

IL

V

IT,TH+

V

OH

V

OL

I

LK

I

QBS

I

QCC

I

IN+

I

IN-

I

ITRIP+

I

ITRIP-

V

BSUV+

V

BSUV-

V

CCUV+

V

CCUV-

R

on,FLT

BS1,2,3

) = 15V, V

and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.

S0,1,2,3

= VSS and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters

S0,1,2,3

Parameter Value

Logic “0” Input Voltage (OUT = LO) 21 2.2 — —
Logic “1” Input Voltage (OUT = HI) 22 — — 0.8
ITRIP Input Positive Going Threshold 23 400 490 580
High Level Output Voltage, V
Low Level Output Voltage , VO 25 — — 100 VIN = 5V, IO = 0A
Offset Supply Leakage Current 26 — — 50 VB = VS = 600V
Quiescent VBS Supply Current 27 — 15 30 VIN = 0V or 5V
Quiescent VCC Supply Current 28 — 3.0 4.0 mA VIN = 0V or 5V
Logic “1” Input Bias Current (OUT = HI) 29 — 450 650 VIN = 0V
Logic “0” Input Bias Current (OUT = LO) 30 — 225 400 µA VIN = 5V
“High” ITRIP Bias Current 31 — 75 150 ITRIP = 5V
“Low” ITRIP Bias Current 32 — — 10 0 nA ITRIP = 0V
VBS Supply Undervoltage Positiv e Going 33 7.5 8.35 9.2
Threshold
VBS Supply Undervoltage Negative Going 34 7.1 7.95 8.8
Threshold
VCC Supply Undervoltage Positive Going 35 8.3 9.0 9.7
Threshold
VCC Supply Undervoltage Negative Going 3 6 8.0 8.7 9.4
Threshold

FAULT

Low On-Resistance 37 — 55 75 Ω

- VO 24 — — 100 mV VIN = 0V, IO = 0A

BIAS

HIN1,2,3

&

LIN1,2,3. The V

S1,2,3

ns

, V

IN

, V

IN

µs

V/µs

and IO parameters

O

V

µA

V

IR2132

= 0 & 5V

IN

= 0 to 600V

= 0 & 5V

ITRIP

= 1V

ITRIP

= 0 & 5V

ITRIP

= 0 & 5V

IN

= 0 & 5V

ITRIP

= 0 & 5V

IN

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IR2132

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Static Electrical Characteristics -- Continued

V

(VCC, V

BIAS

are referenced to V
are referenced to V

Symbol Definition Figure Min. Typ. Max. Units Test Conditions

I

O+

I

O-

V

OS

I

CA-

CMRR Op. Amp. Common Mode Rejection Ratio 42 60 80 — VS0=V

PSRR Op. Amp. Power Supply Rejection Ratio 43 55 75 — VS0 = V

V

OH,AMP

V

OL,AMP

I

SRC,AMP

I

SRC,AMP

I

O+,AMP

I

O-,AMP

) = 15V, V

BS1,2,3

and are applicable to all six logic input leads:

SS

and are applicable to the respective output leads: HO1,2,3 or LO1,2,3.

S0,1,2,3

= VSS and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters

S0,1,2,3

HIN1,2,3

&

LIN1,2,3

. The V

and IO parameters

O

Parameter Value

Output High Short Circuit Pulsed Current 38 200 250 — VO = 0V, V

Output Low Short Circuit Pulsed Current 39 420 500 — VO = 15V, V

mA

Operational Amplifer Input Offset Voltage 40 — — 30 mV VS0 = V
CA- Input Bais Current 41 — — 4.0 n A V

dB

Op. Amp. High Level Output Voltage 44 5.0 5.2 5.4 V V
Op. Amp. Low Level Output Voltage 45 — — 20 mV V
Op. Amp. Output Source Current 46 2.3 4.0 — V

Op. Amp. Output Sink Current 47 1.0 2.1 — V

Operational Amplifier Output High Short 48 — 4.5 6.5 V

mA

Circuit Current V
Operational Amplifier Output Low Shor t 49 — 3.2 5.2 V

Circuit Current V

PW ≤ 10 µs

PW ≤ 10 µs

CA-

= 2.5V

CA-

=0.1V & 5V

CA-

CA-

VCC = 10V & 20V

= 0V, VS0 = 1V

CA-

= 1V, VS0 = 0V

CA-

= 0V, VS0 = 1V

CA-

V

CAO

= 1V, VS0 = 0V

CA-

V

CAO

= 0V, VS0 = 5V

CA-

CAO

= 5V, VS0 = 0V

CA-

CAO

IN

IN

= 0.2V

= 0.2V

= 4V

= 2V

= 0V

= 5V

= 0V

= 5V

Lead Assignments

28 Lead DIP 44 Lead PLCC w/o 12 Leads 28 Lead SOIC (Wide Body)

IR2132 IR2132J IR2132S

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IR2132

Lead Definitions

Lead

Symbol Description

HIN1,2,3
LIN1,2,3
FAULT

V

CC

ITRIP Input for over-current shutdown
CAO Output of current amplifier
CA- Negative input of current amplifier
V

SS

V

B1,2,3

HO1,2,3 High side gate drive outputs
V

S1,2,3

LO1,2,3 Low side gate drive outputs
V

S0

Logic inputs for high side gate driver outputs (HO1,2,3), out of phase
Logic inputs for low side gate driver output (LO1,2,3), out of phase
Indicates over-current or undervoltage lockout (low side) has occurred, negative logic
Low side and logic fixed supply

Logic ground
High side floating supplies

High side floating supply returns

Low side return and positive input of current amplifier

CONTROL INTEGRATED CIRCUIT DESIGNERS MANUAL B-169

IR2132

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Device Information

Process & Design Rule HVDCMOS 4.0 µm
Transistor Count 700
Die Size 126 X 175 X 26 (mil)
Die Outline

Thickness of Gate Oxide 800Å
Connections Material Poly Silicon

First Width 4 µm
Layer Spacing 6 µm

Second Width 6 µm
Laye r Spacing 9 µm

Contact Hole Dimension 8 µm X 8 µm
Insulation Layer Material PSG (SiO2)

Passivation Material PSG (SiO2)
(1) Thickness 1.5 µm
Passivation Material Proprietary*
(2) Thickness Proprietary*
Method of Saw Full Cut
Method of Die Bond Ablebond 84 - 1
Wire Bond Method Thermo Sonic

Leadframe Material Cu

Pa ckage Types 28 Lead PDIP & SOIC / 44 Lead PLCC

Remarks: * P atent Pending

Thickness 5000Å
Material Al - Si (Si: 1.0% ±0.1%)

Thickness 20,000Å

Thickness 1.5 µm

Material Au (1.0 mil / 1.3 mil)

Die Area Ag
Lead Plating Pb : Sn (37 : 63)

Materials EME6300 / MP150 / MP190

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HIN1,2,3

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LIN1,2,3

IR2132

ITRIP

FAULT

HO1,2,3

LO1,2,3

IR2132

Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage T ransient Test Circuit

HIN1,2,3

50% 50%

HIN1,2,3
LIN1,2,3

50% 50%

LIN1,2,3

LO1,2,3

HO1,2,3

50% 50%

DT DT

HO1,2,3
LO1,2,3

t

r

on

90% 90%

10% 10%

t

off

t

Figure 3. Deadtime Waveform Definitions Figure 4. Input/Output Switc hing Time Waveform

Definitions

LIN1,2,3

ITRIP

FAULT

50%

50% 50%

50%

V

S0

CA-

V

CC

+

­V

SS

t

f

CAO

LO1,2,3

t

flt

t

itrip

Figure 5. Overcurrent Shutdown Switching Time

Waveform Definitions

50%

t

fltclr

Figure 6. Diagnostic Feedback Operational Amplifier

V

SS

Circuit

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