Data Sheet No. PD60017-P
IR2125
(S)
CURRENT LIMITING SINGLE CHANNEL DRIVER
Features
• Floating channel designed for bootstrap operation
Fully operational to +500V
Tolerant to negative transient voltage
dV/dt immune
• Gate drive supply range from 12 to 18V
• Undervoltage lockout
• Current detection and limiting loop to limit driven
power transistor current
• Error lead indicates fault conditions and programs
shutdown time
• Output in phase with input
• 2.5V, 5V and 15V input logic compatible
Description
The IR2125(S) is a high voltage, high speed power
MOSFET and IGBT driver with over-current limiting
protection circuitry. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with
standard CMOS or LSTTL outputs, down to 2.5V
logic. The output driver features a high pulse current
buffer stage designed for minimum driver crossconduction. The protection circuitry detects over-current in the driven power transistor and limits the gate drive voltage. Cycle by cycle shutdown is programmed by an external capacitor which directly controls the time interval
between detection of the over-current limiting conditions and latched shutdown. The floating channel can be used to
drive an N-channel power MOSFET or IGBT in the high or low side configuration which operates up to 500 volts.
Product Summary
V
OFFSET
+/ - 1A / 2A
I
O
V
OUT
V
CSth
t
(typ.) 150 & 150 ns
on/off
Packages
8-Lead PDIP
500V max.
12 - 18V
230 mV
16-Lead SOIC
(Wide Body)
Typical Connection
up to 500V
V
CC
IN
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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V
CC
IN
ERR
COM
V
HO
CS
B
V
S
TO
LOAD
IR2125
(S)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
IN
V
ERR
V
CS
dVs/dt Allowable Offset Supply Voltage Transient — 50 V/ns
P
D
Rth
JA
T
J
T
S
T
L
High Side Floating Supply Voltage -0.3 525
High Side Floating Offset Voltage VB - 25 VB + 0.3
High Side Floating Output Voltage VS - 0.3 V
B
+ 0.3
Logic Supply Voltage -0.3 25 V
Logic Input Voltage -0.3 V
Error Signal Voltage -0.3 V
Current Sense Voltage VS - 0.3 V
Package Power Dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0
(16 lead SOIC) — 1.25
Thermal Resistance, Junction to Ambient (8 lead PDIP) — 125
(16lLead SOIC) — 100
CC
CC
B
+ 0.3
+ 0.3
+ 0.3
W
°C/W
Junction Temperature — 150
Storage Temperature -55 150
°C
Lead Temperature (Soldering, 10 seconds) — 300
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
V
B
V
S
V
HO
V
CC
V
IN
V
ERR
V
CS
T
A
Note 1: L ogic operational for VS of -5 to +500V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
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High Side Floating Supply Voltage VS + 12 VS + 18
High Side Floating Offset Voltage Note 1 50 0
High Side Floating Output Voltage V
S
Logic Supply Voltage 0 18
Logic Input Voltage 0 V
Error Signal Voltage 0 V
Current Sense Signal Voltage V
S
V
B
V
CC
CC
V
B
Ambient Temperature -40 125 °C
IR2125
(S)
Dynamic Electrical Characteristics
V
(VCC, VBS) = 15V, CL = 3300 pF and TA = 25°C unless otherwise specified. The dynamic electrical characteristics
BIAS
are measured using the test circuit shown in Figures 3 through 6.
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
t
on
t
off
t
sd
t
t
t
cs
t
err
Turn-On Propagation Delay 7 — 150 200 VIN = 0 & 5V
Turn-Off Propagation Delay 8 — 200 25 0
ns
ERR Shutdown Propagation Delay 9 — 1. 7 2.2 µs
Turn-On Rise Time 10 — 4 3 60
r
Turn-Off Fall Time 11 — 26 35
f
CS Shutdown Propagation Delay 1 2 — 0.7 1.2
CS to ERR Pull-Up Propagation Delay 13 — 9.0 12 C
ns
µs
VS = 0 to 600V
= 270 pF
ERR
Static Electrical Characteristics
V
(VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
BIAS
COM. The VO and IO parameters are referenced to VS.
Symbol Definition Figure Min. Typ. Max. Units Test Conditions
V
V
V
CSTH+
V
CSTH-
V
V
I
I
QBS
I
QCC
I
I
I
CS+
I
V
BSUV+
V
BSUV-
V
CCUV+
V
CCUV-
I
ERR
I
ERR+
I
ERR-
I
I
OH
OL
LK
IN+
IN-
CS-
O+
O-
L ogic “1” Input Voltage 14 2.2 — —
IH
L ogic “0” Input Voltage 15 — — 0.8
IL
V
CS Input Positive Going Threshold 16 15 0 23 0 32 0
CS Input Negative Going Threshold 17 130 210 300
High L evel Output Voltage, V
Low Level Output Voltage, V
BIAS
O
- V
O
18 — — 100 IO = 0A
19 — — 100 IO = 0A
mV
Offset Supply Leakage Current 20 — — 50 VB = VS = 500V
Quiescent VBS Supply Current 21 — 40 0 1000 VIN = VCS = 0V or 5V
Quiescent VCC Supply Current 22 — 7 00 1200 VIN = VCS = 0V or 5V
Logic “1” Input Bias Current 23 — 4.5 10 µAV
Logic “0” Input Bias Current 24 — — 1.0 VIN = 0V
“High” CS Bias Current 25 — 4.5 10 VCS = 3V
“Low” CS Bias Current 26 — — 1.0 VCS = 0V
VBS Supply Undervoltage Positive Going 27 8.5 9.2 10.0
Threshold
VBS Supply Undervoltage Negative Going 28 7.7 8.3 9 .0
Threshold
VCC Supply Undervoltage Positive Going 2 9 8.3 8.9 9.6
V
Threshold
VCC Supply Undervoltage Negative Going 30 7.3 8.0 8.7
Threshold
ERR Timing Charge Current 31 65 100 130 VIN = 5V, VCS = 3V
µA
ERR Pull-Up Current 32 8.0 15 — VIN = 5V, VCS = 3V
mA
ERR Pull-Down Current 33 16 30 — VIN = 0V
Output High Short Circuit Pulsed Current 34 1.0 1.6 — VO = 0V, V
A
Output L ow Short Circuit Pulsed Current 35 2.0 3.3 — VO = 15V, V
= 5V
IN
ERR < V
ERR > V
PW ≤ 10 µs
PW ≤ 10 µs
ERR+
ERR+
= 5V
IN
= 0V
IN
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IR2125
(S)
Functional Block Diagram
V
ERR
COM
CC
UV
DETECT
UP
IN
1.8V
1.8V
SHUTDOWN
ERROR
TIMING
LATCHED
SHIFTERS
PULSE
GEN
QR
S
PULSE
FILTER
HV
LEVEL
SHIFT
UV
DETECT
PULSE
FILTER
V
B
HV
LEVEL
SHIFT
R
R
S
PULSE
DOWN
SHIFTERS
Q
GEN
PRE
DRIVER
AMPLIFER
500 ns
BLANK
COMPARATOR
BUFFER
0.23V
-
+
Lead Definitions
Symbol Description
V
CC
IN Logic input for gate driver output (HO), in phase with HO
ERR Serves multiple functions; status reporting, linear mode timing and cycle by cycle logic
COM L ogic ground
V
B
HO
V
S
CS
Logic and gate drive supply
shutdown
High side floating supply
High side gate drive output
High side floating supply return
Current sense input to current sense comparator
V
HO
V
CS
B
S
Lead Assignments
1
Vcc
1
CC
V
2
IN
3
ERR
4
COM
8 Lead PDIP
IR2125
HO
CS
B
8
V
7
6
S
V
5
Part Number
2
IN
3
ERR
4
COM
5
6
7
8
16 Lead SOIC (Wide Body)
IR2125S
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VB
HO
CS
VS
16
15
14
13
12
11
10
9
ERR
HO
IR2125
HV=10 to 600V
t
sd
(S)
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IR2125
(S)
500
400
300
200
Max.
Turn-On Delay Time (ns)
Typ.
100
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
500
400
300
Max.
Typ.
200
Turn-On Time (ns)
100
0
10 12 14 16 18 20
Supply Voltage (V)
V
BIAS
Figure 7A. Turn-On Time vs. Temperature Figure 7B. Turn-On Time vs. Voltage
500
400
300
200
Max.
Turn-Off Delay Time (ns)
Typ.
100
500
400
300
Max.
200
Typ.
Turn-Off Time (ns)
100
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
0
10 12 14 16 18 20
Supply Voltage (V)
V
BIAS
Figure 8A. Turn-Off Time vs. Temperature Figure 8B. Turn-Off Time vs. Voltage
5.00
4.00
3.00
Max.
2.00
Typ.
1.00
ERR to Output Shutdown Delay Time (µs)
0.00
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 9A. ERR to Output Shutdown vs. Temperature
5.00
4.00
3.00
2.00
Max.
Typ.
1.00
ERR to Output Shutdown Delay Time (µs)
0.00
10 12 14 16 18 20
Supply Voltage (V)
V
BIAS
Figure 9B. ERR to Output Shutdown vs. Voltage
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