Notice: The Intel
may cause the product to deviate from published specifications. Current characterized errata are
documented in this specification update.
®
Xeon® processor may contain design defects or errors known as errata which
Document Number: 249678-057
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-053• Added S-specs SL8TK, SL8TL, SL8SE and SL8TH. April 2006
-054• Updated Summary Table of Changes.
-055
VersionDescriptionDate
October 2006
• Updated the Software Developer Manual Name.
• Made changes to the DP Platform Population Matrix.
November 2006
-056
-057• Updated Summary Table of Changes. January 2007
• Updated Summary Table of Changes.
December 2006
8Intel® Xeon® Processor Specification Update
Preface
This document is an update to the specifications contained in the documents listed in the following
Affected Documents/Related Documents table. It is a compilation of device and document errata
and specification clarifications and changes, and is intended for hardware system manufacturers
and for software developers of applications, operating system, and tools.
Information types defined in the Nomenclature section of this document are consolidated into this
update document and are no longer published in other documents. This document may also contain
information that has not been previously published.
Affected/Related Documents
Document TitleDocument Number
®
Intel
Xeon® Processor at 1.40 GHz, 1.50 GHz, 1.70 and 2 GHz Datasheet 249665
®
Xeon® Processor with 512 KB L2 Cache at 1.80 GHz to 3.0 GHz Datasheet 298642
Intel
®
Xeon® Processor with 533 MHz Front Side Bus at 2 GHz to 3.20 GHz Datasheet252135
Xeon® Processor at 1.60 GHz, 2.0 GHz, and 2.4 GHz Datasheet273766
Preface
253665, 253666,
253667, 253668 and
253669,
respectively
Nomenclature
S-Spec Number is a five-digit code used to identify products. Products are differentiated by their
unique characteristics, e.g., core speed, L2 cache size, package type, etc., as described in the
processor identification information table. Care should be taken to read all notes associated with
each S-Spec number.
Errata are design defects or errors. Errata may cause the Intel
deviate from published specifications. Hardware and software designed to be used with any given
stepping must assume that all errata documented for that stepping are present on all devices.
Specification Changes are modifications to the current published specifications. These changes
will be incorporated in the next release of the specifications.
Specification Clarifications describe a specification in greater detail or further highlight a
specification’s impact to a complex design situation. These clarifications will be incorporated in
the next release of the specifications.
Documentation Changes include typos, errors, or omissions from the current published
specifications. These changes will be incorporated in the next release of the specifications.
1. The Family corresponds to bits [11:8] of the EDX register after RESET, bits [11:8] of the EAX register after the Processor
Signature instruction is executed with a 1 in the EAX register, and the generation field of the Device ID register accessible
through Boundary Scan.
2. The Model corresponds to bits [7:4] of the EDX register after RESET, bits [7:4] of the EAX registe r after the Processor Signature
2 instruction is executed with a 1 in the EAX register, and the model field of the Device ID register accessible through Bound ary
Scan.
3. The Brand ID corresponds to bits [7:0] of the EBX register after the Processor Signat ure instruct ion is executed with a 1 in the
EAX register.
12Intel® Xeon® Processor Specification Update
Model
2
Brand ID
3
Identification Information
Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX registers
after the Processor Signature instruction is executed with a 2 in the EAX register . Please refer to the
Intel Processor Identification and the Processor Signature Instruction Application Note (AP-485 )
for further information on the Processor Signature instruction.
Table 1. Intel
S-Spec
Number
SL4WXC10F0Ah1.40/400256-KBB0603-pin micro-PGA
SL56GC10F0Ah1.40/400256-KBB0603-pin micro-PGA
SL4WYC10F0Ah1.50/400256-KBB0603-pin micro-PGA
SL4ZTC10F0Ah1.50/400256-KBB0603-pin micro-PGA
SL56NC10F0Ah1.70/400256-KBB0603-pin micro-PGA
SL56HC10F0Ah1.70/400256-KBB0603-pin micro-PGA
SL5TDD00F12h1.50/400256-KBC0603-pin micro-PGA
SL5U6D00F12h1.50/400256-KBC0603-pin micro-PGA
SL5TED00F12h1.70/400256-KBC0603-pin micro-PGA
SL5U7D00F12h1.70/400256-KBC0603-pin micro-PGA
SL5THD00F12h2/400256-KBC0603-pin micro-PGA
SL5U8D00F12h2/400256-KBC0603-pin micro-PGA
SL5Z8B00F24h1.80/400512-KB01603-pin micro-PGA
SL622B00F24h1.80/400512-KB01603-pin micro-PGA
SL5Z9B00F24h2/400512-KB01603-pin micro-PGA
SL623B00F24h2/400512-KB01603-pin micro-PGA
®
Xeon® Processor Identification and Package Information (Sheet 1 of 5)
Core
Stepping
Processor
Signature
Speed
Core/Front
Side Bus
(GHz/MHz)
L2 Size
(Kbytes)
L3 Size
(Kbytes)
Processor
Interposer
Revision
Package and
Revision
interposer with 31 mm
OLGA rev 2.0
interposer with 31 mm
OLGA rev 2.0
interposer with 31 mm
OLGA rev 2.0
interposer with 31 mm
OLGA rev 2.0
interposer with 31 mm
OLGA rev 2.0
interposer with 31 mm
OLGA rev 2.0
interposer with 31 mm
FC-BGA package
interposer with 31 mm
FC-BGA package
interposer with 31 mm
FC-BGA package.0
interposer with 31 mm
FC-BGA package
interposer with 31 mm
FC-BGA package 0
interposer with 31 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
Notes
1, 4
1, 2, 4
1, 4
1, 2, 4
1, 4
1, 2, 4
1, 4
1, 2, 3,
4
1,4
1, 2, 3,
4
1, 3, 4
1, 2, 3,
4
1
1, 2
1
1, 2
Intel® Xeon® Processor Specification Update13
Identification Information
Table 1. Intel® Xeon® Processor Identification and Package Information (Sheet 2 of 5)
S-Spec
Number
SL5ZAB00F24h2.20/400512-KB01603-pin micro-PGA
SL624B00F24h2.20/400512-KB01603-pin micro-PGA
SL687B00F24h2.40/400512-KB01603-pin micro-PGA
SL65TB00F24h2.40/400512-KB01603-pin micro-PGA
SL6ELC10F27H1.80/400512-KB01603-pin micro-PGA
SL6JXC10F27H1.80/400512-KB01603-pin micro-PGA
SL6EMC10F27H2/400512-KB01603-pin micro-PGA
SL6JYC10F27H2/400512-KB01603-pin micro-PGA
SL6ENC10F27H2.20/400512-KB01603-pin micro-PGA
SL6JZC10F27H2.20/400512-KB01603-pin micro-PGA
SL6EPC10F27H2.40/400512-KB01603-pin micro-PGA
SL6K2C10F27H2.40/400512-KB01603-pin micro-PGA
SL6EQC10F27H2.60/400512-KB01603-pin micro-PGA
SL6K3C10F27H2.60/400512-KB01603-pin micro-PGA
SL6M7C10F27H2.80/400512-KB01603-pin micro-PGA
SL6MSC10F27H2.80/400512-KB01603-pin micro-PGA
SL6NPC10F27H2/533512-KB01604-pin micro-PGA
SL6NQC10F27H2.40/533512-KB01604-pin micro-PGA
Core
Stepping
Processor
Signature
Speed
Core/Front
Side Bus
(GHz/MHz)
L2 Size
(Kbytes)
L3 Size
(Kbytes)
Processor
Interposer
Revision
Package and
Revision
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 35 mm
FC-BGA package
interposer with 42.5 mm
FC-PGA2 package
interposer with 42.5 mm
FC-PGA2 package
Notes
1
1, 2
1,2
2
2
2
2
2
2, 5
2, 5
14Intel® Xeon® Processor Specification Update
Identification Information
Table 1. Intel® Xeon® Processor Identification and Package Information (Sheet 3 of 5)