Intel SIM4-02 User Manual

®

INTEL

CORP. 3065 Bowers Avenue, Santa Clara, California 95051 • (408) 246-7501

MICRO

SIM4-02

Nine PROMs board, enabling its own program. SIM4

Hardware Assembler and the MCB4-20 System Interface Control debugging.

(A0750

your

Module provides complete program assembly, simulation

COMPUTER

Hardware

to

A0758)

micro computer

The

Simulator

plug

into

prototype

when used

SYSTEMS

Simulator

the SIM4-02

to simulate and debug

in

conjunction

prototyping

with

the and and

©

Intel

Corporation

DECEMBER 1972

1972

1.0

2.0

3.0

4.0

Introduction

Number

Description

Directives

Systems

CONTENTS

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..........................................

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Page

.

2

5.0

Error Messages

6.0

Operating

6.1

6.2

6.3

6.4

6.5

6.6

6.7

7.0

Jumps

8.0

RAM Usage

9.0

Examples

Instructions

Assemble Program Prepare

Load Program Execute Edit Punch Simulation

to

SI

M4-02 Hardware

Program

New

"BNPF"

of

Page 0

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Simulation

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Tape

................................

Programs

4

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4

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4

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5

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5

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5

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5

7

1.0 INTRODUCTION

The

SIM4-02 Hardware

will provide interactive The

minimum configuration requited with 16 RAMs, itself occupies nine full ROMs.

The

Hardware Simulation Program has

1.

To

simulate

2.

To

allow

process.

These

two keyboard. or

program modifications, and some

A directive directive quired with

test

the

functions

Some

is

identified

is

associated

the

directive,

user

Simulator

control

programs

execution

to

dynamically interact with

are implemented by means

of

the

directives call for

by

a single letter

with

output

the

2.0 NUMBER SYSTEMS

SIM4-02 HARDWARE SIMULATOR

is

a program

over

the

is a SI

up

to

512 bytes (locations)

two

of a test

simulation program will enable

program, tracing its progress, and apprehending gross errors.

of

the

only,

written

debugging

M4-02

basic functions:

typeouts

directives involve

of

the

alphabet

the

typing (or punching) will

of

other

prototype

and/or

of

a set

by

for

the

in

modify

of

directives

the

simulator program,

(except

MCS-4 ™ series Micro

MCSA ™ programs.

card

with

three

4002

length may be accomodated.

his

test

program,

or

commands

some

both

the

typeouts

the

paper

and

arithmetic conversion directives = and It). If

commence

tape

reader

Computer

RAMs and a Teletype. When fully

in

order

which

of

input

response

immediately. If

control,

System. This program

The

hardware simulation program

to

facilitate

the

user

the

directives signal

or

and

wait

types

data.

input

for valid

the

debugging

in

at the

is

allowed

the

input

stuffed

teletype

of

data

the

or

re-

data.

Two

number

gram

counter ROM in

either radix

the

program. Unless so identified, however, all

To

facilitate working bers coded either the

letter N

All

input leading zeroes are implied as necessary. If significant end of register. This may be used bits

in return, a will give unpredictable results, and should be avoided. ded within

radices are standard with

and

instruction location values, chip numbers, and some pointers are handled in decimal for convenience.

instructions,

numbers

the

receiving field,

comma,

the

by

prefixing it with a suitable indentifier

with

as

strings

is

interpreted as a one.

are right-justified into

the

number. Thus,

a space,

input

number

the

hardware simulation program: binary and decimal. Index register values, pro-

accumulator

program tapes

of

to

then

or

value, and one-bit indicators are handled

in

the

ones and zeroes,

the

receiving register

the

if

it

is

attempted

advantage

re-typing

the

letter

strings with no adverse effects.

in

the

number, all as one string

"F",

or

input

"BNPF"

or

as

strings

number

event

in

the

should be

of

case

3.0 DESCRIPTION

The

hardware simulation program allocates a user-selected block

tions

to

be simulated, assigning

ROM, all 16 RAMs

by

the

test

program. registers (equivalent tive banks (with wraparound)

parameter storage

The

program simulator program adds a bias value increment

Another cause this

to

error

interrupt

must

In

to

three

must

be in

to

be tested may have an address anywhere in

outside

the

interrupt

are:

occurs

two

be used.

addition,

RAM

of

sixteen registers each, so

one

range

of in

11111110,

RAM

locations for each simulated

Any

RAM

locations

the

hardware simulation program uses

chips)

to

hold simulation parameters.

block

of

contiguous

to

all addresses

the

simulated ROM, an error

the

event

of

11111111,

which

an illegal instruction

11100011,

in

binary.

("0"

for decimal,

in

the

format,

is

larger

to

an inadvertant error

Rubouts

not

banks and registers within banks.

the

of

"P"s

or

field.

than

load

an

index register

of

the

= directive, with plus

are

Rubouts

of

allocated for program storage

that

if less

the

4096

reference

interrupt

and

all

"8"

for

binary), regardless

radix used

hardware simulation program will

and

"N"s,

If

the

receiving field,

of

digits. A

the

only non

are ignored

RAM

main

ROM

the

RAM

than

locations

the

simulated ROM. If

occurs.

op

code

instructions

in

the

where

the

number

with

the

typein,

status

16 RAMs are used,

during simulated

by typing

number

"numeric"

in

all cases.

memory

location.

characters

is

assumed

of

addressable, ROM, since

with

aPR = 0000

Any

input

corresponding

letter P is

is smaller

the

or

locations

Thus,

than

excess bits are lost

value 20,

typed

minus sign.

may

to

the

in

as in

characters which

to

simulate

be accessed in twelve consecutive be organized as

those

the

program

execution.

except

number

interpreted as a zero, and

many zeroes as may end

allocated

may

of

the

expectations

typeout.

accept

binary

the

receiving field,

from

result will be 4

with

Any

other

may

hold

the

ROM

512

locations

in

the

four

to

the

hardware

attempts

The

op

for

00000000

be

entered

of

num-

the

most-

in

the

there

are

a carriage

characters

be imbed-

instruc-

of

normal

program and

codes

way

RAM

consecu-

to

jump

which

(NaP).

or

A

breakpoint

register which will cause an some

other

types

During'simulated program,

to

assist in checking

4.0 DIRECTIVES

lin

Binary conversion This directive accepts a bers

to

4095) may be accomodated

=n

Decimal This directive accepts a string sum, may be used

Or,s,e

RAM/ROM This directive the are required. current block allocated tions allocated the ROM in access option

Z Zero

This directive not

In

Input This directive accepts a sequence ning with location n. Spaces, commas, returns, and linefeeds may occur with

individual numbers.

used The

Pn,m Punch

This directive at ter location. If Both

Mn,i Memory

This directive accepts a sequence tions, beginning (i

15, goes into register r + 1, digit

are

Dr, n Dump RAM

This directive beginning with register

adder

modulo

current

values will be unchanged. r

likelihood

segment

an out-of-bounds interrupt. e

to

ROM

word

allocated

to

introduce

program

location n (decimaJ), and ending

are altered by this directive. Four inches

the

breakpoint

input

less

than

filled.

is

associated with

interrupt

of

output.

before execution.

execution, a count

out

the

simulated execution mode

The

BREAK key on

is

kept

of

the

number

programs with critical timing problems.

single (decimal) number, and

at

once.

of

(decimal) numbers separated by plus and minus signs, and

4096.

If

the

to

perform binary

chip

assignment

must

be entered before any

values are

If

of

to

typed

any

of

to

ROM.

to

simulated ROM, so improper access. be simulated.

algebraic sum

to

out.

Then,

the

three parameters

The simulation program has

Any

is

negative, 4095

decimal conversion thus: =Bnnnn

other

letter directive. If

or

immediately after

is

omitted,

is

the

(decimal)

the

user

must

If r is

greater

attempt

the

(decimal) ending address

than

to

execute

locations greater than this address will result

to

zeroes.

simulates

to

counter

will punch

the

BREAK

16),

only

The

sequence ends with a carriage return following

types

the

hardware reset function, and clears

program.

a (decimal)

in

register n (decimal, 0-63) and location i (decimal, 0-19).

The

Input

is

terminated

number

in

the

current

out,

in

key

on

register and

Q directive executes a Z each time

of

(binary) numbers and stores

by

a free-standing letter F in

which, like n, becomes

stack level

"BNPF"

with

the

teletype

the

program

of

(decimal) numbers (0-15) and stores

is

altered

format

with location numbers,

location m.

of

leader and trailer are punched on

is

depressed between locations,

counter

main memory locations are filled.

O.

If

the

starting location

out

in decimal

r.

The

the

typeout

contents

may be

of

each

ended

of

operation, allowing

the

teletype

of

simulated machine cycles (i.e., sync pulses) used

types

out

its equivalent

may also be used

in

binary. A maximum

the

user

to

types

is

logically added

the

Q,

three

or

if a RETURN

RAM

register number (0-63) which

no

way

of

preventing

use care

63,

in

selecting a value

the

previous value

to

it

to

give a positive result. This directive

first character after

the 0 is

parameters separated by commas

is

typed

the

test

for

is

used. s

instead

of

the

is

used as

program from accessing

this parameter which will reduce

is

the

starting address

an instruction with an address less than this

of

the

ROM

segment

in

an out-of-bounds interrupt. This directive clears

to

zero all simulated registers, counters, and all RAMs the

parameters are changed.

them

in

consecutive simulated

the

sequence. An ASCII SOH (control

the

new starting address

by

this directive.

the

contents

The

currently

selected program

the

in

the

current

stack level are altered by this directive.

them

If

The

is

a status character

the

terminal delimiter

RAM

location

after

(both

main

prematurely by depressing

to

be simulated.

any

frequency

for

of

the

counter,

the

tape, with an

typeout

sequentially the

starting location

the

one

which goes into register r, digit

(i

greater

than

of

the

memory

the

BREAK key.

or

subsequent instruction bytes.

simulated

will be aborted, with no trailer.

in

last number.

and status)

to

pre-set a location

interrupt execution and

by

the

test

of

12 bits (num-

out

the

algabraic

a space

first parameter,

the

or

lowest

number

Any

comma,

or

spaces

the

in

the

RAM

of

the

will result

program

loca-

the

ROM

locations, begin-

pattern between

ROM

and

the

breakpoint

"F"

after

consecutive

is

in

main

15), only status characters

of

the

A)

may be

beginning

regis-

the

last

RAM

loca-

memory

n registers,

2

A

Accumulator This directive

ing

the

new value

C

Carry/Link This directive may be used

ive

is

the

Xn

Index This directive a space n

is

followed by a space, index register n comma, 2n

and

S

Stack

pointer This directive may be used tion

counter

by

BBl

l

location This directive may be used the

value

E Examine Everything

This directive stack are displayed.

R RAM/ROM selection

This directive may be used after

the R types selection effected as last used

B

Breakpoint This directive may be used will always be the

second

W When

This directive may be used (decimal)

T Trace

This directive causes in

the

current BREAK key, program was never basic

format

pppp:iiiiiiii c aaaa rr

where

pppp being simulated; c index

or

omitted

N Non-trace

This directive

o

Options This directive may be used following significance;

10

1000

may

A will display

to

be

entered,

same as

or

slash,

2n

instructions.

Counter

of

counter

index pair used

on

1

for

may

comma

follows

or

period, index pair

+ 1 are handled

is

the

stack

combines

out

by

an SRC instruction.

interrupted

byte

of a two-byte

used

location

or

an illegal instruction,

of

the

is

the

decimal location

is

instructions which

is

identical

Input,

Output,

on

the

teletype

No

interrupt

Unconditional jumps and

interpretively, permitting

be used

one

interrupted,

trace listing

to

display

in

binary,

or

by a carriage

to

display

A.

to

display

the

X,

together

to

display

pointed

to

display

pointer

No

an 11-bit binary

the

will cause a

the

display

modification

to

display

last

DCl

to

display

before processing

to

display

to

tally

simulation program

counter.

resultant carry/I ink bit; aaaa

in

the

to

the

to

display

and CPU

the

for

subroutine

and/or

the

contents

and/or

all 16 index registers are displayed (in decimal). Otherwise, if

number n may

as a single 8-bit number.)

and/or

to

by this pointer. This

and/or

functions

is

possible.

and/or

number,

instruction, and

and/or

instruction, no

and/or

the

number

If instruction

the

except

insofar as program parameters

is

counter;

instruction. (value,

do

not

reference

T directive,

and/or

test

port

number

stack overflow subroutine direct

alter

the

contents

of

the

simulated accumulator. This

return

to

end

the

alter

the

contents

alter

the

contents

may

be displayed

be displayed (in decimal)

alter

the

contents

alter

the

contents

different

of

T directive will cause

instructions are

register

of

the

C,

A,

modify

the

alter

to

iiiiiiii

except

alter

and

byte

the

of

which

the

least-significant 8 bits represent

the

instruction

breakpoint

the

contents

instruction cycles used during

begin simulated execution

execution

is

the

is

not

index number)

their

respective registers.

that

the

current

then

typing

or

jumps

I/O during checkout.

of

directive.

of

and/or

of

pointer

simulated the

contents

binary representation

the

execution

to

is

of

to

be

S,

l,

R,

most-significant 3 bits represent

pointed

action

of

simulation

the

resultant

option

executed

or

accepting

underflow will

ROM

the

simulated accumulator. A space

or

the

A may be followed

the

simulated Carry/Link bit.

anyone

altered as in A. If

the

incremented by JMS instructions and

the

current

and X directives.

memory

of

will occur during

the

proceeds

directly

page 0 (chip 0) are

or

and/or

subroutine

current

location

chip/location

the

breakpoint

to

by

the

simulated

instruction

of

is

interrupted

program

accumulator

or

registers

Any

status

occur

to

or

without

bits.

when

the

pair

of

the

altered as a unit.

stack pointer.

location

counter.

All

register.

breakpoint.

instruction

sync

cycle

the

test

program, beginning

by a

resume

were

of

the

(first

value; and rr

all

of

the

tracing.

This

is a 4-bit binary

this

bit

data.

when

this

executed

simulated index registers. If

number n is

counter.

four

the

simulation.

breakpoint, where modified while

last

is

The

the

The

Note

program

seleetion. A space

the

command

contents

The

simulated

If

the

breakpoint

simulation.

counter.

it left off,

byte

of

is

the

three

on,

instead

bit

is

on.

directly instread

or

comma

use

of

(decimal)

followed

(Index

current

decremented

that

counters

of

the

This

at

the

keyboard

just

interrupted.

the)

instruction

resultant

numbers

number

of

typing

either

this direct-

number

by

registers

loca-

altering

in

or

comma

line

index pair

execution

points

is

a 12-bit

the

address

as if

the

(decimal)

may

be

with

out

of

follow-

by a

a

the

to

The

the

3