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Intel Q965 User Manual

Intel® Q965 Express Chipset

Development Kit User Manual
October 2007
Order Number: 3156 64-002US

Lega l Li nes and Discl a imers

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHAT SOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELA T ING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Intel may make changes to specifications and product descriptions at any time, without notice. Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the
present e d subject ma tt er. The f urnishing of do cum e nts a nd ot he r materials and info rma ti on do es not pr o vid e any license, expre ss o r impl ied, by es topp el or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See http://www.intel.com/products/processor_number for details.
The Intel® Q965 Express Chipset may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
Hyper-Threading Technology requires a computer system with an Intel® Pentium® 4 processor supporting HT Technology and a HT Technology enabled chipset, BIOS and operating system. Performance will vary depending on the specific hardware and software you use. See http://www.intel.com/
products/ht/Hyperthreading_more.htm for additional information.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling
1-800-548-4725 or by visiting Intel's website at http://www.intel.com. BunnyPeople, Celeron, Celeron Inside, Centrino, Centrino logo, Core Inside, Dialogic, FlashFile, i960, InstantIP, Intel, Intel logo, Intel386, Intel486,
Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Core, Intel Inside, Intel Inside logo, Intel. Leap ahead., Intel. Leap ahead. logo, Intel N etBurst, Intel NetMerge, Intel NetStructure, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel Viiv, I ntel vPro, Intel XScale, IPLink, Itanium, Itanium Inside, MCS, MMX, Oplus, OverDrive, PDCharm, Pentium, Pentium Inside, skoool, Sound Mark, The Journey Inside, VTune, Xeon, and Xeon Inside are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other na m es and bra nds may be claimed as th e pro perty of others . Copyright © 2007, Intel Corporation. All Rights Reserved.
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Intel Q965 Express Chipset—

Contents

1.0 About This Manual .................................................................................................... 7
1.1 Content Overview............................................................................................... 7
1.2 Text Conventions................................................................................................ 7
1.3 Glossary of Terms and Acronyms.......................................................................... 8
1.4 Support Options ................................................................................................11
1.4.1 Electronic Support Systems......................................................................11
1.4.2 Additional Technical Support ....................................................................11
1.5 Product Literature..............................................................................................11
2.0 Development Kit Har dware F eatures........................................................................12
2.1 Overview..........................................................................................................12
2.2 Intel
2.3 Board Layout ....................................................................................................13
2.4 Thermal Considerations......................................................................................24
3.0 Development Kit Software and BIOS Features .........................................................26
3.1 Software Key Features .......................................................................................26
3.2 BIOS Features...................................................................................................26
3.3 Graphics Drivers................................................................................................29
3.4 Intel
3.5 Intel
4.0 Settin g Up & Co nfigu r ing th e Deve lopm e nt Kit.........................................................32
4.1 Overview..........................................................................................................32
4.2 Additional Hardware & Software Required .............................................................33
4.3 Setting Up the Evaluation Board ..........................................................................33
4.4 Audio Subsystem Configurations..........................................................................43
4.5 LAN Subsystem Configurations............................................................................44
4.6 Software Kit Installation .....................................................................................45
®
Q965® Express Chipset Development Kit Features Summary .........................12
2.3.1 Core Components...................................................................................14
2.3.2 Jumper Settings and Descrip tions .............................................................15
2.3.3 LED Descriptions ....................................................................................15
2.3.4 Header and Connector Descriptions...........................................................15
2.3.5 Back Panel Connectors............................................................................ 16
2.3.6 PCI Express* x16 / MEC Slot....................................................................17
2.3.7 PCI Express* x1.....................................................................................20
2.3.8 Front Panel Head er (Power up & Reset) .....................................................21
2.3.9 Front Panel USB Header...........................................................................21
2.3.10 Front Audio Header.................................................................................22
2.3.11 High Definition Audio Header....................................................................22
2.3.12 BTX Power Connectors ............................................................................23
2.3.13 SATA Pinout...........................................................................................24
2.3.14 Fan Connectors......................................................................................24
3.2.1 BIOS Overview.......................................................................................26
3.2.2 Resource Configuration............................................................................27
3.2.3 System Management BIOS (SMBIOS)........................................................27
3.2.4 Legacy USB Support ...............................................................................28
3.2.5 Boot Options ..........................................................................................28
3.2.6 BIOS Security Features ...........................................................................29
®
Active Management Technology .................................................................30
®
Quiet System Technology..........................................................................31
4.3.1 Memory Configurations............................................................................40
4.4.1 Eight-Channel (7.1) Audio Subsystem .......................................................43
4.5.1 Gigabit LAN Subsystem ...........................................................................44
4.5.2 RJ-45 LAN Connector with Integrated LEDs ................................................45
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4.6.1 Installation of a new Operating System.....................................................45
4.6.2 Drivers Installation.................................................................................45
5.0 Error Messages and Beep Codes ..............................................................................46
5.1 Speaker...........................................................................................................46
5.2 BIOS Beep Codes..............................................................................................46
5.3 BIOS Error Messages.........................................................................................46
5.4 Port 80h POST Codes.........................................................................................47

Figures

1 Dev Kit Board Main Components, Headers and Jumper Locations....................................14
2 Rear Panel I/O Connectors ........................................................................................ 17
3 BTX Type I Thermal Module Assembly (TMA) ...............................................................25
4 Menu Bar................................................................................................................26
5 Development Kit Board.............................................................................................32
6 Align the Development Kit Board and SRM...................................................................34
7 Assembled SRM and board........................................................................................35
8 Align the heatsink with holes on the SRM and board .....................................................36
9 Tighten the heatsink on the SRM and board.................................................................37
10 Secure the front side of the heatsink to the SRM..........................................................38
11 Secure the read end of heatsink to the SRM ................................................................39
12 Memory Channel and DIMM Configuration ...................................................................40
13 Dual Channel (Interleaved) Mode Configuration with two DIMMs ....................................41
14 Dual Channel (Interleaved) Mode Configuration with three DIMMs.................................. 41
15 Dual Channel (Interleaved) Mode Configuration with four DIMMs....................................42
16 Single Channel (Asymmetric) Mode Configuration with one DIMM...................................42
17 Single Channel (Asymmetric) Mode Configuration with 3x DIMMs ...................................43
18 Back Panel Audio Conne ctor Options for Eight-channel Audio Subsystem ......................... 43
19 LAN Connector LED locations..................................................................................... 45

Tables

1 Glossary of Terms and Acronyms .................................................................................9
2 Intel Literature Centers.............................................................................................11
3 Development Kit Features Summary...........................................................................12
4 Core Components ....................................................................................................14
5 Jumper Settings....................................................................................................... 15
6 LED Description .......................................................................................................15
7 Header and Connector Descriptions............................................................................ 15
8 Back panel connectors..............................................................................................17
9 Intel® SDVO to PCI Express* connector mapping for MEC cards.....................................18
10 PCI Express* (x1) Pinout .......................................................................................... 20
11 Front Panel Jumper Setting .......................................................................................21
12 Front Panel USB Header............................................................................................21
13 Front Audio Header ..................................................................................................22
14 High Definition Audio Header.....................................................................................22
15 2x12 BTX Power Connector .......................................................................................23
16 2x2 Auxiliary 12V Power Connector ............................................................................ 23
17 SATA Pinout............................................................................................................ 24
18 Fan connectors........................................................................................................24
19 BIOS Setup Program Menu Bar..................................................................................27
20 BIOS Setup Program Function Keys............................................................................27
21 Back panel task (Audio)............................................................................................44
22 LAN Connector LED status.........................................................................................45
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Intel Q965 Express Chipset—
23 Beep codes..............................................................................................................46
24 Lists of error messages and brief description of each.....................................................47
25 Port 80h POST Code Ranges ......................................................................................47
26 Port 80h Progress Code Enumeration ..........................................................................48
27 Typical Port 80h POST Sequence ................................................................................50
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Revision History

Date Revision Description
Octob er 2007 002 October 2006 001 Initi al public rele ase.
Change SDVOB to SDVOC in pins 58, 59, 62 and 63 in Table 9, “Intel® SDVO to PCI Expre ss*
connector mapping for MEC cards” on page 18.
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Intel® Q965 Express Chipset

1.0 About This Manual

This user’s manual describes the use of the Intel® Q965® Express Chipset Development Kit. This manual has been written for OEMs, system evaluators, and embedded system developers. All jumpers, headers, LED functions, and their locations on the board, along with subsystem features and POST codes, are defined in this document.
For the latest information about the Intel reference platform, visit:
Intel Q965 Express Chipset—About This Manual
®
Q965® Express Chipset Development Kit
http://developer.intel.com/design/intarch/devkit/index.htm
For design documents related to this platform, such as schematics and layout, please contact your Intel Representative.

1.1 Content Overview

Chapter 1: “Development Kit Users Manual Content overview” This chapter contains a description of conventions used in this manual. The last few
sections explain how to obtain literature and contact customer support. Chapter 2: “Development Kit Hardware Features” This chapter provides information on the development kit features and the board
capability. This includes the information on board component features, jumper settings, pin-out information for connectors and overall development kit board capability.
Chapter 3: “Development Kit Software and BIOS Features” This chapter provides an overview of development kit software and BIOS features. Chapter 4: “Development Kit Board Setup” This chapter provides instructions on how to configure the evaluation board and
processor assembly by setting jumpers, connecting peripherals, providing power, and configuring the BIOS.
Chapter 5: “Error Messages and Beep Codes” This chapter describes the various progress codes that are reported by the BIOS and
the corresponding LED Codes.

1.2 Text Conventions

The following notations may be used throughout this manual.
# The pound symbol (#) appended to a signal name indicates that
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the signal is active low.
About This Manual—Intel Q965 Express Chipset
Variables Variables are shown in italics. Variables must be replaced with
correct values.
Instructions Instruction mnemonics are shown in uppercase. When you are
programming, instructions are not case-sensitive. You may use either upper-case or lower-case.
Numbers Hexadecimal numbers are represented by a string of
hexadecimal digits foll owed by the character H. A zero prefix is added to numbers that begin with A through F. (For example, FF is shown as 0FFH.) Decimal and binary numbers are represented by their customary notations. (That is, 255 is a decimal number and 1111 1111 is a binary number.) In some cases, the letter B is add ed for cla rit y.
Units of Measure The following abbreviations are used to represent units of
measure: A amps, amperes Gbyte gigabytes Kbyte kilobytes K kilo-ohms mA milliamps, milliamperes Mbyte megabytes MHz megahertz ms milliseconds mW milliwatts ns nanoseconds pF picofarads W watts V volts
μA microamps, microamperes μF microfarads μs microseconds μW microwatts
Signal Names Signal names are shown in uppercase. When several signals
share a common name, an individual signal is represented by the signal name followed by a number, while the group is represented by the signal name followed by a variable (n). For example, the lower chip-select signals are named CS0#, CS1#, CS2#, and so on; they are collectively called CSn#. A pound symbol (#) appended to a signal name identifies an active-low signal. Port pins are represented by the port abbreviation, a period, and the pin number (e.g., P1.0).

1.3 Glossary of Terms and Acronyms

This section defines conventions and terminology used throughout this document.
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Intel Q965 Express Chipset—About This Manual

Table 1. Glossary of Terms and Acronyms (Sheet 1 of 3)

Term Description
Advanced Digital Display Card – second Generation. This card provides digital display
ADD2 Card
ACPI Advanced Configurat ion and Power Interface ASF Alert Standard Format BLT Block Level T ransfer Core The internal base logic in the (G)MCH CRT Cathode Ray Tube DBI Dynamic Bus Inversion DDR2 A second generation Double Data Rate SDRAM memory technology. DMI D irect M edia Interface
DVI
FSB Front Side Bus. FSB is synonymous with Host or processor bus.
Full Reset
GMCH
GMA 3000 Intel® Graphic Medi a Acc e lerator 3000 Host This term is used synonymously with processor. IDER IDE R edirect INTx An interrupt request signal where “x” stands for interrupts A, B, C, and D Intel® 64
Architecture
Intel ® Advanced Digital Media Boost
Intel® AMT Intel
Intel ® Advanced Smart Cache
Intel ® DVO
Intel ® ICH8DO
Intel® QST Intel Intel® Sma rt
Memory Access
options for an Intel Graphics Controller. It plugs into an x16 PCI Express* connector but uses the multiplexed SDVO interface. This Advanced Digital Display Card will not work with an Intel Graphics Controller that supports DVO and ADD cards.
Digital Video Interface. Specification that defines the connector and interface for digital displays.
Full reset is when PWROK is de-asserted. Warm reset is when both RSTIN# and PWROK are asserted.
Graphics Memory Controller Hub component that contains the processor interface, DRAM controller, x16 PCI Express* Graphics port (typically, the external graphics interface), and integrated graphics device (IGD). It communicates with the I/O controller hub (ICH8DO*) and other I/O controller hubs over the DMI interconne ct. In this document GMCH refers to the 82Q965 GMCH compo nent.
Intel® 64 Architecture
1
(Formerly known as Intel® EM64T) enables the proce ssor to
access larger amounts of virtual and physical memory. 128-bit SSE instructions are now issued one per clock cycle effectively doubling their
speed of execution over previous generation processors. This benefits a broad range of applications including video, audio, encryption, engineering and scientific with improved performance.
®
Active Management Technology
The shared L2 cache is allocated to each processor core based on workload up to the full amount of total cache. This is more efficient than today’s dual-core processor . Sharing the cache significantly reduces the time needed to retrieve frequently used data improving performance.
Digital Video Out port. Term used for the first generation of Intel Graphics Controller’s digital display channels. Digital display data is provided in a parallel format. This interface is not electrically compatible with the 2 this document – SDVO.
nd
generation digital display channel discussed in
Eighth generation I/O Controller Hub component that contains additional functionality compared to previous ICHs. The I/O Controller Hub component contains the primary PCI interface, LPC interface, USB2, SATA, and other I/O functions. It communicates with the (G)MCH over a proprietary interconnect called DMI.
®
Quiet System Technology
Optimizes functions for reducing wait time, moving data and accelerating out-of-order execution, keep the pipeline full improving instruction throughput and performance.
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About This Manual—Intel Q965 Express Chipset
Table 1. Glossary of Term s a n d A c ronyms (Sheet 2 of 3)
Term Description
Intel® Virtualization Technology. Intel® VT allows one hardware platform to function as
®
Intel
VT
Intel® Wide Dynamic Execution
IGD Int ernal Graphics Device. LCD Liquid Crystal Display.
LVDS
MEBx Mana gement Engine BIOS Extensi ons
MEC
PCI Express* Graphics
PECI Platform Environmental Control Interface
Primary PCI
Processor Intel® Core™2 Duo processor E6400 QST Quiet System Techno log y SATA Serial ATA Specification SCI System Control Interrupt. SCI is used in ACPI protocol.
SDVO
SDVO Device
SERR System Error. An indication that an unrecoverable error has occurred on an I/O bus.
SMI
SOL Serial Over LAN SPI Ser i al Perip h era l Interface SST Simple Serial Transport
multiple “virtual” platforms. For businesses, Intel VT Technology improved manageability, limiting downtime and maintaining worker productivity by isolating computing activities into separate partitions.
Improves execution speed and efficiency, delivering more instructions per clock cycle. Each core can complete up to four full instructions simultaneously.
Low Voltage Differential Signaling. A high speed, low power data transmission standard used for display connections to LCD panels.
Media Expansion Card – Provides digital display options for an Intel Graphics Controller that supports MEC cards. Plugs into an x16 PCI Express connector but utilizes the multiplexed SDVO interface. Adds Video In capabilities to platform. Will not work with an Intel Graphics Controller that supports DVO and ADD cards. Will function as an ADD2 card in an ADD2 supported system, but Video In capabilities will not work.
PCI Express* Graphics is a high-speed serial interface whose configuration is software compatible with the existing PCI specifications. The specific PCI Express* implementation intended for connecting the (G)MCH to an external Graphics Controller is a x16 link and replac es AGP.
The Primary PCI is the physical PCI bus that is driven directly by the ICH8DO component. Communication between Primary PCI and the (G)MCH occurs over DMI. Note that the Primary PCI bus is not PCI Bus 0 from a configuration standpoint.
Serial Digital Video Out (SDVO). SDVO is a digital display channel that serially transmits digital display data to an external SDVO device. The SDVO device accepts this serialized format and then translates the data into the appropriate display format (i.e., TMDS, LVDS and TV-Out). This interface is not electrically compatible with the previous digital display channel - DVO. For the 82Q965 GMCH, it will be multiplexed on a portion of the x16 graphics PCI Express* interface.
Third party codec that uses SDVO as an input. May have a variety of output formats, including DVI, LVDS, HDMI, TV-out, etc.
System Management Interrupt. SMI is used to indicate any of several system conditions (such as, thermal sensor events, throttling activated, access to System Management RAM, chassis open, or other system state related activity).
1
(Intel® VT) offers
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Intel Q965 Express Chipset—About This Manual
Table 1. Glossary of Terms and Acronyms (Sheet 3 of 3)
Term Description
Rank
UMA
Note:
1. Intel with a processor, chipset, BIOS, enabling software and/or operating system, device drivers and applications designed for these features. Performance will vary depending on your configuration. Contact your vendor for more information.
A unit of DRAM corresponding to eight x8 SDRAM devices in parallel or four x16 SDRAM devices in parallel, ignoring ECC. These devices are usually , but not always, mounted on a single side of a DIMM.
Unified Memory Architecture. Describes an IGD using system memory for its frame buffers.
®
Virtualization T echnology (Intel® VT), and Intel® 64 Architecture require a computer system

1.4 Support Options

1.4.1 Electron ic Su p p or t Sy s t ems

Intel’s site on the World Wide Web (http://www.intel.com/) provides up-to-date technical information and product support. This information is available 24 hours per day, 7 days per week, providing technical information whenever you need it.

1.4.2 A dditional Technical Support

If additional technical support is required, please contact your field sales representative or local distribu t or.

1.5 Product Literature

Product literature can be ordered from the following Intel literature centers:

Table 2. Intel Literature Centers

Location Telephone Number
U.S. and Canada 1-800-548-4725 U.S. (fr om overseas) 708- 296-9333 Europe (U.K.) 44(0)1793-431155 Germany 44(0)1793-421333 France 44(0)1793-421777 Japan (fax only) 81(0)120-47-88-32
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Development Kit Hardware Features—Intel Q965 Express Chipset

2.0 Development Kit Hardware Features

2.1 Overview

This chapte r provid es in form atio n on the devel op ment kit featu res and the boar d capability. For detailed platform features please refer to the Platform Design Guide for or datasheet for the chipset and the Inte l Mechanical Design Guidelines.

2.2 Intel® Q965® Express Chipset Development K it Features Summary

This section summarizes the development kit features.
®
Core™2 Duo processor Thermal and

Table 3. Development Kit Features Summary (Sheet 1 of 2)

Form Factor 4 Layer μBTX (10.5 inches x 10.4 inches)
®
Intel
CoreTM 2 Duo processor E6400
Supports 1066 MHz front side bus
Processor
Memory
Chipset
Video
Audio
Legacy I/O Control
2M Shared L2 Cache Supports Intel Supports Intel
Smart Cache, Intel DDR2 dual-channel system memory interface
Four 240-pin DDR2 SDRAM DIMM sockets (two per channel) supporting dual channel interleaved mode
Support for 533MHz, 667MHz, 800MHz unbuffered, non-ECC DDR2 SDRAM modules Supports 128 MB to 8 GB of system memory 256 Mbit, 512 Mbit, or 1 Gbit Technology
®
Intel
®
Intel
®
Intel Option of either using integrated graphics system or external PCI Express* graphics:
®
Intel Supports ADD2 and Intel
additional digital display such as DVI, LVDS, etc. depending on the media expansion card features.
Supports external PCI Express* (x16) graphics card
®
Intel 8-channel (7.1) audio subsystem and two S/PDIF digital audio outputs using the ADI
audio codec.
Port Angeles 3.0 Super I/O controller for diskette drive, serial, parallel, and PS/2* ports.
®
64 Architecture
®
Wide Dynamic Execution, Intel® Smart Memory Access, Intel Advanced
®
Advanced Digital Media Boost, Intel® Virtualization T echnology
Q965 Express Chipset, consisting of: 82Q965 Graphics Memory Controller Hub ((G)MCH) 82801G B I/O Co ntroller Hub (ICH 8 DO )
GMA3000 integrated graphics subsystem
High Definition Audio subsystem:
®
Media Expansion Card (MEC, also known as ADD2+) for
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Intel Q965 Express Chipset—Development Kit Hardware Features
Table 3. Development Kit Features Summary (Sheet 2 of 2)
Form Factor 4 Layer μBTX (10.5 inches x 10.4 inches)
Six SATA 1.5/3.0 Gb/s ports. Te n Universal Serial Bus (USB) 2.0 ports – Three front panel headers for support of six
front panel ports and four back panel ports Three 1394a PCI controller – 2 front headers for support of two ports and one back panel
Peripheral Interfaces
LAN Support
BIOS
Expansion Capabilities
Additional Features
port (Disabled in this Development Kit) PS/2-style keyboard and PS/2 mouse (6-pin mini-DIN) connectors One VGA connector provides access to integrated graphics. Six analog audio connectors (Line-in, Line-out, MIC-in, Surround L/R, Surround L/R Rear,
Center) and two digital audio connectors driven by Intel High Definition Audio. One parallel port. One diskette drive interface
Gigabit (10/100/1000 Mbits/s) LAN subsystem using the Intel® 82566DM Gigabit Ethernet Controller
Support for Advanced configuration and power interface (ACPI), plug and play, and SMBIOS.
AMI system BIOS. One PCI bus connectors
One PCI Express* x16 bus add-in card connector Two PCI Express* x1 bus add-in card connectors
Trusted Platform Module (TPM) 1.2 support Manageability Engine (ME) support. ME Enabled LED (red-blink)
®
Active Management Technology (Intel® AMT) with System Defense support
Intel
®
Quiet System Technology (Intel® QST) support
Intel
®
Matrix Storage technology with RAID 0,1,5, 10 support
Intel Piezo speaker for BIOS POST codes PORT 80 Display Thermal Diode header BIOS configuration jumper Clear CMOS header Force On header XDP-SSA connector Internal I/O headers
•2x5 Front Panel I/O header
• 2x7 Front Panel audio header
• 1x2 Chassis intrusion header
• 3 four-wire fan headers
•2x5 Serial port header
• 2x8 High Definition audio header
• 20-pin LPC header

2.3 Board Layout

Figure 1 shows the location of the major components, headers and jumpers.
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Development Kit Hardware Features—Intel Q965 Express Chipset

Figure 1. Dev Kit Board Main Components, Headers and Jumper Locations

2.3.1 Core Components

Table 4. Core Components
Reference
Designator
J1PR LGA775 processor socket
U1UB Intel
U1LB Intel® ICH8DO U1LN Intel U1CK Clock Generator CK505 U1LH Super I/O (Port Angles) U1AU Audio Codec
U2LB Primary SPI Flash (stuffed with 16 Mb)
®
®
Note: There will be 2 SPI footprints on the board. Firmware Hub will not be supported. The
primary SPI flash footprint is at XU3LB and stuffed with a 16 Mb (2 MB) SPI flash (U2LB). The secondary SPI flash footprint is at XU5LB and unstuffed.
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Component Description
Q965 (G)MCH
82566D M Gb LAN chi p
Intel® Q965 Express Chipset
Intel Q965 Express Chipset—Development Kit Hardware Features

2.3.2 Jumper Settings and Descriptions

Table 5. Jumper Settings
Jumper Default Description Notes
1-2 = Normal
J7LB 1-2 BIOS Config/Recovery
J6LB 1-2 Clear CMOS
J8LH 1-2 Power-On Forcing
2-3 = Con fig Mode Off = Recovery
1-2 = Normal 2-3 = Clear CMOS
1-2 = Normal 2-3 = Force On (Sets CPU presence bit; may not
always force board power on)

2.3.3 LED Desc r i p tions

Powe r L EDs ar e o n the bo ar d to in di c ate whe n st andby and core powe r is be in g a ppl ie d to the planes. When on, they indicate that no devices should be inserted or removed. Please refer to Figure 2 for the LED locations.
Caution: Inserting or removing devices when the Standby Power LEDs are on could result in
device or board damag e.
Table 6. LED Description
LED Description Notes
CR5BV 5-Volt S ta ndb y Pow er Dis p lay LED Green DS1EV Port 80 Display – Right DS2EV Port 80 Display - Left CR7BV ME Enabled LED Red Blink

2.3.4 Header and Connector Descriptions

Table 7. Header and Connector Descriptions (Sheet 1 of 2)
Header Description Notes
J5LB Intruder Header J7LH Serial Port Head er J3AU ATAPI CD Header J7AU High Definition Media Interface Header J8AU Front Panel Audio Header J28LB Front Panel Header J3TH CPU Fan J4TH Chassis Fan J5TH Chassis Fan J2BV 2x12 Standard Power Connector J1BV 2x2 12V Power Connector J29LB Power LED header J24LB SATA connector SATA HDD port 0
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Development Kit Hardware Features—Intel Q965 Express Chipset
Table 7. Header and Connector Descriptions (Sheet 2 of 2)
Header Description Notes
J22LB SATA connector SATA HDD port 1 J23LB SATA connector SATA HDD port 2 J21LB SATA connector SATA HDD port 3 J19LB SATA connector SATA HDD port 4 J20LB SATA connector SATA HDD port 5 J1MY DIMM connector Channel A DIMM 0 J2MY DIMM connector Channel A DIMM 1 J3MY DIMM connector Channel B DIMM 0 J4MY DIMM connector Channel B DIMM 1 J4LH Floppy connecto r J6UB X16 PCI Express* Graphics slot For Graphics cards J11LB X1 PCI Express slot PCI Express* port 4 J12LB X1 PCI Express slot PCI Express* port 5 J13LB PCI slot J14LB USB Front Panel Header J15LB USB Front Panel Header J16LB USB Front Panel Header
J1TM LPC BUS Header (TPM)
J1FW 1394a Front Panel Header Disabled J2FW 1394a Front Panel Header Disabled J9LB Power Button J8LB Reset B utton
J2BC XDP_SSA
In order to Plug a TPM module into this header, you must first disable onboard TPM
This is reserved by Intel for debugging purpose. Located at the back of the board

2.3.5 Back Pa nel Connect ors

Figure 2 shows the location of the back panel connectors for boards equipped with the
8-channel (7.1) audio subsystem. The back panel connectors are color-coded. The figure legend lists the colors used (when applicable).
Octobe r 20 07 DM Order Nu mb e r: 3156 64 - 00 2U S 16
Intel® Q965 Express Chipset
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