The NX440LX motherboard may contain design defects or errors known as errata. Characterized errata that may cause the NX440LX motherboard’s behavior to deviate from
published specifications are documented in the NX440LX Motherboard Specfication Update.
674633-001
Revision History
RevisionRevision HistoryDate
-001First Release.August, 1997
This product specification applies only to standard NX440LX motherboards with BIOS identifier
4N4XL0X0.86A.
Changes to this specification will be published in the NX440LX Motherboard Specification Update
before being incorporated into a revision of this document.
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel retains the right to make changes to specifications and product descriptions at any time, without notice.
The NX440LX motherboard may contain design defects or errors known as errata which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 7641
Mt. Prospect, IL 60056-7641
or call in North America 1-800-879-4683, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
†
Third-party brands and names are the property of their respective owners.
Copyright Intel Corporation, 1997. All rghts reserved.
The NX440LX motherboard is a versatile platform that offers a wide variety of features. Many of
the options, however, are implemented – at least in part – on the riser. Throughout this manual,
‡
symbol is used to indicate such an option. Because there is no standard riser, no detailed
the
description of an implementation can be given. See Section 6.1 to obtain the reference design for
the NLX riser.
The NX440LX motherboard supports Pentium
266, and 300 MHz. The motherboard features:
•
NLX v1.2 form factor
•
Minimal jumper design
Main Memory
•
Three 168-pin DIMM sockets
•
Support for up to 384 MB of synchronous DRAM (SDRAM)
•
Support for 66 MHz SDRAM
•
Support for ECC and non-ECC memory
II family of microprocessors operating at 233,
Chipset and PCI/IDE Interface
•
Intel 82440LX AGPset PCI/A.G.P. Controller (PAC)
•
Integrated PCI bus mastering controller using PIIX4
•
Dual channel EIDE interface
•
Real-time clock
‡
I/O Features
•
SMC FDC37C677 I/O controller
•
Floppy drive interface
•
Integrates standard I/O functions: one multi-mode parallel port, two FIFO serial ports, and
‡
keyboard and mouse controller
•
Support for one Universal Serial Bus (USB) interface on the motherboard and another on the
‡
riser
•
Support for consumer infrared
‡
Audio Subsystem
•
Yamaha OPL3-SA3 audio codec component
•
Wavetable upgrade header
Graphics Subsystem
•
Optional Cirrus Logic CL-GD5465 A.G.P. graphics accelerator with 2 MB of RAMBUS
(RDRAM) video memory expandable to 4 MB using a 2 MB video upgrade module
The motherboard is designed to fit into a standard NLX form factor chassis. Figure 3 illustrates the
mechanical form factor for the motherboard. Location of the I/O connectors, riser slot, and
mounting holes are in strict compliance with the NLX specification (see Section 6.2). Dimensions
are given in inches.
8.70
8.50
0.260
0.0
0.50
0.0
0.349
0.509
1.849
2.108
6.575
9.234
0.260
10
8.80
12.80
4.207.60
Figure 3. Motherboard Dimensions
13.00
0.20
OM06251
Motherboard Description
1.3 I/O Shield
The back panel I/O shield for the NX440LX motherboard must meet specific dimensional and
material requirements. Systems based on this motherboard need the back panel I/O shield in order
to pass emission certification testing. Figure 4 shows the critical dimensions for both options of
the I/O shield, and indicates the position of each cutout. Dimensions are given in inches.
The motherboard supports a single Pentium II processor. The processor’s VID pins automatically
program the motherboard’s voltage regulator to the required processor voltage. The motherboard
operates with processors that run internally at 233, 266, or 300 MHz and have either a 256 KB or
512 KB second-level cache.
The processor implements MMX technology and maintains full backward compatibility with the
8086, 80286, Intel386, Intel486, and Pentium processor. The processor’s numeric coprocessor
significantly increases the speed of floating-point operations and complies with ANSI/IEEE
standard 754-1985.
1.4.1 Microprocessor Packaging
The processor is packaged in a Single Edge Contact (S.E.C.) cartridge. The S.E.C. cartridge
includes the processor core, the second-level cache, a thermal plate, and a back cover.
The processor connects to the motherboard through the Slot 1 processor connector, a 242-pin edge
connector. When the processor is mounted in Slot 1, it is secured by a retention mechanism
attached to the motherboard. The processor’s heatsink is stabilized by a heatsink support that is
attached to the motherboard.
1.4.2 Second-Level Cache
The second-level cache is located on the substrate of the S.E.C. cartridge. The cache includes burst
pipelined synchronous static RAM (PBSRAM) and tag RAM. There can be two or four BSRAM
components totaling 256 KB or 512 KB in size. All supported onboard memory can be cached.
1.4.3 Microprocessor Upgrades
The motherboard can be upgraded with Pentium II processors that run at higher processor speeds.
After upgrading the processor, use the BIOS configuration mode to set the proper speed for the
processor. See Section 1.15.2 for information about configuration mode.
12
Motherboard Description
1.5 Memory
1.5.1 Main Memory
The motherboard has three, dual inline memory module (DIMM) sockets. Minimum memory size
is 16 MB; maximum memory size is 384 MB. The BIOS automatically detects memory type, size,
and speed.
The motherboard supports the following memory features:
• 168-pin DIMMs with gold-plated contacts
• 66 MHz unbuffered SDRAM only
• Non-ECC (64-bit) and ECC (72-bit) memory
• 3.3 V memory only
• Single- or double-sided DIMMs in the following sizes:
DIMM SizeNon-ECC ConfigurationECC Configuration
16 MB2 Mbit x 642 Mbit x 72
32 MB4 Mbit x 644 Mbit x 72
64 MB8 Mbit x 648 Mbit x 72
128 MB16 Mbit x 6416 Mbit x 72
Memory can be installed in one, two, or three sockets. Memory size can vary between sockets.
1.5.2 SDRAM
Synchronous DRAM (SDRAM) improves memory performance through memory access that is
synchronous with the memory clock. This simplifies the timing design and increases memory
speed because all timing is dependent on the number of memory clock cycles.
NOTE
✏
To function properly, SDRAM DIMMs must meet the Intel 4-clock, 66 MHz, unbuffered SDRAM
specification for either 64-bit or 72-bit SDRAM. See Section 6.2 for information about these
specifications.
Error checking and correcting (ECC) memory detects multiple-bit errors and corrects single-bit
errors. When ECC memory is installed, the BIOS supports both ECC and non-ECC mode. ECC
mode is enabled in the Setup program. The BIOS automatically detects if ECC memory is
installed and provides the Setup option for selecting ECC mode. If non-ECC memory is installed,
the Setup option for ECC mode does not appear.
The following table describes the effect of using Setup to put each memory type in each supported
mode. Whenever ECC mode is selected in Setup, some performance loss occurs.
Memory Error Detection Mode Established in Setup Program
ECC DisabledECC Enabled
Non-ECC DIMM
ECC DIMM
No error detectionN/A
No error detectionSingle-bit error correction, multiple-bit error
detection
1.6 Chipset
The Intel 440LX is designed for the Pentium II processor. It consists of the Intel 82443LX
PCI/A.G.P. controller (PAC) and the Intel 82371AB PCI/ISA IDE Xcelerator (PIIX4) bridge chip.
1.6.1 Intel 82443LX PCI/A.G.P. Controller
The PAC provides bus-control signals, address paths, and data paths for transfers between the
processor’s host bus, PCI bus, Accelerated Graphics Port (A.G.P.), and main memory. The PAC
comes in a 492-pin BGA package and features:
• Processor interface control
Processor host bus speed up to 66 MHz
32-bit addressing
GTL+ compliant host bus
• Integrated DRAM controller
Supports synchronous DRAM (SDRAM)
64/72-bit path-to-memory
Auto detection of memory type
Supports 4-, 16-, 64-Mbit DRAM devices
Symmetrical and asymmetrical DRAM addressing
Supports 3.3 V DRAMs
• Accelerated Graphics Port Interface
Complies with A.G.P. specification (see Section 6.2 for specification information)
Supports 3.3 V A.G.P. devices with data transfer rates up to 133 MHz
Synchronous coupling to the host-bus frequency
14
Motherboard Description
• Fully-synchronous PCI bus interface
Complies with PCI specification (see Section 6.2 for specification information)
PCI-to-DRAM access greater than 100 MB/sec
‡
Supports five
PCI bus masters in addition to the host and PCI-to-ISA I/O bridge
Delayed transactions
PCI parity generation and checking support
• Data Buffering
Host-to-DRAM, PCI-to-DRAM, and A.G.P.-to-DRAM write-data buffering
Write-combining for host-to-PCI burst writes
Supports concurrent host, PCI, and A.G.P. transactions to main memory
• Supports system management mode (SMM)
1.6.2 Intel 82371AB PCI ISA IDE Xcelerator (PIIX4)
The PIIX4 is a multifunction PCI device implementing the PCI-to-ISA bridge, PCI IDE
functionality, Universal Serial Bus (USB) host/hub function, and enhanced power management.
The PIIX4 comes in a 324-pin MBGA package that features:
• Multifunction PCI-to-ISA bridge
Supports the PCI bus at 33 MHz
Complies with PCI specification (see Section 6.2 for specification information)
Full ISA or extended I/O (EIO) bus support
• USB controller
‡
Two
Supports legacy keyboard and mouse
Supports UHCI design guide revision 1.1 interface
• Integrated dual-channel enhanced IDE interface
Supports up to four IDE devices
PIO Mode 4 transfers at up to 14 MB/sec
Supports Ultra DMA/33 synchronous DMA mode transfers up to 33 MB/sec
Bus master mode with an 8 x 32-bit buffer for bus master PCI IDE burst transfers
• Enhanced DMA controller
Two 8237-based DMA controllers
Supports PCI DMA with three PC/PCI channels and distributed DMA protocols
Fast type-F DMA for reduced PCI bus usage
• Interrupt controller based on 82C59
Supports 15 interrupts
Programmable for edge/level sensitivity
Supports serial IRQs
• Power management logic
Sleep/resume logic
Supports wake-on-modem through Ring Indicator input
Supports remote wakeup
• Real-Time Clock
256 byte battery-backed CMOS SRAM
Includes date alarm
• 16-bit counters/timers based on 82C54
1.6.3 Accelerated Graphics Port (A.G.P.)
The Accelerated Graphics Port (A.G.P.) is a high-performance interconnect for graphic-intensive
applications, such as 3D applications. A.G.P. is independent of the PCI bus and is intended for
exclusive use with graphical-display devices. A.G.P. provides these performance features:
• Pipelined-memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for near 100 percent bus efficiency
• AC timing for 133 MHz data transfer rates, allowing data throughput of 500 MB/sec
A.G.P. complies with the 66 MHz PCI specification. See Section 6.2 for information about the
A.G.P. and PCI specifications.
NOTE
✏
Due to the location of the third DIMM socket, only half-length AGP cards are supported.
The optional CL-GD5465 supports the A.G.P. for higher bandwidth between the system memory
and the graphics subsystem. It is a member of the Laguna family of RAMBUS-based graphics
accelerators, offering 3D-graphics capability while maintaining a high level of 2D performance.
The features include:
• 64-bit graphics engine with integrated 3D game acceleration
• High-performance 64-bit GUI accelerator
• Video playback acceleration
†
• Integrated VGA
• Integrated 230-MHz palette DAC and clock synthesizer
controller
16
Motherboard Description
Table 1.Video Resolution
Resolution SupportedNo. of Colors
640 x 480, 800 x 600, 1024 x 768, 1280 x 1024, 1600 x 1200256 (8 bit)
640 x 480, 800 x 600, 1024 x 768, 1280 x 102465,536 (16 bit)
640 x 480, 800 x 600, 1024 x 76816,777,216 (24 bit)
640 x 480, 800 x 600, 1024 x 768, 1280 x 1024, 1600 x 1200256 (8 bit)
640 x 480, 800 x 600, 1024 x 768, 1280 x 102465,536 (16 bit)
640 x 480, 800 x 600, 1024 x 76816,777,216 (24 bit)
640 x 480, 800 x 600, 1024 x 76816,777,216(32 bit)
640 x 480, 800 x 600, 1024 x 768, 1280 x 1024, 1600 x 1200256 (8 bit)
640 x 480, 800 x 600, 1024 x 768, 1280 x 102465,536 (16 bit)
640 x 480, 800 x 600, 1024 x 76816,777,216 (24 bit)
640 x 480, 800 x 600, 1024 x 768, 1280 x 1024256 (8 bit)
640 x 480, 800 x 600, 1024 x 76865,536 (16 bit)
1.6.4 Universal Serial Bus (USB)
The motherboard can support two‡ USB ports; however, it is shipped with only one connector.
The second is supported through the NLX riser. If you need to connect more than one USB device,
you can connect an external hub to the USB port. The motherboard fully supports the universal
host controller interface (UHCI) and uses UHCI-compatible software drivers. See Section 6.2 for
information about the USB specification. USB features include:
• Self-identifying peripherals that can be plugged in while the computer is running
• Automatic mapping of function to driver and configuration
• Supports isochronous and asynchronous transfer types over the same set of wires
• Supports up to 127 physical devices per USB port
• Bandwidth and low latencies appropriate for telephony, audio, and other applications
• Error-handling and fault-recovery mechanisms built into the protocol
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B or other regulatory EMI requirements, even if no device or a low-speed (sub-channel)
USB device is attached to the cable. Use shielded cable that meets the requirements for high-speed
(fully-rated) devices.
1.6.5 IDE Support
The motherboard has two independent bus-mastering capable PCI IDE interfaces. These interfaces
support PIO Mode 3, PIO Mode 4, ATAPI devices (e.g., CD-ROM), and Ultra DMA/33
synchronous-DMA mode transfers. The BIOS supports logical block addressing (LBA) and
extended cylinder head sector (ECHS) translation modes. The BIOS automatically detects the IDE
device transfer rate.
Programmed I/O operations usually require a substantial amount of processor bandwidth.
However, in multitasking operating systems, the bandwidth freed by bus mastering IDE can be
devoted to other tasks while disk transfers are occurring.
1.6.6 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock is compatible with DS1287 and MC146818 components. The clock provides a
time-of-day clock and a multicentury calendar with alarm features and century rollover. The realtime clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved for
BIOS use.
The time, date, and CMOS values can be specified in the Setup program. The CMOS values can
be returned to their defaults by using the Setup program.
An external coin-cell battery powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the 5 V standby current from the power supply extends the life of the
battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 5 V applied.
1.7 I/O Interface Controller
• Enhanced Ultra I/O SMC FDC37C677
5 Volt operation
ISA Plug-and-Play compatible register set
• Two serial ports or one serial port and one infrared port
• One floppy controller
• FIFO support on both serial and floppy interfaces
• One parallel port with ECP and EPP support
†
• PS/2
• Supports BIOS setup for various configuration options
style mouse and keyboard interfaces
1.7.1 Serial Ports
The motherboard has two 9-pin D-Sub serial port connectors located on the back panel. The
NS16C550-compatible UARTs allow data transfers at speeds up to 115.2 Kbits/sec using BIOS
support.
1.7.2 Parallel Port
The connector for the multimode bi-directional parallel port is a 25-pin D-Sub connector located on
the back panel of the motherboard. In the Setup program, there are four options for parallel port
operation:
• Compatible (standard mode)
• Bi-directional (PS/2 compatible)
• Bi-directional Enhanced Parallel Port (EPP). A driver from the peripheral manufacturer is
required for operation. See Section 6.2 for EPP compatibility
• Bi-directional high-speed Extended Capabilities Port (ECP)
‡
18
Motherboard Description
1.7.3 Floppy Controller
The I/O controller is software compatible with the 82077 floppy drive controller. The floppy
connector is located on the riser card. In the Setup program, the floppy interface can be configured
for the following floppy drive capacities and sizes:
PS/2 keyboard and mouse connectors are located on the back panel of the motherboard. The +5 V
lines to these connectors are protected with a PolySwitch
reestablishes the connection after an over-current condition is removed. While this device
eliminates the possibility of having to replace a fuse, power to the computer should be turned off
before connecting or disconnecting a keyboard or mouse.
NOTE
✏
You can plug the mouse and keyboard into either connector.
The keyboard controller contains code which provides the traditional keyboard and mouse control
functions, and also supports Power On/Reset password protection. A Power On/Reset password
can be specified in the Setup program.
The keyboard controller supports the following hot-key sequence:
• <Ctrl><Alt><Del> Software reset. This key sequence resets the computer’s software by
jumping to the beginning of the BIOS code and running the Power-On Self Test (POST).
†
circuit that, like a self-healing fuse,
1.7.5 Optional Infrared
There is no infrared header on the motherboard; however, the edge connector does accommodate
infrared signals from the riser. If either IrDA
Configuration Submenu to change the mode for Serial Port B from COM2 to infrared applications.
†
or ASK-IR† is available, use the BIOS Peripheral
1.8 Audio Subsystem
1.8.1 OPL3-SA3 Audio System
The optional onboard audio subsystem features the Yamaha OPL3-SA3 (YMF715) device. The
features of the device include:
• A 16-bit audio codec
• OPL3 FM synthesis
• An integrated 3D enhanced stereo controller including all required analog components
• Stereo analog-to-digital and digital-to-analog converters
• Analog mixing, anti-aliasing, and reconstruction filters
• Supports 16-bit address decoding
• Line In, line out, and microphone connectors
• ADPCM, A-law, or µlaw digital audio compression and decompression
• Full digital control of all mixer and volume control functions
• Plug and Play compatible
†
• Sound Blaster Pro
NOTE
✏
Using the front panel line in, line out, and microphone connectors (if available on the riser)
disables the back panel connectors.
and Microsoft Windows Sound System compatible
20
Motherboard Description
1.8.2 Audio Subsystem Resources
The following table shows the IRQ, DMA channel, and base I/O address options for the audio
subsystem. Options are listed in order of preference specified by Yamaha. These options are
automatically chosen by the Plug and Play interface, so there are no default settings. Onboard
audio can be enabled or disabled in the Setup program.
Table 2.Audio Subsystem Resources
IRQ
Resource
Sound Blaster
(DMA playback, DMA shared with
Windows Sound System capture)
Windows Sound System
(DMA playback)
MPU-401
(IRQ shared with Sound Blaster)
MIDI / Game Port201h
†
AdLib
†
(Options)
10
7
5,7, 10,11
5
11
5,7, 10,11
DMA Channel
(Options)
1
0,1,3
0
0,1,3
I/O Address
(Options)
220-22Fh
240-24Fh
16 bytes on 16-byte
boundary in the
range of 220-280h
530-537h
E80-E87h
8 bytes on 8-byte
boundary in the
range of 530-F48h
330-331h
300-301h
2 bytes on 2-byte
boundary in the
range of 300-334h
1 byte on 1-byte
boundary in the
range of 201-20Fh
388-38Dh
6 bytes on 8-byte
boundary in the
range of 388-3F8h
1.8.3 Audio Drivers and Utilities
Audio software and utilities are available from Intel’s World Wide Web site (see Section 6.1).
Audio driver support is provided for the Microsoft Windows
†
Microsoft Windows NT
(versions 3.51 and 4.0), and IBM OS/2† Warp† (versions 3.0 and 4.0)
The audio connectors include the following connectors:
• Back panel connectors: Line In, Mic In, Line Out
• CD-ROM audio
• Hardware wavetable
1.8.4.1 CD-ROM Audio Connector
An optional 1 x 4-pin Creative Labs-type connector (J9N1) is available for connecting an internal
CD-ROM drive to the audio mixer. The connector is designed for audio add-in cards and is
compatible with most cables supplied with Creative Labs CD-ROM drives. Audio signals from the
riser are supported on the edge connector.
1.8.4.2 Hardware Wavetable Headers
Two 2 x 3-pin headers (J9M1, J7N1) are available for a wavetable add-in module. An optional
OPL4-ML reference design module that can be plugged into the motherboard may be licensed from
Yamaha Corporation. Compatible wavetable module cards are available from several vendors.
1.9 Hardware Monitor
The optional management extension hardware provides low-cost instrumentation capabilities on a
National Semiconductor LM78/79 chip. The features include:
• Integrated temperature sensor
• Fan speed sensors
• Power supply voltage monitoring to detect levels above or below acceptable values
• Remote reset capabilities from a remote peer or server through LANDesk
Version 3.0 and service layers
See Section 6.2 for information about the management extension hardware specification. For more
information, please check the following web site: http://www.national.com/pf/LM/
Client Manager,
1.10 Tamper Detection
If the riser is equipped with a tamper detection switch, the motherboard will emit a continuous
beep anytime the cover is opened and the A/C power cord is still connected. This warning is
intended to remind the user that 5 V standby power is still applied within the system. To avoid this
warning, unplug the power cord before opening the cover. The act of removing the cover will still
be recorded by circuitry on the motherboard, to be subsequently reported to any management suite
software in use.
CAUTION
Disconnecting the power cord can leave the system without an adequate electrical ground. Use
proper procedures to prevent electrostatic discharge (ESD) which could damage your system.
22
Motherboard Description
1.11 Onboard Networking
The onboard networking subsystem is an Ethernet† LAN interface that provides both 10Base-T and
100Base-TX connectivity. Onboard LAN can be enabled or disabled in the Setup program.
Features include:
• 32-bit direct bus mastering on the PCI bus
• Shared memory structure in the host memory that copies data directly to/from host memory
• 10Base-T and 100Base-TX capability using a single RJ-45 connector
• IEEE 802.3µ Auto-Negotiation for the fastest available connection
• Jumperless configuration; the LAN subsystem is completely software configurable
• Remote wake up controller
1.11.1 Intel 82557 LAN Controller
This device is the heart of the LAN subsystem. It provides the following functions:
• CSMA/CD protocol engine
• PCI compatibility
• DMA engine for movement of commands, status, and network data across the PCI bus
• Standard MII interface for access to IEEE 802.3µ -compliant physical layer devices
The physical layer interface provides the following:
• Integrated 10/100 Mbit/sec single chip solution
• Complete 10/100 Mbit/sec media independent interface compliance with MDI support
• Full duplex operation available in both 10 and 100 Mbit/sec modes
• 25 MHz clock for 10 and 100 Mbit/sec modes
• Single magnetics module for 10 and 100 Mbit/sec operation
• IEEE 802.3µ Auto-Negotiation support for 10Base-T, 10Base-T FDX, 100Base-TX FDX,
100Base-TX FDX-FC
• Parallel detection algorithm for legacy support of non-Auto-Negotiation enabled link partner
• Glueless interface to TX solution with single magnetics module
• LED function mapping support via MDI interface
• Support for a LAN activity LED on an NLX riser
‡
1.11.3 Remote Wakeup Controller
The Remote Wakeup ASIC performs the Wake on LAN† function of the motherboard via the
onboard LAN interface. When the system is powered off, the Remote Wakeup ASIC and the
82555 PHY remain powered by a 5 V standby voltage. The ASIC monitors network traffic at the
MII interface and when it detects a Magic Packet
system.
†
it asserts a wakeup signal that powers up the
If an external network interface card (NIC) with remote wakeup capabilities is added to the
system
‡
the NIC’s remote wakeup header must be connected to the header on an NLX riser.
23
Loading...
+ 53 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.