Intel IQ80321 User Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Board Ma nu al
April 2, 2003
Document Number: 273521-008
Intel® IQ80321 I/O Processor Evaluation Platfo rm
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
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INTELLECTUAL PROPERTY RIGHT.
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future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
®
The Intel
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling
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Copyright© Intel Corporation, April 2003
AlertVIEW, i960, AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, Commerce Cart, CT Connect, CT Media, Dialogic,
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logo, OverDrive, Paragon, PC Dads, PC Parents, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, ProShare,
RemoteExpress, Screamline, Shiva, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside, The Journey Inside, This Way In,
TokenExpress, Trillium, Vivonic, and VTune are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and
other countries.
*Other names and brands may be claimed as the property of others.
80321 I/O Processor may contain design defects or errors known as errata which may cause the product to deviate from published
2 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Contents
Contents
1 Introduction..................................................................................................................................13
1.1 Document Purpose and Scope... ........................................................................................13
1.2 Related Documents............................................................................................................13
1.3 Electronic Information...... ................. ......... .......... ................ .......... ......... ................. ...........14
1.4 Component References......................................................................................................14
1.5 Terms and Def initions.................... .......... ................ .......... ......... ................. ......... .......... ....15
1.6 Intel
1.7 Intel
2 Getting Started............................................................................................................................. 19
2.1 Kit Content..........................................................................................................................19
2.2 Hardware Installation..........................................................................................................19
2.3 Factor y Se ttings...... ................................. ......... ................. ......... .......... ................ ..............20
2.4 Development Strategy ........................................................................................................20
2.5 Target Monitors................................................................................................................... 21
2.6 Host Communications Examples ........................................................................................24
®
80321 I/O Processor.................................................................................................16
®
IQ80321 Evaluation Platform Board Features . .........................................................18
2.2.1 First-Time Installation and Test........................ ......... .......... ................ .......... .........19
2.2.2 Power and Backplane Requirements ............................................................. .......19
2.4.1 Supported Tool Buckets ........................................................................................20
2.4.2 Contents of the Flash.............................................................................................20
2.5.1 Redhat Redboot.....................................................................................................21
2.5.2 ARM Firmware Suite..............................................................................................22
2.5.2.1 ARM Angel......................................... ....... .......... ....... ....... ....... ....... .......23
2.5.2.1.1 Semihostin g (Fil e I/O).................. .......... ................ .......... ....23
2.6.1 Serial-UART Communication.................................................................................24
2.6.2 Ethernet- Ne two rk Commu n ication.......................... .......... ......... ......... ...................24
2.6.3 JTAG Debug Com m unicat ion . ...............................................................................25
2.6.4 GNUPro GDB/Insight.............................................................................................26
2.6.4.1 Communicating with Redboot ................................................................26
2.6.4.2 Co n necting with GDB................................ .......... ......... ................. .........28
2.6.5 ARM Extend ed Debugger......................................................................................29
3 Hardware Reference Section......................................................................................................31
3.1 Functional Diagram..... .......... ................ .......... ................ .......... ......... ................. ......... .......31
3.2 Board For m-Factor/Connectivity..................... ................................. ......... .......... ................32
3.3 Power..................................................................................................................................33
3.4 Memory Subsystem............................................................................................................34
3.4.1 DDR SDRAM.........................................................................................................34
3.4.1.1 Battery Backup.......................................................................................34
3.4.2 Flash Memory Requir e men ts... .......... ......... ................. ......... .......... ................ .......35
3.5 Intel
3.6 Inte r ru p t Routing............ ......... ................. ......... .......... ................ .......... ................ ..............37
3.7 Intel
Board Manual 3
®
80321 I/O Processor Operation Mode......................................................................36
®
IQ80321 Evaluation Platform Board Peripheral Bus.................................................38
3.7.1 Flash ROM................. .......... ................ .......... ......... ................. ......... .......... ...........39
3.7.2 UART..................................................................................................................... 40
3.7.3 HEX Display...........................................................................................................41
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Contents
3.7.4 Rotary Switch.........................................................................................................42
3.7.5 Battery Status........................................................................................................43
3.8 Debug Interface..................................................................................................................44
3.8.1 Console Serial Port................................................................................................44
3.8.2 Ethernet Port........ ................................. ......... ................. ......... .......... ................ ....44
3.8.2.1 Intel
®
82544EI Gigabit Ethernet Controller............................................44
3.8.3 JTAG Debug............................................................................ .............. ................45
3.8.3.1 JTAG Port..............................................................................................45
3.8.4 Logic-Analyzer Connectors.......................................... .......... .. ..... ....... .. ..... ....... ....45
3.8.5 Mictor J3F2....... .......... ................................. ......... ................. ......... .......... .............46
3.8.6 Mictor J2F1....... .......... ................................. ......... ................. ......... .......... .............47
3.8.7 Mictor J1C1..... ......... ................. ......... .......... ................ .......... ......... ................. ......48
3.8.8 Mictor J3C1..... ......... ................. ......... .......... ................ .......... ......... ................. ......49
3.8.9 Mictor J2C1..... ......... ................. ......... .......... ................ .......... ......... ................. ......50
3.9 Board Reset Sche me ........ ......... ................. ......... .......... ................ .......... ......... ................. .51
3.10 Switches and Jumpers........................................................................................................52
3.10.1 Switch Summary....................................................................................................52
3.10.2 PCIX Initial ization Summary...................... ................ .......... ................ .......... ........53
3.10.2.1 Use r De fined Switches............... ................ .......... ......... ......... ................53
3.10.2.2 PCI-X Bridge Initialization Signals ........ ....... .......... .. ....... ....... ..... ....... ....53
3.10.3 Default Switc h Settings - Visual....... .......... ................ .......... ......... ................. ........54
3.10.4 Jumper Summary .................................................................................................. 55
3.10.5 Connector Summary........................................................................................ .. ....55
3.10.6 G eneral Purpose Input/Ou tput Header..................................................................55
3.10.7 Secondary PCI/PCI-X Operation Sett ing s........ ......... .......... ................ .......... ........56
3.10.8 Primary PCI/PCI-X O pera tion Settings........................... ......... .......... ................ ....56
3.10.9 Detail Descri pt ions of Switches/Jum p er s................... .......... ......... .........................57
3.10.9.1 Switch S7E1- 2/3 ...................................................................................57
3.10.9.1 .1 S7E1-2: RST_MODE....................................... ......... .......... .57
3.10.9.1 .2 S7E1-3: RETRY......... ................ .......... ......... ................. ......57
3.10.9.1.3 Operation Setting Summary Descriptions............................57
3.10.9.2 Switch S7E1- 4/5 ...................................................................................58
3.10.9.2 .1 Switch S7E1 - 4........... .......... ......... ................. ......... .......... .58
3.10.9.2 .2 Switch S7E1 - 5........... .......... ......... ................. ......... .......... .58
3.10.9.3 Switch S7E1- 6/7 ...................................................................................58
3.10.9.4 Switch S7E1- 8 ......................................................................................59
3.10.9.5 Switch S8E1- 2 ......................................................................................60
3.10.9.6 Switch S8E1- 3 ......................................................................................60
3.10.9.7 Switch S8E1- 4 ......................................................................................60
3.10.9.8 Switch S8E1- 5 ......................................................................................61
3.10.9.8 .1 Switch S8E1 - 5: Descript ion s ......... .......... ......... ..................61
3.10.9.9 Switch S8E1- 6 ......................................................................................61
3.10.9.10Switch S8E1- 7 ......................................................................................62
3.10.9.11Switch S8E1- 8 ......................................................................................62
3.10.9.12Switch S8E2 - 1/2 .................................................................................. 63
3.10.9.13Switch S8E2 - 4 .....................................................................................63
3.10.9.14Switch S9E1 - 1:3 .................................................................................. 64
3.10.9.15Switch S9E1 - 4 .....................................................................................64
3.10.9.16Switch S1D1 - 1/2..................................................................................65
3.10.9.17Switch S4D1 - 1/2..................................................................................65
3.10.9.18Switch S4D1 - 3/4..................................................................................65
3.10.9.19Jumper J1G2 ..................... ................. ......... .......... ................ .......... ......66
4 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Contents
3.10.9.20 Jumper J3E1..........................................................................................66
3.10.9.21 Jumper J3G1 .........................................................................................66
3.10.9.22 Jumper J9E1..........................................................................................67
3.10.9.23 Jumper J9F1..........................................................................................67
4 External RAID Section.................................................................................................................69
4.1 Private Device Configuration.............................................................................................. 69
4.2 Inte r ru p t Routing............ ......... ................. ......... .......... ................ .......... ................ ..............70
5 Software Reference .....................................................................................................................71
5.1 DRAM.................................................................................................................................71
5.2 Components on the Peripheral Bus............................................ ............ ....... ....... ............ ..71
5.2.1 Flash ROM................. .......... ................ .......... ......... ................. ......... .......... ...........72
5.2.2 UART..................................................................................................................... 73
5.2.3 Rotary Switch......................................................................................................... 73
5.2.4 HEX Display...........................................................................................................74
5.3 Ethernet..............................................................................................................................76
5.4 Board Support Package (BSP) Examples..........................................................................77
5.4.1 Intel
5.4.2 Redboo t* Intel
5.4.3 Redboo t Intel
5.4.4 Redboo t Intel
5.4.5 Redboo t Intel
5.4.6 Redboo t Intel
®
80321 I/O Processor Memory Map..............................................................77
®
IQ80321 Memory Map ................................ ....... ....... ..... ....... .......78
®
IQ80321 Physical Memory Map - Visual.......................................79
®
IQ80321 Virtual Memory Map - Visual .......................................... 80
®
IQ80321 Files. ...............................................................................81
®
IQ80321 DDR Memory Initialization Sequence.............................82
5.4.7 Redboo t Switching................................................................................................. 83
A IQ80310 and IQ80321 Compariso ns...........................................................................................85
B Getting Started and Debugger ...................................................................................................87
B.1 Introduction.........................................................................................................................87
B.1.1 Purpose .................................................................................................................87
B.1.2 Necessary Hardware and Software........ ...............................................................87
B.1.3 Related Documents...............................................................................................87
B.1.4 Related Web Sites................................................................................................. 88
B.2 Setup ..................................................................................................................................89
B.2.1 Hardware Setup.....................................................................................................89
B.2.2 Software Setup ......................................................................................................90
B.3 New Project Setup..............................................................................................................91
B.3.1 Creating a New Proj ec t............................. ......... .......... ................ .......... ......... .......91
B.3.2 Configuration .........................................................................................................92
B.4 Flashing with JTAG .............................................................................................................93
B.4.1 Overview................................................................................................................93
B.4.2 Using Flash Programmer.......................................................................................94
B.5 Debugging Out of Flash......................................................................................................95
B.6 Buil d ing an Exe cu ta b l e Fil e From Exa mple Code ...... ................................. ......... .......... ....95
B.7 Running the Code|Lab Debugger.......................................................................................96
B.7.1 Launchi ng and Configuring Debu gger ................................................................... 96
B.7.2 Manuall y Loading and E xecu ting an Application Program. ....................................97
B.7.3 Displaying So urce Code . ................ .......... ......... ................. ......... .......... ................97
B.7.4 Using Breakpoints..................................................................................................98
B.7.5 Stepping Through the Code...................................................................................99
Board Manual 5
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Contents
B.7.6 Sett ing Code|Lab Debu g Options.......................................................................... 99
B.8 Exploring the Code|Lab Debug Windows......................................................................... 100
B.8.1 Toolbar Icons........... ................. ......... .......... ................ .......... ................ .......... ....100
B.8.2 Workspace Window...................................................................... ......... ............ ..100
B.8.3 Source Code........................................................................................................100
B.8.4 D ebug and Cons ole Windows .............................................................................100
B.8.5 Memory Window............................................................... ............ ......... ............ ..100
B.8.6 Registers Window................................................................................................101
B.8.7 W atch Wi ndow..................................................................................................... 101
B.8.8 Variables Window................................................................................................ 101
B.9 Debugging Basics.............................................................................................................102
B.9.1 Overview..............................................................................................................102
B.9.2 H ardware and Softw are Breakpo ints...................................................................102
B.9.2.1 Software Breakpoints...........................................................................102
B.9.2.2 Hardware Breakpoints .........................................................................102
B.9.3 Exceptions/Trapping............................................................................................103
C Gettin g S ta rt e d and Debugge r .................................................................................................105
C.1 Introduction .......................................................................................................................105
C.1.1 Purpose ...............................................................................................................105
C.1.2 Necessary Hardware and Software.....................................................................105
C.1.3 Related Documents.............................................................................................105
C.1.4 Related Web Sites...............................................................................................106
C.2 Setup................................................................................................................................107
C.2.1 Hardware Setup...................................................................................................107
C.2.2 Softwa r e Se tu p........ .......... ................ .......... ................ .......... ......... ................. ....108
C.3 New Project Setup......... .......... ................................. ......... ................. ......... .......... ...........109
C.3.1 Creating a New Project........ .......... ................ .......... ......... ................................. ..109
C.3.2 Configuration.......................................................................................................110
C.4 Flashing with JTAG ........ .......... ................................. ......... .......... ................................. ....111
C.4.1 Overview..............................................................................................................111
C.4.2 Using Fl a sh Progr a mm e r........ ......... ................. ......... ................................. .........112
C.5 Debugging Out of Flash....................................................................................................113
C.6 Building an Executable File From Example Code............................................................113
C.7 Running the Code|Lab Debugger..................................................................................... 114
C.7.1 Launching and Configuring Debugger........................................................ .........114
C.7.2 Manually Loading and Executing an Application Program ..................................114
C.7.3 Displaying Source Code.................. ................. ......... .......... ................ .......... ......115
C.7.4 Using Br e a kp oin ts.............. ......... ................. ......... .......... ................ .......... ...........115
C.7.5 Stepping Through the Code.................................................................................116
C.7.6 Setting Code|Lab Debug Options........................................................................116
C.8 Exploring the Code|Lab D ebug Wind ows.........................................................................117
C.8.1 Toolbar Icons....... ................ .......... ......... ................. ......... ................................. ..117
C.8.2 Workspace Window.............................................................................................117
C.8.3 Source Code........................................................................................................117
C.8.4 4 Debug and Conso l e Windo ws.............................. ......... .......... ................ .........117
C.8.5 Memory Window.................................................................................... ............ ..117
C.8.6 Registers Window................................................................................................118
C.8.7 Watch Window . ....................................................................................................118
C.8.8 Variables Window................................................................................................118
6 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Contents
C.9 Debugging Basics.............................................................................................................119
C.9.1 Overview..............................................................................................................119
C.9.2 Hardware and Software Breakpoints...................................................................119
C.9.2.1 Software Breakpoints...........................................................................1 19
C.9.2.2 Hardware Breakp o ints .... .......... ................ .......... ......... ................. .......119
C.9.3 C.9.3 Exceptions/Trapping ..................................................................................1 20
Board Manual 7
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Contents
Figures
1Intel® 80321 I/O Processor Block Diagram ................................................................................16
2 Serial-UART Communication ..................................................................................................... 24
3 Ethernet-Network Communication.......... ......... .......... ................ .......... ......... .......... ................ ....24
4 JTAG Debug Com m unicat ion.....................................................................................................25
5 Functional Block Diag r am............. ................. ......... .......... ................ .......... ......... ................. ......31
6 Board Form Factor .. .......... ................ .......... ................ .......... ......... ................. ......... .......... ........ 32
7 External Interrupt Routing to Intel
8Intel
®
IQ80321 Evaluation Platform Board Peripheral Bus Topology.........................................38
9 Flash Connection on Perip hera l Bus...... ......... .......... ................ .......... ......... ................. ......... ....39
10 UART Connection on the Peripheral Bus...................................................................................40
11 HEX Display Connection on the Peripheral Bus......................................................................... 41
12 Rotary Switch Connection on the Peripheral Bus........................... ....... ..... ....... .. ....... ..... ....... ....42
13 Battery Status Buffer on Peripheral Bus.....................................................................................43
14 JTAG Port Pin-out ......................................................................................................................45
15 RESET Sources .................... .......... ................ .......... ......... ................. ......... .......... ....................51
16 PCI-X Routing Diag ra m on Seco n dary PCI-X Bridge..................... .......... ................................. .53
17 IDSEL Routing for Private Device Configuration........................................................................ 69
18 Interrupt Routing for Private Device Configuration.....................................................................70
19 Flash Connection to Peripheral Bus...........................................................................................72
20 UART Connection to Peripheral Bus..........................................................................................73
21 Hex Display Connection to Peripheral Bus........................................................ .. ....... ..... ....... ....74
22 7-Segment Display Bit Definition........................ ......... .......... ................................. ......... ...........74
23 Register Bitmap: 7-Segment Display MSB FE84 0000h (Write Only)........................................74
24 Register Bitmap: 7-Segment Display LSB FE85 0000h (Write Only).........................................75
25 Intel
26 Redboot Intel
27 Redboot Intel
28 Intel
29 Software Flow Diagram..............................................................................................................90
30 Intel
®
80321 I/O Processor Memory Map................................................................................... 77
®
IQ80321 Hardware Setup Flow Chart............................................................................... 89
®
IQ80321 Hardware Setup Flow Chart.............................................................................107
®
IQ80310 Physical Memory Map.........................................................................79
®
IQ80310 Virtual Memory Map............................................................................80
31 Software Flow Diagram............................................................................................................108
®
80321 I/O Processor...........................................................37
8 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Contents
Tables
1Intel® 80321 I/O Processor Related Documentation List............................................................13
2 Electronic Information .................................................................................................................14
3 Compone nt Reference ... .............................................................................................................14
4 Terms and Definitions.................................................................................................................15
5 Summary of Features.................................................................................................................18
6 Form-Factor/Connectivity Features ................... ....... ....... ....... ....... ............ ....... ....... .......... ....... ..32
7 Power Features .......................................................................................................................... 33
8 DDR Memory Features...............................................................................................................34
9 Supported DIMM Types. .............................................................................................................34
10 Flash Memory Requirements ......................................................................................................35
11 Periph eral Bus Features............... ......... .......... ................ .......... ................ .......... ......... .............. 38
12 Flash ROM Features..................................................................................................................39
13 UART Features ...........................................................................................................................40
14 HEX Display on the Peripheral Bus............................................. .. ..... ....... ..... .. ..... .. .......... .. ..... ..41
15 Rotary Switch Requirements ................. ....... ..... .. .......... .. ....... ..... ....... ..... .. ....... ..... ....... ..... .........42
16 Battery Status Buffer Requirements...........................................................................................43
17 Logic Analyzer Connection.........................................................................................................45
18 Micor J3F2 Signal/Pins............................... ....... .. .......... ....... .. ....... .......... ....... .. ....... .......... .........46
19 Micor J2F1 Signal/Pins............................... ....... .. .......... ....... .. ....... .......... ....... .. ....... .......... .........47
20 Micor J1C1 Sig nal/Pins....... .......... ................ .......... ......... ................. ......... .......... .......................48
21 Micor J3C1 Sig nal/Pins....... .......... ................ .......... ......... ................. ......... .......... .......................49
22 Micor J2C1 Sig nal/Pins....... .......... ................ .......... ......... ................. ......... .......... .......................50
23 Reset Requirements/Schemes...................................................................................................51
24 Switch Summary...................... ......... .......... ................. ......... ......... ................. ......... ...................52
25 Switch S7E1................ .......... ......... ................. ......... ................. ......... .......... ................ ..............54
26 Switch S8E1................ .......... ......... ................. ......... ................. ......... .......... ................ ..............54
27 Switch S8E2................ .......... ......... ................. ......... ................. ......... .......... ................ ..............54
28 Switch S9E1................ .......... ......... ................. ......... ................. ......... .......... ................ ..............54
29 Switch S1D1........... .................................. ......... .......... ................ .......... ......... ............................54
30 Switch S4D1........... .................................. ......... .......... ................ .......... ......... ............................54
31 Jumper Summary .......................................................................................................................55
32 Connector Summary...................................................................................................................55
33 GPIO Header (J3F1) Definition...................................................................................................55
34 Secondary PCI/PCI-X Operation Settings ..................................................................................56
35 Primary PCI/PCI-X Operatio n Settings......... .......... ......... ................. ......... .......... ................ .......56
36 Switch S7E1- 2/3: General Descriptions.....................................................................................57
37 Switch S7E1-2: RST_MODE: Settings and Operation Mode .....................................................57
38 Switch S7E1-3: RETRY: Settings and Operation Mode ............................................................. 57
39 RST_MODE and RETRY Oper at i on Se tting Summary............... ................................. .......... ....57
40 Switch S7E1 - 4/5: De scriptions ...................................... .......... ......... ................................. .......58
41 Switch S7E1 - 4: Settings and Operation Mode .........................................................................58
42 Switch S7E1 - 5: Settings and Operation Mode .........................................................................58
43 Switch S7E1 - 6/7: De scriptions ...................... ......... .......... ................................. ......... .......... ....58
44 Switch S7E1 - 6/7: Se ttings and Operatio n Mode......... ......... ................. ......... .......... ................58
45 Switch S7E1 - 8: Descr iptions ........ .......... ......... ................................. .......... ......... .....................59
46 Switch S7E1 - 8: Settings and Operation Mode .........................................................................59
47 Switch S8E1 - 2: Descr iptions ........ .......... ......... ................................. .......... ......... .....................60
48 Switch S8E1 - 2: Settings and Operation Mode .........................................................................60
49 Switch S8E1 - 3: Descr iptions ........ .......... ......... ................................. .......... ......... .....................60
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Intel® IQ80321 I/O Processor Evaluation Platfo rm
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50 Switch S8E1 - 3: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .60
51 Switch S8E1 - 4: Descriptions....................................................................................................60
52 Switch S8E1 - 4: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .60
53 Switch S8E1 - 5: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .61
54 Switch S8E1 - 5: Driver Mode Output Impedances.. .................................................................. 61
55 Switch S8E1 - 6: Descriptions....................................................................................................61
56 Switch S8E1 - 6: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .61
57 Switch S8E1 - 6: Driver Mode Output Impedances.. .................................................................. 61
58 Switch S8E1 - 7: Descriptions....................................................................................................62
59 Switch S8E1 - 7: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .62
60 Switch S8E1 - 8: Descriptions....................................................................................................62
61 Switch S8E1 - 8: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .62
62 Switch S8E2 - 1/2: Descriptions.................................................................................................63
63 Switch S8E2 - 1/2: Settings and Operation Mode ......................................................................63
64 Switch S8E2 - 4: Descriptions....................................................................................................63
65 Switch S8E2 - 4: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .63
66 Switch S9E1 - (1:3) Descriptions................................................................................................64
67 Switch S9E1 - (1: 3) Settings and Operatio n Mode.................. ......... ................. ......... ................64
68 Switch S9E1 - 4: Descriptions....................................................................................................64
69 Switch S9E1 - 4: Sett ing s a nd Ope ra tion Mode.......... ................. ......... .......... ................ .......... .64
70 Switch S1D1 - 1/2: Descriptions.................................................................................................65
71 Switch S1D1 - 1/2: Settings and Operation Mode................... ................. ......... ......... ................65
72 Switch S4D1 - 1/2: Descriptions................................................................................................. 65
73 Switch S4D1 - 1/2: Settings and Operation Mode................... ................. ......... ......... ................65
74 Switch S4D1 - 3/4: Descriptions................................................................................................. 65
75 Switch S4D1 - 3/4: Settings and Operation Mode................... ................. ......... ......... ................65
76 Jumper J1G2: Descrip tions.......... .................................. ......... ......... .......... ................ .......... ......66
77 Jumper J1G2: Settings and Operation Mode ............................................................................. 66
78 Jumper J3E1: Descriptions....................... .......... ......... ................................. .......... ......... ...........66
79 Jumper J3E1: Settings and Operation Mode............. ................ .......... ................................. ......66
80 Jumper J3G1: Descrip tions.......... .................................. ......... ......... .......... ................ .......... ......66
81 Jumper J3G1: Settings and Operation Mode ............................................................................. 66
82 Jumper J9E1: Descriptions....................... .......... ......... ................................. .......... ......... ...........67
83 Jumper J9E1: Settings and Operation Mode............. ................ .......... ................................. ......67
84 Jumper J9F1: Descri p ti o n s......... ......... .......... ................................. .......... ......... .........................67
85 Jumper J9F1: Settings and Operation Mode.............................................................................. 67
86 Private Device Configuration Requirements...............................................................................69
87 Interrupt Routing for Secondary PCI-X Private Device . . .............................................................70
88 DDR Memory Bias Voltage Minimum/Maximum Values ............................................................71
89 UART Register Settings ............................................................................................................. 73
90 Intel
®
IQ80310 and Intel® IQ80321 Evaluation Platform Board Comparisons ...........................85
91 Related Documents....................................................................................................................87
92 Related Documents..................................................................................................................105
10 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Revision History
Date Revision Description
April 2003 008 Changed name and references of Tester1LED to Tester321LED.
March 2003 007
November 2002 006
21 October 2002 005 Updated typographical errors in AppendixB, “Get ting Started and Debugger”.
07 October 2002 004
August 2002 003 Replaced Section 5, “Software Reference”.
May 20 02 002
February 2002 001 Initial Release.
Revised Appendix B, “Getting Started and Debugger”.
Added Appendix C, “Getting Started and Debugger”.
Added Warning to Section 3.8.4, “Logic-Analyzer Connectors” through Section 3.8.9,
“Mictor J2C1”.
Added Section 3.10.2, “PCIX Initialization Summary”.
Added Appendix B, “Getting Started and Debugger”.
Corrected various typographical errors.
Updated Notes in Table 24, ad de d Spare for S9E1 -3.
Revised Table 26
Revised Factory De fault in Table 62.
Correc ted Switch nome nclatur e in Table 66 / Table 67 and Table 74 / Tabl e 75.
, Table 27 and Table 30.
Contents
Board Manual 11
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Contents
This page intentionally left blank.
12 Board Manual
Introduction 1
1.1 Document Purpose and Scope
This document describes the Intel® IQ80321 Evaluation Platform Board. This platform is targeted for
the Intel
®
80321 I/O processor (80321). The board serves as both an evaluation platform for
developers using 80321 as well as a Customer Reference Board.
The IQ80321 is intended for rapid intelligent I/O development. It is based on the 80321, a
single-function device that integrates the Intel
®
XScale™ co r e ( A RM* archi t ec tu r e co mp l iant)
with intelligent peripherals including a PCI bus application bridge.
1.2 Related Documents
Table 1. Intel® 80321 I/O Processor Related Documentation List
Document Number
®
Intel
80321 I/O Processor Developer’s Manual 273517
®
80321 I/O Pr oc es s or Da tas h ee t 273518
Intel
®
80321 I/O Processor Design Guide 273520
Intel
®
80321 I/O Pr oc es s or S pe ci fic a tion Update 273519
Intel
®
80321 I/O Pr oc es s or P rod uc t B rie f 273525
Intel
®
Migrating from the Intel
®
80321 I/O Pr oc es s or I ni tia lization App li cation No te 273522
Intel
®
Flash Recovery Utility (FRU) Reference Manual 273551
Intel
PCI Local Bus Specification, Revision 2.2
PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a
80310 I/O Processor Chipset to the Intel® 80321 I/O Process or Application Note 273524
http://www.pcisig.co
m/specifications
Intel documentation is available from the local Intel Sales Representative or Intel Literature Sales.
To obtain Intel literature write to or call:
Intel Corpor ation
Literature Sales
P. O. Box 5937
Denver, CO 80217-9808
(1-800-548-4725 ) or vis it the Intel website at http://www.intel.com
Board Manual 13
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Introduction
1.3 Electronic Information
Table 2. Electronic Information
Supp ort Type Location/ Contact
The Intel World-Wide Web (WWW) Location: http://www.intel.com
Customer Support (US and Canada): 800-628-8686
1.4 Component References
Table 3 provides additional information on the major components of IQ80321.
Table 3. Component Re fe rence
Compo nent Part Num be r Additional Info rm at io n
Intel®
StrataFlash®
Gigabit
Ethernet
Rotary Switch DR FC 16
Hex Display HDSP-G211
UART TL 1655 0C
PCI-X Bridge
28F640J3A
82544GC
IBM
21P100BGC
• Manufacturer: Intel Corporation
• URL: http://developer.intel.com/design/flcomp/prodbref/298044.htm
• Manufacturer: Intel Corporation
• URL: http://developer.intel.com/design/network/products/lan/controllers/82544.htm
• Intel® 82544EI/82544GC Gigabit Ethernet Controller Software Developer’s Manual
• Manufacturer: NKK*
• URL: http://us.switchzone.com/series.asp
• Manufacturer: Agilent Technologies*
• URL: http://www.semiconductor.agilent.com/cgi-bin/morpheus/home/home.jsp?pSection=LED
• Manufac turer: Texas instrume nts*
• URL: http://focus.ti.com/docs/prod/productfolder.jhtml?genericPartNumber=TL16C550C
• Manufacturer: IBM*
• IBM 133 PCI- X B rid ge
• URL: http://www.chips.ibm.com/products/storage/pci_x/
14 Board Manual
1.5 Terms an d Def initions
T able 4. Terms and Definitions
Acronym/Term Definition
ARM Refers to both the micropro cessor architectur e and the company that licenses it.
CRB Customer Reference Board
ICE
JTAG
PPCI-X Primary PCI-X.
PSU Power Supply Unit
SPCI-X Secondary PCI-X.
In-Circuit Emulator – A piece of hardware used to mimic all the functions of a
microprocessor.
Joint Test Action Group – A hardware port supplied on Intel
evaluation boards used for in-depth testing and debugging.
Intel® IQ80321 I/O Processor Evaluation Platform
Introduction
®
XScale™ microarchitecture
Board Manual 15
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Introduction
1.6 Intel® 80321 I/O Processor
About the Intel® 80321 I/O processor.
The Intel
create an intelligent I/O processor. This single-function PCI device is fully compliant with the PCI
Local Bus Specification, Revision 2.2. The Intel
• Intel
• PCI - Local Memory Bus A d d ress T r anslatio n U n it (ATU)
• I
• Direct Memory Access (DMA) Controller
• Peripheral Bus Interface (PBI) Unit
• Integrated Memory Controller Unit (MCU)
• Performance Monitor Unit (PMU)
• Application Accelerator Unit (AAU)
• Two I
• Synchronous Serial Port (SSP) Unit
• Eight General Purpose Input Output (GPIO) Ports
Figure 1. Intel
®
80321 I/O processor combines the Intel® XScale™ core with powerful new features to
®
80321 I/O processor-specific features include:
®
XScale™ core
O* Messaging Unit (MU)
2
2
C Bus Interface Units (BIU)
®
80321 I/O Processor Block Diagram
C
2
I
72-Bit
Interface
32-Bit
Interface
Serial Bus
Serial Bus
®
Intel
XScale™
Core
16 Board Manual
DDR
Memory
Controller
Unit
Messaging
Unit
64-bit / 32-bit PCI Bus
Address
Translation
Unit
Peripheral
Bus
Interface
Internal Bus
I2C Bus
Interface
Application
Accelerator
Two
DMA
Channels
Intel® 80321 I/O Processor
SSP
Serial Bus
Performance
Monitoring
Unit
A9646-01
Intel® IQ80321 I/O Processor Evaluation Platform
Introduction
It is an integrated processor that addresses the needs of intelligent I/O applications and helps reduce
intelligent I/O system costs.
The PCI Bus is an industry standard, high performance low latency system bus. The 80321 PCI Bus
is capable of 133 MHz operation in PCI-X mode as defined by the PCI-X Addendum to the PCI Local
Bus Specification, Revision 1.0a. Also, the processor supp orts a 66MHz convent ional PCI mode as
defined by the PCI Local Bus Specification, Revision 2.2. The addition of the Intel
®
XScale™ core
brings intelligence to the PCI bus application bridge.
The 80321 is a single function PCI device. This function represents the address translation unit. The
address translation unit is an “application bridge” as defined by the PCI-X Addendum to the PCI
Local Bus Specification, Revision 1.0a. The 80321 contains PCI configuration space accessible
thro ugh the P CI bus.
®
80321 core is based upon the Intel
XScale™ core. The core processor operates at a maximum
frequency of 600 MHz. The instruction cache is 32 Kbytes (KB) in size and is 32-way set associative.
Also, the core processor includes a data cache that is 32 KB and is 32-way set associative and a mini
data cache that is 2 KB and is 2-way set associative.
The 80321 includes eight General Purpose I/O (GPIO) pins.
Board Manual 17
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Introduction
1.7 Intel® IQ80321 Evaluation Platform Board Features
Table 5. Summary of Features
Feature Definition
Battery Backup Unit: Battery back up circuit for SDRAM – 64 MB for 72 hours.
Ethernet Port: Gigabit Ethernet Debu gging/Download Port (using Intel® 82544).
Flash ROM: 8 MB Fl ash ROM 3.3 V – 16-bit Flash I/F.
Form & Factor:
General Purpose I/O: GPIO Pins are used as described in the appropriate section in this document
Hex Display: Two 7-segment Hex LED displays.
JTAG Port: ARM com pl i a nt JTAG Header.
Logic Analyzer:
Memory:
Onboard Power:
PCI-X Bridge: IBM PCI-X Bridge.
Power LED : Power on (gr een) and FAIL (red) LED indicators.
Primary PC I: 64 bits 133/10 0/66 MHz PCI-X or PCI 66 MHz
RAID Support
Secondary PCI:
Serial P o r t: One Serial Cons ol e P ort (16C550 Co mpa t i ble ).
Modified P CI lo ng -car d for ma t – one Secondary PCI-X (SPCI-X) Expansion slots (right
angel co nnector).
Logic ana ly z er ( mi ct or) in ter f ac e on :
• SPCI-X bus
• Peripheral Bus
Interposer Card may be used for the memory bus – Information supplied separately.
• PC1600 Double Data Rate (DDR) SDRAM (Clock rate: 100 MHz).
• 128 MB 64-bit (expandable to 1GB).
• DIMM so cket.
Board sources +1.25 V, +2.5 V, +3.3 V , +5 V, +12 V, and -12 V from primary PCI
connector.
• All core voltages are derived from 3.3 V supply.
Support for “RAID” Implemen tation – Ability to make the devices plugged in the
secondary expansion slots “Private”.
• 1 x 64-bit PCI-X connector - 66 MHz.
®
82544 Gig ab it E th er n et C on t ro ller also on the se co ndary PC I-X .
• Intel
18 Board Manual
Getting Started 2
The IQ80321 is a software development environment for Intel® 80321 I/O processor.
2.1 Kit Content
The IQ803 21 Kit contains the following items:
®
• Intel
• Code|Lab* Develo pment Environment from Accelerated Technology Incorporated*
• JTAG Emul a t i o n unit
• Serial Cable
• Evaluation Software Bundle
2.2 Hardware Installation
Warning: Static char ges can seve rely da mage the boa rds. Be sure yo u ar e properl y grounde d be fore removi ng
the boar d f rom the anti-static ba g .
IQ80321 Evaluation P latform Board
2.2.1 First-Time Installation and Test
For first-time installation, visually inspect the IQ80321 for any damage made during shipment.
Follow the host system manufacturer instructions for installing a PCI adapter. The board is a
full-length PCI/PCI-X adapter and requires a PCI/PCI-X slot free from obstructions. The extended
height of the board requires the cover of the PC to be kept off.
2.2.2 Power and Backplane Requirements
The IQ80321 requires a 3.3 V supply coming through the PCI/PCI-X primary connector. The board
can be plugged into either a backplane or a desktop PCI/PCI-X slot. When using a backplane, an ATX
rated power supply is required. The IQ80321 only draws from the 3.3 V line of the power supply.
Most ATX power supply units (PSUs) regulate off the 5 V signal. When there is nothing drawing
from the 5.5 V signal most ATX PSU do not supply the 3.3 V correctly. To overcome this, it is
recommended to put a load on the 5.5 V line of the PSU. An old IDE Hard drive can be used for this.
Caution: When plugging the power supply into the backplane, make sure that the power supply is
disconnected from the mains. Most ATX PSUs supply 5 V standby current even when turned Off,
backplane damage is possible.
Board Manual 19
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Getting Started
2.3 Factory Settings
Make sure that the switch/jumper settings are set to proper positions as explained in Section 3.10,
“Switches and Jumpers” on page 52.
2.4 Development Strategy
2.4.1 Supported Tool Buckets
For developing and debugging software application, the production version of the IQ80321 kit
includes the Code|Lab Development Environment. Support for the Code|Lab development
environment is available from ATI*. Please refer to the enclosed package.
The kit also contains evaluation copies for several Software Development Tools. These tools are for
evaluation purposes and do not include any support. Please contact the vendor directly for additional
information and support. They include:
• ARM Developer Suite (ADS) and ARM Firmware Suite (AFS)
• Redhat* GNUPro tools
• LynuxWorks* Embedded Linux RTOS and Development Tools
• Monta Vista* Embedded Linux RTOS and Development Tools
• WindRiver* VxWorks* RTOS and T ornado* Development Tools
• Accelerated Technology Inc*, Nucleus Plus* RTOS and Develo pme nt Tools
2.4.2 Contents of the Flash
The production version of the board contains a trio image for Redhat Redboot*, ARM Angel*, and
ATI Code|Lab Monitor . All early sample/engineering boards have the Redboot target monitor.
20 Board Manual
2.5 T arget Monitors
2.5.1 Redhat R edboot
RedBoot* is an acro nym for “Red Hat Embedd ed Debug and Bo otstrap”, and is th e stand ard
embedded system debug/bootstrap environment from Red Hat, replacing the previous generation of
debug firmware: Cyg Mon and G DB stubs. It pr ovides a bootstrap environment for a range of
embedded operating systems, such as embedded Linux and eCos*, and includes facilities such as
network downloading and debugging. It also provides a simple Flash file system for boot images.
RedBoot pro vides a s et of t ools for downl oading and exec uting programs on embedded targ et
systems, as well as tools for manipulating the target system's environment. It can be used for both
product development (debug support) and for end product deployment (Flash and network booting).
Here are some highlights of RedBoot capabilities:
• Boot scripting support
• Simple command line i nterface for RedBoot conf iguration and management, accessible via
serial (terminal) or Ethernet (telnet) (see Section 2.6.4, “GNUPro GDB/Insight” on page 26)
• Integrated GDB stubs for connection to a host-based debugger (GBD/Insight) via serial or
Ethernet. (Ethe r net connectivit y is limited to local network only)
Intel® IQ80321 I/O Processor Evaluation Platform
Getting Started
• Attribute Configuration - user contr ol of as pects such as system time and da te (when
applicable), default Flash image to boot from, default fail-safe image, static IP address, etc.
• Configurable and extensible, specifically adapted to the target environment
• Network bootstrap support including setup and download, via BOOTP, DHCP and TFTP
• X/Y-Modem suppo rt for image download via serial
• Power On Self Te st
Board Manual 21
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Getting Started
2.5.2 ARM Firmware Suite
The ARM Firmware Suite is a package of low-level routines and libraries that have been designed to
help developers rapidly bring up applications and operating systems on Intel
microarchitecture-based development platforms, such as the IQ80321.
AFS consists of two par ts:
1. µHAL, the ARM standard board API, which is low-level firmware, designe d to provide a
common set of functions across IQ80321. These include
— System initialization software.
— Simple polled serial drivers .
— LED support.
— Timer support.
— Interrupt Controller support.
µHAL manages all the variables associated with the IQ80321. This is provided in source form
for users to embed and distribute in their own products running on an 80321. Included also as
sources and with object distribu tion rights are:
— A simple boot monitor.
— Event chaining libraries, low level ADS C++ support librar ies, benchmarking and
demonstra tion applications.
— Angel* debug target and host communication software that allows inter-working with
ARM Developer Suite.
2. On top of µHAL, AFS provides some useful ap plications, demos and exam ple operating
syst ems such as µCOS-II. The applications ar e cu rrently.
®
XScale™
— Flash Library supporting a range of commonly used Flash parts.
— Flash management utilit ies including support for multiple Flash images using the ARM
Flash format standard.
— PCI Library that fully initializes the PCI subsystem and provide s device driver primi tives.
— DHCP Client over Ethernet of the fast download of binary images into Flash or RAM.
— Full on line documentation.
— Example OS ports.
22 Board Manual
2.5.2.1 ARM Angel
Angel is one of the debug monitor programs for 80321. It is provided in source and binary form with
the ARM Software Development Toolkit. It features:
• Debug capability, including memory inspection, image download and execution,
break-pointing and single step
• CPU and board startup and bas ic exception handling
• A full ANSI C library, using s emihost ing (f ile I/O Ope ration ) to prov ide servic es fro m the host
which are not avai lable on the target
• A full source distri bution for users in developing standalone applica tions
Angel interfaces with the ARM Developer Suite in two ways:
• SW Debuggers use the interface library (Remote_A) to communicate with an Angel target
when debugging or executing code.
• Application c ode uses s oftware interrupt (SWI) calls to request services of Angel either
directly or via the toolkit C library.
2.5.2.1.1 Semihosting (File I/O)
Intel® IQ80321 I/O Processor Evaluation Platform
Getting Started
The ARM debuggers support a feature known as semihosting to enable a target system which does
not support various features required by the ANSI C library to use the features of the host instead. A
simple example of this is the use of a host “window” to provide a system console, to which the output
of printf(), etc..., can be written.
Semihosting is supported in Angel using a set of SWI calls which the ARM C library uses messages
over the CLIB channel of the target<=>host link, and appropriate code in the host library
(Remote_A.dll under Windows) which interprets and executes these requests.
For information on the SWI calls, see the ARM SDT Reference Manual (DUI 0041B) section 8.3:
Angel C Library Support (SWIs)
Board Manual 23
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Getting Started
2.6 Host Communications Examples
How to communicate to the host.
2.6.1 Serial-UART Communication
Using a serial connection:
Figure 2. Serial-UART Communication
Host System
SW Debugger
C/C++
ASM
e
l
b
a
C
l
a
i
r
e
S
Intel® 80321
I/O Processor
Serial
Connectivity
Evaluation Platform Board
Running a
Debug Monitor
Intel
®
IQ80321
Serial
Host System
Connectivity
2.6.2 Ethernet-Network Communication
Using a network connection:
Figure 3. Etherne t-Network Com m unication
Host System
SW Debugger
C/C++
ASM
Ethernet Network
Network
Host System
Connector
PCI/PCI-X Platform
Server/Desktop/Backplane
Network
Connector
Evaluation Platform Board
Intel® 80321
I/O Processor
Running a
Debug Monitor
Intel
PCI/PCI-X Platform
Server/Desktop/Backplane
®
IQ80321
A9647-01
A9648-01
24 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
2.6.3 JTAG Debug Communication
Using a JTAG Emulator:
Figure 4. JTAG Debug Communication
Host System
SW Debugger
C/C++
ASM
JTAG Emulator
Getting Started
JTAG
Connector
Intel® 80321
I/O Processor
Running a
Debug Monitor
®
IQ80321
Evaluation Platform Board
Intel
Host System
Parallel
Port
PCI/PCI-X Platform
Server/Desktop/Backplane
A9649-01
Board Manual 25
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Getting Started
2.6.4 GNUPr o GDB/Insight
2.6.4.1 Communicating with Redboot
Hardware Setup:
• Host with UNIX/Linux or Win32 installed
®
• Intel
• Redhat Redboot monitor Flashed to the platform board
Recommended Mapping of UART Ports to Host Com Ports
• Host port connecte d to the platform board UART.
The following communication tools can be used:
• Win32 using HyperTerminal
• UNIX using Kermit
• Linux using Miniport
• Solaris using Tip
IQ80321 Evaluation Platform Board with serial cable
Redboot Monitor startup:
Description: terminal emulator runs on host and communic ates with the board via the serial cable.
®
Start: Power up the Intel
7-segment LEDs sequentially display “88”, “A0” through “A6”, followed by “SL” (Scr ub
loop). When RedBoot is succes sfully booted, it displays the characters “A1” on the LEDs.
When the final state of “A1” does not occur, reset the processor again.
The time for reset is approximately 1 or 2 seconds.
Win32 on Host Connecting with HyperTerminal.
IQ80321 Evaluati on Platform Bo ard. While the 'reset' is asserte d, the two
26 Board Manual
Intel® IQ80321 I/O Processor Evaluation Platform
Getting Started
To bri ng up a HyperTerminal session on a Win32 pl atform: Go to Start, P rograms, Acce ssories ,
Communications, HyperTerminal
• HyperTerminal setup scree ns :
— “Connection Description” Panel:
•Enter name.
— “Connect To” Panel:
• Select host com2 port (or whic hever port you are using).
— Port Settings:
• Bits per second: 115200
• Data Bits: 8
• Parity: none
• Stop Bits: 1
• Flow Control: none
— Start HyperTerminal:
• Select Call from Hyper Termi nal panel.
— Reset or power up IQ80321 board.
— The Host screen reads:
RedBoot(tm) debug environment - built dd:mm:yy, Mon dd 2001
Platform: IQ80321
Copyright (C) 2000, Red Hat, Inc.
RAM: 0xa0000000-0xa2000000
FLASH: 0x00000000 - 0x00800000, 64 blocks of 0x00020000 bytes each.
IP: 192.168.0.1, Default server: 0.0.0.0
RedBoot>
For further information on the GDB/Insight Debugger, refer to the content of the GNUPro CD and/or
the GNUPro Debugging Tools manual. This setup assumes that Redboot is Flashed on the board.
Board Manual 27
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Getting Started
2.6.4.2 Connecting with GDB
Below are the GDB commands entered from the command prompt. Be sure system path is set to
access “xscale-elf-gdb.exe”. File name in example “hello”. Bold type represents input by user:
>xscale-elf-gdb -nw hello
1
• Start GDB executable, loads debug information and symbols.
(GDB) set remotebaud 115200
• Set baud rate for the IQ80321.
Conn ect COM port:
• When using Windows command prompt:
(GDB) target remote com1
Example: screen output from board to host (GDB) target remote com1:
Remote debugging using com1.
(GDB)
• When using Linux
(GDB) target remote /dev/ttyS0
(GDB) load
• Load the program to the board , may hav e to wai t a few seconds.
(GDB) break main
• Set breakpo int at main.
(GDB) continue
• Start the program using 'conti nue' verse the usual 'run'.
• Program hits break at main() and wait.
1. To be supplied separately.
28 Board Manual
2.6.5 ARM Extended Debugger
For further information on the AXD Debugger, refer to the content of the ARM ADS. This setup
assumes that Angel is Flashed on the board:
Descriptio n: Terminal emu lator runs on hos t and communi cates with t he board via the serial c able.
Start: Power up the target board. After the ‘reset’ is asserted, the two 7-segment LEDs
display blank. The time for reset is approximately 1 or 2 seconds.
Assumptions: ARM Developer Suite (ADS) is loaded to Win32 Host, Angel is Flashed to ROM,
Host com port is connected to board serial port ## and compiled project file
Worchester.mcp
Following are the steps from setup to running a project file that has been previously created and
named Worchester.mcp:
1. From Windows start m enu:
a. Programs -> ARM Developer Suite v1.1 -> Metrowerks CodeWarrior
2. From CodeWarrior open project and start debugger:
a. File -> Open (All files) -> W orchester .mcp
1
exists.
Intel® IQ80321 I/O Processor Evaluation Platform
Getting Started
b. Project -> Enable Debugger
c. Project -> Debug (AXD Interface comes up)
3. From AXD (ARM extended debugger) configure and connect:
a. Connect Host to Target with serial cable
Options -> Configure Target … -> Set Target Environment = ADP
Select Configure
Select … , A RM Serial Driv er, OK
Endian: Little
Configure… , Serial Port:= COM1, Baud Rate:=115200, OK, OK, OK
b. Load Image and Start
On AXD menu: File -> Load Image… -> File name: Cyclone.axf -> Open ->
c. Execute -> Select Go, Breakpoints
4. The LEDs now Flashes ‘80321’. You can set breakpoints and step to control spe ed or stop
location.
1. To be supplied separately.
Board Manual 29
Intel® IQ80321 I/O Processor Evaluation Platfo rm
Getting Started
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30 Board Manual
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