Intel BX80580Q9400 - Core 2 Quad 2.66 GHz Processor, Core 2 Duo SL9400, Core 2 Duo SU9400 User Manual
TM
Intel® Core
2 Duo Processor
®
and Intel
GS45 Express Chipset
(with DDR3 System Memory)
Development Kit User’s Manual
September 2008
Document Number: 320503-001
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR
IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT
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reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from
future changes to them.
Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor
family, not across different processor families. See http://www.intel.com/products/processor_number
The Intel
may cause the product to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained
by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com
BunnyPeople, Celeron, Celeron Inside, Centrino, Centrino logo, Core Inside, Dialogic, FlashFile, i960, InstantIP, Intel, Intel logo,
Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Core, Intel Inside, Intel Inside logo, Intel. Leap ahead., Intel.
Leap ahead. logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel
Viiv, Intel vPro, Intel XScale, IPLink, Itanium, Itanium Inside, MCS, MMX, Oplus, OverDrive, PDCharm, Pentium, Pentium Inside,
skoool, Sound Mark, The Journey Inside, VTune, Xeon, and Xeon Inside are trademarks or registered trademarks of Intel
Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2007-2008, Intel Corporation. All Rights Reserved.
®
CoreTM 2 Duo processor and Intel® GS45 Express Chipset may contain design defects or errors known as errata which
.
for details.
2 Development Kit User’s Manual
Contents
1 About This Manual ............................................................................................8
1.1 Content Overview...................................................................................8
1.2 Text Conventions ...................................................................................9
1.3 Glossary of Terms and Acronyms............................................................10
1.4 Development Kit Technical Support......................................................... 14
1.4.1 Online Support........................................................................14
1.4.2 Additional Technical Support ..................................................... 14
1.5 Related Documents...............................................................................15
1.5.1 Ordering Hard Copies of Documents........................................... 15
2 Getting Started...............................................................................................17
2.1 Overview ............................................................................................17
2.2 Development Kit Contents .....................................................................17
2.3 Additional Required Hardware (Not Included in the Development Kit)...........18
2.4 Additional Required Software (Not included in the Development Kit) ............ 19
2.5 Workspace Preparation..........................................................................20
2.6 System Setup and Power-Up.................................................................. 21
2.6.1 Using the AC to DC Power Supply (Mobile Power Mode) ................ 22
2.7 Power Down ........................................................................................23
2.8 System BIOS ....................................................................................... 23
2.8.1 Configuring the BIOS ...............................................................23
2.8.2 Programming BIOS Using a Bootable USB Device......................... 24
3 Development Board Features............................................................................26
3.1 Block Diagram .....................................................................................26
3.2 Mechanical Form Factor......................................................................... 26
3.3 Development Board Key Features ...........................................................26
3.4 Software Key Features ..........................................................................30
3.4.1 AMI BIOS............................................................................... 30
3.5 Thermal Management ...........................................................................31
3.6 System Features and Operation..............................................................31
3.6.1 Processor Support ...................................................................31
3.6.2 Processor Voltage Regulators ....................................................32
3.6.3 Front-Side Bus (FSB) ...............................................................32
3.6.4 Processor Power Management ...................................................32
3.6.5 Processor Active Cooling...........................................................32
3.6.6 Manual Processor Voltage ID (VID) Support ................................ 32
3.6.7 Chipset .................................................................................. 33
3.6.8 System Memory ...................................................................... 33
3.6.9 Video Display..........................................................................34
3.6.10 PCIe Slots ..............................................................................34
3.6.11 PCI Slots................................................................................ 35
3.6.12 On-Board LAN.........................................................................35
3.6.13 Serial Peripheral Interface (SPI) ................................................36
3.6.14 Soft Audio/Soft Modem ............................................................36
Development Kit User’s Manual 3
SATA Storage .........................................................................36
3.6.15
3.6.16 USB Connectors ......................................................................37
3.6.17 LPC Super I/O (SIO)/LPC Slot ...................................................38
3.6.18 Serial, IrDA ............................................................................38
3.6.19 Intel® 82802 Firmware Hub Device Support ...............................38
3.6.20 System Management Controller (SMC)/Keyboard Controller (KBC)..39
3.6.21 Clocks ...................................................................................39
3.6.22 Real Time Clock ...................................................................... 39
3.6.23 Thermal Monitoring .................................................................39
3.6.24 Power Supply Solution ............................................................. 40
3.6.25 Manual VID support for Graphics VR...........................................40
3.6.26 Debug Interfaces.....................................................................41
3.6.27 Board Form-Factor ..................................................................41
3.7 Power Management ..............................................................................41
3.7.1 Power Management States........................................................41
3.8 Testability ...........................................................................................42
3.9 Power Measurement Support..................................................................42
3.10 Power Supply Usage and Recommendation ..............................................47
4 Development Board Physical Reference ..............................................................48
4.1 Board Components ...............................................................................48
4.2 Connectors..........................................................................................51
4.2.1 Back Panel Connectors ............................................................. 51
4.3 Configuration Settings...........................................................................53
4.3.1 Configuration Jumpers/Switches................................................53
4.3.2 BSEL Jumper Settings.............................................................. 56
4.4 Power and Reset Push Buttons ............................................................... 56
4.5 Net Detect Button ................................................................................57
4.6 LEDs ..................................................................................................58
4.7 Other Headers ..................................................................................... 59
4.7.1 H8 Programming Headers......................................................... 59
4.7.2 Sideband and Test Headers.......................................................60
Appendix A Add-In Cards..................................................................................................61
A.1 Port 80-83 Add-in Card (Included) .......................................................... 61
A.2 PCI Expansion Card (Thimble Peak 2) (Included) ......................................62
A.3 HDMI and Display Port Video Interface Add-In Card (Eaglemont) (Included) .62
A.3.1 Rework to change Eaglemont Card from HDMI to Display Port........63
A.3.2 AUX Pull Down Rework............................................................. 65
A.4 Intel® High Definition Audio Interposer Card (Mott Canyon 4) (Not Included)66
A.4.1 Mott Canyon 4 Jumper Settings.................................................67
A.5 ExpressCard Module Interposer (Duck Bay 3) (Not Included) ......................69
A.6 PCI Express mini card Interposer (Upham IV) (Not Included)......................70
A.7 Docking Connector Card (Saddlestring II) (Not Included) ...........................71
Appendix B Rework Instructions ........................................................................................74
B.1 Internal HDMI Enabling .........................................................................74
B.2 Enabling the Integrated Trusted Platform Module (iTPM) ............................74
B.3 Enabling External HDMI.........................................................................75
B.4 Support for Upham 4 ............................................................................75
B.5 Low Voltage High-Definition (HD) Audio Rework .......................................75
4 Development Kit User’s Manual
Appendix C
Appendix D CPU Thermal Solution (Heatsink) Installation ...................................................... 78
Programming System BIOS Using a Flash Programming Device .............................77
Figures
Figure 1. Fern Hill Block Diagram ...................................................................... 26
Figure 2. Fern Hill Development Board Components ............................................. 49
Figure 3. Back Panel Connectors .......................................................................51
Figure 4. D-Connector to Component Video Cable................................................ 52
Figure 5. D-Connector to Composite Video Cable .................................................52
Figure 6. D-Connector to S-Video Cable ............................................................. 52
Figure 7. Location of the Configuration Jumpers/Switches.....................................53
Figure 8. Power On and Reset Buttons ............................................................... 57
Figure 9. Net Detect Button .............................................................................. 57
Figure 10. Port 80-83 Interposer Card................................................................61
Figure 11. PCI Expansion Card (Thimble Peak 2) ................................................. 62
Figure 12. Eaglemont Add-in Card ..................................................................... 63
Figure 13. Location of Resistors for Rework (before Rework) .................................64
Figure 14. Location of Resistors for Rework (after Rework)....................................64
Figure 15. Location of Resistors for Rework.........................................................65
Figure 16. AUX Pull-Down Rework .....................................................................66
Figure 17. Mott Canyon 4 Interposer Card ..........................................................67
Figure 18. Duck Bay 3 Interposer Card...............................................................69
Figure 19. Upham IV Interposer Card.................................................................70
Figure 20. Saddlestring II Docking Connector......................................................72
Figure 21. iHDMI Rework Instruction 1...............................................................74
Figure 22. iHDMI Rework Instruction 2...............................................................74
Figure 23. Low Voltage HD Audio Rework (Always Rail) ........................................75
Figure 24. Low Voltage HD Audio Rework (Sus Rail)............................................. 76
Figure 25. Step 4 - Backplate Pins..................................................................... 79
Figure 26. Step 6 - Applying the Thermal Grease................................................. 80
Figure 27. Step 7 - Squeezing Activation Arm ..................................................... 81
Figure 28. Step 8 - Installing the Heatsink.......................................................... 82
Figure 29. Step 9 - Plugging in the Fan .............................................................. 83
Figure 30. Step 10 - Completed Assembly ..........................................................84
Development Kit User’s Manual 5
Tables
Table 1. Text Conventions..................................................................................9
Table 2. Definitions of Terms ............................................................................10
Table 3. Acronyms .........................................................................................11
Table 4. Related Documents .............................................................................15
Table 5. Intel Literature Centers........................................................................15
Table 6. Fern Hill Feature Set Summary .............................................................27
Table 7. TV–Out Connections............................................................................34
Table 8. PCI Express Ports................................................................................35
Table 9. Selection of I/O Voltage for the High Definition Audio............................... 36
Table 10. SATA Ports....................................................................................... 37
Table 11. USB Ports mapping............................................................................38
Table 12. System Power Management States ......................................................41
Table 13. System Power Management M-States...................................................42
Table 14. Digital Multi-Meter Comparison ........................................................... 43
Table 15. System Voltage Rails .........................................................................43
Table 16. Development Board Components......................................................... 50
Table 17. Configuration Jumpers and Switches Settings........................................ 54
Table 18. BSEL Jumper Settings........................................................................ 56
Table 19. Power-On and Reset Push buttons .......................................................56
Table 20. LEDs ...............................................................................................58
Table 21. H8 Programming Jumpers .................................................................. 60
Table 22. Mott Canyon 4 Configuration Jumper/Switches Settings.......................... 68
Table 23. Upham IV default Jumper/Switches Settings .........................................71
Table 24. Board Rework to Support Display Port on Saddlestring ...........................73
6 Development Kit User’s Manual
Revision History
Document
Number
320503 001 Public launch release Sept. 2008
Revision
Number
Description Revision Date
§
Development Kit User’s Manual 7
1 About This Manual
About This Manual
This user’s manual describes the use of the Intel® CoreTM 2 Duo Processor (LV and
ULV) and Intel
memory. This manual has been written for OEMs, system evaluators, and embedded
system developers. This document defines all jumpers, headers, LED functions, and
their locations on the development board, along with features of the board’s
subsystems. This manual assumes basic familiarity with installing and configuring
hardware and software in a personal computer system.
The differences between the Fern Hill (GS45, DDR3), Pillar Rock (GM45, DDR2) and
Silver Cascade (GM45, DDR3) User Manuals are in these sections:
• System Memory Section 3.6.8
• D
• Confi
• BS
ll other components and references are the same between boards.
A
For the latest information about the Intel® CoreTM 2 Duo processor and Intel® GS45
Express Chipset Development Kit, visit:
http://developer.intel.com/design/intarch/devkits/index.htm
For design documents related to the Intel® CoreTM 2 Duo processor and Intel® GS45
Express Chipset please visit:
®
GS45 Express Chipset development kit with DDR3 SDRAM system
evelopment Board Feature Set Summary Table (Table 6)
guration Jumpers and Switches Settings Table (Table 17),
EL Jumper Settings Table (Table 18)
Processor
Chipset
: http://developer.intel.com/design/intarch/core2duo/tech_docs.htm
: http://www.intel.com/products/embedded/chipsets.htm
1.1 Content Overview
Chapter 1.0, “About This Manual” — This chapter contains a description of conventions
used in this manual. The last few sections explain how to obtain literature and contact
customer support.
Chapter 2.0, “Getting Started”— Describes the contents of the development kit. This
chapter explains the basics steps necessary to get the board running. This chapter
also includes information on how to update the BIOS.
Chapter 3.0, “Development Board Features” — This chapter provides details on the
hardware features of the development board. It explains the Power Management and
Testability features.
8 Development Kit User’s Manual
About This Manual
Chapter 4.0, “Development Board Physical Reference”— This chapter provides a list of
major board components and connectors. It gives a description of jumper settings
and functions. The chapter also explains the use of the programming headers.
Appendix A, “Add-In Cards” – This appendix contains information on add-in cards
available from Intel that can be used with the development board.
Appendix B, “Rework Instructions” – This appendix contains rework instructions for
the development board and for some of the add-in cards to enable additional
supported features and functionality.
Appendix C, “Programming System BIOS Using a Flash Programming Device” — This
appendix provides step by step instructions on programming the flash using a flash
programming device
Appendix D, “CPU Thermal Solution (Heatsink) Installation Instructions” — This
appendix gives detailed installation instructions for the Intel
heatsink.
1.2 Text Conventions
The notations listed in Table 1 may be used throughout this manual.
Table 1. Text Conventions
Notation Definition
# The pound symbol (#) appended to a signal name indicates that the signal
is active low. (e.g., PRSNT1#)
Variables Variables are shown in italics. Variables must be replaced with correct
values.
Instructions Instruction mnemonics are shown in uppercase. When you are
programming, instructions are not case-sensitive. You may use either
uppercase or lowercase.
Numbers Hexadecimal numbers are represented by a string of hexadecimal digits
followed by the character H. A zero prefix is added to numbers that begin
with A through F. (For example, FF is shown as 0FFH.) Decimal and binary
numbers are represented by their customary notations. (That is, 255 is a
decimal number and 1111 is a binary number. In some cases, the letter B
is added for clarity.)
Units of Measure
A
GByte
KByte
KΩ
mA
MByte
MHz
ms
mW
ns
pF
W
The following abbreviations are used to represent units of measure:
amps, amperes
gigabytes
kilobytes
kilo-ohms
milliamps, milliamperes
megabytes
megahertz
milliseconds
milliwatts
nanoseconds
picofarads
watts
®
CoreTM 2 Duo processor
Development Kit User’s Manual 9
Notation Definition
V
µA
µF
µs
µW
Signal Names Signal names are shown in uppercase. When several signals share a
volts
microamps, microamperes
microfarads
microseconds
microwatts
common name, an individual signal is represented by the signal name
followed by a number, while the group is represented by the signal name
followed by a variable (n). For example, the lower chip-select signals are
named CS0#, CS1#, CS2#, and so on; they are collectively called CSn#.
A pound symbol (#) appended to a signal name identifies an active-low
signal. Port pins are represented by the port abbreviation, a period, and
the pin number (e.g., P1.0).
1.3 Glossary of Terms and Acronyms
Table 2 defines terms used in this document.
Table 2. Definitions of Terms
About This Manual
Term/Acronym Definition
Assisted Gunning
Transceiver Logic+
Asynchronous
GTL+
Fern Hill The name of the development board that uses Intel® Core™ 2 Duo
Infrared Data
Assoc.
IMVP6+ The Intel Mobile Voltage Positioning specification for the Intel® Core™ 2
The front-side bus uses a bus technology called AGTL+, or Assisted
Gunning Transceiver Logic. AGTL+ buffers are open-drain, and require
pull-up resistors to provide the high logic level and termination. AGTL+
output buffers differ from GTL+ buffers with the addition of an active
pMOS pull-up transistor to assist the pull-up resistors during the first clock
of a low-to-high voltage transition.
The processor does not utilize CMOS voltage levels on any signals that
connect to the processor. As a result, legacy input signals such as A20M#,
IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, PWRGOOD, SMI#, SLP#, and
STPCLK# utilize GTL+ input buffers. Legacy output signals (FERR# and
IERR#) and non-AGTL+ signals (THERMTRIP# and PROCHOT#) also
utilize GTL+ output buffers. All of these signals follow the same DC
requirements as AGTL+ signals, however the outputs are not actively
driven high (during a logical 0 to 1 transition) by the processor (the major
difference between GTL+ and AGTL+). These signals do not have setup or
hold time specifications in relation to BCLK[1:0], and are therefore
referred to as “Asynchronous GTL+ Signals”. However, all of the
Asynchronous GTL+ signals are required to be asserted for at least two
BCLKs in order for the processor to recognize them.
processor SU9400 or SL9400 with the Mobile Intel GS45 Express Chipset
(Small Form Factor) and DDR3 SDRAM
The Infrared Data Association (IrDA) has outlined a specification for serial
communication between two devices via a bi-directional infrared data
port. The development board has such a port and it is located on the rear
of the board between the two USB connectors.
Duo Processor. It is a DC-DC converter module that supplies the required
voltage and current to a single processor.
10 Development Kit User’s Manual
About This Manual
Term/Acronym Definition
Media Expansion
Card
Pad The electrical contact point of a semiconductor die to the package
Pillar Rock The name of the development board that uses Intel® Core™ 2 Duo
Pin The contact point of a component package to the traces on a substrate,
Silver Cascade The name of the development board that uses Intel® Core™ 2 Duo
System Bus The System Bus is the microprocessor bus of the processor.
System
Management Bus
VCC (CPU core) VCC (CPU core) is the core power for the processor. The system bus is
Table 3 defines the acronyms used throughout this document.
Table 3. Acronyms
Acronym Definition
The Media Expansion Card (MEC) provides digital display options through
the SDVO interface. The MEC card also incorporates video-in via a x1 PCI
Express* port.
substrate. A pad is only observable in simulations.
processor with the Mobile Intel GM45 Express Chipset and DDR2 SDRAM
such as the motherboard. Signal quality and timings may be measured at
the pin.
processor with the Mobile Intel GM45 Express Chipset and DDR3 SDRAM
A two-wire interface through which various system components may
communicate.
terminated to VCC (CPU core).
AC Alternating Current
ACPI Advanced Configuration and Power Interface
ADD2 Advanced Digital Display 2
ADD2N Advanced Digital Display 2 Normal
AGTL or AGTL+ Assisted Gunning Transceiver Logic (See also Table 2 above)
AMI American Megatrends Inc. (BIOS developer)
AMPS or iAMPS (Intel) Adaptive Mobile Power System
AMT or iAMT (Intel) Active Management Technology
ATA Advanced Technology Attachment (disk drive interface)
ATX Advance Technology Extended (motherboard form factor)
BGA Ball Grid Array
BIOS Basic Input/Output System
BSEL Bus Select (Front Side Bus frequency control signals)
CL Controller Link
CMOS Complementary Metal-Oxide-Semiconductor
COM Communications
CPU Central Processing Unit (processor)
Development Kit User’s Manual 11
About This Manual
Acronym Definition
CRB Customer Reference Board
DC Direct Current
DC Dual-Core
DDR Double Data Rate
DDR2 Double Data Rate SDRAM version 2
DDR3 Double Data Rate SDRAM version 3
DIMM Dual Inline Memory Module
DMI Direct Memory Interface
DOS Disk Operating System
DP Display Port
DPST or iDPST (Intel) Display Power Savings Technology
EBL Extended Battery Life
EC Embedded Controller
ECC Error Correcting Code
EHCI Enhanced Host Controller Interface
EMA Extended Media Access
eSATA External SATA (Serial ATA)
ESD Electrostatic Discharge
FCBGA Flip Chip Ball Grid Array
FCPGA Flip Chip Pin Grid Array
FS Full-speed. Refers to USB
FSB Front Side Bus
FWH Firmware Hub
GbE Gigabit Ethernet
GLCI Gigabit LAN Connect Interface
GS45 Intel® GS45 Express Graphics and Memory Controller Hub
GMCH Graphics and Memory Controller Hub
GND Ground (VSS)
GPIO General Purpose Input/Output
HDA High Definition Audio
HDMI High Definition Media Interface
HS High-speed. Refers to USB
ICH I/O Controller Hub
ICH9M I/O Controller Hub 9M (Mobile)
ICH9M-E SFF ICH9M-Enhanced, Small Form Factor
12 Development Kit User’s Manual
About This Manual
IDE Integrated Drive Electronics
IMVP-6 or (Intel MVP-6) Intel Mobile Voltage Positioning – revision 6
I/O Input / Output
IrDA Infrared Data Association
ITP Integrated Test Port
KBC Keyboard Controller
L2 Level-2 (Cache)
LAN Local Area Network
LED Light Emitting Diode
LPC Low Pin Count
LS Low-speed. Refers to USB
LV Low Voltage
LVDS Low Voltage Differential Signaling (Video Standard)
mBGA Mini Ball Grid Array
MEC Media Expansion Card
MHz Mega-Hertz
MT/s Mega Transfers per second
NMI Non-Maskable Interrupt
OEM Original Equipment Manufacturer
PEG PCI Express Graphics
PCI Peripheral Connect Interface
PCIe PCI Express*
PCM Pulse Code Modulation
POST Power On Self Test
PS/2 Personal System/2 (Keyboard and Mouse Connector)
PSI2 Power Status Indicator - 2
PWM Pulse Width Modulation
RAID Redundant Array of Inexpensive Disks
RCA (Type of Audio and Video Connector)
RTC Real Time Clock
SATA Serial ATA
SDVO Serial Digital Video Output
SIO Super Input/Output
SKU (SKU Number) Stock Keeping Unit (Stock Keeping Unit Number)
SMC System Management Controller
Acronym Definition
Development Kit User’s Manual 13
About This Manual
Acronym Definition
SODIMM or SO-DIMM Small Outline Dual In-line Memory Module
SOIC-8 or SOIC-16 Small Outline Integrated Circuit (8 or 16 pin package)
SPI Serial Peripheral Interface
SPWG Standard Panels Working Group - http://www.spwg.org/
SRC Source (Clock)
SUT System Under Test
TME Technical Marketing Engineer
TPM Trusted Platform Module
TV or TVO Television (Output)
µBGA Micro Ball Grid Array
UHCI Universal Host Controller Interface
ULV Ultra-Low Voltage
USB Universal Serial Bus
VGA Video Graphics Adapter
VID Voltage Identification
WiMAX (Wireless Communications Standard)
WLAN Wireless Local Area Network
VREG or VR Voltage Regulator
WWAN Wireless Wide Area Network
VCC Power Signal
x1 (x2, etc) By 1 (By 2, etc) (refers to number of PCIe Links)
XDP eXtended Debug Port
1.4 Development Kit Technical Support
1.4.1 Online Support
Intel’s web site (http://www.intel.com/) provides up-to-date technical information and
product support. This information is available 24 hours per day, 7 days per week,
providing technical information whenever you need it.
1.4.2 Additional Technical Support
If you require additional technical support, please contact your Intel Representative or
local distributor.
14 Development Kit User’s Manual
About This Manual
1.5 Related Documents
Table 4 lists publicly available documents related to this development kit. For
additional documentation, please contact your Intel Representative.
Table 4. Related Documents
Document Title Location
Intel® Core™ 2 Duo Processor on 45-nm
process Datasheet
Mobile Intel® 4 Series Express Chipset
Family Datasheet
Intel® I/O Controller Hub 9 (ICH9) Family
Datasheet
[Montevina] Small Form Factor (SFF)
Platform Design Guide
[Montevina] Small Form Factor (SFF)
Platform, Fern Hill (DDR3) – Customer
Reference Board Schematic
http://www.intel.com/design/intarch/core2duo/te
ch_docs.htm
http://www.intel.com/Products/Notebook/Chipset
s/GS45/GS45-technicaldocuments.htm
http://www.intel.com/Products/Notebook/Chipset
s/GS45/GS45-technicaldocuments.htm
Contact your Intel representative for access to
this document. (Doc #358405)
Contact your Intel representative for access to
this document. (Doc #358533)
1.5.1 Ordering Hard Copies of Documents
To order hard copies of product literature, do the following:
1. Determine the SKU Number
The SKU number is listed at the bottom of the download page for that
document. It is also usually the first 6 digits of the name of the PDF file, such
as: 12345612.pdf.
2. Call or E-mail a Request
Call: To place an order for a publication or text in hardcopy or CD form,
please contact the Intel Literature Fulfillment Centers listed in Table 5
Table 5. Intel Literature Centers
Location Telephone Number
U.S. and Canada 1-800-548-4725
International 1-303-675-2148
Fax 1-303-675-2120
Development Kit User’s Manual 15
.
About This Manual
Email: To order a publication or text in hardcopy or CD form, send your
request to: intelsupport@hibbertgroup.com
Please make sure to include in your e-mailed request:
SKU #
Company Name
Your Name (first, last)
Full mailing address
Daytime Phone Number in case of questions
Note: Please be aware not all documents are available in all media types. Some may only be
available as a download.
§
16 Development Kit User’s Manual
Getting Started
2 Getting Started
This chapter identifies the development kit’s key components, features and
specifications. It also details basic development board setup and operation.
2.1 Overview
The development board consists of a baseboard populated with the Intel® CoreTM 2
Duo SL9400 or SU9400 processor, the Intel
board components and peripheral connectors.
This development kit is available with either a Low-Voltage Intel
Processor SL9400 or an Ultra-Low Voltage Intel
note below). Both the LV and ULV processors are 22 mm x 22 mm, and are
sometimes referred to as “Small Form Factor”, or SFF components. The Intel
Express Chipset included on this development board is also the Small Form Factor
(SFF) version of the Intel
may sometimes be referred to by its code name, Fern Hill. This manual will cover the
features and details of the Fern Hill development board.
Note: The Intel® Core™ 2 Duo SU9400 processor at 1.4 GHz core frequency is not on the
Intel embedded roadmap offering and as such does not have embedded market 7
year availability. The Intel® Core™ 2 Duo SU9300 processor at 1.2 GHz core
frequency is on the Intel embedded roadmap offering and has embedded market 7
year availability.
®
GM45 Express Chipset. The development board in this kit
®
2.2 Development Kit Contents
The following hardware, software and documentation are included in the development
kit. Check for damage that may have occurred during shipment. Contact your sales
representative if any items are missing or damaged.
GS45 Express Chipset, and other system
®
®
CoreTM 2 Duo Processor SU9400 (see
CoreTM 2 Duo
®
GS45
• Letter to the Customer
• Development Kit User’s Manual (this document)
• Software CD-ROM, which includes (see the readme.txt file for a complete list
of CD-ROM contents):
o Embedded system BIOS
o BIOS installation utilities
o Chipset drivers
o Intel Embedded Graphics Drivers
o Intel
®
Active Management Technology (AMT) software installation kit
Document Number: 320249-001
• Pre-assembled development system, which includes:
o Fern Hill development board
o Plexiglass stand with Acrylic pad
o Mounting screws and standoffs
®
o Intel
o Processor thermal solution and CPU back plate
o Intel
o GMCH (GS45) heatsink
o I/O Controller Hub 9M-Enhanced Small Form Factor (ICH9M-E SFF)
o Type 2032, 3 V lithium coin cell battery
o 512 MByte DDR3 Memory On-Board (1067 MT/s, 7-7-7, PC3-8500
CoreTM 2 Duo processor SU9400 or SL9400
®
GS45 Express Chipset Graphics and Memory Controller Hub
(GMCH)
compatible)
Getting Started
o Port 80 display card
o Power Supply
o 80 GByte SATA Hard Disk Drive
o DVD-ROM Drive
o Disk Drive Power and SATA Cables
• One HDMI and Display Port add-in card (codename Eaglemont)
• One PCI Extension Card (codename Thimble Peak 2)
• One AC to DC Power Adapter
2.3 Additional Required Hardware (Not Included in
the Development Kit)
The following additional hardware may be necessary to operate the development
board.
VGA Monitor: Any standard VGA or multi-resolution monitor may be used. The setup
instructions in this chapter assume the use of a standard VGA monitor or LCD
monitor.
Keyboard: The development board supports both PS/2 and USB style keyboards.
Mouse: The development board supports both PS/2 and USB style pointing devices.
18 Development Kit User’s Manual
Getting Started
Hard Drives and Optical Disc Drives and cables: One SATA hard disk drive and
one SATA optical DVD Drive are included in the development kit. Up to four SATA
drives and two IDE devices (master and slave) may be connected to the development
board. An optical disc drive (included) may be used to load the OS. All these storage
devices may be attached to the board simultaneously.
Video Adapter Card: Integrated video is output from the VGA connector on the back
panel of the development board. Alternately, a standard PCI Express* video adapter
card, ADD2 card or MEC video adapter card may be used for additional display
flexibility. Please contact the respective vendors for drivers and software for adapters
not provided with this development kit. Check the BIOS and the graphics driver,
where appropriate, for the proper video output settings.
Network Adapter and cables: A Gigabit network interface is provided on the
development board. The network interface will not be operational until after all the
necessary drivers are installed. A standard PCI/PCI Express* adapter may be used in
conjunction with, or in place of, the onboard network adapter. Please contact the
respective vendors for drivers and necessary software for adapters not provided with
this development kit.
You must supply appropriate network cables to utilize the LAN connector or any other
installed network cards.
Other Devices and Adapters: The development board functions much like a
standard desktop computer motherboard. Most PC-compatible peripherals can be
attached and configured to work with the development board.
2.4 Additional Required Software (Not included in the
Development Kit)
The following additional software may be necessary to operate the development
board.
Operating System: The user must supply any needed operating system installation
files and licenses.
Application Software: The user must supply any needed application software.
Development Kit User’s Manual 19
Getting Started
2.5 Workspace Preparation
Caution: The development kit is shipped as an open system to provide flexibility in changing
hardware configurations and peripherals in a lab environment. Since the board is not in a
protective chassis, the user is required to take the following safety precautions in handling
and operating the board.
1. The power supply cord is the main disconnect device to main power (AC power).
The socket outlet should be installed near the equipment and should be readily
accessible.
2. To avoid shock, ensure that the power cord is connected to a properly wired and
grounded receptacle.
3. Ensure that any equipment to which this product will be attached is also
connected to properly wired and grounded receptacles.
4. Use a flame retardant work surface
5. Ensure a static-free work environment before removing any components from
their anti-static packaging. Wear an ESD wrist strap when handling the
development board or other development kit components. The development
board is susceptible to electrostatic discharge (ESD) damage, and such damage
may cause product failure or unpredictable operation.
20 Development Kit User’s Manual
Getting Started
2.6 System Setup and Power-Up
Complete the following steps to operate the reference board.
These steps should already be completed in the kit. Check these items to
ensure that nothing came loose during shipment.
• Place one or more DDR3 SO-DIMMs in the memory sockets, populating J5N1
and/or J5P1. The memory sockets are on the bottom side of the development
board.
• Attach the heatsink for the processor U2E1.
• Install the configuration jumpers as shown in Section 4.3.1 of this document.
acing detached 1-x jumpers is not required for proper board operation.)
(Repl
• Attach hard drive data cable from development board SATA Connector J6J3 to the
drive with the supplied SATA data cable.
• Attach hard drive power from the ATX power supply to the drive.
• Attach optical drive data cable from development board SATA Connector J6J2 to
the drive with the supplied SATA data cable.
• Attach optical drive power from the ATX power supply to the drive.
• Connect the ATX power supply to the board at connector J4J1.
The following steps need to be completed by the user:
1. Attach the included CPU heatsink fan to the top of the CPU heatsink using the four
screws provided. Plug the fan power in at the CPU Fan connector J2B3.
2. Connect a PS/2 keyboard at connector J1A1 (bottom) or connect a USB keyboard
in one of the USB connectors.
3. Connect a PS/2 mouse at connector J1A1 (top) or a connect a USB mouse in one
of the USB connectors.
4. If using the chipset’s integrated graphics, connect a monitor to the VGA Video
output connector J2A2 with a VGA cable.
5. If using an external graphics card, plug a PCIe graphics card in the PCIe x1 slot
J8B3 or a PCI Express Graphics card in the PCIE x16 slot J6B2. Connect a monitor
to the card.
6. For mobile power configuration, unplug the ATX power supply from J4J1. Plug a
mobile Intel
battery pack into J1H1 or J1H2. Do not mix mobile and desktop power
configurations.
7. Plug in the power cord of the ATX power supply or the Intel AMPS AC brick into a
standard 120 V or 240 V AC power outlet.
®
AMPS AC to DC power adapter into J1G9. Optionally plug in a
Development Kit User’s Manual 21
Getting Started
Powering up the board:
1. Switch the power supply on (1) at the switch on the rear of the supply.
2. Press the power button located at SW1C1.
3. As the system boots, press F2 to enter the BIOS setup screen.
4. Check time, date, and configuration settings. The default settings should be
sufficient for most users.
5. Insert an operating system installation disk into the optical drive.
6. Press F10 to save and exit the BIOS setup.
7. The system reboots begins to install the operating system from the optical drive.
Note: An operating system disk is not included in this kit and operating system installation
will not be covered in this User Manual.
2.6.1 Using the AC to DC Power Supply (Mobile Power Mode)
There are a few limitations to development board operation when using the AC to DC
power adapter (mobile power mode).
First, do not mix mobile and desktop power configurations. Unplug the ATX power
supply from connector J4J1 before plugging in the AC to DC Power Adapter to
connector J1G9.
Second, desktop peripherals, including add-in cards, will not work when the board is
powered by the AC to DC power adapter or a battery (mobile power mode). If desktop
peripherals are used, the development board must be powered using the included ATX
power supply (desktop power mode).
Warning: Do not mix mobile and desktop power configurations. Unplug the ATX power supply
from connector J4J1 before plugging in the AC to DC Power Adapter to connector J1G9, or a
battery (not included) to connector J1H1-J1H2
Warning: The power supply cord is the main disconnect device from main AC power. The power
outlet shall be installed near the equipment and shall be readily accessible.
22 Development Kit User’s Manual
Getting Started
2.7 Power Down
Powering down the board:
There are three options for powering-down the system
1. Power down from the operating system via the Windows Start Menu, or
equivalent.
2. Press the power button on the motherboard at SW1C1 to begin power-down.
3. If the system is hung, it is possible to asynchronously shut the system down by
holding down the power button (SW1C1) continuously for 4 seconds.
Note: We do not recommend powering down the board by shutting off power at the ATX
power supply.
Note: If the power button on the ATX power supply is used to shut down the system, wait at
least five seconds before turning the system on again to avoid damaging the system.
2.8 System BIOS
A version of the AMI* BIOS is pre-loaded on the development board.
Other BIOS vendors also support the Intel Core 2 Duo with Intel GS45 Express
Chipset. For additional BIOS support, please contact your BIOS vendor.
2.8.1 Configuring the BIOS
The default BIOS settings may need to be modified to enable or disable various
features of the development board. The BIOS settings are configured through a menudriven user interface which is accessible during the Power On Self Test (POST). Press
the F2 key or Delete key during POST to enter the BIOS interface. For AMI BIOS POST
codes, visit:
http://www.ami.com
For BIOS Updates, please contact your Intel Sales Representative.
Development Kit User’s Manual 23
Getting Started
2.8.2 Programming BIOS Using a Bootable USB Device
The flash chips which store the BIOS and BIOS extensions on the development board
are connected to the SPI bus and are soldered down. One method of programming
these devices is through software utilities as described below. The software files and
utilities needed to program the BIOS are contained on the included CD-ROM. Another
method is described in Appendix C - Programming System BIOS Using a Flash
Programming Device.
low these steps to program the system BIOS using a bootable USB Device.
Fol
1. Prepare the workspace as outlined in Section 2.5 above.
2. Se
3. Warning: Prior to flashing BIOS onto the pl
4. Copy the following files and utilities to the Bootable USB Device
5. Unplug the hard disk drive (HDD) SATA cable from the board at connector
6. Record the 12 digit MAC Address of the board from the sticker near the
7. Insert the Bootable USB Key into one of the USB Ports on the
8. Switch on the power supply (to “1”).
9. Press the Power (PWR) Button on the development board to power on the
10. Wait for the system to boot from the USB Key to a DOS prompt
11. From the DOS prompt (C:>), Run the following:
tup the system as outlined in Section 2.6 above.
atform AMT must be disabled
in BIOS. Failure to do this will render the system inoperable.
a) Boot the system and enter the system BIOS setup by pressing (F2) or
(Del) and navigate to AMT and select (disable)
b) Navigate to ”Save changes and exit”.
c) Power off the system by pressing the power (PWR) button (SW1C1)
d) Turn off the power supply (remove power from the board) for at least
15 seconds
• BIOS Image Files
o spifull.bin
• BIOS Programming Software Utilities
o fpt.exe (DOS SPI Flash Utility)
o fparts.txt (helper file)
• MAC Address Programming Software Utility
o eeupdate.exe
• Other helper files contained on the included CD-ROM
J6J3 so that the board will boot from the bootable USB key.
CPU
Development Board
system
a) fpt –f spifull.bin
b) Make sure there are no warnings or errors
24 Development Kit User’s Manual
Getting Started
12. From DOS, Run the following to reprogram the MAC address:
a) eeupdate /nic=1 /mac=xxxxxxxxxxxx (xxxxxxxxxxxx is the MAC
Address from the sticker)
b) Make sure there are no warnings or errors
13. From DOS, Run the following to update the Keyboard and System
Controller flash:
a) kscupdate ksc.bin
b) Make sure there are no warnings or errors
14. Power the system down by pressing the PWR button
15. Clear the CMOS by performing the following:
a) Shunt the CMOS CLR jumper (J5H2 – near the on-board battery)
b) Press the PWR button on the board. The board will not power on, but
a couple of LEDs will flash.
c) Switch the power supply off to power down the board
d) Remove the CMOS CLR jumper (J5H2).
16. Unplug the bootable USB Key
17. Verify Correct BIOS Installation
a) Switch the power supply back on
b) Press the PWR button on the board to power-up the system
c) Boot to BIOS Configuration screen by pressing F2 at the BIOS splash
screen.
d) In the BIOS Main screen, check that the “Project Version” lists the
correct version of the BIOS.
e) Press the PWR key on the board to power the system back down.
18. Re-connect the SATA data cable from the hard drive to the development
board at connector J6J3.
The system is now ready for normal operation.
Development Kit User’s Manual 25
§
Development Board Features
3 Development Board Features
3.1 Block Diagram
Figure 1. Fern Hill Block Diagram
CPU
GS45 GMCH
ICH9M-E SFF
3.2 Mechanical Form Factor
The development board conforms to the ATX form factor. The development board will
fit in most standard ATX chassis. A list of add-in card connector and slot locations is
provided in Section 4.1 Internal and rear panel system I/O connectors are described
Section 4.2.
in
3.3 Development Board Key Features
Features of the development board are summarized in the following table.
26 Development Kit User’s Manual
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