The Intel® Desktop Boards D845HV/D845WN may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D845HV/D845WN Specification Update.
August 2001
Order Number: A65136-001
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D845HV/D845WN Technical
Product Specification.
This product specification applies to only standard D845HV and D845WN boards with BIOS
identifier HV84510A.86A.
Changes to this specification will be published in the Intel Desktop Board D845HV/D845WN
Specification Update before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS
PROVIDED IN INTEL’S TERM S AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTE L ASSUMES NO LIABILITY
WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE
OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRA NT IES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANT ABILITY, OR INFRINGEMENT OF ANY PA T ENT, COPYRIGHT, OR OTHE R INTELLECTUAL
PROPERTY RIGHT.
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Intel products are not int ended f or use in medical, life s aving, or life sustai ni ng appl i cations or for any other application in
which the failure of the Intel product could create a si tuation where personal injury or death may occur.
Intel may make changes t o specifications, product descriptions, and plans at any time, wi thout notice.
The Intel
product to deviate from publi shed specifications. Current characterized errat a are available on request.
Contact your local Int el sales office or your dis tributor to obtain the lates t specifications before placing your product order.
Copies of documents whic h hav e an orderi ng number and are referenced in this document , or other Intel literature, m ay be
obtained from:
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P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel and Pentium are trademark s or registered trademarks of Intel Corporation or its subsidiaries in the United St ates and
other countries.
†
Copyright 2001, Intel Corporation. All rights reserved.
®
Desktop Boards D845HV and D845WN may contain design defects or errors known as errata that may cause the
Other names and brands may be claim ed as the property of others.
August 2001
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
®
power and environmental requirements, and the BIOS for these Intel
and D845WN. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the D845HV and D845WN
boards and their components to the vendors, system integrators, and other engineers and
technicians who need this level of information. It is specifically not intended for general
audiences.
What This Document Contains
Desktop Boards: D845HV
Chapter Description
1 A description of the hardware used on the D845HV and D845WN boards
2 A map of the resources of the boards
3 The features supported by the BIOS Setup program
4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, and POST codes
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the D845HV and D845WN boards, and X is the instance of the
particular part at that general location. For example, J5J1 is a connector, located at 5J. It is
the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate third-party brands and names that are the property of their
1.14 Power Management ...................................................................................................37
1.1 Board Differences
This TPS describes these Intel® Desktop boards: D845HV and D845WN. The boards are identical
with the exception of the items listed below. Table 1 summarizes the differences between these
boards.
Table 1. Summary of Board Differences
D845HV
D845WN
NOTE
✏
Most of the illustrations in this document show only the D845HV board. When there are
significant differences between the two boards, illustrations of both boards are provided.
• microATX Form Factor (9.60 inches by 9.60 inches)
• Three PCI bus connectors
Refer also to Table 3, page 13 for a list of manufacturing options specific to D845HV
board only
Table 2 summarizes the D845HV and D845WN boards’ major features.
Table 2. Feature Summary
Form Factor
Processor
Memory
(Refer also to
Table 3, page 13)
Chipset
Video
I/O Control
(Refer also to
Table 3, page 13)
Peripheral
Interfaces
(Refer also to
Table 3, page 13)
Expansion
Capabilities
BIOS
D845HV: microATX (9.60 inches by 9.60 inches)
D845WN: ATX (12.00 inches by 9.60 inches)
• Support for an Intel
• 400 MHz system bus
• Three 168-pin SDRAM Dual Inline Memory Module (DIMM) sockets
• Support for single-sided or double-sided DIMMs (PC133 only)
• Support for up to 3 GB system memory
NOTE:
The D845HV/D845WN boards have been designed to support DIMMs
®
Pentium® 4 processor in an mPGA478 socket
based on 512 Mbit technology for a maximum onboard capacity of up to 3
GB, but this technology has not been validated on this board. Please refer
to the following Intel web sites. For the D845HV board:
AGP connector supporting 1.5 V 4X AGP cards
SMSC LPC47M142 LPC Bus I/O controller
• Up to seven Universal Serial Bus (USB) ports
• Two serial ports
• One parallel port
• IrDA
• Two IDE interfaces with UDMA 33, ATA-66/100 support
• One diskette drive interface
• PS/2
• Three fan connectors
• D845HV: Three PCI bus add-in card connectors (SMBus routed to PCI bus
• D845WN: Six PCI bus add-in card connectors (SMBus routed to PCI bus
• Intel/AMI BIOS (resident in the Intel 82802AB 4 Mbit FWH)
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
82845 Memory Controller Hub (MCH)
®
82801BA I/O Controller Hub (ICH2)
®
82802AB 4 Mbit Firmware Hub (FWH)
†
-compliant infrared port
†
keyboard and mouse ports
connector 1)
connector 1)
and SMBIOS
continued
12
Table 2. Feature Summary (continued)
Instantly Available
PC Technology
• Support for PCI Local Bus Specification Revision 2.2
• Suspend to RAM support
• Wake on PCI, CNR, RS-232, front panel, PS/2 devices, and USB ports
For information about Refer to
The board’s compliance level with ACPI, Plug and Play, and SMBIOS. Section 1.4, page 17
1.2.2 Manufacturing Options
Table 3 describes the D845HV and D845WN boards’ manufacturing options. Not every
manufacturing option is available in all marketing channels. Please contact your Intel
representative to determine which manufacturing options are available to you.
Table 3. Manufacturing Options
Audio
CNR
LAN
Hardware Monitor
Subsystem
The items listed below are component changes for an alternate configuration of the D845HV board
• Delete the auxiliary front panel power/sleep/message-waiting LED connector (shown on page 68)
• Delete the front chassis fan connector (shown on page 58)
• Delete the Mic-in pre-amp for boards equipped with the audio subsystem (described on page 32)
• Delete the SCSI hard drive activity LED connector (shown on pages 61 and 62)
• Delete the serial port B connector (shown on page 68)
• Delete the standby power indicator LED (shown on page 44)
• Delete the third DIMM socket (shown on pages 14 and 15)
• Delete the two USB connectors adjacent to the PS/2 connectors on the back panel (shown on page 52)
• Delete the 47 Ω inductive speaker (described on page 126)
• Replace I/O controller with SMSC LPC47M132 LPC bus I/O controller (functionally equivalent to SMSC
LPC47M142 LPC bus I/O controller but without an integrated USB hub) (described on page 31)
Audio subsyst em for AC 97 processing usi ng the Analog Devices AD1885 codec
One Communication and Networking Riser (CNR) connector (slot shared with
PCI bus connector 3 on the D845HV board and with PCI bus connector 6 on the
D845WN board)
®
Intel
82562ET 10/100 Mbit/sec Platform LAN Connect (PLC) device
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Two fan sense inputs used to monitor fan activity
Product Description
For information about Refer to
Available configurations of the D845HV and D845WN boards Section 1.3, page 17
NOTE
✏
The LAN and the CNR manufacturing options are mutually exclusive.
Figure 1 shows the location of the major components on the D845HV board.
CA
B
D
S
R
Q
P
O
N
A Audio codec (optional) K Diskette drive connector
B Intel 82562ET PLC Device (optional) L IDE connectors
C AGP connector M Speaker (optional)
D Back panel connectors N Intel 82801BA I/O Controller Hub (ICH2)
E +12V power connector (ATX12V) O Intel 82802AB 4 Mbit Firmware Hub (FWH)
F Intel 82845 Memory Controller Hub (MCH) P Front panel connector
G mPGA478 processor socket Q Battery
H DIMM sockets R PCI bus add-in card connectors
I I/O Controller S CNR connector (optional)
J Power Connector
L
J
KM
OM11427
E
F
G
H
I
14
Figure 1. D845HV Board Components
Figure 2 shows the location of the major components on the D845WN board.
Product Description
CA
B
D
S
R
Q
P
O
N
A Audio codec (optional) K Diskette drive connector
B Intel 82562ET PLC Device (optional) L IDE connectors
C AGP connector M Speaker (optional)
D Back panel connectors N Intel 82801BA I/O Controller Hub (ICH2)
E +12V power connector (ATX12V) O Intel 82802AB 4 Mbit Firmware Hub (FWH)
F Intel 82845 Memory Controller Hub (MCH) P Front panel connector
G mPGA478 processor socket Q Battery
H DIMM sockets R PCI bus add-in card connectors
I I/O Controller S CNR connector (optional)
J Power Connector
Table 4 lists the specifications applicable to the D845HV and D845WN boards.
Table 4. Specifications
Reference
Name
AC ’97
ACPI
AGP
AMI BIOS
ATA/
ATAPI-5
ATX
ATX12V
CNR
Specification
Title
Audio Codec ’97
Advanced Configuration
and Power Interface
Specification
Accelerated Graphics Port
Interface Specification
American Megatrends
BIOS Specification
Information Technology-AT
Attachment with Packet
Interface - 5
(
ATA/ATAPI-5)
ATX Specification
ATX / ATX12V Power
Supply Design Guide
Communication and
Network Riser (CNR)
Specification
Version, Revision Date,
and Ownership
Revision 2.2,
September 2000,
Intel Corporation.
Version 2.0,
July 27, 2000,
Compaq Computer
Corporation,
Intel Corporation,
Microsoft Corporation,
Phoenix Technologies
Limited, and
Toshiba Corporation.
Revision 2.0,
May 4, 1998,
Intel Corporation.
AMIBIOS 99,
1999,
American Megatrends, Inc.
Revision 3,
February 29, 2000,
Contact: T13 Chair,
Seagate Technology.
Version 2.03,
December 1998,
Intel Corporation.
Version 1.1,
August 2000,
Intel Corporation.
Revision 1.1,
October 18, 2000,
Intel Corporation.
Version 2.3.1,
March 16, 1999,
American Megatrends
Incorporated,
Award Software International
Incorporated,
Compaq Computer Corporation,
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
and SystemSoft Corporation.
Revision 1.1,
March 1996,
Intel Corporation.
Version 1.1,
September 23, 1998,
Compaq Computer Corporation,
Intel Corporation,
Microsoft Corporation, and
NEC Corporation.
Version 2.0,
December 18, 1998,
Intel Corporation.
Use only the processors listed below. Use of unsupported processors can damage the board, the
®
processor, and the power supply. See the Intel
Update for the most up-to-date list of supported processors for these boards.
The D845HV and D845WN boards support a single Pentium 4 processor (in an mPGA478 socket)
with a system bus of 400 MHz. The D845HV and D845WN boards support the processors listed
in Table 5. All supported onboard memory can be cached, up to the cachability limit of the
processor. See the processor’s data sheet for cachability limits.
Table 5. Supported Processors
Type Designation System Bus L2 Cache Size
Pentium 4 processor 1.4, 1.5, 1.6, 1.7, 1.8,
1.9, and 2.0 GHz
Desktop Board D845HV/D845WN Specification
400 MHz 256 KB
NOTE
✏
Use only ATX12V- or SFX12V-compliant power supplies with the D845HV and D845WN boards.
ATX12V and SFX12V power supplies have an additional power lead that provides required
supplemental power for the Intel Pentium
4
processor. Always connect the 20-pin and 4-pin leads
of ATX12V and SFX12V power supplies to the corresponding connectors on the D845HV and
D845WN boards, otherwise the board will not boot.
Do not use a standard ATX power supply. The board will not boot with a standard ATX power
supply.
For information about Refer to
Processor support Section 1.3, page 17
Processor usage Section 1.3, page 17
Power supply connectors Section 2.8.2.3, page 58
Before installing or removing memory, make sure that AC power is disconnected by unplugging
the power cord from the computer. Failure to do so could damage the memory and the board.
NOTE
✏
Remove the AGP video card before installing or upgrading memory to avoid interference with the
memory retention mechanism.
NOTE
✏
The D845HV/D845WN boards have been designed to support DIMMs based on 512 Mbit
technology for a maximum onboard capacity of up to 3 GB, but this technology has not been
validated on this board. Please refer to the following Intel web sites for the latest lists of tested
memory.
For the D845HV board:
To be fully compliant with all applicable Intel® SDRAM memory specifications, the board should
be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This
allows the BIOS to read the SPD data and program the chipset to accurately configure memory
settings for optimum performance. If non-SPD memory is installed, the BIOS will attempt to
correctly configure the memory settings, but performance and reliability may be impacted or the
DIMMs may not function under the determined frequency.
The D845HV and D845WN boards both have three DIMM sockets and support the following
memory features:
• 3.3 V (only) 168-pin SDRAM DIMMs with gold-plated contacts
• Unbuffered single-sided or double-sided DIMMs
• Maximum total system memory: 3 GB; minimum total system memory: 32 MB
• 133 MHz SDRAM DIMMs only
• Serial Presence Detect (SPD)
• Suspend to RAM
• Non-ECC and ECC DIMMs
NOTE
✏
For ECC functionality, all installed DIMMs must be ECC. If both ECC and non-ECC DIMMs are
used, ECC will not function.
22
Product Description
For information about Refer to
Obtaining the
PC Serial Presence Detect (SPD) Specification
Section 1.5, page 18
Table 6 lists the supported DIMM configurations.
Table 6. Supported Memory Configurations
DIMM
Capacity
32 MB SS 64 Mbit 4 M x 16/empty 4
64 MB DS 64 Mbit 4 M x 16/4 M x 16 8
64 MB SS 64 Mbit 8 M x 8/empty 8
64 MB SS 128 Mbit 8 M x 16/empty 4
96 MB DS 64 Mbit 8 M x 8/4 M x 16 12
96 MB DS 128/64 Mbit 8 M x 16/4 M x 16 8
128 MB DS 64 Mbit 8 M x 8/8 M x 8 16
128 MB DS 128 Mbit 8 M x 16/8 M x 16 8
128 MB SS 128 Mbit 16 M x 8/empty 8
128 MB SS 256 Mbit 16 M x 16/empty 4
192 MB DS 128 Mbit 16 M x 8/8 M x 16 12
192 MB DS 128/64 Mbit 16 M x 8/8 M x 8 16
256 MB DS 128 Mbit 16 M x 8/16 M x 8 16
256 MB DS 256 Mbit 16 M x 16/16 M x 16 8
256 MB SS 256 Mbit 32 M x 8/empty 8
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
Notes:
1. If the number of SDRAM devices is greater than nine, the DIMM will be double sided.
2. Front side population/back s i de popul ation indicated for SDRAM dens i ty and SDRAM organization.
3. In the second column, “DS” refers to double-sided memory m odul es (containing two rows of SDRAM ) and “S S” refers
to single-sided memory modul es (containing one row of SDRAM).
Number of
Sides
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of
SDRAM devices
(Notes 1 and 2)
(Notes 1 and 2)
(Note 1)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
NOTE
✏
For D845HV boards with two DIMM sockets, the maximum total system memory is 2 GB.
The Intel 845 chipset consists of the following devices:
• Intel 82845 Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
• Intel 82801BA I/O Controller Hub (ICH2) with AHA bus
• Intel 82802AB Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture interface. The ICH2 is a centralized controller for the board’s I/O
paths. The FWH provides the nonvolatile storage of the BIOS. The component combination
provides the chipset interfaces as shown in Figure 4.
UDMA 33
ATA-66/100
System Bus
Network
USB
845 Chipset
82845
Memory Controller
Hub (MCH)
AGP
Interface
SDRAM
Bus
AHA
Bus
82801BA
I/O Controller Hub
(ICH2)
82802AB 4 Mbit
Firmware Hub
(FWH)
LPC Bus
AC LinkPCI BusSMBus
OM12275
Figure 4. Intel 845 Chipset Block Diagram
For information about Refer to
The Intel 845 chipset http://developer.intel.com
Resources used by the chipset Chapter 2
24
Product Description
1.8.1 AGP
NOTE
✏
The AGP connector is keyed for 1.5 V AGP cards only. Do not attempt to install a legacy 3.3 V
AGP card. The AGP connector is not mechanically compatible with legacy 3.3 V AGP cards.
The AGP connector supports AGP add-in cards with 1.5 V Switching Voltage Level (SVL).
Legacy 3.3 V AGP cards are not supported.
For information about Refer to
The location of the AGP connector Figure 1, page 14
The signal names of the AGP connector Table 37, page 65
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications.
While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and
is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of
the PCI bus related to handling large amounts of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Refer to
Obtaining the
Accelerated Graphics Port Interface Specification
Section 1.5, page 18
1.8.2 USB
There are two USB configurations, depending on which I/O controller is used on the board, as
follows:
• The USB configuration for boards with the SMSC LPC47M142 I/O controller is described in
Section 1.8.2.1
• The USB configuration for boards with the SMSC LPC47M132 I/O controller is described in
Section 1.8.2.2
The D845HV and D845WN boards fully support UHCI and use UHCI-compatible software
drivers.
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
1.8.2.1 USB Configuration for Boards with the SMSC LPC47M142 I/O Controller
The D845HV/D845WN boards support up to seven USB ports, as shown in Figure 5. The ICH2
provides three external ports: two ports are implemented with stacked back panel connectors and
the other port is accessible through a CNR add-in card. The SMSC LPC47M142 I/O controller
provides four external ports: two ports implemented with stacked back panel connectors and two
ports routed to the front panel USB connector.
For more than seven USB devices, an external hub can be connected to any of the ports.
Back panel USB c onnectors
adjacent to the audio c onnectors
USB port accessible through a USB
connector on an optional CNR add-in card
Back panel USB c onnectors
adjacent to the PS/2 connectors
Front panel USB connector
OM12388
82801BA
I/O Controller Hub
(ICH2)
USB
SMSC LPC47M142
LPC Bus
I/O Controller
USB ports (2)
USB
CNR connector
USB ports (2)
USB
USB ports (2)
Figure 5. USB Port Configuration for Boards with the SMSC LPC47M142 I/O Controller
For information about Refer to
The location of the USB connectors on the back panel Figure 10, page 52
The signal names of the back panel USB connectors Table 19, page 53
The location of the front panel USB connector Figure 15, page 68
The signal names of the front panel USB connector Table 43, page 69
The USB specification and UHCI Section 1.5, page 18
1.8.2.2 USB Configuration for Boards with the SMSC LPC47M132 I/O Controller
D845HV boards equipped with the optional SMSC LPC47M132 I/O controller support up to four
USB ports, as shown in Figure 6. The ICH2 provides four external ports: two ports are
implemented with stacked back panel connectors and two are accessible through the front panel
USB connector.
For more than four USB devices, an external hub can be connected to any of the ports.
26
Product Description
82801BA
I/O Controller Hub
(ICH2)
Figure 6. USB Port Configuration for Boards with the SMSC LPC47M132 I/O Controller
For information about Refer to
The location of the USB connectors on the back panel Figure 10, page 52
The signal names of the back panel USB connectors Table 19, page 53
The location of the front panel USB connector Figure 15, page 68
The signal names of the front panel USB connector Table 43, page 69
The USB specification and UHCI Section 1.5, page 18
USB
USB ports (2)
USB ports (2)Front panel USB connector
Back panel USB connectors
adjacent to the audio connectors
1.8.3 IDE Support
1.8.3.1 IDE Interfaces
The ICH2’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH2’s ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
OM12389
✏ NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Section 4.4.4.1 on page 105.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The D845HV and D845WN boards support Laser Servo (LS-120) diskette technology through the
IDE interfaces. An LS-120 drive can be configured as a boot device by setting the BIOS Setup
program’s Boot menu to one of the following:
• ARMD-FDD (ATAPI removable media device – floppy disk drive)
• ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about Refer to
The location of the IDE connectors Figure 13, page 61
The signal names of the IDE connectors Table 39, page 67
BIOS Setup program’s Boot menu Table 75, page 113
1.8.3.2 SCSI Hard Drive Activity LED Connector (Optional)
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
SCSI controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in SCSI controller. The LED indicates
when data is being read from, or written to, both the add-in SCSI controller and the IDE controller.
For information about Refer to
The location of the SCSI hard drive activity LED connector Figure 13, page 61, or
Figure 14, page 62
The signal names of the SCSI hard drive activity LED connector Table 40, page 67
1.8.4 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock provides a time-of-day clock and a multicentury calendar with alarm features.
The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are
reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values
can be returned to their defaults by using the BIOS Setup program.
✏ NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
For information about Refer to
Proper date access in systems with D845HV and D845WN boards Section 1.3, page 17
28
®
1.8.5 Intel
The FWH provides the following:
• System BIOS program
• Logic that enables protection for storing and updating of platform information
82802AB 4 Mbit Firmware Hub (FWH)
1.9 I/O Controller
The SMSC LPC47M142 I/O controller provides the following features:
• Two serial ports
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.2 MB or 1.44 MB diskette drive
• Intelligent power management, including a programmable wake-up event interface
• PCI power management support
• Two fan tachometer inputs
• Integrated USB hub
• IrDA compliant infrared port
Product Description
The BIOS Setup program provides configuration options for the I/O controller.
NOTE
✏
For the D845HV board only, there is a manufacturing option for an SMSC LPC47M132 I/O
controller. This optional I/O controller provides identical functionality to the standard I/O
controller, minus the integrated USB hub.
For information about Refer to
SMSC LPC47M142 I/O controller http://www.smsc.com
1.9.1 Serial Ports
The D845HV and D845WN boards have two serial port connectors. Serial port A is located on the
back panel. Serial port B is accessible using a connector located near the main power connector.
The serial ports’ NS16C550-compatible UART supports data transfers at speeds up to
115.2 kbits/sec with BIOS support. The serial ports can be assigned as COM1 (3F8h),
COM2 (2F8h), COM3 (3E8h), or COM4 (2E8h).
NOTE
✏
The operation of serial port B and the infrared port are mutually exclusive. When serial port B is
enabled in the BIOS Setup program, the IR option is disabled.
For the D845HV board only, there is a manufacturing option that omits the connector for Serial
port B.
For information about Refer to
The location of the serial port A connector Figure 10, page 52
The signal names of the serial port A connector Table 21, page 54
The location of the serial port B connector Figure 15, page 68
The signal names of the serial port B connector Table 42, page 69
1.9.2 Infrared Support
On the front panel connector, there are four pins that support devices compliant with the IrDA
Serial Infrared Physical Layer Specification, version 1.3. In the BIOS Setup program, infrared
support is disabled by default. The IR connection can be used to transfer files to or from portable
devices like laptops, PDAs, and printers. The Infrared Data Association (IrDA) specification
supports data transfers of up to 115.2 kbits/sec at a distance of 1 meter.
NOTE
✏
The infrared port operates in half duplex mode only.
NOTE
✏
The operation of the infrared port and serial port B are mutually exclusive. When the IR option is
enabled in the BIOS Setup program, serial port B is disabled.
For information about Refer to
The location of the front panel connector Figure 15, page 68
The signal names of the infrared port on the front panel connector Table 45, page 70
The IrDA specification Section 1.5, page 18
1.9.3 Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. In the BIOS Setup
program, the parallel port can be set to the following modes:
†
• Output only (PC AT
• Bi-directional (PS/2 compatible)
• EPP
• ECP
For information about Refer to
The location of the parallel port connector Figure 10, page 52
The signal names of the parallel port connector Table 20, page 53
Setting the parallel port’s mode Table 66, page 102
-compatible mode)
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