The Intel® Desktop Board D201GLY2 may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D201GLY2 Specification Update.
November 2007
Order Number: E18532-002US
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D201GLY2 Technical Product
Specification
-002 Second release of the Intel® Desktop Board D201GLY2 Technical Product
Specification. Added active processor heat sink option.
This product specification applies to only standard Intel Desktop Board D201GLY2 with
BIOS identifier LY66210M.86A.
Changes to this specification will be published in the Intel Desktop Board D201GLY2
Specification Update before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS
GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR
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INTENDED FOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.
September 2007
November 2007
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other materials and information does not provide any license, express or implied, by estoppel or otherwise,
to any such patents, trademarks, copyrights, or other intellectual property rights.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved”
or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for
conflicts or incompatibilities arising from future changes to them.
®
desktop boards may contain design defects or errors known as errata, which may cause the product
Intel
to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your
product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel
literature, may be obtained from:
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Intel, the Intel logo and Celeron are registered trademarks of Intel Corporation in the United States and
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* Other names and brands may be claimed as the property of others.
This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for the Intel
Desktop Board D201GLY2. It describes the standard product and available
manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Board
D201GLY2 and its components to the vendors, system integrators, and other
engineers and technicians who need this level of information. It is specifically not
intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the Desktop Board D201GLY2
2 A map of the resources of the Desktop Board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages and POST codes
®
Typographical Conventions
This section contains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
#
NOTE
Notes call attention to important information.
INTEGRATOR’S NOTES
Integrator’s notes are used to call attention to information that may be useful to
system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the
relative coordinates of its location on the board, and X is the instance of the particular part
at that general location. For example, J5J1 is a connector, located at 5J. It is the first
connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
• Support for DDR2 667 MHz, DDR2 533 MHz and DDR2 400 MHz DIMMs
(DDR 667 MHz validated to run at 533 MHz only)
• Support for up to 1 GB of system memory
• SiS* SiS662 Northbridge
• SiS SiS964 Southbridge
serial, parallel, and PS/2* ports
• Six USB 2.0 ports
• One serial port
• One parallel port
• Two Serial ATA interfaces
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100/133 support
• PS/2 keyboard and mouse ports
• One S-Video output port (optional)
• One PCI* Conventional bus connector
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Two fan connectors
• One fan sense input used to monitor fan activity
• Fan speed control
®
Celeron® processor with a 533 MHz system bus and
10
Product Description
1.1.2 Manufacturing Options
Table 2 describes the manufacturing options. Not every manufacturing option is
available in all marketing channels. Please contact your Intel representative to
determine which manufacturing options are available to you.
Table 2. Manufacturing Options
S-Video Output
Active Heatsink
for Processor
For information about Refer to
Available configurations for the Desktop Board D201GLY2 Section 1.2, page 15
Support for S-Video output. One S-Video output port located on the back panel.
Available fan-based active heatsink for the processor.
1.1.3 Board Layout
Figure 1 shows the location of the major components.
Figure 2 shows the location of the major components, i
ncluding the optional active
heatsink for the processor. Note that all remaining figures in this document show the
standard passive heatsink.
Figure 2. Board Components, Including Optional Active Heatsink
for the Processor
Table 3 lists the components identified in Figure 1 and Figure 2.
12
Table 3. Board Components Shown in Figure 1 and Figure 2
Product Description
Item/callout
from Figure 1
and Figure 2
A PCI Conventional bus add-in card connector
B Front panel USB headers
C Front panel audio header
D Back panel connectors
E Chassis fan header
F +12V power connector (ATX12V)
G Main power connector
H Intel Celeron processor
I DIMM Channel A socket
J SiS662 Northbridge
K Parallel ATA IDE connector
L SATA connectors [2]
M Front panel I/O header
N Battery
O SiS964 Southbridge
P BIOS Setup configuration jumper block
Figure 3 is a block diagram of the major functional areas of the board.
Figure 3. Block Diagram
14
Product Description
1.2 Online Support
To find information about… Visit this World Wide Web site:
Intel® Desktop Board D201GLY2 http://www.intel.com/products/motherboard/D201GLY2/index.htm
Desktop Board Support http://support.intel.com/support/motherboards/desktop
Available configurations for the
The board has one 240-pin DIMM socket and supports the following memory features:
• 1.8 V (only) DDR2 SDRAM DIMMs with gold-plated contacts
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMs with x16 organization are not supported.
• 1 GB maximum total system memory
• Minimum total system memory: 128 MB
• Non-ECC DIMMs
• Serial Presence Detect
• DDR2 533 or DDR2 400 MHz SDRAM DIMMs
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.
Table 4 lists the supported DIMM configurations.
Table 4. Supported Memory Configurations
DIMM
Capacity Configuration
128 MB SS 256 Mbit 16 M x 16/empty 4
256 MB SS 256 Mbit 32 M x 8/empty 8
256 MB SS 512 Mbit 32 M x 16/empty 4
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
512 MB SS 512 Mbit 64 M x 8/empty 8
512 MB SS 1 Gbit 64 M x 16/empty 4
1024 MB DS 512 Mbit 64 M x 8/64 M x 8 16
1024 MB SS 1 Gbit 128 M x 8/empty 8
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM)
and “SS” refers to single-sided memory modules (containing one row of SDRAM).
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
16
Product Description
1.5 Silicon Integrated Systems* Chipset
The Silicon Integrated Systems chipset consists of the following devices:
• SiS662 Northbridge
• SiS964 Southbridge
The SiS662 Northbridge is a centralized controller for the system bus and the memory
bus. The SiS662 Northbridge also provides integrated graphics capabilities supporting
3D, 2D, and display capabilities. The SiS964 Southbridge is a centralized controller for
the board’s I/O paths.
For information about Refer to
The Silicon Integrated Systems SiS662 Northbridge http://www.sis.com/
The Silicon Integrated Systems SiS964 Southbridge http://www.sis.com/
Resources used by the chipset Chapter 2
1.5.1 Graphics Subsystem
The board uses the integrated Mirage 1 graphic engine in the SiS662 Northbridge.
1.5.2 USB
The board supports up to six USB 2.0 ports, supports UHCI and EHCI, and uses UHCIand EHCI-compatible drivers.
The SiS964 Southbridge provides the USB controller for all ports. The port
arrangement is as follows:
•Two ports are implemented with dual stacked back panel connectors adjacent to
the audio connectors
•Four ports are routed to two separate front panel USB headers
NOTE
Computer systems that have an unshielded cable attached to a USB port may not
meet FCC Class B requirements, even if no device is attached to the cable. Use
shielded cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 7, page 37
The location of the front panel USB connectors Figure 8, page 38
The board provides three IDE interface connectors:
• One parallel ATA IDE connector that supports two devices
• Two serial ATA IDE connectors that support one device per connector
1.5.3.1 Parallel ATA IDE Interface
The D201GLY2 board has one bus-mastering Parallel ATA IDE interface. The Parallel
ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to
16 MB/sec.
•Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 33 MB/sec.
•ATA-66: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is
device driver compatible.
•ATA-100: DMA protocol on IDE bus allows host and target throttling. The SiS964’s
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer
rates up to 88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce
reflections, noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives)
and ATA devices using the transfer modes.
For information about Refer to
The location of the Parallel ATA IDE connector Figure 8, page 38
1.5.3.2 Serial ATA Interfaces
The board’s Serial ATA controller offers two independent Serial ATA ports with a
theoretical maximum transfer rate of 1.5 Gbits/sec per port. One device can be
installed on each port for a maximum of two Serial ATA devices. A point-to-point
interface is used for host to device connections, unlike Parallel ATA IDE which supports
a master/slave configuration and two devices per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the
operating system. The Serial ATA controller can operate in both legacy and native
modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14
and 15). In Native mode, standard PCI Conventional bus resource steering is used.
Native mode is the preferred mode for configurations using the Windows* XP
operating system.
18
Product Description
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adaptors or
power supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
For information about Refer to
The location of the Serial ATA IDE connectors Figure 8, page 38
1.5.4 Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded
into CMOS RAM at power-on.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one. Figure 1 on page 11 shows the location of the battery.
CAUTION
Risk of explosion if the battery is replaced with an incorrect type. Batteries should be
recycled where possible. Disposal of used batteries must be in accordance with local
environmental regulations.
PRECAUTION
Risque d'explosion si la pile usagée est remplacée par une pile de type incorrect. Les
piles usagées doivent être recyclées dans la mesure du possible. La mise au rebut des
piles usagées doit respecter les réglementations locales en vigueur en matière de
protection de l'environnement.
FORHOLDSREGEL
Eksplosionsfare, hvis batteriet erstattes med et batteri af en forkert type. Batterier
bør om muligt genbruges. Bortskaffelse af brugte batterier bør foregå i
overensstemmelse med gældende miljølovgivning.
Det kan oppstå eksplosjonsfare hvis batteriet skiftes ut med feil type. Brukte batterier
bør kastes i henhold til gjeldende miljølovgivning.
VIKTIGT!
Risk för explosion om batteriet ersätts med felaktig batterityp. Batterier ska kasseras
enligt de lokala miljövårdsbestämmelserna.
VARO
Räjähdysvaara, jos pariston tyyppi on väärä. Paristot on kierrätettävä, jos se on
mahdollista. Käytetyt paristot on hävitettävä paikallisten ympäristömääräysten
mukaisesti.
VORSICHT
Bei falschem Einsetzen einer neuen Batterie besteht Explosionsgefahr. Die Batterie
darf nur durch denselben oder einen entsprechenden, vom Hersteller empfohlenen
Batterietyp ersetzt werden. Entsorgen Sie verbrauchte Batterien den Anweisungen
des Herstellers entsprechend.
AVVERTIMENTO
Esiste il pericolo di un esplosione se la pila non viene sostituita in modo corretto.
Utilizzare solo pile uguali o di tipo equivalente a quelle consigliate dal produttore. Per
disfarsi delle pile usate, seguire le istruzioni del produttore.
PRECAUCIÓN
Existe peligro de explosión si la pila no se cambia de forma adecuada. Utilice
solamente pilas iguales o del mismo tipo que las recomendadas por el fabricante del
equipo. Para deshacerse de las pilas usadas, siga igualmente las instrucciones del
fabricante.
WAARSCHUWING
Er bestaat ontploffingsgevaar als de batterij wordt vervangen door een onjuist type
batterij. Batterijen moeten zoveel mogelijk worden gerecycled. Houd u bij het
weggooien van gebruikte batterijen aan de plaatselijke milieuwetgeving.
ATENÇÃO
Haverá risco de explosão se a bateria for substituída por um tipo de bateria incorreto.
As baterias devem ser recicladas nos locais apropriados. A eliminação de baterias
usadas deve ser feita de acordo com as regulamentações ambientais da região.
20
Product Description
AŚCIAROŽZNAŚĆ
Існуе рызыка выбуху, калі заменены акумулятар неправільнага тыпу.
Акумулятары павінны, па магчымасці, перепрацоўвацца. Пазбаўляцца ад старых
акумулятараў патрэбна згодна з мясцовым заканадаўствам па экалогіі.
UPOZORNÌNÍ
V případě výměny baterie za nesprávný druh může dojít k výbuchu. Je-li to možné,
baterie by měly být recyklovány. Baterie je třeba zlikvidovat v souladu s místními
předpisy o životním prostředí.
Προσοχή
Υπάρχει κίνδυνος για έκρηξη σε περίπτωση που η μπαταρία αντικατασταθεί από μία
λανθασμένου τύπου. Οι μπαταρίες θα πρέπει να ανακυκλώνονται όταν κάτι τέτοιο είναι
δυνατό. Η απόρριψη των χρησιμοποιημένων μπαταριών πρέπει να γίνεται σύμφωνα με
τους κατά τόπο περιβαλλοντικούς κανονισμούς.
VIGYAZAT
Ha a telepet nem a megfelelő típusú telepre cseréli, az felrobbanhat. A telepeket
lehetőség szerint újra kell hasznosítani. A használt telepeket a helyi környezetvédelmi
előírásoknak megfelelően kell kiselejtezni.
AWAS
Risiko letupan wujud jika bateri digantikan dengan jenis yang tidak betul. Bateri
sepatutnya dikitar semula jika boleh. Pelupusan bateri terpakai mestilah mematuhi
peraturan alam sekitar tempatan.
OSTRZEŻENIE
Istnieje niebezpieczeństwo wybuchu w przypadku zastosowania niewłaściwego typu
baterii. Zużyte baterie należy w miarę możliwości utylizować zgodnie z odpowiednimi
przepisami ochrony środowiska.
PRECAUŢIE
Risc de explozie, dacă bateria este înlocuită cu un tip de baterie necorespunzător.
Bateriile trebuie reciclate, dacă este posibil. Depozitarea bateriilor uzate trebuie să
respecte reglementările locale privind protecţia mediului.
При использовании батареи несоответствующего типа существует риск ее взрыва.
Батареи должны быть утилизированы по возможности. Утилизация батарей
должна проводится по правилам, соответствующим местным требованиям.
UPOZORNENIE
Ak batériu vymeníte za nesprávny typ, hrozí nebezpečenstvo jej výbuchu.
Batérie by sa mali podľa možnosti vždy recyklovať. Likvidácia použitých batérií sa musí
vykonávať v súlade s miestnymi predpismi na ochranu životného prostredia.
POZOR
Zamenjava baterije z baterijo drugačnega tipa lahko povzroči eksplozijo.
Če je mogoče, baterije reciklirajte. Rabljene baterije zavrzite v skladu z lokalnimi
okoljevarstvenimi predpisi.
.
UYARI
Yanlış türde pil takıldığında patlama riski vardır. Piller mümkün olduğunda geri
dönüştürülmelidir. Kullanılmış piller, yerel çevre yasalarına uygun olarak atılmalıdır.
OСТОРОГА
Використовуйте батареї правильного типу, інакше існуватиме ризик вибуху.
Якщо можливо, використані батареї слід утилізувати. Утилізація використаних
батарей має бути виконана згідно місцевих норм, що регулюють охорону довкілля.
22
Product Description
1.6 S-Video Output (Optional)
The D201GLY2 board supports S-Video output via 7-pin S-Video connector using
SiS307DV supporting both 4-pin S-Video and Composite output signals.
For information about Refer to
The Silicon Integrated Systems SiS307DV http://www.sis.com/
1.7 Legacy I/O Controller
The Winbond W83672DHG-B Legacy I/O controller provides the following features:
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
•Serial IRQ interface compatible with serialized IRQ support for PCI Conventional
bus systems
• PS/2-style mouse and keyboard interfaces
• Intelligent power management, including a programmable wake-up event interface
• PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
The serial port A connector is located on the back panel. The serial port supports data
transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port A connector Figure 7, page 37
1.7.2 Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS
Setup program to set the parallel port mode.
For information about Refer to
The location of the parallel port connector Figure 7, page 37
1.7.3 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported
in the top PS/2 connector. Power to the computer should be turned off before a
keyboard or mouse is connected or disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 7, page 37
1.8 Audio Subsystem
The audio subsystem consists of the following devices:
• SiS964 Southbridge
• ADI AD1888 audio codec
The audio subsystem includes these features:
• Signal-to-noise ratio ≥ 90 dB
• Supports wake events (driver dependent)
• Mic in pre-amp that supports dynamic, condenser, and electret microphones
The audio subsystem supports the following audio interfaces:
• Front panel audio header, including pins for:
⎯ Line out
⎯ Mic in
24
Product Description
• Back panel audio connectors:
⎯ Line in
⎯ Line out
⎯ Mic in
1.8.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.1.4, page 14
1.8.2 Audio Connectors
The board contains audio connectors on the back panel and an audio header on the
component side of the board. The front panel audio header is a 2 x 5-pin header that
provides mic in and line out signals for front panel audio connectors.
The audio subsystem connectors are shown in Figure 4.
Item Description
A Line in
B Line out
C Mic in
Figure 4. Back Panel Audio Connectors
For information about Refer to
The location of the front panel audio header Figure 8, page 38
The signal names of the front panel audio header Table 12, page 39
•Broadcom AC131KLMG LAN adapter device for 10/100 Mbits/sec Ethernet LAN
connectivity
• RJ-45 LAN connector with integrated status LEDs
• Programmable transit threshold
• Configurable EEPROM that contains the MAC address
Two LEDs are built into the RJ-45 LAN connector (shown in Figure 5).
Figure 5. LAN Connector LED Locations
Table 5 describes the LED states when the board is powered up and the
10/100 Mbits/sec LAN subsystem is operating.
Table 5. LAN Connector LED States
LED Color LED State Condition
Green
Off LAN link is not established.
On LAN link is established.
Blinking LAN activity is occurring.
Off 10 Mbits/sec data rate is selected. Yellow
On 100 Mbits/sec data rate is selected.
1.9.1 LAN Subsystem Software
LAN software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining LAN software and drivers Section 1.1.4, page 14
26
Product Description
1.10 Hardware Management Subsystem
The hardware management features enable the board to be compatible with the Wired
for Management (WfM) specification. The Winbond W83627DHG-B I/O controller is
used to implement hardware monitoring and fan control. The features of this I/O
controller include:
• Internal ambient temperature sensor
• Two remote thermal diode sensors for direct monitoring of processor temperature
and ambient temperature sensing
•Power supply monitoring of four voltages (+5 V, +V_1P8_CORE, +VCCP, and
+12 V) to detect levels above or below acceptable values
•Thermally monitored closed-loop fan control, for system fan, that can adjust the
fan speed or switch the fans on or off as needed
•SMBus interface
1.10.1 Fan Monitoring
Fan monitoring can be implemented using Intel® Desktop Utilities, LANDesk* software,
or third-party software.
For information about Refer to
The functions of the fan connectors Section 1.11.2.2, page 31
1.11 Power Management
Power management is implemented at several levels, including:
• Software support through Advanced Configuration and Power Interface (ACPI)
• Hardware support:
⎯ Power connector
⎯ Fan connectors
⎯ LAN wake capabilities
⎯ Instantly Available PC technology
⎯ Resume on Ring
⎯ Wake from USB
⎯ Wake from PS/2 devices
⎯ Power Management Event signal (PME#) wake-up support
ACPI gives the operating system direct control over the power management and Plug
and Play functions of a computer. The use of ACPI with this board requires an
operating system that provides full ACPI support. ACPI features include:
• Plug and Play (including bus and device enumeration)
• Power management control of individual devices, add-in boards (some add-in
boards may require an ACPI-aware driver), video displays, and hard disk drives
•Methods for achieving less than 15-watt system operation in the power-on/standby
sleeping state
• A Soft-off feature that enables the operating system to power-off the computer
• Support for multiple wake-up events (see Table 8 on page 30)
• Support for a front panel power and sleep mode switch
Table 6 lists the system states based on how long the power switch is pressed,
dependi
Table 6. Effects of Pressing the Power Switch
ng on how ACPI is configured with an ACPI-aware operating system.
If the system is in this
state…
Off
(ACPI G2/G5 – Soft off)
On
(ACPI G0 – working state)
On
(ACPI G0 – working state)
Sleep
(ACPI G1 – sleeping state)
Sleep
(ACPI G1 – sleeping state)
…and the power switch
is pressed for
Less than four seconds Power-on
Less than four seconds Soft-off/Standby
More than four seconds Fail safe power-off
Less than four seconds Wake-up
More than four seconds Power-off
…the system enters this state
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
(ACPI G2/G5 – Soft off)
(ACPI G0 – working state)
(ACPI G2/G5 – Soft off)
28
Product Description
1.11.1.1 System States and Power States
Under ACPI, the operating system directs all system and device power state
transitions. The operating system puts devices in and out of low-power states based
on user preferences and knowledge of how devices are being used by applications.
Devices that are not being used can be turned off. The operating system uses
information from applications and user settings to put the system as a whole into a
low-power state.
Table 7 lists the power states supported by the board along with the associated
system power targets. See the AC
various system and power states.
Table 7. Power States and Targeted System Power
PI specification for a complete description of the
Global
States
G0 – working
state
G1 – sleeping
state
G1 – sleeping
state
G2/S5 S5 – Soft off.
G3 –
mechanical off
AC power is
disconnected
from the
computer.
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals
powered by the system chassis’ power supply.
2. Dependent on the standby power consumption of wake-up devices used in the system.
Sleeping States
S0 – working C0 – working D0 – working state. Full power > 30 W
S1 – Processor
stopped
S4 – Suspend to
disk. Context
saved to disk.
Context not saved.
Cold boot is
required.
No power to the
system.
Processor
States
C1 – stop
grant
No power D3 – no power
No power D3 – no power
No power D3 – no power for
Device States
D1, D2, D3 – device
specification
specific.
except for wake-up
logic.
except for wake-up
logic.
wake-up logic,
except when
provided by battery
or external source.
Targeted System
Power
5 W < power < 52.5 W
Power < 5 W
Power < 5 W
No power to the system.
Service can be
performed safely.
Table 8 lists the devices or specific events that can wake the computer from specific
states.
Table 8. Wake-up Devices and Events
These devices/events can wake up the
computer…
LAN S1, S4, S5
Modem (back panel Serial Port A) S1
PME# signal S1, S4, S5
Power switch S1, S4, S5
PS/2 devices S1
RTC alarm S1, S4, S5
USB S1
Note: For LAN and PME# signal, S5 is disabled by default in the BIOS Setup program. Setting this option
to Power On will enable a wake-up event from LAN in the S5 state.
NOTE
…from this state
(Note)
(Note)
The use of these wake-up events from an ACPI state requires an operating system
that provides full ACPI support. In addition, software, drivers, and peripherals must
fully support ACPI wake events.
1.11.2 Hardware Support
CAUTION
Ensure that the power supply provides adequate +5 V standby current if LAN wake
capabilities and Instantly Available PC technology features are used. Failure to do so
can damage the power supply. The total amount of standby current required depends
on the wake devices supported and manufacturing options.
The board provides several power management hardware features, including:
• Power connector
• Fan headers
• LAN wake capabilities
• Instantly Available PC technology
• Resume on Ring
• Wake from USB
• Wake from PS/2 keyboard
• PME# signal wake-up support
• WAKE# signal wake-up support
LAN wake capabilities and Instantly Available PC technology require power from the
+5 V standby line.
30
Product Description
Resume on Ring enables telephony devices to access the computer when it is in a
power-managed state. The method used depends on the type of telephony device
(external or internal).
NOTE
The use of Resume on Ring and Wake from USB technologies from an ACPI state
requires an operating system that provides full ACPI support.
1.11.2.1 Power Connector
ATX12V-compliant power supplies can turn off the system power through system
control. When an ACPI-enabled system receives the correct command, the power
supply removes all non-standby voltages.
When resuming from an AC power failure, the computer returns to the power state it
was in before power was interrupted (on or off). The computer’s response can be set
using the Last Power State feature in the BIOS Setup program’s Boot menu.
For information about Refer to
The location of the main power connector Figure 8, page 38
The signal names of the main power connector Table 14, page 40
1.11.2.2 Fan Headers
The function/operation of the fan headers is as follows:
• The fans are on when the board is in the S0 or S1 state.
• The fans are off when the board is off or in the S4 or S5 state.
• System fan header is wired to a fan tachometer input of the Winbond
W83627DHG-B I/O controller.
•All fan headers have a +12 V DC connection.
For information about Refer to
The signal names of the chassis fan headers Table 13, page 39
1.11.2.3 LAN Wake Capabilities
CAUTION
For LAN wake capabilities, the +5 V standby line for the power supply must be capable
of providing adequate +5 V standby current. Failure to provide adequate standby
current when implementing LAN wake capabilities can damage the power supply.
LAN wake capabilities enable remote wake-up of the computer through a network.
The LAN network adapter monitors network traffic at the Media Independent Interface.
Upon detecting a Magic Packet* frame, the LAN subsystem asserts a wake-up signal
that powers up the computer. Depending on the LAN implementation, the board
supports LAN wake capabilities with ACPI in the following ways:
• The PCI Conventional bus PME# signal for PCI 2.2 compliant LAN designs
The operation of Resume on Ring can be summarized as follows:
• Resumes operation from ACPI S1 states
• Detects incoming call similarly for external and internal modems
• Requires modem interrupt be unmasked for correct operation
1.11.2.5 Wake from USB
USB bus activity wakes the computer from ACPI S1 states.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.11.2.6 Wake from PS/2 Devices
PS/2 device activity wakes the computer from an ACPI S1 state.
1.11.2.7 PME# Signal Wake-up Support
When the PME# signal on the PCI Conventional bus is asserted, the computer wakes
from an ACPI S1, S4, or S5 state (with Wake on PME enabled in BIOS).
32
Product Description
1.11.2.8 +5 V Standby Power Indicator LED
The +5 V standby power indicator LED shows that power is still present even when the
computer appears to be off. Figure 6 shows the location of the standby power
indicator LED.
CAUTION
If AC power has been switched off and the standby power indicator is still lit,
disconnect the power cord before installing or removing any devices connected to the
board. Failure to do so could damage the board and any attached devices.
Figure 6. Location of the Standby Power Indicator LED
1024 K - 1048576 K 100000 - FFFFFFFF 4095 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E8000 - EFFFF 32 KB Reserved
800 K - 896 K C8000 – E7FFF 128 KB Potential available high DOS
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory
0 K - 512 K 00000 - 7FFFF 512 KB Conventional memory
Address Range
(hex)
Size
Description
memory (open to the PCI
Conventional bus). Dependent on
video adapter used.
Only the following connectors/headers have overcurrent protection: back panel USB,
front panel USB, and PS/2.
The other internal connectors/headers are not overcurrent protected and should
connect only to devices inside the computer’s chassis, such as fans and internal
peripherals. Do not use these connectors/headers to power devices external to the
computer’s chassis. A fault in the load presented by the external devices could cause
damage to the computer, the power cable, and the external devices themselves.
This section describes the board’s connectors and headers. The connectors and
headers can be divided into these groups:
• Back panel I/O connectors (see page 37)
• Component-side I/O connectors and headers (see page 38)
36
Technical Reference
2.2.1 Back Panel Connectors
Figure 7 shows the location of the back panel connectors. The back panel connectors
are color-coded. The figure legend (Table 10) lists the colors used (when applicable).
Figure 7. Back Panel Connectors
Table 10. Back Panel Connectors Shown in Figure 7
Item/callout
from Figure 7 Descri
A PS/2 mouse port (Green)
B PS/2 keyboard port (Purple)
C Parallel port (Burgundy)
D Serial port A (Teal)
E VGA port
F S-Video output (optional)
G LAN
H USB ports [2]
I Line in
J Mic in
K Line out
NOTE
ption
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
Figure 8 shows the locations of the component-side connectors and headers.
Figure 8. Component-side Connectors and Headers
Table 11 lists the component-side connectors and headers identified in Figure 8.
38
Technical Reference
Table 11. Component-side Connectors and Headers Shown in Figure 8
Item/callout
from Figure 8
A PCI Conventional bus add-in card connector
B Front panel USB header
C Front panel USB header
D Front panel audio header
E Chassis fan header
F +12V power connector (ATX12V)
G Main power connector
H Processor fan header
I Parallel ATA IDE connector
J SATA connector
K SATA connector
L Front panel header
Descri
ption
Table 12. Front Panel Audio Header
Pin Signal Name Pin Signal Name
1 MIC 2 Ground
3 MIC BIAS 4 Ground
5 FP_OUT_R 6 FP_RETURN_R
7 +5 V 8 Key
9 FP_OUT_L 10 FP_RETURN_L
INTEGRATOR’S NOTE
#
The front panel audio connector is alternately used as a jumper block for routing audio
signals. Refer to Section 2.3 on page 44 for more information.
The board has the following power supply connectors:
•Main power – a 2 x 10 connector. The board supports the use of ATX12V power
supplies with 2 x 10 or 2 x 12 main power cables.
•ATX12V power – a 2 x 2 connector. This connector provides power directly to
the processor voltage regulator and must always be used. Failure to do so will
prevent the board from booting.
Table 14. Main Power Connector
Pin Signal Name Pin Signal Name
1 +3.3 V 11 +3.3 V
2 +3.3 V 12 -12 V
3 Ground 13 Ground
4 +5 V 14 PS-ON# (power supply remote on/off)
5 Ground 15 Ground
6 +5 V 16 Ground
7 Ground 17 Ground
8 PWRGD (Power Good) 18 +5 V
9 +5 V (Standby) 19 +5 V
10 +12 V 20 +5 V
Table 15. ATX12V Power Connector
Pin Signal Name Pin Signal Name
1 Ground 2 Ground
3 +12 V 4 +12 V
2.2.2.2 Add-in Card Connectors
The board has one PCI Conventional (rev 2.3 compliant) bus add-in card connector.
PCI Conventional bus add-in cards with SMBus support can access sensor data and
other information residing on the board.
Note the following considerations for the PCI Conventional bus connector:
• The PCI Conventional bus connector is bus master capable.
• SMBus signals are routed to the PCI Conventional bus connector. This enables PCI
Conventional bus add-in boards with SMBus support to access sensor data on the
board. The specific SMBus signals are as follows:
⎯ The SMBus clock line is connected to pin A40.
⎯ The SMBus data line is connected to pin A41.
40
Technical Reference
2.2.2.3 Front Panel Header
This section describes the functions of the front panel header. Table 16 lists the signal
names of the front panel header. Figure 9 is a connection diagram for the front panel
header.
Table 16.
Front Panel Header
Pin Signal In/Out Description Pin Signal In/Out Description
Hard Drive Activity LED
[Orange]
1 HD_PWR Out Hard disk LED
pull-up to +5 V
3 HAD# Out Hard disk active
LED
Reset Switch
[Blue]
5 Ground Ground 6 FPBUT_IN In Power switch
7 FP_RESET# In Reset switch 8 Ground Ground
Power Not Connected
9 +5 V Power 10 N/C Not connected
2 HDR_BLNK_
GRN
4 HDR_BLNK_
YEL
Power LED
[Green]
Out Front panel green
LED
Out Front panel yellow
LED
On/Off Switch
[Red]
Figure 9. Connection Diagram for Front Panel Header
Pins 1 and 3 [Orange] can be connected to an LED to provide a visual indicator that
data is being read from or written to a hard drive. Proper LED function requires an
IDE hard drive connected to an onboard IDE connector.
2.2.2.3.2 Reset Switch Header [Blue]
Pins 5 and 7 [Blue] can be connected to a momentary single pole, single throw (SPST)
type switch that is normally open. When the switch is closed, the board resets and
runs the POST.
2.2.2.3.3 Power/Sleep LED Header [Green]
Pins 2 and 4 [Green] can be connected to a one- or two-color LED. Table 17 shows
the possible states for a one-color LE
D. Table 18 shows the possible states for a two-
color LED.
Table 17.
LED State Description
Off Power off/sleeping
Steady Green Running
States for a One-Color Power LED
Table 18. States for a Two-Color Power LED
LED State Description
Off Power off
Steady Green Running
Steady Yellow Sleeping
NOTE
The colors listed in Table 17 and Table 18 are suggested colors only. Actual LED
colors are product- or customer-specific.
2.2.2.3.4 Power Switch Header [Red]
Pi
ns 6 and 8 [Red] can be connected to a front panel momentary-contact power
switch. The switch must pull the SW_ON# pin to ground for at least 50 ms to signal
the power supply to switch on or off. (The time requirement is due to internal
debounce circuitry on the board.) At least two seconds must pass before the power
supply will recognize another on/off signal.
42
Technical Reference
2.2.3 Front Panel USB Headers
Figure 10 is a connection diagram for the front panel USB headers.
INTEGRATOR’S NOTES
#
• The +5 V DC power on the USB connector is fused.
• Pins 1, 3, 5, and 7 comprise one USB port.
• Pins 2, 4, 6, and 8 comprise one USB port.
• Use only a front panel USB connector that conforms to the USB 2.0 specification
for high-speed USB devices.
Figure 10. Connection Diagram for Front Panel USB Headers
Do not move any jumpers with the power on. Always turn off the power and unplug
the power cord from the computer before changing a jumper setting. Otherwise, the
Desktop Board could be damaged.
Figure 11 shows the location of the jumper blocks.
Item Description
A Front panel audio header/jumper block
B BIOS Setup configuration jumper block
Figure 11. Location of the Jumper Blocks
44
Technical Reference
2.3.1 Front Panel Audio Header/Jumper Block
This connector has two functions:
•With jumpers installed, the audio line out and mic in signals are routed to the back
panel audio connectors.
•With jumpers removed, the connector provides audio line out and mic in signals for
front panel audio headers.
Table 19 describes the two configurations of this header/jumper block.
CAUTION
Do not place jumpers on this block in any configuration other than the one described
in Table 19. Other jumper configurations are not supported and could damage the
Desktop Board.
Table 19.
Jumper Setting Configuration
INTEGRATOR’S NOTE
#
Front Panel Audio Header/Jumper Block
5 and 6
9 and 10
No jumpers
installed
Audio line out and mic in signals are routed to the back panel audio
connectors. The back panel audio connectors are shown in Figure 7 on
page 37.
Table 12 on page 39 lists the names of the signals available on this
connector when no jumpers are installed.
When the jumpers are removed and this connector is used for front panel audio, the
back panel audio line out and mic in connectors are disabled.
This 3-pin jumper block determines the BIOS Setup program’s mode. Table 20
describes the jumper settings for the three modes: normal, configure, and recovery.
When the jumper is set to configuration mode and the computer is powered-up, the
BIOS compares the processor version and the microcode version in the BIOS and
reports i
The BIOS uses current configuration information and
passwords for booting.
After the POST runs, Setup runs automatically. The
maintenance menu is displayed.
The BIOS attempts to recover the BIOS configuration. A
recovery diskette is required.
46
Technical Reference
2.4 Mechanical Considerations
2.4.1 Form Factor
The board is designed to fit into a microATX-form-factor chassis. Figure 12 illustrates
the mechanical form factor of the board. Dimensions are given in inches [millimeters].
The outer dimensions are 6.75 inches by 6.75 inches [171.45 millimeters by
171.45 millimeters]. Location of the I/O connectors and mounting holes are in
compliance with the micro-ATX specification.
Table 21 lists the DC loading characteristics of the board. This data is based on a DC
analysis of all active components within the board that impact its power delivery
subsystems. The analysis does not include PCI add-in cards. Minimum values assume
a light load placed on the board that is similar to an environment with no applications
running and no USB current draw. Maximum values assume a load placed on the
board that is similar to a heavy gaming environment with a 500 mA current draw per
USB port. These calculations are not based on specific processor values or memory
configurations but are based on the minimum and maximum current draw possible
from the board’s power delivery subsystems to the processor, memory, and USB
ports.
Use the datasheets for add-in cards, such as PCI, to determine the overall system
power requirements. The selection of a power supply at the system level is dependent
on the system’s usage model and not necessarily tied to a particular processor speed.
Table 21. DC Loading Characteristics
DC Current at:
Mode DC Power +3.3 V +5 V +12 V -12 V +5 VSB
Minimum loading 15 W 0.2 A 2.1 A 0.1 A 0 A 0.4 A
Maximum loading 180 W 8.5 A 21.5 A 3 A 0.1 A 0.9 A
2.5.2 Add-in Board Considerations
The board is designed to provide 2 A (average) of +5 V current for one add-in board.
48
Technical Reference
2.5.3 Fan Header Current Capability
CAUTION
The processor fan must be connected to the processor fan header, not to a chassis fan
header. Connecting the processor fan to a chassis fan header may result in onboard
component damage that will halt fan operation.
Table 22 lists the current capability of the fan headers.
Table 22.
Fan Header Maximum Available Current
Processor fan 2 A
Rear chassis fan 1.5 A
Fan Header Current Capability
2.5.4 Power Supply Considerations
CAUTION
The +5 V standby line for the power supply must be capable of providing adequate
+5 V standby current. Failure to do so can damage the power supply. The total
amount of standby current required depends on the wake devices supported and
manufacturing options.
System integrators should refer to the power usage values listed in Table 21 when
selecting a power supply for use with the board.
Addit
ional power required will depend on configurations chosen by the integrator.
The power supply must comply with the following recommendations found in the
indicated sections of the ATX form factor specification.
• The potential relation between 3.3 VDC and +5 VDC power rails
Failure to ensure appropriate airflow may result in reduced performance of both the
processor and/or voltage regulator or, in some instances, damage to the board. Please
refer to the Intel Celeron Processor 200 Series Thermal and Mechanical Design
Guidelines (TMDG) at the link below for system thermal solution considerations
The TMDG document contains guidelines for thermal metrology in evaluating a
selected chassis with several parameters, such as ambient temperature, heatsink
temperature and processor power measurement. For information on chassis selection,
please refer to the case studies in the TMDG document. All the references mentioned
are based on the assumption that there no changes are made to the reference thermal
solution for the processor.
All responsibility for determining the adequacy of any thermal or system design
remains solely with the reader. Intel makes no warranties or representations that
merely following the instructions presented in this document will result in a system
with adequate thermal performance.
CAUTION
Ensure that the ambient temperature does not exceed the board’s maximum operating
temperature. Failure to do so could cause components to exceed their maximum case
temperature and malfunction. For information about the maximum operating
temperature, see the environmental specifications in Section 2.8.
CAUTION
Ensure that proper airflow is maintained in the processor voltage regulator circuit.
Failure to do so may result in damage to the voltage regulator circuit. The processor
voltage regulator area (item A in Figure 13) can reach a temperature of up to 85
an open chassis.
o
C in
50
Technical Reference
Figure 13 shows the locations of the localized high temperature zones.
Item Description
A Processor voltage regulator area
B Processor
C SiS662 Northbridge
D SiS964 Southbridge
Figure 13. Localized High Temperature Zones
The operating temperature, current load, or operating frequency could affect case
temperatures. Maximum case temperatures are important when considering proper
airflow to cool the board. For processor case temperature, see processor datasheets
and processor specification updates for supported processors. For chipset thermal
information, refer to the following website:
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Bellcore Reliability
Prediction Procedure, TR-NWT-000332, Issue 4, September 1991. The MTBF
prediction is used to estimate repair rates and spare parts requirements.
The MTBF data is calculated from predicted data at 55 ºC. Table 23 shows the MTBF
value for each of the D201GLY2 board’s manufacturing options.
We, Intel Corporation, declare under our sole responsibility that the product Intel®
Desktop Board D201GLY2 is in conformity with all applicable essential requirements
necessary for CE marking, following the provisions of the European Council Directive
2004/108/EC(EMC Directive) and 2006/95/EC (Low Voltage Directive).
The product is properly CE marked demonstrating this conformity and is for
distribution within all member states of the EU with no restrictions.
This product follows the provisions of the European Directives 2004/108/EC and
2006/95/EC.
Čeština Tento výrobek odpovídá požadavkům evropských směrnic 2004/108/EC a
2006/95/EC.
Dansk Dette produkt er i overensstemmelse med det europæiske direktiv
2004/108/EC & 2006/95/EC.
Dutch Dit product is in navolging van de bepalingen van Europees Directief
2004/108/EC & 2006/95/EC.
Eesti Antud toode vastab Euroopa direktiivides 2004/108/EC ja 2006/95/EC
kehtestatud nõuetele.
Suomi Tämä tuote noudattaa EU-direktiivin 2004/108/EC & 2006/95/EC määräyksiä.
Français Ce produit est conforme aux exigences de la Directive Européenne
2004/108/EC & 2006/95/EC.
Deutsch Dieses Produkt entspricht den Bestimmungen der Europäischen Richtlinie
The following information is provided to address worldwide product ecology concerns
and regulations.
2.9.3.1 Disposal Considerations
This product contains the following materials that may be regulated upon disposal:
lead solder on the printed wiring board assembly.
2.9.3.2 Recycling Considerations
As part of its commitment to environmental responsibility, Intel has implemented the
Intel Product Recycling Program to allow retail consumers of Intel’s branded products
to return used products to selected locations for proper recycling.
Please consult the http://www.intel.com/intel/other/ehs/product_ecology
details of this program, including the scope of covered products, available locations,
shipping instructions, terms and conditions, etc.
中文
作为其对环境责任之承诺的部分,英特尔已实施 Intel Product Recycling Program
(英特尔产品回收计划),以允许英特尔品牌产品的零售消费者将使用过的产品退还至指定地点作
恰当的重复使用处理。
Als Teil von Intels Engagement für den Umweltschutz hat das Unternehmen das Intel
Produkt-Recyclingprogramm implementiert, das Einzelhandelskunden von Intel
Markenprodukten ermöglicht, gebrauchte Produkte an ausgewählte Standorte für
ordnungsgemäßes Recycling zurückzugeben.
Details zu diesem Programm, einschließlich der darin eingeschlossenen Produkte,
verfügbaren Standorte, Versandanweisungen, Bedingungen usw., finden Sie auf der
Español
Como parte de su compromiso de responsabilidad medioambiental, Intel ha
implantado el programa de reciclaje de productos Intel, que permite que los
consumidores al detalle de los productos Intel devuelvan los productos usados en los
lugares seleccionados para su correspondiente reciclado.
for the
Consulte la http://www.intel.com/intel/other/ehs/product_ecology
del programa, que incluye los productos que abarca, los lugares disponibles,
instrucciones de envío, términos y condiciones, etc.
56
para ver los detalles
Technical Reference
Français
Dans le cadre de son engagement pour la protection de l'environnement, Intel a mis
en œuvre le programme Intel Product Recycling Program (Programme de recyclage
des produits Intel) pour permettre aux consommateurs de produits Intel de recycler
les produits usés en les retournant à des adresses spécifiées.
Visitez la page Web http://www.intel.com/intel/other/ehs/product_ecology
pour en
savoir plus sur ce programme, à savoir les produits concernés, les adresses
disponibles, les instructions d'expédition, les conditions générales, etc.
Sebagai sebahagian daripada komitmennya terhadap tanggungjawab persekitaran,
Intel telah melaksanakan Program Kitar Semula Produk untuk membenarkan
pengguna-pengguna runcit produk jenama Intel memulangkan produk terguna ke
lokasi-lokasi terpilih untuk dikitarkan semula dengan betul.
Sila rujuk http://www.intel.com/intel/other/ehs/product_ecology
untuk mendapatkan
butir-butir program ini, termasuklah skop produk yang dirangkumi, lokasi-lokasi
tersedia, arahan penghantaran, terma & syarat, dsb.
Portuguese
Como parte deste compromisso com o respeito ao ambiente, a Intel implementou o
Programa de Reciclagem de Produtos para que os consumidores finais possam enviar
produtos Intel usados para locais selecionados, onde esses produtos são reciclados de
maneira adequada.
Consulte o site http://www.intel.com/intel/other/ehs/product_ecology
(em Inglês)
para obter os detalhes sobre este programa, inclusive o escopo dos produtos cobertos,
os locais disponíveis, as instruções de envio, os termos e condições, etc.
Russian
В качестве части своих обязательств к окружающей среде, в Intel создана
программа утилизации продукции Intel (Product Recycling Program) для
предоставления конечным пользователям марок продукции Intel возможности
возврата используемой продукции в специализированные пункты для должной
утилизации.
Intel, çevre sorumluluğuna bağımlılığının bir parçası olarak, perakende tüketicilerin
Intel markalı kullanılmış ürünlerini belirlenmiş merkezlere iade edip uygun şekilde geri
dönüştürmesini amaçlayan Intel Ürünleri Geri Dönüşüm Programı’nı uygulamaya
koymuştur.
Bu programın ürün kapsamı, ürün iade merkezleri, nakliye talimatları, kayıtlar ve
şartlar v.s dahil bütün ayrıntılarını ögrenmek için lütfen
This Desktop Board is a European Union Restriction of Hazardous Substances (EU
RoHS Directive 2002/95/EC) compliant product. EU RoHS restricts the use of six
materials. One of the six restricted materials is lead.
This Desktop Board is lead free although certain discrete components used on the
board contain a small amount of lead which is necessary for component performance
and/or reliability. This Desktop Board is referred to as “Lead-free second level
interconnect.” The board substrate and the solder connections from the board to the
components (second-level connections) are all lead free.
China bans the same substances and has the same limits as EU RoHS; however it
requires different product marking and controlled substance information. The required
mark shows the Environmental Friendly Usage Period (EFUP). The EFUP is defined as
the number of years for which controlled listed substances will not leak or chemically
deteriorate while in the product.
58
Technical Reference
Table 26 shows the various forms of the “Lead-Free 2nd Level Interconnect” mark as it
appears on the board and accompanying collateral.
Table 26. Lead-Free Board Markings
Description Mark
Lead-Free 2
Interconnect: This symbol is
used to identify electrical and
electronic assemblies and
components in which the lead
(Pb) concentration level in the
desktop board substrate and the
solder connections from the board
to the components (second-level
interconnect) is not greater than
Desktop Board D201GLY2 complies with the EMC regulations stated in Table 27 when
correctly installed in a compatible host system.
Table 27. EMC Regulations
Regulation Title
FCC 47 CFR Part 15,
Subpart B
ICES-003 Issue 4
(Class B)
EN55022:2006
(Class B)
EN55024:1998
(Class B)
EN55022:2006
(Class B)
CISPR 22:2005
+A1:2005 +A2:2006
(Class B)
CISPR 24:1997
+A1:2001 +A2:2002
(Class B)
VCCI V-3/2007.04,
V-4/2007.04, Class B
Title 47 of the Code of Federal Regulations, Part 15, Subpart B, Radio
Frequency Devices. (USA)
Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
Limits and methods of measurement of Radio Interference Characteristics
of Information Technology Equipment. (European Union)
Information Technology Equipment – Immunity Characteristics Limits and
methods of measurement. (European Union)
Australian Communications Authority, Standard for Electromagnetic
Compatibility. (Australia and New Zealand)
Limits and methods of measurement of Radio Disturbance Characteristics of
Information Technology Equipment. (International)
Information Technology Equipment – Immunity Characteristics – Limits and
Methods of Measurement. (International)
Voluntary Control for Interference by Information Technology Equipment.
(Japan)
60
Technical Reference
Japanese Kanji statement translation: this is a Class B product based on the standard
of the Voluntary Control Council for Interference from Information Technology
Equipment (VCCI). If this is used near a radio or television receiver in a domestic
environment, it may cause radio interference. Install and use the equipment
according to the instruction manual.
Korean Class B statement translation: this is household equipment that is certified to
comply with EMC requirements. You may use this equipment in residential
environments and other non-residential environments.
Desktop Board D201GLY2 has the product certification markings shown in Table 28:
Table 28. Product Certification Markings
Description Mark
UL joint US/Canada Recognized Component mark. Includes adjacent UL file
number for Intel desktop boards: E210882.
FCC Declaration of Conformity logo mark for Class B equipment. Includes
Intel name and D201GLY model designation.
CE mark. Declaring compliance to European Union (EU) EMC directive and
Low Voltage directive.
Australian Communications Authority (ACA) and New Zealand Radio Spectrum
Management (NZ RSM) C-tick mark. Includes adjacent Intel supplier code
number, N-232.
Japan VCCI (Voluntary Control Council for Interference) mark.
S. Korea MIC (Ministry of Information and Communication) mark. Includes
adjacent MIC certification number: CPU-D201GLY (B)
Taiwan BSMI (Bureau of Standards, Metrology and Inspections) mark.
Includes adjacent Intel company number, D33025.
Printed wiring board manufacturer’s recognition mark. Consists of a unique
UL recognized manufacturer’s logo, along with a flammability rating (solder
side).
China RoHS/Environmentally Friendly Use Period Logo: This an
example of the symbol used on Intel Desktop Boards and associated
collateral. The color of the mark may vary depending upon the application.
The Environmental Friendly Usage Period (EFUP) for Intel Desktop Boards has
been determined to be 10 years.
3.9 BIOS Security Features .................................................................... 70
3.1 Introduction
The board uses an Intel BIOS that is stored in the SPI Flash device and can be
updated using a disk-based program. The SPI Flash device contains the BIOS Setup
program, POST, the PCI auto-configuration utility, and Plug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision
code. The initial production BIOSs are identified as LY66210M.86A.
When the BIOS Setup configuration jumper is set to configure mode and the computer
is powered-up, the BIOS compares the CPU version and the microcode version in the
BIOS and reports if the two match.
The BIOS Setup program can be used to view and change the BIOS settings for the
computer. The BIOS Setup program is accessed by pressing the <F2> key after the
Power-On Self-Test (POST) memory test begins and before the operating system boot
begins. The menu bar is shown below.
Maintenance Main Advanced Security Power Boot Exit
NOTE
The maintenance menu is displayed only when the board is in configure mode.
Section 2.3.2 on page 46 shows how to put the board in configure mode.
Table 29 lists the BIOS Setup program menu features.
Table 29.
BIOS Setup Program Menu Bar
Maintenance Main Advanced Security Power Boot Exit
Clears
passwords and
displays
processor
information
Displays
processor
and memory
configuration
Configures
advanced
features
available
through the
chipset
Sets
passwords
and security
features
Table 30 lists the function keys available for menu screens.
Table 30. BIOS Setup Program Function Keys
BIOS Setup Program
Function Key
<←> or <→>
<↑> or <↓>
<Tab> Selects a field (Not implemented)
<Enter> Executes command or selects the submenu
<F9> Load the default configuration values for the current menu
<F10> Save the current values and exits the BIOS Setup program
<Esc> Exits the menu
Description
Selects a different menu screen (Moves the cursor left or right)
Selects an item (Moves the cursor up or down)
Configures
power
management
features and
power supply
controls
Selects boot
options
Saves or
discards
changes to
Setup
program
options
3.2 BIOS Flash Memory Organization
The SPI Flash device includes a 4-Mbit (512 KB) flash memory device.
3.3 Resource Configuration
3.3.1 PCI Autoconfiguration
The BIOS can automatically configure PCI devices. PCI devices may be onboard or
add-in cards. Autoconfiguration lets a user insert or remove PCI cards without having
to configure the system. When a user turns on the system after adding a PCI card,
the BIOS automatically configures interrupts, the I/O space, and other system
resources. Any interrupts set to Available in Setup are considered to be available for
use by the add-in card.
64
Overview of BIOS Features
3.3.2 PCI IDE Support
If you select Auto in the BIOS Setup program, the BIOS automatically sets up the
PCI IDE connector with independent I/O channel support. The IDE interface supports
hard drives up to ATA-66/100/133 and recognizes any ATAPI compliant devices,
including CD-ROM drives, tape drives, and Ultra DMA drives. The interface also
supports second-generation SATA drives. The BIOS determines the capabilities of
each drive and configures them to optimize capacity and performance. To take
advantage of the high capacities typically available today, hard drives are
automatically configured for Logical Block Addressing (LBA) and to PIO Mode 3 or 4,
depending on the capability of the drive. You can override the auto-configuration
options by specifying manual configuration in the BIOS Setup program.
To use ATA-66/100/133 features the following items are required:
• An ATA-66/100/133 peripheral device
• An ATA-66/100/133 compatible cable
• ATA-66/100/133 operating system device drivers
NOTE
Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master
device. For example, do not connect an ATA hard drive as a slave to an ATAPI
CD-ROM drive.
3.4 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing
computers in a managed network.
The main component of SMBIOS is the Management Information Format (MIF)
database, which contains information about the computing system and its
components. Using SMBIOS, a system administrator can obtain the system types,
capabilities, operational status, and installation dates for system components. The
MIF database defines the data and provides the method for accessing this information.
The BIOS enables applications such as third-party management software to use
SMBIOS. The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems require an additional interface for obtaining the
SMBIOS information. The BIOS supports an SMBIOS table interface for such operating
systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obtain the SMBIOS information.
Legacy USB support enables USB devices to be used even when the operating
system’s USB drivers are not yet available. Legacy USB support is used to access the
BIOS Setup program, and to install an operating system that supports USB.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to
enter and configure the BIOS Setup program and the maintenance menu.
4. POST completes.
5. The operating system loads. While the operating system is loading, USB
keyboards and mice are recognized and may be used to configure the operating
system.
6. After the operating system loads the USB drivers, all legacy and non-legacy USB
devices are recognized by the operating system, and Legacy USB support from the
BIOS is no longer used.
To install an operating system that supports USB, follow the operating system’s
installation instructions.
3.6 BIOS Updates
The BIOS can be updated using either of the following utilities, which are available on
the Intel World Wide Web site:
• Intel
• Intel
Both utilities verify that the updated BIOS matches the target system to prevent
accidentally installing an incompatible BIOS.
Review the instructions distributed with the upgrade utility before attempting a BIOS
update.
Express BIOS Update utility, which enables automated updating while in the
Windows environment. Using this utility, the BIOS can be updated from a file on a
hard disk, a USB drive (a flash drive or a USB hard drive), or a CD-ROM, or from
the file location on the Web.
®
Flash Memory Update Utility, which requires booting from DOS. Using this
utility, the BIOS can be updated from a file on a hard disk, a USB drive (a flash
drive or a USB hard drive), or a CD-ROM.
NOTE
022312.htm.
66
3.6.1 Language Support
Overview of BIOS Features
The BIOS Setup program and help messages are supported in US English. Additional
languages are available in the Intel
for details.
®
Integrator Toolkit utility. Check the Intel website
3.6.2 Custom Splash Screen
During POST, an Intel® splash screen is displayed by default. This splash screen can
be augmented with a custom splash screen. The Intel Integrator Toolkit that is
available from Intel can be used to create a custom splash screen.
NOTE
If you add a custom splash screen, it will share space with the Intel branded logo.
In the BIOS Setup program, the user can choose to boot from a hard drive, CD-ROM,
or the network. The default setting is for the hard drive to be the first boot device, the
ATAPI CD-ROM second, and the network third. The fourth device is disabled.
3.7.1 CD-ROM Boot
Booting from CD-ROM is supported in compliance to the El Torito bootable CD-ROM
format specification. Under the Boot menu in the BIOS Setup program, ATAPI CDROM is listed as a boot device. Boot devices are defined in priority order. Accordingly,
if there is not a bootable CD in the CD-ROM drive, the system will attempt to boot
from the next defined drive.
3.7.2 Network Boot
The network can be selected as a boot device. This selection allows booting from the
onboard LAN or a network add-in card with a remote boot ROM installed.
Pressing the <F12> key during POST automatically forces booting from the LAN. To
use this key during POST, the User Access Level in the BIOS Setup program's Security
menu must be set to Full.
3.7.3 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing
the POST, the operating system loader is invoked even if the following devices are not
present:
3.7.4 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a boot device menu to be displayed. This
menu displays the list of available boot devices (as set in the BIOS setup program’s
Boot Device Priority Submenu). Table 31 lists the boot device menu options.
Table 31.
Boot Device Menu Function Keys Description
<↑> or <↓>
<Enter> Exits the menu, saves changes, and boots from the selected
<Esc> Exits the menu without saving changes
Boot Device Menu Options
Selects a default boot device
device
3.8 Adjusting Boot Speed
These factors affect system boot speed:
• Selecting and configuring peripherals properly
• Optimized BIOS boot parameters
3.8.1 Peripheral Selection and Configuration
The following techniques help improve system boot speed:
•Choose a hard drive with parameters such as “power-up to data ready” less than
eight seconds, that minimize hard drive startup delays.
•Select a CD-ROM drive with a fast initialization rate. This rate can influence POST
execution time.
•Eliminate unnecessary add-in adapter features, such as logo displays, screen
repaints, or mode changes in POST. These features may add time to the boot
process.
•Try different monitors. Some monitors initialize and communicate with the BIOS
more quickly, which enables the system to boot more quickly.
68
Overview of BIOS Features
3.8.2 BIOS Boot Optimizations
Use of the following BIOS Setup program settings reduces the POST execution time.
•In the Boot Menu, set the hard disk drive as the first boot device. As a result, the
POST does not first seek a diskette drive, which saves about one second from the
POST execution time.
•In the Peripheral Configuration submenu, disable the LAN device if it will not be
used. This can reduce up to four seconds of option ROM boot time.
NOTE
It is possible to optimize the boot process to the point where the system boots so
quickly that the Intel logo screen (or a custom logo splash screen) will not be seen.
Monitors and hard disk drives with minimum initialization times can also contribute to
a boot time that might be so fast that necessary logo screens and POST messages
cannot be seen.
This boot time may be so fast that some drives might be not be initialized at all. If
this condition should occur, it is possible to introduce a programmable delay ranging
from three to 30 seconds (using the Hard Disk Pre-Delay feature of the Advanced
Menu in the Drive Configuration Submenu of the BIOS Setup program).
The BIOS includes security features that restrict access to the BIOS Setup program
and who can boot the computer. A supervisor password and a user password can be
set for the BIOS Setup program and for booting the computer, with the following
restrictions:
•The supervisor password gives unrestricted access to view and change all the
Setup options in the BIOS Setup program. This is the supervisor mode.
•The user password gives restricted access to view and change Setup options in the
BIOS Setup program. This is the user mode.
•If only the supervisor password is set, pressing the <Enter> key at the password
prompt of the BIOS Setup program allows the user restricted access to Setup.
•If both the supervisor and user passwords are set, users can enter either the
supervisor password or the user password to access Setup. Users have access to
Setup respective to which password is entered.
•Setting the user password restricts who can boot the computer. The password
prompt will be displayed before the computer is booted. If only the supervisor
password is set, the computer boots without asking for a password. If both
passwords are set, the user can enter either password to boot the computer.
•For enhanced security, use different passwords for the supervisor and user
passwords.
•Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to
16 characters in length.
Table 32 shows the effects of setting the supervisor password and user password.
T
his table is for reference only and is not displayed on the screen.
Table 32. Supervisor and User Password Functions
Password
Set
Neither Can change all
Supervisor
only
User only N/A Can change all
Supervisor
and user set
Note: If no password is set, any user can change all Setup options.
Supervisor
Mode
options
Can change all
options
Can change all
options
(Note)
User Mode
Can change all
options
Can change a
limited number
of options
options
Can change a
limited number
of options
(Note)
Setup Options
None None None
Supervisor Password Supervisor None
Enter Password
Clear User Password
Supervisor Password
Enter Password
Password
to Enter
Setup
User User
Supervisor or
user
Password
During
Boot
Supervisor or
user
70
4 Error Messages
What This Chapter Contains
4.1 BIOS Front-panel Power LED Codes.................................................... 71
4.3 Port 80h POST Codes ....................................................................... 72
4.1 BIOS Front-panel Power LED Codes
The front-panel power LED blinks off and on to display messages. For example, the
power LED is on when the system is powered on, and blinks off for 0.5 second when
processor initialization is complete. In addition, whenever a recoverable error occurs
during POST, the BIOS causes the front-panel power LED to blink an error message
describing the problem (see Table 33).
Table 33.
Type Pattern
Processor initialization complete On when system powers up, then off for 0.5 second.
POST complete On when system powers up, then off for 0.5 second.
BIOS update in progress Off when update begins, then on for 0.5 second, then off for
Video error On-off (0.5 second each) two times, then 3.0 second pause (off)
Memory error On-off (0.5 second each) three times, then 3.0 second pause (off)
Thermal warning On-off (0.5 second each) four times, then 3.0 second pause (off)
Front-panel Power LED Blink Codes
0.5 second; pattern repeats until BIOS update is complete.
between on-off blink pattern; repeat entire pattern (two on-off
blinks and pause) until system is powered off.
between on-off blink pattern; repeat entire pattern (three on-off
blinks and 3-second pause) until system is powered off.
between on-off blink pattern; repeat entire pattern (four on-off
blinks and 3-second pause) until 16
th
on blink, then end.
4.2 BIOS Error Messages
Table 34 lists the error messages and provides a brief description of each.
Table 34. BIOS Error Messages
Error Message Explanation
CMOS Battery Low The battery may be losing power. Replace the battery soon.
CMOS Checksum Bad The CMOS checksum is incorrect. CMOS memory may have been
corrupted. Run Setup to reset values.
Memory Size Decreased Memory size has decreased since the last boot. If no memory
was removed, then memory may be bad.
No Boot Device Available System did not find a device to boot.
During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O
port 80h. If the POST fails, execution stops and the last POST code generated is left
at port 80h. This code is useful for determining the point where an error occurred.
Displaying the POST codes requires a PCI bus add-in card, often called a POST card.
The POST card can decode the port and display the contents on a medium such as a
seven-segment display.
NOTE
The POST card must be installed in PCI bus connector 1.
The following tables provide information about the POST codes generated by the
BIOS:
• Table 35 lists the Port 80h POST code ranges
• Table 36 lists the Port 80h POST codes themselves
• Table 37 lists the Port 80h POST sequence
NOTE
In the tables listed above, all POST codes and range values are listed in hexadecimal.
Table 35. Port 80h POST Code Ranges
Range Category/Subsystem
00 – 0F Debug codes: Can be used by any PEIM/driver for debug.
10 – 1F Host Processors: 1F is an unrecoverable CPU error.
20 – 2F Memory/Chipset: 2F is no memory detected or no useful memory detected.
30 – 3F Recovery: 3F indicated recovery failure.
40 – 4F Reserved for future use.
50 – 5F I/O Busses: PCI, USB, ISA, ATA, etc. 5F is an unrecoverable error. Start with PCI.
60 – 6F Reserved for future use (for new busses).
70 – 7F Output Devices: All output consoles. 7F is an unrecoverable error.
80 – 8F Reserved for future use (new output console codes).
90 – 9F Input devices: Keyboard/Mouse. 9F is an unrecoverable error.
A0 – AF Reserved for future use (new input console codes).
B0 – BF Boot Devices: Includes fixed media and removable media. BF is an unrecoverable error.
C0 – CF Reserved for future use.
D0 – DF Boot device selection.
E0 – FF E0 – EE: Miscellaneous codes. See Table 36.
Host Processor
10 Power-on initialization of the host processor (Boot Strap Processor)
11 Host processor cache initialization (including APs)
12 Starting Application processor initialization
13 SMM initialization
Chipset
21 Initializing a chipset component
Memory
22 Reading SPD from memory DIMMs
23 Detecting presence of memory DIMMs
24 Programming timing parameters in the memory controller and the DIMMs
25 Configuring memory
26 Optimizing memory settings
27 Initializing memory, such as ECC init
28 Testing memory
PCI Bus
50 Enumerating PCI busses
51 Allocating resources to PCI bus
52 Hot Plug PCI controller initialization
53 – 57 Reserved for PCI Bus
USB
58 Resetting USB bus
59 Reserved for USB
ATA/ATAPI
5A Resetting PATA bus and all devices
5B Reserved for ATA
SMBus
5C Resetting SMbus
5D Reserved for SMbus
Local Console
70 Resetting the VGA controller
71 Disabling the VGA controller
72 Enabling the VGA controller
Remote Console
78 Resetting the console controller
79 Disabling the console controller
7A Enabling the console controller
Keyboard (PS/2 or USB)
90 Resetting keyboard
91 Disabling keyboard
92 Detecting presence of keyboard
93 Enabling keyboard
94 Clearing keyboard input buffer
95 Instructing keyboard controller to run Self Test (PS/2 only)
Mouse (PS/2 or USB)
98 Resetting mouse
99 Disabling mouse
9A Detecting presence of mouse
9B Enabling mouse
Fixed Media
B0 Resetting fixed media
B1 Disabling fixed media
B2 Detecting presence of a fixed media (IDE hard drive detection etc.)
B3 Enabling/configuring a fixed media
Removable media
B8 Resetting removable media
B9 Disabling removable media
BA Detecting presence of a removable media (IDE, CD-ROM detection, etc.)
BC Enabling/configuring a removable media
BDS
DyTrying boot selection y (y=0 to 15)
PEI Core
E0 Started dispatching PEIMs (emitted on first report of EFI_SW_PC_INIT_BEGIN
E2 Permanent memory found
E1, E3 Reserved for PEI/PEIMs
DXE Core
E4 Entered DXE phase
E5 Started dispatching drivers
E6 Started connecting drivers
Description of POST Operation
EFI_SW_PEI_PC_HANDOFF_TO_NEXT)
continued
74
Table 36. Port 80h POST Codes (continued)
Error Messages
POST
Code
DXE Drivers
E7 Waiting for user input
E8 Checking password
E9 Entering BIOS setup
EB Calling Legacy Option ROMs
EF TBD – Unrecoverable Boot failure/S3 resume failure
Runtime Phase/EFI OS Boot
F4 Entering Sleep state
F5 Exiting Sleep state
F8 EFI boot service ExitBootServices ( ) has been called
F9 EFI runtime service SetVirtualAddressMap ( ) has been called
FA EFI runtime service ResetSystem ( ) has been called
PEIMs/Recovery
30 Crisis Recovery has initiated per user request
31 Crisis Recovery has initiated by software (corrupt flash)
34 Loading recovery capsule
35 Handing off control to the recovery capsule
3F Unable to recover
21 Initializing a chipset component
22 Reading SPD from memory DIMMs
23 Detecting presence of memory DIMMs
25 Configuring memory
28 Testing memory
34 Loading recovery capsule
E4 Entered DXE phase
12 Starting Application processor initialization
13 SMM initialization
50 Enumerating PCI busses
51 Allocating resources to PCI bus
92 Detecting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
95 Keyboard Self Test
EB Calling Video BIOS
58 Resetting USB bus
5A Resetting PATA/SATA bus and all devices
92 Detecting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
5A Resetting PATA bus and all devices
28 Testing memory
90 Resetting keyboard
94 Clearing keyboard input buffer
E7 Waiting for user input
01 INT 19
00 Ready to boot
Description
76
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