The Intel Desktop Board DX58OG may contain design defects or errors known as errata that may cause the product to deviate from published specifications.
Current characterized errata are documented in the Intel Desktop Board DX58OG Specification Updates.
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board DX58OG Technical Product
Specification
-002 Specification changes January 2012
This product specification applies to only the standard Intel® Desktop Board DX58OG with BIOS
identifier SOX5820J.86A.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS
GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR
SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR
IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR
WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT
OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN
WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN
WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR
DEATH MAY OCCUR.
®
All Intel
computers (PC) for installation in homes, offices, schools, computer rooms, and similar locations. The
suitability of this product for other PC or embedded non-PC applications or other environments, such as
medical, industrial, alarm systems, test equipment, etc. may not be supported without further evaluation by
Intel.
desktop boards are evaluated as Information Technology Equipment (I.T.E.) for use in personal
November 2010
Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other
intellectual property rights that relate to the presented subject matter. The furnishing of documents and
other materials and information does not provide any license, express or implied, by estoppel or otherwise,
to any such patents, trademarks, copyrights, or other intellectual property rights.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved”
or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for
conflicts or incompatibilities arising from future changes to them.
Intel desktop boards may contain design defects or errors known as errata, which may cause the product to
deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your
product order.
Intel, Core i7, and Xeon are registered trademarks of Intel Corporation in the U.S. and other countries.
* Other names and brands may be claimed as the property of others.
Basic Desktop Board DX58OG Identification Information
AA Revision BIOS Revision Notes
G10926-203 SOX5820J.86A 1,2
Notes:
1. The AA number is found on a small label on the component side of the board.
2. The X58 Express Chipset used on this AA revision consists of the following component:
Device Stepping S-Spec Numbers
Specification Changes or Clarifications
Table 1 indicates the Specification Changes or Specification Clarifications that apply to
the Intel
®
Desktop Board DX58OG.
Table 1. Specification Changes or Clarifications
Date Type of Change Description of Changes or Clarifications
January 2012 Specification
Changes
• Updated Table 2 on page 11 to correct an error in the
callouts.
• Updated Section 1.6.2 on page 21 to delete reference to
two red-colored eSATA connectors on the back panel.
Errata
Current characterized errata, if any, are documented in a separate Specification
Update. See http://developer.intel.com/products/desktop/motherboard/index.htm
for the latest documentation.
This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for Intel
Board DX58OG.
Intended Audience
The TPS is intended to provide detailed, technical information about Intel Desktop
Board DX58OG and its components to the vendors, system integrators, and other
engineers and technicians who need this level of information. It is specifically not
intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on Intel Desktop Board DX58OG
2 A map of the resources of the Intel Desktop Board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
5 Regulatory compliance and battery disposal information
®
Desktop
Typographical Conventions
This section contains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
# Used after a signal name to identify an active-low signal (such as USBP0#)
GB Gigabyte (1,073,741,824 bytes)
GB/s Gigabytes per second
Gb/s Gigabits per second
GT/s Giga transfers per second
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/s 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/s Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbits/s Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
43. Regulatory Compliance Marks ............................................................ 87
........................................ 46
............................... 46
............................... 65
x
1 Product Description
1.1 Overview
1.1.1 Feature Summary
Table 2 summarizes the major features of the board.
Table 2. Feature Summary
Form Factor
Processor
Memory
Chipset
Audio Intel® High Definition Audio subsystem using the Realtek* ALC892 audio codec.
Legacy I/O Control Winbond W83677HG-I legacy I/O controller for Consumer Infrared (CIR)
Peripheral
Interfaces
BIOS
Instantly Available
PC Technology
ATX (12.00 inches by 9.60 inches [304.80 millimeters by 243.84 millimeters])
A Front panel audio header
B PCI Express x1 bus connector
C PCI Express x1 bus connector
D Conventional PCI bus add-in card connector
E PCI Express x16 bus add-in card connector (Secondary)
F PCI Express x1 bus add-in card connector
G PCI Express x16 bus add-in card connector (Primary)
H Rear chassis fan header
I Intel 82X58 IO Hub (IOH)
J Back panel connectors
K Processor fan header
L Processor core power connector (2 x 4)
M LGA1366 processor socket
N DIMM 4 socket
O DIMM 1 socket
P DIMM 5 socket
Q DIMM 2 socket
R DIMM 6 socket
S DIMM 3 socket
T Main power connector (2 x 12)
U Front chassis fan header
V Intel 82801IJR I/O Controller Hub (ICH10R)
W SATA connectors (six 3 Gb/s interfaces (black) and two 6 Gb/s interfaces (blue))
X Chassis intrusion header
Y Piezoelectric speaker
Z Front panel USB headers (3)
AA Consumer IR receiver (input) header
BB Consumer IR emitter (output) header
CC BIOS Setup configuration jumper block
DD Front panel header
EE Auxiliary front panel power LED header
FF Post Code LED display
GG IEEE 1394a front panel header
HH Battery
II Onboard Reset button
JJ Onboard Power button
KK Auxilliary chassis fan header
LL Status LEDs
ion
14
1.1.3 Block Diagram
Figure 2 is a block diagram of the major functional areas of the board.
This board differs from other Intel Desktop Board products, with specific changes
including (but not limited to) the following:
• No parallel port
• No floppy drive connector
• No serial port
• No PS/2 connectors
1.3 Online Support
To find information about… Visit this World Wide Web site:
Intel Desktop Board DX58OG http://www.intel.com/products/motherboard/index.htm
Desktop Board Support http://www.intel.com/p/en_US/support?iid=hdr+support
Available configurations for the Intel
Desktop Board DX58OG
Supported processors http://processormatch.intel.com
Chipset information http://www.intel.com/products/desktop/chipsets/index.htm
BIOS and driver updates http://downloadcenter.intel.com
Tested memory http://www.intel.com/support/motherboards/desktop/sb/CS-
Integration information http://www.intel.com/support/go/buildit
http://ark.intel.com
025414.htm
1.4 Processor
The board is designed to support the Intel Core i7 and Intel Xeon Processors in an
LGA1366 socket.
Other processors may be supported in the future. This board is designed to support
processors with a maximum wattage of 130 W. The processor listed above is only
supported when falling within the wattage requirements of the Intel Desktop Board
DX58OG. See the Intel web site listed below for the most up-to-date list of supported
processors.
Use only the processors listed on the web site above. Use of unsupported processors
can damage the board, the processor, and the power supply.
INTEGRATOR’S NOTE
#
This board has specific requirements for providing power to the processor. Refer to
Section 2.5.1 on page 56 for information on power supply requirements for this board.
16
Product Description
1.5 System Memory
The board has six DIMM sockets and supports the following memory features:
• 1.5 V, 1.3 V, and 1.25 V DDR3 SDRAM DIMMs
• Three independent memory channels with interleaved mode support
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMs with x16 organization are not supported.
•24 GB maximum total system memory. Refer to Section 2.1.1 on page 39 for
i
nformation on the total amount of addressable memory.
•XMP version 1.2 performance profile support for memory speeds above 1600 MHz
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.
512 MB SS 1 Gbit 64 M x16/empty 4
1024 MB SS 1 Gbit 128 M x8/empty 8
1024 MB SS 2 Gbit 128 M x16/empty 4
2048 MB DS 1 Gbit 128 M x8/128 M x8 16
2048 MB SS 2 Gbit 128 M x16/empty 8
4096 MB DS 2 Gbit 256 M x8/256 M x8 16
8192 MB DS 4 Gbit 512 M x8/512 M x8 16
Note: “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers to
single-sided memory modules (containing one row of SDRAM).
The Intel Core i7 and Intel Xeon Processors support the following types of memory
organization:
•Tri/Dual channel (Interleaved) mode. This mode offers the highest
throughput for real world applications. Interleaving reduces overall memory
latency by accessing the DIMM memory sequentially. Data is spread amongst the
memory modules in an alternating pattern.
⎯ Three independent memory channels give two possible modes of interleaving:
• Tri-channel mode is enabled when identical matched memory modules are
installed in each of the three memory channels (blue connectors).
• Dual channel mode is enabled when two of the blue memory connectors are
populated with matched DIMMs.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel
bandwidth operation for real world applications. This mode is used when only a
single DIMM is installed or the installed memory modules are not matched.
Technology and device width can vary from one channel to the other.
The Intel X58 chipset consists of the following devices:
• Intel 82X58 IOH with Direct Media Interface (DMI) interconnect
• Intel 82801IJR I/O Controller Hub (ICH10R)
The IOH component provides interfaces to the processor and the PCI Express graphics
connectors. The ICH10R is a centralized controller for the board’s I/O paths.
For information about Refer to
The Intel X58 chipset http://www.intel.com/products/desktop/chipsets/index.htm
Resources used by the chipset Chapter 2
1.6.1 USB
The board supports up to 14 USB ports. The port arrangement is as follows:
• Two USB 3.0 ports are implemented with stacked back panel connectors (blue)
• Six USB 2.0 ports are implemented with stacked back panel connectors (black)
• Six USB 2.0 front panel ports implemented through three internal headers
The Intel X58 Express Chipset provides the USB controller for the 2.0 ports. The two
USB 3.0 ports are provided by the NEC* UPD720200 controller. All 14 USB ports are
high-speed, full-speed, and low-speed capable. The USB 3.0 ports are super-speed
capable.
For information about Refer to
The location of the USB connectors on the back panel Figure 10, page 42
The location of the front panel USB headers Figure 11, page 43
20
Product Description
1.6.2 Serial ATA Interfaces
The board provides eight SATA interfaces:
• Six 3 Gb/s interfaces through the ICH10R (black)
• Two SATA 6 Gb/s interfaces through the Marvel 88SE9128 controller (blue)
1.6.2.1 Serial ATA Support
The board’s Serial ATA controller offers eight independent Serial ATA ports. One
device can be installed on each port for a maximum of eight Serial ATA devices. A
point-to-point interface is used for host to device connections, unlike Parallel ATA IDE
which supports a master/slave configuration and two devices per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the
operating system. The Serial ATA controller can operate in both legacy and native
modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14
and 15). In Native mode, standard Conventional PCI bus resource steering is used.
Native mode is the preferred mode for configurations using the Windows* XP and
Windows Vista* operating systems.
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adapters or
power supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
For information about Refer to
The location of the Serial ATA connectors Figure 11, page 43
.
1.6.2.2 Serial ATA RAID
The board supports the following RAID (Redundant Array of Independent Drives)
levels via the ICH10R:
• RAID 0 - data striping
• RAID 1 - data mirroring
• RAID 0+1 (or RAID 10) - data striping and mirroring
• RAID 5 - distributed parity
NOTE
In order to use supported RAID features, you must first enable RAID in the BIOS.
Also, during Microsoft Windows XP installation, you must press F6 to install the RAID
drivers. See your Microsoft Windows XP documentation for more information about
installing drivers during installation.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, Date and Time values will be reset and the user will
be notified during POST.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one. Figure 1 on page 13 shows the location of the battery.
1.8 Legacy I/O Controller
The I/O controller provides the following features:
• Consumer Infrared (CIR) headers
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• Intelligent power management, including a programmable wake-up event interface
• PCI power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.8.1 Consumer Infrared (CIR)
The Consumer Infrared (CIR) feature is designed to comply with Microsoft Consumer
Infrared usage models. Microsoft Windows Vista is the supported operating system
The CIR feature is made up of two separate pieces: the receiving (receiver) header,
and the output (emitter) header. The receiving header consists of a filtered translated
infrared input compliant with Microsoft CIR specifications, and also a “learning”
infrared input. This learning input is simply a high pass input which the computer can
use to “learn” to speak the infrared communication language of other user remotes.
The emitter header consists of two output ports which the PC can use to emulate
“learned” infrared commands in order to control external electronic hardware.
Customers are required to buy or create their own interface modules to plug into Intel
Desktop Boards for this feature to work.
22
Product Description
1.9 Audio Subsystem
The onboard audio subsystem consists of the following:
• Intel 82801IJR (ICH10R)
• Realtek ALC888VC audio codec
• Back panel audio connectors
• Component-side audio headers/connectors:
⎯ Front panel audio header with support for Intel
HD Audio) and AC ’97 audio
The audio subsystem supports the following features:
• A signal-to-noise (S/N) ratio of 95 dB
• Independent 5.1 audio playback from back panel connectors and stereo playback
from the Intel High Definition Audio front panel header
®
High Definition Audio (Intel®
NOTE
Systems built with an AC ‘97 front panel will not be able to obtain the Microsoft
Windows Vista logo.
Table 5 lists the supported functions of the front panel and back panel audio jacks.
Table 5. Audio Jack Support
Audio Jack
FP Green Default
FP Pink Default
Rear Blue Default
Rear Green Ctrl panel Default
Rear Pink Default
Microphone
Head-
phones
Front
Speaker Line In
Side
Surround
1.9.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.3, page 16
The board contains audio connectors on the back panel and audio headers on the
component side of the board. The front panel audio header provides mic in and line
out signals for the front panel. Microphone bias is supported for both the front and
back panel microphone connectors.
The front/back panel audio connectors are configurable through the audio device
drivers. The available configurable back panel audio ports are shown in Figure 4.
Item Description
A Line in
B Line out
C Mic in
Figure 4. Back Panel Audio Connectors
NOTE
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
For information about Refer to
The location of the front panel audio header Figure 11, page 43
The signal names of the front panel audio header Table 12, page 45
The back panel audio connectors Section Error! Reference source
not found., page Error!
Bookmark not defined.
24
1.10 LAN Subsystem
The Intel GbE LAN subsystem consists of the following:
LAN software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining LAN software and drivers http://downloadcenter.intel.com
1.10.3 RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector (shown in Figure 5).
Item Description
A Link LED (Green)
B Data Rate LED (Green/Yellow)
Figure 5. LAN Connector LED Locations
Table 6 describes the LED states when the board is powered up and the LAN
subsystem is operating.
Table 6. LAN Connector LED States
LED LED Color LED State Condition
Off LAN link is not established.
Link Green
Data Rate Green/Yellow
On LAN link is established.
Blinking LAN activity is occurring
Off 10 Mbits/sec data rate is selected.
Green 100 Mbits/sec data rate is selected.
Yellow 1000 Mbits/sec data rate is selected.
26
Product Description
1.11 Hardware Management Subsystem
The hardware management features enable the board to be compatible with the Wired
for Management (WfM) specification. The board has several hardware management
features, including the following:
• Fan monitoring and control
• Thermal and voltage monitoring
• Chassis intrusion detection
1.11.1 Hardware Monitoring and Fan Control
The features of the hardware monitoring and fan control include:
•Fan speed control controllers and sensors provided by the Hardware Monitoring
and Fan Control ASIC
• Thermal sensors in the processor, 82X58 IOH, and 82801IJR ICH10R
• Power supply monitoring of five voltages (+12 V, +5 V, +3.3 V, V_SM and +VCCP)
to detect levels above or below acceptable values
•Thermally monitored closed-loop fan control, for all three fans, that can adjust the
fan speed or switch the fans on or off as needed
1.11.2 Fan Monitoring
Fan monitoring can be implemented using Intel® Desktop Control Center or third-party
software.
For information about Refer to
The functions of the fan headers Section 1.12.2.2, page 34
1.11.3 Chassis Intrusion and Detection
The board supports a chassis security feature that detects if the chassis cover is
removed. The security feature uses a mechanical switch on the chassis that attaches
to the chassis intrusion header. When the chassis cover is removed, the mechanical
switch is in the closed position.
For information about Refer to
The location of the chassis intrusion header Figure 11, page 43
Figure 6 shows the locations of the thermal sensors and fan headers.
Item Description
A Rear chassis fan header
B Thermal diode, located on the IOH die
C Processor fan header
D Thermal diode, located on processor die
E Front chassis fan header
F Thermal diode, located on the ICH10R die
G Auxiliary chassis fan header
Figure 6. Thermal Sensors and Fan Headers
28
Product Description
1.12 Power Management
Power management is implemented at several levels, including:
• Software support through Advanced Configuration and Power Interface (ACPI)
• Hardware support:
⎯ Power connector
⎯ Fan headers
⎯ LAN wake capabilities
⎯ Instantly Available PC technology
⎯ Wake from USB
⎯ Power Management Event signal (PME#) wake-up support
⎯ PCI Express WAKE# signal support
⎯ Wake from Consumer IR
1.12.1 ACPI
ACPI gives the operating system direct control over the power management and Plug
and Play functions of a computer. The use of ACPI with this board requires an
operating system that provides full ACPI support. ACPI features include:
• Plug and Play (including bus and device enumeration)
• Power management control of individual devices, add-in boards (some add-in
boards may require an ACPI-aware driver), video displays, and hard disk drives
•Methods for achieving less than 15-watt system operation in the power-on/standby
sleeping state
• A Soft-off feature that enables the operating system to power-off the computer
• Support for multiple wake-up events (see Table 9 on page 32)
• Support for a front panel power and sleep mode switch
Table 7 lists the system states based on how long the power switch is pressed,
dependi
ng on how ACPI is configured with an ACPI-aware operating system.
Table 7. Effects of Pressing the Power Switch
If the system is in this
state…
Off
(ACPI G2/G5 – Soft off)
On
(ACPI G0 – working state)
On
(ACPI G0 – working state)
Sleep
(ACPI G1 – sleeping state)
Sleep
(ACPI G1 – sleeping state)
…and the power switch is
pressed for
Less than four seconds Power-on
Less than four seconds Soft-off/Standby
More than six seconds Fail safe power-off
Less than four seconds Wake-up
More than six seconds Power-off
…the system enters this state
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
(ACPI G2/G5 – Soft off)
(ACPI G0 – working state)
(ACPI G2/G5 – Soft off)
1.12.1.1 System States and Power States
Under ACPI, the operating system directs all system and device power state
transitions. The operating system puts devices in and out of low-power states based
on user preferences and knowledge of how devices are being used by applications.
Devices that are not being used can be turned off. The operating system uses
information from applications and user settings to put the system as a whole into a
low-power state.
30
Product Description
Table 8 lists the power states supported by the board along with the associated
system power targets. See the ACPI specification for a complete description of the
various system and power states.
Table 8. Power States and Targeted System Power
Global States Sleeping States
G0 – working
state
G1 – sleeping
state
G1 – sleeping
state
G1 – sleeping
state
G2/S5 S5 – Soft off.
G3 –
mechanical off
AC power is
disconnected
from the
computer.
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals
powered by the system chassis’ power supply.
2. Dependent on the standby power consumption of wake-up devices used in the system.
S0 – working C0 – working D0 – working
S1 – Processor
stopped
S3 – Suspend to
RAM. Context
saved to RAM.
S4 – Suspend to
disk. Context
saved to disk.
Context not saved.
Cold boot is
required.
No power to the
system.
Processor
States
C1 – stop
grant
No power D3 – no power
No power D3 – no power
No power D3 – no power
No power D3 – no power for
Device States
state.
D1, D2, D3 –
device
specification
specific.
except for
wake-up logic.
except for
wake-up logic.
except for
wake-up logic.
wake-up logic,
except when
provided by
battery or
external source.
Targeted System
Power
Full power > 30 W
5 W < power < 52.5 W
Power < 5 W
Power < 5 W
Power < 5 W
No power to the system.
Service can be performed
safely.
Table 9 lists the devices or specific events that can wake the computer from specific
states.
Table 9. Wake-up Devices and Events
These devices/events can wake up the computer… …from this state
LAN S1, S3, S4, S5
PME# signal S1, S3, S4, S5
Power switch S1, S3, S4, S5
RTC alarm S1, S3, S4, S5
USB S1, S3
WAKE# S1, S3, S4, S5
Consumer IR S1, S3 (S4 and S5)
Note 1: For LAN and PME# signal, S5 is disabled by default in the BIOS Setup program. Setting this option
Note 2: Wake from S4 and S5 is optional by the specification.
to Power On will enable a wake-up event from LAN in the S5 state.
NOTE
Note 1
Note 1
(Note 2)
The use of these wake-up events from an ACPI state requires an operating system
that provides full ACPI support. In addition, software, drivers, and peripherals must
fully support ACPI wake events.
32
Product Description
1.12.2 Hardware Support
CAUTION
Ensure that the power supply provides adequate +5 V standby current if LAN wake
capabilities and Instantly Available PC technology features are used. Failure to do so
can damage the power supply. The total amount of standby current required depends
on the wake devices supported and manufacturing options.
The board provides several power management hardware features, including:
• Power connector
• Fan headers
• LAN wake capabilities
• Instantly Available PC technology
• Wake from USB
• PME# signal wake-up support
• WAKE# signal wake-up support
• Wake from Consumer IR
LAN wake capabilities and Instantly Available PC technology require power from the
+5 V standby line.
NOTE
The use of Wake from USB from an ACPI state requires an operating system that
provides full ACPI support.
1.12.2.1 Power Connector
ATX12V-compliant power supplies can turn off the system power through system
control. When an ACPI-enabled system receives the correct command, the power
supply removes all non-standby voltages.
When resuming from an AC power failure, the computer returns to the power state it
was in before power was interrupted (on or off). The computer’s response can be set
using the Last Power State feature in the BIOS Setup program’s Boot menu.
For information about Refer to
The location of the main power connector Figure 11, page 43
The signal names of the main power connector Table 20, page 49
The function/operation of the fan headers is as follows:
• The fans are on when the board is in the S0 or S1 state.
• The fans are off when the board is off or in the S3, S4, or S5 state.
• Each fan header is wired to a fan tachometer input of the hardware monitoring and
fan control ASIC
•All fan headers support closed-loop fan control that can adjust the fan speed or
switch the fan on or off as needed
• All fan headers have a +12 V DC connection
• 4-pin fan headers are controlled by Pulse Width Modulation
• 3-pin fan headers (front and rear) are modulated by voltage control
For information about Refer to
The location of the fan headers Figure 11, page 43
The location of the fan headers and sensors for thermal monitoring Figure 6, page 28
The signal names of the fan headers Section 0, page 42
1.12.2.3 LAN Wake Capabilities
CAUTION
For LAN wake capabilities, the +5 V standby line for the power supply must be capable
of providing adequate +5 V standby current. Failure to provide adequate standby
current when implementing LAN wake capabilities can damage the power supply.
LAN wake capabilities enable remote wake-up of the computer through a network.
The LAN subsystem PCI bus network adapter monitors network traffic at the Media
Independent Interface. Upon detecting a Magic Packet* frame, the LAN subsystem
asserts a wake-up signal that powers up the computer. Depending on the LAN
implementation, the board supports LAN wake capabilities with ACPI in the following
ways:
• The PCI Express WAKE# signal
• The PCI bus PME# signal for PCI 2.3 compliant LAN designs
⎯ By Ping
⎯ Magic Packet
• The onboard LAN subsystem
34
Product Description
1.12.2.4 Instantly Available PC Technology
CAUTION
For Instantly Available PC technology, the +5 V standby line for the power supply
must be capable of providing adequate +5 V standby current. Failure to provide
adequate standby current when implementing Instantly Available PC technology can
damage the power supply.
Instantly Available PC technology enables the board to enter the ACPI S3 (Suspend-toRAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the
power supply is off, and the front panel LED is amber if dual colored, or off if single
colored.) When signaled by a wake-up device or event, the system quickly returns to
its last known wake state. Table 9 on page 32 lists the devices and events that can
wake the computer from the S3 state.
The board supports the PC
boards that also support this specification can participate in power management and
can be used to wake the computer.
The use of Instantly Available PC technology requires operating system support and
PCI 2.2 compliant add-in cards, PCI Express add-in cards, and drivers.
I Bus Power Management Interface Specification. Add-in
1.12.2.5 Wake from USB
USB bus activity wakes the computer from ACPI S1 or S3 states.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.12.2.6 PME# Signal Wake-up Support
When the PME# signal on the Conventional PCI bus is asserted, the computer wakes
from an ACPI S1, S3, S4, or S5 state (with Wake on PME enabled in the BIOS).
1.12.2.7 WAKE# Signal Wake-up Support
When the WAKE# signal on the PCI Express bus is asserted, the computer wakes from
an ACPI S1, S3, S4, or S5 state.
1.12.2.8 Wake from Consumer IR
CIR activity wakes the computer from an ACPI S3, S4, or S5 state.
The status LEDs display various status indicators as defined below. Figure 7 shows the
location of the LED indicators.
•The +5 V standby power indicator LED shows that power is still present even when
the computer appears to be off.
•The hard drive activity LED indicates activity of hard drives connected to the IOH
and any external discrete controllers on the board.
• The CPU Hot and VR Hot LEDs are controlled by external circuitry.
• The Watch Dog Fire/Back to BIOS LED indicates when the watch dog timer fires to
reset the board. The BIOS will program this LED to flash as early as possible in the
post. If the Back to BIOS button has been pressed, the BIOS will program this LED
to be constantly on.
•The six initialization LEDs will flash when initialization activity starts and stay on
when initialization is complete.
•The operating system LED changes to “constant on” just before the BIOS hands off
control to the operating system (int 19).
CAUTION
If AC power has been switched off and the standby power indicator is still lit,
disconnect the power cord before installing or removing any devices connected to the
board. Failure to do so could damage the board and any attached devices.
36
Product Description
Item Description
A Operating system start
B Hard drive initialization
C USB initialization
D Option ROM initialization
E Video initialization
F Memory initialization
G CPU initialization
H Hard drive activity
I VR Hot
J CPU Hot
K Watch Dog Fire/Back to BIOS
L +5 V standby power indicator
The lighted onboard power button has the same behavior as the front panel power
button connected via the front panel header. The onboard power button does NOT
remove standby power. This button is intended for use at integration facilities for
testing purposes. The power button on the front panel is recommended for all other
instances of turning the computer on or off. To turn the computer off using the
onboard power button, keep the button pressed down for three seconds.
The lighted onboard reset button can be used to reset the board. This button
duplicates the function of the front panel reset button. Figure 8 shows the location of
the onboard power and reset buttons.
Figure 8. Location of the Power and Reset Buttons
CAUTION
Electrostatic discharge (ESD) can damage components. The onboard power button
should be used only at an ESD workstation using an antistatic wrist strap and a
conductive foam pad. If such a station is not available, some ESD protection can be
provided by wearing an antistatic wrist strap and attaching it to a metal part of the
computer chassis.
38
Item Description
A Onboard power
B Onboard reset
2 Technical Reference
2.1 Memory Resources
2.1.1 Addressable Memory
The board utilizes 24 GB of addressable system memory. Typically the address space
that is allocated for Conventional PCI bus add-in cards, PCI Express configuration
space, BIOS (SPI Flash device), and chipset overhead resides above the top of DRAM
(total system memory). On a system that has 24 GB of system memory installed, it is
not possible to use all of the installed memory due to system address space being
allocated for other system critical functions. These functions include the following:
• BIOS/SPI Flash device (16 Mbit)
• Local APIC (19 MB)
• Direct Media Interface (40 MB)
• Front side bus interrupts (17 MB)
• PCI Express configuration space (256 MB)
• IOH base address registers PCI Express ports (up to 256 MB)
• Memory-mapped I/O that is dynamically allocated for Conventional PCI and PCI
Express add-in cards (256 MB)
The board provides the capability to reclaim the physical memory overlapped by the
memory mapped I/O logical address space. The board remaps physical memory from
the top of usable DRAM boundary to the 4 GB boundary to an equivalent sized logical
address range located just above the 4 GB boundary. Figure 9 shows a schematic of
the system memory map. All installed system memory can be used when there is no
overlap of system addresses.
Address Range (decimal) Address Range (hex) Size Description
1024 K - 16777216 K 100000 - 600000000 16382 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Potential available high DOS
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory
0 K - 512 K 00000 - 7FFFF 512 KB Conventional memory
Technical Reference
memory (open to the Conventional
PCI bus). Dependent on video
adapter used.
memory manager software)
2.2 Connectors and Headers
CAUTION
Only the following connectors and headers have overcurrent protection: back panel
and front panel USB, as well as IEEE 1394a.
The other internal connectors and headers are not overcurrent protected and should
connect only to devices inside the computer’s chassis, such as fans and internal
peripherals. Do not use these connectors or headers to power devices external to the
computer’s chassis. A fault in the load presented by the external devices could cause
damage to the computer, the power cable, and the external devices themselves.
Furthermore, improper connection of USB or 1394 header single wire connectors may
eventually overload the overcurrent protection and cause damage to the board.
This section describes the board’s connectors. The connectors can be divided into
these groups:
• Back panel I/O connectors
• Component-side I/O connectors and headers (see page 43)
Figure 10 shows the location of the back panel connectors for the board.
Item Description
A Back to BIOS button
B USB ports
C LAN
D USB ports
E IEEE 1394a connector
F USB ports
G USB ports
H Line in
I Line out/front speakers Mic in/side
surround
J Mic in/side surround
Figure 10. Back Panel Connectors
NOTE
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
42
Technical Reference
2.2.2 Component-side Connectors and Headers
Figure 11 shows the locations of the component-side connectors and headers.
Table 11 lists the component-side connectors and headers identified in Figure 11.
Table 11. Component-side Connectors and Headers Shown in Figure 11
Item/callout
from Figure 11 Descript
A Front panel audio header
B PCI Express x1 connector
C PCI Express x1 connector
D Conventional PCI bus add-in card connector
E PCI Express x16 bus add-in card connector (Secondary)
F PCI Express x1 bus add-in card connector
G PCI Express x16 bus add-in card connector (Primary)
H Rear chassis fan header
I Processor fan header
J Processor core power connector (2 x 4)
K Main power connector (2 x 12)
L Front chassis fan header
M SATA connectors (8)
N Chassis intrusion header
O Front panel USB header
P Front panel USB header
Q Front panel USB header
R Consumer IR receiver (input) header
S Consumer IR emitter (output) header
T Front panel header
U Auxiliary front panel power LED header
V IEEE 1394a front panel header
W Auxiliary chassis fan header
ion
44
Technical Reference
2.2.2.1 Signal Tables for the Connectors and Headers
Table 12. Front Panel Audio Header
Pin Signal Name Pin Signal Name
1 [Port 2] Left channel 2 Ground
3 [Port 2] Right channel 4 PRESENCE# (Dongle present)
5 [Port 1] Right channel 6 [Port 1] SENSE_RETURN
7 SENSE_SEND (Jack detection) 8 Key (no pin)
9 [Port 2] Left channel 10 [Port 2] SENSE_RETURN
Table 16. Front and Rear Chassis (3-Pin) Fan Headers
Pin Signal Name
1 Control
2 +12 V
3 Tach
Note: These fan headers use voltage variance control for fan speed.
(Note)
Table 17. Processor and Rear Chassis 2 (4-Pin) Fan Headers
Pin Signal Name
1 Ground
2 +12 V
3 FAN_TACH
4 FAN_CONTROL
Note: These fan headers use Pulse Width Modulation control for fan speed.
(Note)
Table 20. Back Panel CIR Emitter (Output) Header
Pin Signal Name
1 Emitter out 1
2 Emitter out 2
3 Ground
4 Key (no pin)
5 Jack detect 1
6 Jack detect 2
Table 21. Front Panel CIR Receiver (Input) Header
Pin Signal Name
1 Ground
2 LED
3 NC
4 Learn-in
5 5 V standby
6 VCC
7 Key (no pin)
8 CIR Input
46
Technical Reference
2.2.2.2 Add-in Card Connectors
The board has the following add-in card connectors:
•PCI Express 2.0 x16: two PCI Express 2.0 x16 connectors supporting
simultaneous transfer speeds up to 8 GB/sec of peak bandwidth per direction and
up to 16 GB/sec concurrent bandwidth.
•PCI Express 1.1 x1: three PCI Express 1.1 x1 connectors. The x1 interface
supports simultaneous transfer speeds up to 250 MB/sec of peak bandwidth per
direction and up to 2 GB/sec concurrent bandwidth.
•Conventional PCI (rev 2.3 compliant) bus: one Conventional PCI bus add-in card
connector. The SMBus is routed to the Conventional PCI bus connector.
Conventional PCI bus add-in cards with SMBus support can access sensor data and
other information residing on the board.
Note the following considerations for the Conventional PCI bus connector:
• The Conventional PCI bus connector is bus master capable.
• SMBus signals are routed to the Conventional PCI bus connector. This enables
Conventional PCI bus add-in boards with SMBus support to access sensor data on
the board. The specific SMBus signals are as follows:
⎯ The SMBus clock line is connected to pin A40.
⎯ The SMBus data line is connected to pin A41.
2.2.2.3 Auxiliary Front Panel Power/Sleep LED Header
Pins 1 and 3 of this header duplicate the signals on pins 2 and 4 of the front panel
header.
Table 18. Auxiliary Front Panel Power/Sleep LED Header
Pin Signal Name In/Out Description
1 HDR_BLNK_GRN Out Front panel green LED
2 Not connected
3 HDR_BLNK_YEL Out Front panel yellow LED
The board has the following power supply connectors:
•Main power – a 2 x 12 connector. This connector is compatible with 2 x 10
connectors previously used on Intel Desktop boards. The board supports the use
of ATX12V power supplies with either 2 x 10 or 2 x 12 main power cables. When
using a power supply with a 2 x 10 main power cable, attach that cable on the
rightmost pins of the main power connector, leaving pins 11, 12, 23, and
24 unconnected.
•Processor core power – a 2 x 4 connector. This connector provides power
directly to the processor voltage regulator and must always be used. Failure to do
so will prevent the board from booting.
Table 19. Processor Core Power Connector
Pin Signal Name Pin Signal Name
1 Ground 2 +12 V
3 Ground 4 +12 V
5 Ground 6 +12 V
7 Ground 8 +12 V
48
Technical Reference
Table 20. Main Power Connector
Pin Signal Name Pin Signal Name
1 +3.3 V 13 +3.3 V
2 +3.3 V 14 -12 V
3 Ground 15 Ground
4 +5 V 16 PS-ON# (power supply remote on/off)
5 Ground 17 Ground
6 +5 V 18 Ground
7 Ground 19 Ground
8 PWRGD (Power Good) 20 No connect
9 +5 V (Standby) 21 +5 V
10 +12 V 22 +5 V
11 +12 V
12 2 x 12 connector detect
Note: When using a 2 x 10 power supply cable, this pin will be unconnected.
(Note)
23 +5 V
(Note)
24 Ground
(Note)
(Note)
Table 21. Auxiliary PCI Express Graphics Power Connector
Pin Signal Name
1 +12 V
2 1 x 4 connector detect
3 Ground
4 +5 V
For information about Refer to
Power supply considerations Section 2.5.1 on page 56
This section describes the functions of the front panel header. Table 22 lists the signal
names of the front panel header. Figure 12 is a connection diagram for the front panel
header.
Table 22. Front Panel Header
Pin Signal
Hard Drive Activity LED Power LED
1 HD_PWR Out Hard disk LED
3 HDA# Out Hard disk active
Reset Switch On/Off Switch
5 Ground Ground 6 FPBUT_IN In Power switch
7 FP_RESET# In Reset switch 8 Ground Ground
Power Not Connected
9 +5 V Power 10 N/C Not connected
In/
Out Description
pull-up to +5 V
LED
Pin Signal
2 HDR_BLNK_GRN Out Front panel green
4 HDR_BLNK_YEL Out Front panel yellow
In/
Out Description
LED
LED
Figure 12. Connection Diagram for Front Panel Header
2.2.2.5.1 Hard Drive Activity LED Header
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is
being read from or written to a hard drive. Proper LED function requires one of the
following:
•A Serial ATA hard drive or optical drive connected to an onboard Serial ATA
connector
•A Parallel ATA IDE hard drive or optical drive connected to an onboard Parallel ATA
IDE connector
50
Technical Reference
2.2.2.5.2 Reset Switch Header
Pins 5 and 7 can be connected to a momentary single pole, single throw (SPST) type
switch that is normally open. When the switch is closed, the board resets and runs the
POST.
2.2.2.5.3 Power/Sleep LED Header
Pins 2 and 4 can be connected to a one- or two-color LED. Table 23 shows the
possible states for a one-color LED. Table 24 shows the possible states for a two-color
LED.
Table 23. States for a One-Color Power LED
LED State Description
Off Power off/sleeping
Steady Green Running
Table 24. States for a Two-Color Power LED
LED State Description
Off Power off
Steady Green Running
Steady Yellow Sleeping
NOTE
The colors listed in Table 23 and Table 24 are suggested colors only. Actual LED
colors are chassis-specific.
2.2.2.5.4 Power Switch Header
Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The
switch must pull the SW_ON# pin to ground for at least 50 ms to signal the power
supply to switch on or off. (The time requirement is due to internal debounce circuitry
on the board.) At least two seconds must pass before the power supply will recognize
another on/off signal.
Figure 13 is a connection diagram for the front panel USB headers.
INTEGRATOR’S NOTES
#
• The +5 V DC power on the USB headers is fused.
• Use only a front panel USB connector that conforms to the USB 2.0 specification
for high-speed USB devices.
Figure 13. Connection Diagram for Front Panel USB Headers
52
Technical Reference
2.3 Jumper Block
CAUTION
Do not move the jumper with the power on. Always turn off the power and unplug the
power cord from the computer before changing a jumper setting. Otherwise, the
board could be damaged.
Figure 14 shows the location of the jumper block. The 3-pin jumper block determines
the BIOS Setup program’s mode. Table 25 describes the jumper settings for the three
modes: normal
and the computer is powered-up, the BIOS compares the processor version and the
microcode version in the BIOS and reports if the two match.
, configure, and recovery. When the jumper is set to configure mode
Normal 1-2 The BIOS uses current configuration information and passwords for
Configure 2-3 After the POST runs, Setup runs automatically. The maintenance
Recovery None The BIOS attempts to recover the BIOS configuration. A recovery CD
Jumper
Setting Configuration
booting.
menu is displayed.
Note that this Configure mode is the only way to clear the BIOS/CMOS
settings. Press F9 (restore defaults) while in Configure mode to
restore the BIOS/CMOS settings to their default values.
or flash drive is required.
54
Technical Reference
2.4 Mechanical Considerations
2.4.1 Form Factor
The board is designed to fit into an ATX-form-factor chassis. Figure 15 illustrates the
mechanical form factor for the board. Dimensions are given in inches [millimeters].
The outer dimensions are 12.00 inches by 9.60 inches [304.80 millimeters by
243.84 millimeters]. Location of the I/O connectors and mounting holes are in
The +5 V standby line from the power supply must be capable of providing adequate
+5 V standby current. Failure to do so can damage the power supply. The total
amount of standby current required depends on the wake devices supported and
manufacturing options.
Additional power required will depend on configurations chosen by the integrator.
The power supply must comply with the indicated parameters of the ATX form factor
specification.
• The potential relation between 3.3 VDC and +5 VDC power rails
• The current capability of the +5 VSB line
• All timing parameters
• All voltage tolerances
For example, for a system consisting of a supported 130 W processor (see section 1.4
on page 16 for a list of supported processors), 1 GB DDR3 RAM, one high end video
card, one hard disk drive, one optical drive, and all board peripherals enabled, the
minimum recommended power supply is 460 W. Table 26 lists the recommended
power supply current values.
Table 26. Recommended Power Supply Current Values
Output Voltage 3.3 V 5 V 12 V1 12 V2 -12 V 5 VSB
Current 22 A 20 A 16 A 16 A 0.3 A 1.5 A
For information about Refer to
Selecting an appropriate power supply http://support.intel.com/support/motherboards/desktop/sb
/CS-026472.htm
56
Technical Reference
2.5.2 Fan Header Current Capability
CAUTION
The processor fan must be connected to the processor fan header, not to a chassis fan
header. Connecting the processor fan to a chassis fan header may result in onboard
component damage that will halt fan operation.
Table 27 lists the current capability of the fan headers.
Table 27. Fan Header Current Capability
Fan Header Maximum Available Current
Processor fan 2.0 A
Front chassis fan 1.5 A
Rear chassis fan 1.5 A
Auxiliary chassis fan 2.0 A
2.5.3 Add-in Board Considerations
The board is designed to provide 2 A (average) of current for each add-in board from
the +5 V rail. The total +5 V current draw for add-in boards for a fully loaded board
(all six expansion slots filled) must not exceed the system’s power supply +5 V
maximum current or 14 A in total.
2.6 Thermal Considerations
CAUTION
A chassis with a maximum internal ambient temperature of 38 oC at the processor fan
inlet is a requirement. Use a processor heat sink that provides omni-directional
airflow to maintain required airflow across the processor voltage regulator area.
CAUTION
Failure to ensure appropriate airflow may result in reduced performance of both the
processor and/or voltage regulator or, in some instances, damage to the board. For a
list of chassis that have been tested with Intel desktop boards please refer to the
following website:
All responsibility for determining the adequacy of any thermal or system design
remains solely with the reader. Intel makes no warranties or representations that
merely following the instructions presented in this document will result in a system
with adequate thermal performance.
Ensure that the ambient temperature does not exceed the board’s maximum operating
temperature. Failure to do so could cause components to exceed their maximum case
temperature and malfunction. For information about the maximum operating
temperature, see the environmental specifications in Section 2.8.
CAUTION
Ensure that proper airflow is maintained in the processor voltage regulator circuit.
Failure to do so may result in damage to the voltage regulator circuit. The processor
voltage regulator area (shown in Figure 16) can reach a temperature of up to 85
an open chassis.
Figure 16 shows the locations of the localized high temperature zones.
o
C in
Figure 16. Localized High Temperature Zones
58
Item Description
A Processor voltage regulator area
B Processor
C Intel
82801IJR ICH10R
Technical Reference
Table 28 provides maximum case temperatures for the components that are sensitive
to thermal changes. The operating temperature, current load, or operating frequency
could affect case temperatures. Maximum case temperatures are important when
considering proper airflow to cool the board.
Table 28. Thermal Considerations for Components
Component Maximum Case Temperature
Processor For processor case temperature, see processor datasheets and
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Telcordia SR-332,
Method I Case 1 50% electrical stress, 55 ºC ambient. The MTBF prediction is used to
estimate repair rates and spare parts requirements.
The MTBF data is calculated from predicted data at 55 ºC. The MTBF for the board is
82,351.2845 hours.
2.8 Environmental
Table 29 lists the environmental specifications for the board.
Table 29. Environmental Specifications
Parameter Specification
Temperature
Non-Operating
Operating
Shock Unpackaged 50 g trapezoidal waveform
Velocity change of 170 inches/second²
Packaged Half sine 2 millisecond
Product Weight (pounds) Free Fall (inches) Velocity Change (inches/sec²)
<20 36 167
21-40 30 152
41-80 24 136
81-100 18 118
Vibration Unpackaged 5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged 5 Hz to 40 Hz: 0.015 g² Hz (flat)
40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz
-40 °C to +70 °C
0 °C to +55 °C
60
3 Overview of BIOS Features
3.1 Introduction
The board uses an Intel BIOS that is stored in the Serial Peripheral Interface Flash
Memory (SPI Flash) and can be updated using a disk-based program. The SPI Flash
contains the BIOS Setup program, POST, the PCI auto-configuration utility, LAN
EEPROM information, and Plug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision
code. The initial production BIOSs are identified as
When the BIOS Setup configuration jumper is set to configure mode and the computer
is powered-up, the BIOS compares the CPU version and the microcode version in the
BIOS and reports if the two match.
The BIOS Setup program can be used to view and change the BIOS settings for the
computer. The BIOS Setup program is accessed by pressing the <F2> key after the
Power-On Self-Test (POST) memory test begins and before the operating system boot
begins. The menu bar is shown below.
Maintenance Main Advanced Performance Security Power Boot Exit
SOX5810J.86A.
NOTE
The maintenance menu is displayed only when the board is in configure mode.
Section 2.3 on page 53 shows how to put the board in configure mode.
Table 30 lists the BIOS Setup program menu features.
Table 30. BIOS Setup Program Menu Bar
Maintenance Main Advanced Performance Security Power Boot Exit
Clears
passwords and
displays
processor
information
Displays
processor
and memory
configuration
Configures
advanced
features
available
through the
chipset
Configures
Memory, Bus
and Processor
overrides
Sets
passwords
and
security
features
Configures
power
management
features and
power supply
controls
Selects
boot
options
Saves or
discards
changes to
Setup
program
options
Table 31 lists the function keys available for menu screens.
Table 31. BIOS Setup Program Function Keys
BIOS Setup Program
Function Key
<←> or <→>
<↑> or <↓>
<Tab> Selects a field (Not implemented)
<Enter> Executes command or selects the submenu
<F9> Load the default configuration values for the current menu
<F10> Save the current values and exits the BIOS Setup program
<Esc> Exits the menu
Description
Selects a different menu screen (Moves the cursor left or right)
Selects an item (Moves the cursor up or down)
3.2 BIOS Flash Memory Organization
The Serial Peripheral Interface Flash Memory (SPI Flash) includes a 16 Mbit (2048 KB)
flash memory device.
3.3 Resource Configuration
3.3.1 PCI Autoconfiguration
The BIOS can automatically configure PCI devices. PCI devices may be onboard or
add-in cards. Autoconfiguration lets a user insert or remove PCI cards without having
to configure the system. When a user turns on the system after adding a PCI card,
the BIOS automatically configures interrupts, the I/O space, and other system
resources. Any interrupts set to Available in Setup are considered to be available for
use by the add-in card.
62
Overview of BIOS Features
3.4 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing
computers in a managed network.
The main component of SMBIOS is the Management Information Format (MIF)
database, which contains information about the computing system and its
components. Using SMBIOS, a system administrator can obtain the system types,
capabilities, operational status, and installation dates for system components. The
MIF database defines the data and provides the method for accessing this information.
The BIOS enables applications such as third-party management software to use
SMBIOS. The BIOS stores and reports the following SMBIOS information:
• BIOS data, such as the BIOS revision level
• Fixed-system data, such as peripherals, serial numbers, and asset tags
• Resource data, such as memory size, cache size, and processor speed
• Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems require an additional interface for obtaining the
SMBIOS information. The BIOS supports an SMBIOS table interface for such operating
systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obtain the SMBIOS information. Additional
board information can be found in the BIOS under the Additional Information header
under the Main BIOS page.
3.5 Legacy USB Support
Legacy USB support enables USB devices to be used even when the operating
system’s USB drivers are not yet available. Legacy USB support is used to access the
BIOS Setup program, and to install an operating system that supports USB. By
default, Legacy USB support is set to Enabled.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to
enter and configure the BIOS Setup program and the maintenance menu.
4. POST completes.
5. The operating system loads. While the operating system is loading, USB
keyboards and mice are recognized and may be used to configure the operating
system. (Keyboards and mice are not recognized during this period if Legacy USB
support was set to Disabled in the BIOS Setup program.)
6. After the operating system loads the USB drivers, all legacy and non-legacy USB
devices are recognized by the operating system, and Legacy USB support from the
BIOS is no longer used.
7. Additional USB legacy feature options can be access by using Intel Integrator
Toolkit.
To install an operating system that supports USB, verify that Legacy USB support in
the BIOS Setup program is set to Enabled and follow the operating system’s
installation instructions.
3.6 BIOS Updates
The BIOS can be updated using either of the following utilities, which are available on
the Intel World Wide Web site:
• Intel
• Intel
Both utilities verify that the updated BIOS matches the target system to prevent
accidentally installing an incompatible BIOS.
®
Express BIOS Update utility, which enables automated updating while in the
Windows environment. Using this utility, the BIOS can be updated from a file on a
hard disk, a USB drive (a flash drive or a USB hard drive), or a CD-ROM, or from
the file location on the Web.
®
Flash Memory Update Utility, which requires booting from DOS. Using this
utility, the BIOS can be updated from a file on a hard disk, a USB drive (a flash
drive or a USB hard drive), or a CD-ROM.
NOTE
Review the instructions distributed with the upgrade utility before attempting a BIOS
update.
The BIOS Setup program and help messages are supported in US English. Check the
Intel web site for support.
64
Overview of BIOS Features
3.6.2 Custom Splash Screen
During POST, an Intel® splash screen is displayed by default. This splash screen can
be augmented with a custom splash screen. The Intel Integrator’s Toolkit that is
available from Intel can be used to create a custom splash screen.
NOTE
If you add a custom splash screen, it will share space with the Intel branded logo.
It is unlikely that anything will interrupt a BIOS update; however, if an interruption
occurs, the BIOS could be damaged. Table 32 lists the drives and media types that
can and cannot be used for BIOS recovery. The BIOS recovery media does not need
to be made bootable.
Table 32. Acceptable Drives/Media Types for BIOS Recovery
Media Type Can be used for BIOS recovery?
CD-ROM drive connected to the Serial ATA interface Yes
USB removable drive (a USB Flash Drive, for example) Yes
USB diskette drive (with a 1.44 MB diskette) No
USB hard disk drive No
In the BIOS Setup program, the user can choose to boot from a hard drive, optical
drive, removable drive, or the network. The default setting is for the optical drive to
be the first boot device, the hard drive second, removable drive third, and the network
fourth.
3.8.1 Optical Drive Boot
Booting from the optical drive is supported in compliance to the El Torito bootable
CD-ROM format specification. Under the Boot menu in the BIOS Setup program, the
optical drive is listed as a boot device. Boot devices are defined in priority order.
Accordingly, if there is not a bootable CD in the optical drive, the system will attempt
to boot from the next defined drive.
3.8.2 Network Boot
The network can be selected as a boot device. This selection allows booting from the
onboard LAN or a network add-in card with a remote boot ROM installed.
Pressing the <F12> key during POST automatically forces booting from the LAN. To
use this key during POST, the User Access Level in the BIOS Setup program's Security
menu must be set to Full.
3.8.3 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing
the POST, the operating system loader is invoked even if the following devices are not
present:
• Video adapter
• Keyboard
• Mouse
3.8.4 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a boot device menu to be displayed. This
menu displays the list of available boot devices (as set in the BIOS setup program’s
Boot Device Priority Submenu). Table 33 lists the boot device menu options.
Table 33. Boot Device Menu Options
Boot Device Menu Function Keys Description
<↑> or <↓>
<Enter> Exits the menu, saves changes, and boots from the selected
<Esc> Exits the menu without saving changes
Selects a default boot device
device
66
Overview of BIOS Features
3.9 Adjusting Boot Speed
These factors affect system boot speed:
• Selecting and configuring peripherals properly
• Optimized BIOS boot parameters
3.9.1 Peripheral Selection and Configuration
The following techniques help improve system boot speed:
•Choose a hard drive with parameters such as “power-up to data ready” in less than
eight seconds that minimizes hard drive startup delays.
•Select a CD-ROM drive with a fast initialization rate. This rate can influence POST
execution time.
•Eliminate unnecessary add-in adapter features, such as logo displays, screen
repaints, or mode changes in POST. These features may add time to the boot
process.
•Try different monitors. Some monitors initialize and communicate with the BIOS
more quickly, which enables the system to boot more quickly.
3.9.2 BIOS Boot Optimizations
Use of the following BIOS Setup program settings reduces the POST execution time.
•In the Boot Menu, set the hard disk drive as the first boot device. As a result, the
POST does not first seek a diskette drive, which saves about one second from the
POST execution time.
•In the Peripheral Configuration submenu, disable the LAN device if it will not be
used. This can reduce up to four seconds of option ROM boot time.
NOTE
It is possible to optimize the boot process to the point where the system boots so
quickly that the Intel logo screen (or a custom logo splash screen) will not be seen.
Monitors and hard disk drives with minimum initialization times can also contribute to
a boot time that might be so fast that necessary logo screens and POST messages
cannot be seen.
This boot time may be so fast that some drives might be not be initialized at all. If
this condition should occur, it is possible to introduce a programmable delay ranging
from zero to 30 seconds by 5 second increments (using the Hard Disk Pre-Delay
feature of the Advanced Menu in the Drive Configuration Submenu of the BIOS Setup
program).
The BIOS includes security features that restrict access to the BIOS Setup program
and who can boot the computer. A supervisor password and a user password can be
set for the BIOS Setup program and for booting the computer, with the following
restrictions:
•The supervisor password gives unrestricted access to view and change all the
Setup options in the BIOS Setup program. This is the supervisor mode.
•The user password gives restricted access to view and change Setup options in the
BIOS Setup program. This is the user mode.
•If only the supervisor password is set, pressing the <Enter> key at the password
prompt of the BIOS Setup program allows the user restricted access to Setup.
•If both the supervisor and user passwords are set, users can enter either the
supervisor password or the user password to access Setup. Users have access to
Setup respective to which password is entered.
•Setting the user password restricts who can boot the computer. The password
prompt will be displayed before the computer is booted. If only the supervisor
password is set, the computer boots without asking for a password. If both
passwords are set, the user can enter either password to boot the computer.
•For enhanced security, use different passwords for the supervisor and user
passwords.
•Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to
16 characters in length.
Table 34 shows the effects of setting the supervisor password and user password.
T
his table is for reference only and is not displayed on the screen.
Table 34. Supervisor and User Password Functions
Password
Set
Neither Can change all
Supervisor
only
User only N/A Can change all
Supervisor
and user set
Note: If no password is set, any user can change all Setup options.
Supervisor
Mode
options
Can change all
options
Can change all
options
(Note)
User Mode
Can change all
options
Can change a
limited number
of options
options
Can change a
limited number
of options
(Note)
Setup Options
None None None
Supervisor Password Supervisor None
Enter Password
Clear User Password
Supervisor Password
Enter Password
Password
to Enter
Setup
User User
Supervisor or
user
Password
During
Boot
Supervisor or
user
68
Overview of BIOS Features
3.11 BIOS Performance Features
The BIOS includes the following options to provide custom performance enhancements
when using Intel Core i7 and Intel Xeon Processors.
Whenever a recoverable error occurs during POST, the BIOS causes the board’s front
panel power LED to blink an error message describing the problem (see Table 36).
Table 36. Front-panel Power LED Blink Codes
Type Pattern Note
F2 Setup/F10 Boot Menu
Prompt
BIOS update in progress Off when the update begins, then on for
Video error On-off (1.0 second each) two times, then
Memory error On-off (1.0 second each) three times, then
Thermal trip warning Each beep will be accompanied by the following
None
0.5 seconds, then off for 0.5 seconds. The
pattern repeats until the BIOS update is
complete.
When no VGA option ROM is
2.5-second pause (off), entire pattern repeats
(blink and pause) until the system is powered
off.
2.5-second pause (off), entire pattern repeats
(blinks and pause) until the system is powered
off.
blink pattern: .25 seconds on, .25 seconds off,
.25 seconds on, .25 seconds off. This will result
in a total of 16 blinks.
found.
4.4 BIOS Error Messages
Table 37 lists the error messages and provides a brief description of each.
Table 37. BIOS Error Messages
Error Message Explanation
CMOS Battery Low The battery may be losing power. Replace the battery soon.
CMOS Checksum Bad The CMOS checksum is incorrect. CMOS memory may have been
corrupted. Run Setup to reset values.
Memory Size Decreased Memory size has decreased since the last boot. If no memory
was removed, then memory may be bad.
No Boot Device Available System did not find a device to boot.
72
Error Messages and Beep Codes
4.5 Port 80h POST Codes
During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O
port 80h. If the POST fails, execution stops and the last POST code generated is left
at port 80h. This code is useful for determining the point where an error occurred.
Displaying the POST codes requires a PCI bus add-in card, often called a POST card.
The POST card can decode the port and display the contents on a medium such as a
seven-segment display.
NOTE
The POST card must be installed in PCI bus connector 1.
The following tables provide information about the POST codes generated by the
BIOS:
• Table 38 lists the Port 80h POST code ranges
• Table 39 lists the Port 80h POST codes themselves
• Table 40 lists the Port 80h POST sequence
NOTE
In the tables listed above, all POST codes and range values are listed in hexadecimal.
Table 38. Port 80h POST Code Ranges
Range Category/Subsystem
00 – 0F Debug codes: Can be used by any PEIM/driver for debug.
10 – 1F Host Processors: 1F is an unrecoverable CPU error.
20 – 2F Memory/Chipset: 2F is no memory detected or no useful memory detected.
30 – 3F Recovery: 3F indicated recovery failure.
40 – 4F Reserved for future use.
50 – 5F I/O Busses: PCI, USB, ATA, etc. 5F is an unrecoverable error. Start with PCI.
60 – 6F Reserved for future use (for new busses).
70 – 7F Output Devices: All output consoles. 7F is an unrecoverable error.
80 – 8F Reserved for future use (new output console codes).
90 – 9F Input devices: Keyboard/Mouse. 9F is an unrecoverable error.
A0 – AF Reserved for future use (new input console codes).
B0 – BF Boot Devices: Includes fixed media and removable media. BF is an unrecoverable error.
C0 – CF Reserved for future use.
D0 – DF Boot device selection.
E0 – FF E0 – EE: Miscellaneous codes. See Table 39.
22 Reading SPD from memory DIMMs
23 Detecting presence of memory DIMMs
24 Programming timing parameters in the memory controller and the DIMMs
25 Configuring memory
26 Optimizing memory settings
27 Initializing memory, such as ECC init
29 Memory testing completed
50 Enumerating PCI busses
51 Allocating resources to PCI bus
52 Hot Plug PCI controller initialization
53 – 57 Reserved for PCI Bus
58 Resetting USB bus
59 Reserved for USB
5A Resetting PATA/SATA bus and all devices
5B Reserved for ATA
5C Resetting SMBus
5D Reserved for SMBus
70 Resetting the VGA controller
71 Disabling the VGA controller
72 Enabling the VGA controller
78 Resetting the console controller
79 Disabling the console controller
7A Enabling the console controller
Host Processor
Chipset
Memory
PCI Bus
USB
ATA/ATAPI/SATA
SMBus
Local Console
Remote Console
continued
74
Error Messages and Beep Codes
Table 39. Port 80h POST Codes (continued)
POST Code Description of POST Operation
90 Resetting keyboard
91 Disabling keyboard
92 Detecting presence of keyboard
93 Enabling the keyboard
94 Clearing keyboard input buffer
95 Instructing keyboard controller to run Self Test (PS/2 only)
B0 Resetting fixed media
B1 Disabling fixed media
B2 Detecting presence of a fixed media (IDE hard drive detection etc.)
B3 Enabling/configuring a fixed media
B8 Resetting removable media
B9 Disabling removable media
BA Detecting presence of a removable media (IDE, CD-ROM detection, etc.)
BC Enabling/configuring a removable media
DyTrying boot selection y (y=0 to 15)
E0 Started dispatching PEIMs (emitted on first report of EFI_SW_PC_INIT_BEGIN
EFI_SW_PEI_PC_HANDOFF_TO_NEXT)
E2 Permanent memory found
E1, E3 Reserved for PEI/PEIMs
E4 Entered DXE phase
E5 Started dispatching drivers
E6 Started connecting drivers
E7 Waiting for user input
E8 Checking password
E9 Entering BIOS setup
EB Calling Legacy Option ROMs
Runtime Phase/EFI OS Boot
F4 Entering Sleep state
F5 Exiting Sleep state
F8 EFI boot service ExitBootServices ( ) has been called
F9 EFI runtime service SetVirtualAddressMap ( ) has been called
FA EFI runtime service ResetSystem ( ) has been called
PEIMs/Recovery
30 Crisis Recovery has initiated per user request
31 Crisis Recovery has initiated by software (corrupt flash)
34 Loading recovery capsule
35 Handing off control to the recovery capsule
3F Unable to recover
76
Table 40. Typical Port 80h POST Sequence
POST Code Description
21 Initializing a chipset component
22 Reading SPD from memory DIMMs
23 Detecting presence of memory DIMMs
25 Configuring memory
28 Testing memory
34 Loading recovery capsule
E4 Entered DXE phase
12 Starting application processor initialization
13 SMM initialization
50 Enumerating PCI busses
51 Allocating resourced to PCI bus
92 Detecting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
95 Keyboard Self Test
EB Calling Video BIOS
58 Resetting USB bus
5A Resetting PATA/SATA bus and all devices
92 Detecting the presence of the keyboard
90 Resetting keyboard
94 Clearing keyboard input buffer
5A Resetting PATA/SATA bus and all devices
28 Testing memory
90 Resetting keyboard
94 Clearing keyboard input buffer
E7 Waiting for user input
01 INT 19
00 Ready to boot
We, Intel Corporation, declare under our sole responsibility that the product Intel®
Desktop Board DX58OG is in conformity with all applicable essential requirements
necessary for CE marking, following the provisions of the European Council Directive
2004/108/EC (EMC Directive), 2006/95/EC (Low Voltage Directive), and 2002/95/EC
(ROHS Directive).
The product is properly CE marked demonstrating this conformity and is for
distribution within all member states of the EU with no restrictions.
This product follows the provisions of the European Directives 2004/108/EC,
2006/95/EC, and 2002/95/EC.
Čeština Tento výrobek odpovídá požadavkům evropských směrnic 2004/108/EC,
2006/95/EC a 2002/95/EC.
Dansk Dette produkt er i overensstemmelse med det europæiske direktiv
2004/108/EC, 2006/95/EC & 2002/95/EC.
Dutch Dit product is in navolging van de bepalingen van Europees Directief
2004/108/EC, 2006/95/EC & 2002/95/EC.
Eesti Antud toode vastab Euroopa direktiivides 2004/108/EC, ja 2006/95/EC ja
2002/95/EC kehtestatud nõuetele.
Suomi Tämä tuote noudattaa EU-direktiivin 2004/108/EC, 2006/95/EC & 2002/95/EC
määräyksiä.
Français Ce produit est conforme aux exigences de la Directive Européenne
2004/108/EC, 2006/95/EC & 2002/95/EC.
Deutsch Dieses Produkt entspricht den Bestimmungen der Europäischen Richtlinie
2004/108/EC, 2006/95/EC & 2002/95/EC.
ΕλληνικάΤο παρόνπροϊόνακολουθείτιςδιατάξειςτωνΕυρωπαϊκώνΟδηγιών
2004/108/EC, 2006/95/EC και 2002/95/EC.
Magyar E termék megfelel a 2004/108/EC, 2006/95/EC és 2002/95/EC Európai
Irányelv előírásainak.
Icelandic Þessi vara stenst reglugerð Evrópska Efnahags Bandalagsins númer
2004/108/EC, 2006/95/EC, & 2002/95/EC.
Italiano Questo prodotto è conforme alla Direttiva Europea 2004/108/EC,
2006/95/EC & 2002/95/EC.
Latviešu Šis produkts atbilst Eiropas Direktīvu 2004/108/EC, 2006/95/EC un
2002/95/EC noteikumiem.
Lietuvių Šis produktas atitinka Europos direktyvų 2004/108/EC, 2006/95/EC, ir
2002/95/EC nuostatas.
Malti Dan il-prodott hu konformi mal-provvedimenti tad-Direttivi Ewropej
2004/108/EC, 2006/95/EC u 2002/95/EC.
Norsk Dette produktet er i henhold til bestemmelsene i det europeiske direktivet
2004/108/EC, 2006/95/EC & 2002/95/EC.
Polski Niniejszy produkt jest zgodny z postanowieniami Dyrektyw Unii Europejskiej
2004/108/EC, 206/95/EC i 2002/95/EC.
80
Regulatory Compliance and Battery Disposal Information
Portuguese Este produto cumpre com as normas da Diretiva Européia 2004/108/EC,
2006/95/EC & 2002/95/EC.
Español Este producto cumple con las normas del Directivo Europeo 2004/108/EC,
2006/95/EC & 2002/95/EC.
Slovensky Tento produkt je v súlade s ustanoveniami európskych direktív
2004/108/EC, 2006/95/EC a 2002/95/EC.
Slovenščina Izdelek je skladen z določbami evropskih direktiv 2004/108/EC,
2006/95/EC in 2002/95/EC.
Svenska Denna produkt har tillverkats i enlighet med EG-direktiv 2004/108/EC,
2006/95/EC & 2002/95/EC.
Türkçe Bu ürün, Avrupa Birliği’nin 2004/108/EC, 2006/95/EC ve 2002/95/EC
yönergelerine uyar.
5.1.3 Product Ecology Statements
The following information is provided to address worldwide product ecology concerns
and regulations.
5.1.3.1 Disposal Considerations
This product contains the following materials that may be regulated upon disposal:
lead solder on the printed wiring board assembly.
5.1.3.2 Recycling Considerations
As part of its commitment to environmental responsibility, Intel has implemented the
Intel Product Recycling Program to allow retail consumers of Intel’s branded products
to return used products to selected locations for proper recycling.
Please consult the http://www.intel.com/intel/other/ehs/product_ecology
details of this program, including the scope of covered products, available locations,
shipping instructions, terms and conditions, etc.
中文
作为其对环境责任之承诺的部分,英特尔已实施 Intel Product Recycling Program
(英特尔产品回收计划),以允许英特尔品牌产品的零售消费者将使用过的产品退还至指定地点作
恰当的重复使用处理。
Als Teil von Intels Engagement für den Umweltschutz hat das Unternehmen das Intel
Produkt-Recyclingprogramm implementiert, das Einzelhandelskunden von Intel
Markenprodukten ermöglicht, gebrauchte Produkte an ausgewählte Standorte für
ordnungsgemäßes Recycling zurückzugeben.
Details zu diesem Programm, einschließlich der darin eingeschlossenen Produkte,
verfügbaren Standorte, Versandanweisungen, Bedingungen usw., finden Sie auf der
Español
Como parte de su compromiso de responsabilidad medioambiental, Intel ha
implantado el programa de reciclaje de productos Intel, que permite que los
consumidores al detalle de los productos Intel devuelvan los productos usados en los
lugares seleccionados para su correspondiente reciclado.
Consulte la http://www.intel.com/intel/other/ehs/product_ecology
para ver los detalles
del programa, que incluye los productos que abarca, los lugares disponibles,
instrucciones de envío, términos y condiciones, etc.
Français
Dans le cadre de son engagement pour la protection de l'environnement, Intel a mis
en œuvre le programme Intel Product Recycling Program (Programme de recyclage
des produits Intel) pour permettre aux consommateurs de produits Intel de recycler
les produits usés en les retournant à des adresses spécifiées.
Visitez la page Web http://www.intel.com/intel/other/ehs/product_ecology
savoir plus sur ce programme, à savoir les produits concernés, les adresses
disponibles, les instructions d'expédition, les conditions générales, etc.
Sebagai sebahagian daripada komitmennya terhadap tanggungjawab persekitaran,
Intel telah melaksanakan Program Kitar Semula Produk untuk membenarkan
pengguna-pengguna runcit produk jenama Intel memulangkan produk terguna ke
lokasi-lokasi terpilih untuk dikitarkan semula dengan betul.
Sila rujuk http://www.intel.com/intel/other/ehs/product_ecology
untuk mendapatkan
butir-butir program ini, termasuklah skop produk yang dirangkumi, lokasi-lokasi
tersedia, arahan penghantaran, terma & syarat, dsb.
Portuguese
Como parte deste compromisso com o respeito ao ambiente, a Intel implementou o
Programa de Reciclagem de Produtos para que os consumidores finais possam enviar
produtos Intel usados para locais selecionados, onde esses produtos são reciclados de
maneira adequada.
Consulte o site http://www.intel.com/intel/other/ehs/product_ecology
(em Inglês)
para obter os detalhes sobre este programa, inclusive o escopo dos produtos cobertos,
os locais disponíveis, as instruções de envio, os termos e condições, etc.
82
Regulatory Compliance and Battery Disposal Information
Russian
В качестве части своих обязательств к окружающей среде, в Intel создана
программа утилизации продукции Intel (Product Recycling Program) для
предоставления конечным пользователям марок продукции Intel возможности
возврата используемой продукции в специализированные пункты для должной
утилизации.
программе, принимаемых продуктах, местах приема, инструкциях об отправке,
положениях и условиях и т.д.
Türkçe
Intel, çevre sorumluluğuna bağımlılığının bir parçası olarak, perakende tüketicilerin
Intel markalı kullanılmış ürünlerini belirlenmiş merkezlere iade edip uygun şekilde geri
dönüştürmesini amaçlayan Intel Ürünleri Geri Dönüşüm Programı’nı uygulamaya
koymuştur.
Bu programın ürün kapsamı, ürün iade merkezleri, nakliye talimatları, kayıtlar ve
şartlar v.s dahil bütün ayrıntılarını ögrenmek için lütfen
The Intel Desktop Board DX58OG complies with the EMC regulations stated in Table 42
when correctly installed in a compatible host system.
Table 42. EMC Regulations
Regulation Title
FCC 47 CFR Part 15,
Subpart B
ICES-003 Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
EN55022 Limits and methods of measurement of Radio Interference Characteristics
EN55024 Information Technology Equipment – Immunity Characteristics Limits and
EN55022 Australian Communications Authority, Standard for Electromagnetic
CISPR 22 Limits and methods of measurement of Radio Disturbance Characteristics of
CISPR 24 Information Technology Equipment – Immunity Characteristics – Limits and
VCCI V-3, V-4 Voluntary Control for Interference by Information Technology Equipment.
KN-22, KN-24 Korean Communications Commission – Framework Act on
CNS 13438 Bureau of Standards, Metrology, and Inspection (Taiwan)
Title 47 of the Code of Federal Regulations, Part 15, Subpart B, Radio
Frequency Devices. (USA)
of Information Technology Equipment. (European Union)
methods of measurement. (European Union)
Compatibility. (Australia and New Zealand)
Information Technology Equipment. (International)
Methods of Measurement. (International)
(Japan)
Telecommunications and Radio Waves Act (South Korea)
This device complies with Part 15 of the FCC Rules. Operation is subject to the
following two conditions: (1) this device may not cause harmful interference, and (2)
this device must accept any interference received, including interference that may
cause undesired operation.
For questions related to the EMC performance of this product, contact:
Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124
1-800-628-8686
This equipment has been tested and found to comply with the limits for a Class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to
provide reasonable protection against harmful interference in a residential installation.
This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instructions, may cause harmful interference
to radio communications. However, there is no guarantee that interference will not
occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off
and on, the user is encouraged to try to correct the interference by one or more of the
following measures:
• Reorient or relocate the receiving antenna.
• Increase the separation between the equipment and the receiver.
• Connect the equipment to an outlet on a circuit other than the one to which the
receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
Any changes or modifications to the equipment not expressly approved by Intel
Corporation could void the user’s authority to operate the equipment.
Tested to comply with FCC standards for home or office use.
Canadian Department of Communications Compliance Statement
This digital apparatus does not exceed the Class B limits for radio noise emissions from
digital apparatus set out in the Radio Interference Regulations of the Canadian
Department of Communications.
Le présent appareil numerique német pas de bruits radioélectriques dépassant les
limites applicables aux appareils numériques de la classe B prescrites dans le
Réglement sur le broullage radioélectrique édicté par le ministére des Communications
du Canada.
84
Regulatory Compliance and Battery Disposal Information
Japan VCCI Statement
Japan VCCI Statement translation: This is a Class B product based on the standard of
the Voluntary Control Council for Interference from Information Technology Equipment
(VCCI). If this is used near a radio or television receiver in a domestic environment, it
may cause radio interference. Install and use the equipment according to the
instruction manual.
Korea Class B Statement
Korea Class B Statement translation: This equipment is for home use, and has
acquired electromagnetic conformity registration, so it can be used not only in
residential areas, but also other areas..
The US Department of Energy and the US Environmental Protection Agency have
continually revised the ENERGY STAR requirements. Intel has worked directly with
these two governmental agencies in the definition of new requirements.
Intel Desktop Board DH55PJ meets the following program requirements in an adequate
system configuration, including appropriate selection of an efficient power supply:
• Energy Star v5.0, category D
• EPEAT*
• Korea e-Standby
• European Union Energy-related Products Directive 2009 (ErP)
For information about Refer to
ENERGY STAR requirements and recommended configurations http://www.intel.com/go/energystar
Electronic Product Environmental Assessment Tool (EPEAT) http://www.epeat.net/
Korea e-Standby Program http://www.kemco.or.kr/new_eng/pg02/
pg02100300.asp
European Union Energy-related Products Directive 2009 (ErP) http://ec.europa.eu/enterprise/policies/s
Regulatory Compliance and Battery Disposal Information
5.1.6 Regulatory Compliance Marks (Board Level)
Intel Desktop Board DH55PJ has the regulatory compliance marks shown in Table 43.
Table 43. Regulatory Compliance Marks
Description Mark
UL joint US/Canada Recognized Component mark. Includes adjacent UL file
number for Intel Desktop Boards: E210882.
FCC Declaration of Conformity logo mark for Class B equipment.
CE mark. Declaring compliance to the European Union (EU) EMC directive,
Low Voltage directive, and RoHS directive.
Australian Communications Authority (ACA) and New Zealand Radio Spectrum
Management (NZ RSM) C-tick mark. Includes adjacent Intel supplier code
number, N-232.
Japan VCCI (Voluntary Control Council for Interference) mark.
Taiwan BSMI (Bureau of Standards, Metrology and Inspections) mark.
Includes adjacent Intel company number, D33025.
Printed wiring board manufacturer’s recognition mark. Consists of a unique
UL recognized manufacturer’s logo, along with a flammability rating (solder
side).
China RoHS/Environmentally Friendly Use Period Logo: This is an example of
the symbol used on Intel Desktop Boards and associated collateral. The color
of the mark may vary depending upon the application. The Environmental
Friendly Usage Period (EFUP) for Intel Desktop Boards has been determined
to be 10 years.
Risk of explosion if the battery is replaced with an incorrect type. Batteries should be
recycled where possible. Disposal of used batteries must be in accordance with local
environmental regulations.
PRÉCAUTION
Risque d'explosion si la pile usagée est remplacée par une pile de type incorrect. Les
piles usagées doivent être recyclées dans la mesure du possible. La mise au rebut des
piles usagées doit respecter les réglementations locales en vigueur en matière de
protection de l'environnement.
FORHOLDSREGEL
Eksplosionsfare, hvis batteriet erstattes med et batteri af en forkert type. Batterier
bør om muligt genbruges. Bortskaffelse af brugte batterier bør foregå i
overensstemmelse med gældende miljølovgivning.
OBS!
Det kan oppstå eksplosjonsfare hvis batteriet skiftes ut med feil type. Brukte batterier
bør kastes i henhold til gjeldende miljølovgivning.
VIKTIGT!
Risk för explosion om batteriet ersätts med felaktig batterityp. Batterier ska kasseras
enligt de lokala miljövårdsbestämmelserna.
VARO
Räjähdysvaara, jos pariston tyyppi on väärä. Paristot on kierrätettävä, jos se on
mahdollista. Käytetyt paristot on hävitettävä paikallisten ympäristömääräysten
mukaisesti.
VORSICHT
Bei falschem Einsetzen einer neuen Batterie besteht Explosionsgefahr. Die Batterie
darf nur durch denselben oder einen entsprechenden, vom Hersteller empfohlenen
Batterietyp ersetzt werden. Entsorgen Sie verbrauchte Batterien den Anweisungen
des Herstellers entsprechend.
AVVERTIMENTO
Esiste il pericolo di un esplosione se la pila non viene sostituita in modo corretto.
Utilizzare solo pile uguali o di tipo equivalente a quelle consigliate dal produttore. Per
disfarsi delle pile usate, seguire le istruzioni del produttore.
88
Regulatory Compliance and Battery Disposal Information
PRECAUCIÓN
Existe peligro de explosión si la pila no se cambia de forma adecuada. Utilice
solamente pilas iguales o del mismo tipo que las recomendadas por el fabricante del
equipo. Para deshacerse de las pilas usadas, siga igualmente las instrucciones del
fabricante.
WAARSCHUWING
Er bestaat ontploffingsgevaar als de batterij wordt vervangen door een onjuist type
batterij. Batterijen moeten zoveel mogelijk worden gerecycled. Houd u bij het
weggooien van gebruikte batterijen aan de plaatselijke milieuwetgeving.
ATENÇÃO
Haverá risco de explosão se a bateria for substituída por um tipo de bateria incorreto.
As baterias devem ser recicladas nos locais apropriados. A eliminação de baterias
usadas deve ser feita de acordo com as regulamentações ambientais da região.
AŚCIAROŽZNAŚĆ
Існуе рызыка выбуху, калі заменены акумулятар неправільнага тыпу.
Акумулятары павінны, па магчымасці, перепрацоўвацца. Пазбаўляцца ад старых
акумулятараў патрэбна згодна з мясцовым заканадаўствам па экалогіі.
UPOZORNÌNÍ
V případě výměny baterie za nesprávný druh může dojít k výbuchu. Je-li to možné,
baterie by měly být recyklovány. Baterie je třeba zlikvidovat v souladu s místními
předpisy o životním prostředí.
Προσοχή
Υπάρχει κίνδυνος για έκρηξη σε περίπτωση που η μπαταρία αντικατασταθεί από μία
λανθασμένου τύπου. Οι μπαταρίες θα πρέπει να ανακυκλώνονται όταν κάτι τέτοιο είναι
δυνατό. Η απόρριψη των χρησιμοποιημένων μπαταριών πρέπει να γίνεται σύμφωνα με
τους κατά τόπο περιβαλλοντικούς κανονισμούς.
VIGYÁZAT
Ha a telepet nem a megfelelő típusú telepre cseréli, az felrobbanhat. A telepeket
lehetőség szerint újra kell hasznosítani. A használt telepeket a helyi környezetvédelmi
előírásoknak megfelelően kell kiselejtezni.
Risiko letupan wujud jika bateri digantikan dengan jenis yang tidak betul. Bateri
sepatutnya dikitar semula jika boleh. Pelupusan bateri terpakai mestilah mematuhi
peraturan alam sekitar tempatan.
OSTRZEŻENIE
Istnieje niebezpieczeństwo wybuchu w przypadku zastosowania niewłaściwego typu
baterii. Zużyte baterie należy w miarę możliwości utylizować zgodnie z odpowiednimi
przepisami ochrony środowiska.
PRECAUŢIE
Risc de explozie, dacă bateria este înlocuită cu un tip de baterie necorespunzător.
Bateriile trebuie reciclate, dacă este posibil. Depozitarea bateriilor uzate trebuie să
respecte reglementările locale privind protecţia mediului.
ВНИМАНИЕ
При использовании батареи несоответствующего типа существует риск ее взрыва.
Батареи должны быть утилизированы по возможности. Утилизация батарей
должна проводится по правилам, соответствующим местным требованиям.
UPOZORNENIE
Ak batériu vymeníte za nesprávny typ, hrozí nebezpečenstvo jej výbuchu.
Batérie by sa mali podľa možnosti vždy recyklovať. Likvidácia použitých batérií sa musí
vykonávať v súlade s miestnymi predpismi na ochranu životného prostredia.
POZOR
Zamenjava baterije z baterijo drugačnega tipa lahko povzroči eksplozijo.
Če je mogoče, baterije reciklirajte. Rabljene baterije zavrzite v skladu z lokalnimi
okoljevarstvenimi predpisi.
.
UYARI
Yanlış türde pil takıldığında patlama riski vardır. Piller mümkün olduğunda geri
dönüştürülmelidir. Kullanılmış piller, yerel çevre yasalarına uygun olarak atılmalıdır.
OСТОРОГА
Використовуйте батареї правильного типу, інакше існуватиме ризик вибуху.
Якщо можливо, використані батареї слід утилізувати. Утилізація використаних
батарей має бути виконана згідно місцевих норм, що регулюють охорону довкілля.
90
Regulatory Compliance and Battery Disposal Information
91
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.