The Intel® Desktop Board DP43TF may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board DP43TF Specification Update.
uly 2008
Order Number: E41955-001US
Revision History
Revision Revision History Date
-001
First release of the Intel
Specification
This product specification applies to only the standard Intel® Desktop Board DP43TF with BIOS
identifier NBG4310A.86A.
Changes to this specification will be published in the Intel Desktop Board DP43TF Specification
Update before being incorporated into a revision of this document.
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®
Desktop Board DP43TF Technical Product
July 2008
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®
desktop boards may contain design defects or errors known as errata, which may cause the product
Intel
to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your
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This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for the Intel
Desktop Board DP43TF. It describes the standard product and available
manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Intel Desktop
Board DP43TF and its components to the vendors, system integrators, and other
engineers and technicians who need this level of information. It is specifically not
intended for general audiences.
What This Document Contains
®
Chapter Description
1 A description of the hardware used on the board
2 A map of the resources of the board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
5 Regulatory compliance and battery disposal information
Typographical Conventions
This section contains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
#
NOTE
Notes call attention to important information.
INTEGRATOR’S NOTES
Integrator’s notes are used to call attention to information that may be useful to
system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
# Used after a signal name to identify an active-low signal (such as USBP0#)
GB Gigabyte (1,073,741,824 bytes)
GB/sec Gigabytes per second
Gbit Gigabit (1, 073,741,824 bits)
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
A PCI Conventional bus add-in card connector
B S/PDIF connector
C PCI Conventional bus add-in card connector
D PCI Conventional bus add-in card connector
E PCI Express x1 connector
F Chassis intrusion header
G Front panel audio header
H PCI Express x1 connector
I PCI Express x16 connector
J PCI Express x1 connector
K Rear chassis fan header
L Back panel connectors
M Processor core power connector (2 X 2)
N Processor fan header
O LGA775 processor socket
P Intel 82P43 MCH
Q DIMM Channel A sockets
R DIMM Channel B sockets
S Main Power connector (2 X 12)
T Front chassis fan header
U BIOS Setup configuration jumper block
V Parallel ATA IDE connector
W Serial port header
X Serial ATA connectors [6]
Y Front panel header
Z Auxiliary front panel power LED header
AA Auxiliary front chassis fan header
BB IEEE 1394a header
CC High Definition Audio Link header
DD Front panel USB headers [3]
EE Intel 82801JIB I/O Controller Hub (ICH10)
FF Battery
GG Speaker
ption
12
1.1.3 Block Diagram
Figure 2 is a block diagram of the major functional areas.
This board differs from other Intel® Desktop Board products, with specific changes
including (but not limited to) the following:
• No parallel port
• No floppy drive connector
• No serial port on the back panel
• The serial port header is located near the SATA ports and may require a specialized
chassis or cabling solution to use
1.3 Online Support
To find information about… Visit this World Wide Web site:
Intel Desktop Board DP43TF http://www.intel.com/products/motherboard/DP43TF/index.htm
Desktop Board Support http://support.intel.com/support/motherboards/desktop
Available configurations for the Intel
Desktop Board DP43TF
Supported processors http://processormatch.intel.com
Chipset information http://www.intel.com/products/desktop/chipsets/index.htm
BIOS and driver updates http://downloadcenter.intel.com
Tested Memory http://support.intel.com/support/motherboards/desktop/sb/CS-
The board is designed to support the following processors:
• Intel Core 2 Quad processor in an LGA775 socket
• Intel Core 2 Duo processor in an LGA775 socket
• Intel Pentium Dual-Core processor in an LGA775 socket
• Intel Celeron Dual-Core processor in an LGA775 socket
• Intel Celeron processor Sequence 400 in an LGA775 socket
Other processors may be supported in the future. This board is designed to support
processors with a maximum wattage of 95 W. The processors listed above are only
supported when falling within the wattage requirements of the board. See the Intel
web site listed below for the most up-to-date list of supported processors.
Use only the processors listed on the web site above. Use of unsupported processors
can damage the board, the processor, and the power supply.
14
Product Description
INTEGRATOR’S NOTE
#
Use only ATX12V-compliant power supplies.
For information about Refer to
Power supply connectors Section 2.2.2.4, page 47
1.5 System Memory
The board has four DIMM sockets and supports the following memory features:
•1.8 V DDR2 SDRAM DIMMs with gold plated contacts, with the option to raise the
voltage to support higher performance DDR2 SDRAM DIMMs
• Dual channel interleaved mode support
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMs with x16 organization are not supported.
•8 GB maximum total system memory. Refer to Section 2.1.1 on page 37 for
i
nformation on the total amount of addressable memory.
• Minimum total system memory: 512 MB
• Non-ECC DIMMs
• Serial Presence Detect
• DDR2 667 MHz or DDR2 800 MHz SDRAM DIMMs
• DDR2 667 MHz DIMMs with SPD timings of only 5-5-5 (tCL-tRCD-tRP)
• DDR2 800 MHz DIMMs with SPD timings of only 5-5-5 or 6-6-6 (tCL-tRCD-tRP)
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This enables the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.
The Intel 82P43 MCH supports the following types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for
real world applications. Dual channel mode is enabled when the installed memory
capacities of both DIMM channels are equal. Technology and device width can vary
from one channel to the other but the installed memory capacity for each channel
must be equal. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel
bandwidth operation for real world applications. This mode is used when only a
single DIMM is installed or the memory capacities are unequal. Technology and
device width can vary from one channel to the other. If different speed DIMMs are
used between channels, the slowest memory timing will be used.
•Flex mode. This mode provides the most flexible performance characteristics.
The bottommost DRAM memory (the memory that is lowest within the system
memory map) is mapped to dual channel operation; the topmost DRAM memory
(the memory that is nearest to the 8 GB address space limit), if any, is mapped to
single channel operation. Flex mode results in multiple zones of dual and single
channel operation across the whole of DRAM memory. To use flex mode, it is
necessary to populate both channels.
Figure 3 illustrates the memory channel and DIMM configuration.
NOTE
The DIMM 0 sockets of both channels are blue. The DIMM 1 sockets of both channels
are black.
Figure 3. Memory Channel Configuration and DIMM Configuration
INTEGRATOR’S NOTE
#
Regardless of the memory configuration used (dual channel, single channel, or flex
mode), DIMM 0 of Channel A must always be populated. This is a requirement of the
Intel Management Engine in ICH10.
18
Product Description
1.6 Intel® P43 Express Chipset
The Intel P43 Express chipset consists of the following devices:
•Intel 82P43 Memory Controller Hub (MCH) with Direct Media Interface (DMI)
interconnect
•Intel 82801JIB I/O Controller Hub (ICH10)
The MCH component provides interfaces to the CPU, memory, PCI Express, and the
DMI interconnect. The ICH10 is a centralized controller for the board’s I/O paths.
The chipset supports the following features:
• USB
• Serial ATA
• Parallel IDE
For information about Refer to
The Intel P43 Express chipset http://www.intel.com/products/desktop/chipsets/index.htm
Resources used by the chipset Chapter 2
1.6.1 PCI Express x16 Graphics
The MCH also supports add in discrete graphics card via the PCI Express 2.0 graphics
connector.
• PCI Express 2.0 x16:
⎯ Supports PCI Express GEN1 frequency of 1.25 GHz resulting in 2.5 Gb/s each
direction (500 MB/s total). Maximum theoretical bandwidth on interface of
4 GB/s in each direction simultaneously, for an aggregate of 8 GB/s when
operating in x16 mode.
⎯ Supports PCI Express GEN2 frequency of 2.5 GHz resulting in 5.0 Gb/s each
direction (1000 MB/s total). Maximum theoretical bandwidth on interface of
8 GB/s in each direction simultaneously, for an aggregate of 16 GB/s when
operating in x16 mode.
The board supports up to twelve USB 2.0 ports, supports UHCI and EHCI, and uses
UHCI- and EHCI-compatible drivers.
The ICH10 provides the USB controller for all ports. The port arrangement is as
follows:
• Six ports are implemented with stacked back panel connectors
• Six ports are routed to three separate front panel USB headers
For information about Refer to
The location of the USB connectors on the back panel Figure 9, page 41
The location of the front panel USB headers Figure 10, page 42
1.6.3 Serial ATA Interfaces
The board provides four Serial ATA (SATA) connectors, which support one device per
connector.
1.6.3.1 Serial ATA Support
The board’s Serial ATA controller offers six independent Serial ATA ports with a
theoretical maximum transfer rate of 3 Gbits/sec per port. One device can be installed
on each port for a maximum of six Serial ATA devices. A point-to-point interface is
used for host to device connections, unlike Parallel ATA IDE which supports a
master/slave configuration and two devices per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the
operating system. The Serial ATA controller can operate in both legacy and native
modes. In legacy mode, standard IDE I/O and IRQ resources are assigned (IRQ 14
and 15). In Native mode, standard PCI Conventional bus resource steering is used.
Native mode is the preferred mode for configurations using the Windows* XP
operating system.
NOTE
Many Serial ATA drives use new low-voltage power connectors and require adapters or
power supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
For information about Refer to
The location of the Serial ATA connectors Figure 10, page 42
20
Product Description
1.7 Parallel IDE Controller
The Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface. The
Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to
16 MB/sec.
•Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 33 MB/sec.
•ATA-66: DMA protocol on IDE bus supporting host and target throttling and
transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is
device driver compatible.
•ATA-100: DMA protocol on IDE bus allows host and target throttling. The ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up
to 88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce
reflections, noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives)
and ATA devices. The BIOS supports Logical Block Addressing (LBA) and Extended
Cylinder Head Sector (ECHS) translation modes. The drive reports the transfer rate
and translation mode to the BIOS.
For information about Refer to
The location of the Parallel ATA IDE connector Figure 10, page 42
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded
into CMOS RAM at power-on.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one. Figure 1 on page 11 shows the location of the battery.
1.9 Legacy I/O Controller
The I/O controller provides the following features:
• One serial port header
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• PS/2-style mouse and keyboard interfaces
• Intelligent power management, including a programmable wake-up event interface
• PCI power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.9.1 Serial Port Interface
The serial port header is located on the component side of the board. The serial port
supports data transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about Refer to
The location of the serial port header Figure 10, page 42
The serial port header signal mapping Table 14, page 44
22
1.9.2 PS/2 Keyboard and Mouse Interface
The PS/2 keyboard and mouse connectors are located on the back panel.
Product Description
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported
in the top PS/2 connector. Power to the computer should be turned off before a
keyboard or mouse is connected or disconnected.
For information about Refer to
The location of the keyboard and mouse connectors Figure 9, page 41
The onboard audio subsystem consists of the following:
• Intel 82801JIB (ICH10)
• Realtek ALC888VC audio codec
• Back panel audio connectors
• Component-side audio header:
⎯ Intel
The audio subsystem supports the following features:
• A signal-to-noise (S/N) ratio of 95 dB
• Independent 5.1 audio playback from back panel connectors and stereo playback
from the Intel High Definition Audio front panel header.
®
High Definition Audio front panel header
NOTE
Systems built with an AC 97 front panel will not be able to obtain the Microsoft
Windows Vista* logo.
Table 4 lists the supported functions of the front panel and back panel audio jacks.
Table 4. Audio Jack Support
Audio Jack
Front panel – Green No No No No Yes
Front panel – Pink No No No Yes No
Back panel – Blue Yes Yes No No No
Back panel – Green No No No No Yes
Back panel – Pink No No Yes Yes No
Supports
Line in?
Supports
Rear
Surround?
Supports
Center/
LFE?
Supports
Micro-
phone?
Supports
Line/Head
-phones
out?
24
Product Description
1.10.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.2, page 14
1.10.2 Audio Connectors and Headers
The board contains audio connectors on the back panel and audio headers on the
component side of the board. The front panel audio header provides mic in and line
out signals for the front panel. Microphone bias is supported for both the front and
back panel microphone connectors.
The front/back panel audio connectors are configurable through the audio device
drivers. The available configurable audio ports are shown in Figure 4.
Item Description
A Line in
B Line out
C Mic in
Figure 4. Back Panel Audio Connector Options
NOTE
The back panel audio line out connector is designed to power headphones or amplified
speakers only. Poor audio quality occurs if passive (non-amplified) speakers are
connected to this output.
For information about Refer to
The location of the front panel audio header Figure 10, page 42
The signal names of the front panel audio header Table 18, page 45
The back panel audio connectors Section 2.2.1, page 41