The Intel® Desktop Board DP43BF may contain design defects or errors known as errata that may cause the product to deviate from published specifications.
Current characterized errata are documented in the Intel Desktop Board DP43BF Specification Update.
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board DP43BF Technical Product
Specification.
-002 Specification changes January 2012
This product specification applies to only the standard Intel® Desktop Board DP43BF with BIOS
identifier RKG4310H.86A
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March 2010
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conflicts or incompatibilities arising from future changes to them.
®
desktop boards may contain design defects or errors known as errata, which may cause the product
Intel
to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your
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* Other names and brands may be claimed as the property of others.
1. The AA number is found on a small label on the component side of the board.
2. The 4 Series Chipset kit used on this AA revision consists of the following component:
Device Stepping S-Spec Numbers
P43 A2 SLB89
ICH10R A0 SLB8S
Specification Changes or Clarifications
Table 1 indicates the Specification Changes or Specification Clarifications that apply to
the Intel
Table 1. Specification Changes or Clarifications
Date Type of Change Description of Changes or Clarifications
January 2012 Specification
®
Desktop Board DP43BF.
Changes
Updated Section 2.5.1 on page 56 to change DDR2 to DDR3.
Errata
Current characterized errata, if any, are documented in a separate Specification
Update. See http://developer.intel.com/products/desktop/motherboard/index.htm
for the latest documentation.
This Technical Product Specification (TPS) specifies the board layout, components,
connectors, power and environmental requirements, and the BIOS for the Intel
Desktop Board DP43BF. It describes the standard product and available
manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Intel Desktop
Board DP43BF and its components to the vendors, system integrators, and other
engineers and technicians who need this level of information. It is specifically not
intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the board
2 A map of the resources of the board
3 The features supported by the BIOS Setup program
4 A description of the BIOS error messages, beep codes, and POST codes
5 Regulatory compliance and battery disposal information
®
Typographical Conventions
This section contains information about the conventions used in this specification. Not
all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
# Used after a signal name to identify an active-low signal (such as USBP0#)
GB Gigabyte (1,073,741,824 bytes)
GB/s Gigabytes per second
Gb Gigabit (1,073,741,824 bits)
Gb/s Gigabits per second
KB Kilobyte (1024 bytes)
Kb Kilobit (1024 bits)
kb/s 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/s Megabytes per second
Mb Megabit (1,048,576 bits)
Mb/s Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
* This symbol is used to indicate third-party brands and names that are the property of their
A Conventional PCI bus add-in card connector
B S/PDIF audio header
C Conventional PCI bus add-in card connector
D Conventional PCI bus add-in card connector
E Conventional PCI bus add-in card connector
F Speaker
G PCI Express x1 connector
H PCI Express x16 connector
I Conventional PCI bus add-in card connector
J Battery
K Back panel connectors
L Front panel IEEE 1394a header
M Processor core power connector (2 x 2)
N Rear chassis fan header
O LGA775 processor socket
P Intel 82P43 MCH
Q Processor fan header
R DIMM Channel A sockets
S DIMM Channel B sockets
T BIOS setup configuration jumper block
U Front panel header
V Alternate front panel Power LED header
W Main power connector (2 x 12)
X Parallel ATA connector
Y Front chassis fan header
Z Standby power LED
AA Intel 82801JIR I/O Controller Hub (Intel ICH10R)
BB Auxiliary chassis fan header
CC Serial ATA connectors (5)
DD Front panel USB headers
EE Intel® High Definition Audio Link header
FF Chassis intrusion header
GG Serial port header
HH Front panel audio header
ion
14
1.1.3 Block Diagram
Figure 2 is a block diagram of the board’s major functional areas.
This board differs from other Intel® Desktop Board products, with specific changes
including (but not limited to) the following:
• No floppy drive connector
• No parallel port connector on the back panel
• No serial port connector on the back panel
1.3 Online Support
To find information about… Visit this World Wide Web site:
Intel Desktop Board DP43BF http://www.intel.com/products/motherboard/DP43BF/index.htm
Desktop Board Support http://www.intel.com/support/motherboards/desktop
Available configurations for the Intel
Desktop Board DP43BF
Supported processors http://processormatch.intel.com
Chipset information http://www.intel.com/products/desktop/chipsets/index.htm
BIOS and driver updates http://downloadcenter.intel.com
Tested memory http://www.intel.com/support/motherboards/desktop/sb/CS-
Integration information http://www.intel.com/support/go/buildit
The board is designed to support the following processors:
®
• Intel
• Intel
• Intel
• Intel
• Intel
Other processors may be supported in the future. This board is designed to support
processors with a maximum wattage of 95 W. The processors listed above are only
supported when falling within the wattage requirements of the board. See the Intel
web site listed below for the most up-to-date list of supported processors.
The board has four DIMM sockets and supports the following memory features:
• 1.8 V DDR3 800 MHz, DDR3 1066 MHz, and DDR3 1333 (OC) MHz SDRAM DIMMs
• Two independent memory channels with interleaved mode support
• Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMs with x16 organization are not supported.
•8 GB maximum total system memory (with 2 Gb memory technology). Refer to
Section 2.1.1 on page 39 for information on the total amount of addressable
memory.
• Minimum total system memory: 512 MB
• Non-ECC DIMMs
• Serial Presence Detect
NOTE
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data
structure. This allows the BIOS to read the SPD data and program the chipset to
accurately configure memory settings for optimum performance. If non-SPD memory
is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted or the DIMMs may not function under the
determined frequency.
Note: “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers to
single-sided memory modules (containing one row of SDRAM).
Configuration
(Note)
SDRAM
Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
18
Product Description
1.5.1 Memory Configurations
The Intel 82P43 MCH supports the following types of memory organization:
•Dual channel (Interleaved) mode. This mode offers the highest throughput for
real world applications. Dual channel mode is enabled when the installed memory
capacities of both DIMM channels are equal. Technology and device width can vary
from one channel to the other but the installed memory capacity for each channel
must be equal. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
•Single channel (Asymmetric) mode. This mode is equivalent to single channel
bandwidth operation for real world applications. This mode is used when only a
single DIMM is installed or the memory capacities are unequal. Technology and
device width can vary from one channel to the other. If different speed DIMMs are
used between channels, the slowest memory timing will be used.
•Flex mode. This mode provides the most flexible performance characteristics.
The bottommost DRAM memory (the memory that is lowest within the system
memory map) is mapped to dual channel operation; the topmost DRAM memory
(the memory that is nearest to the 8 GB address space limit), if any, is mapped to
single channel operation. Flex mode results in multiple zones of dual and single
channel operation across the whole of DRAM memory. To use flex mode, it is
necessary to populate both channels.
Figure 3 illustrates the memory channel and DIMM configuration.
Figure 3. Memory Channel and DIMM Configuration
20
Product Description
1.6 Intel
®
P43 Express Chipset
The Intel P43 Express chipset consists of the following devices:
•Intel 82P43 Memory Controller Hub (MCH) with Direct Media Interface (DMI)
interconnect
•Intel 82801JIR I/O Controller Hub (ICH10R)
The MCH component provides interfaces to the CPU, memory, PCI Express, and the
DMI interconnect. The ICH10R is a centralized controller for the board’s I/O paths.
The chipset supports the following features:
• USB
• Serial ATA
• Parallel ATA
For information about Refer to
The Intel P43 Express chipset http://www.intel.com/products/desktop/chipsets/index.htm
Resources used by the chipset Chapter 2
1.6.1.1 PCI Express x16 Graphics
The MCH also supports an add-in discrete graphics card through the PCI Express 2.0
graphics connector.
• PCI Express 2.0 x16:
⎯ Supports PCI Express GEN1 frequency of 1.25 GHz resulting in 2.5 Gb/s each
direction (500 MB/s total). Maximum theoretical bandwidth on interface of
4 GB/s in each direction simultaneously, for an aggregate of 8 GB/s when
operating in x16 mode.
⎯ Supports PCI Express GEN2 frequency of 2.5 GHz resulting in 5.0 Gb/s each
direction (1000 MB/s total). Maximum theoretical bandwidth on interface of
8 GB/s in each direction simultaneously, for an aggregate of 16 GB/s when
For information about Refer to
PCI Express technology http://www.pcisig.com
operating in x16 mode.
1.6.2 USB
The board supports up to twelve USB 2.0 ports, supports UHCI and EHCI, and uses
UHCI- and EHCI-compatible drivers.
The Intel ICH10R provides the USB controller for all ports. The port arrangement is as
follows:
• Six ports are implemented with stacked back panel connectors
• Six ports are routed to three separate front panel USB headers
For information about Refer to
The location of the USB connectors on the back panel Figure 9, page 43
The location of the front panel USB headers Figure 10, page 44
The board provides seven ATA interface connectors:
• One PATA connector that supports two devices
• Five SATA connectors that support one device per connector
• One eSATA connector
1.6.3.1 PATA Interface
The discrete PATA controller has one bus-mastering PATA interface that is accessible
through a 44-pin connector. The PATA interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to
16 MB/s.
•Ultra DMA: DMA protocol on ATA bus supporting host and target throttling and
transfer rates of up to 33 MB/s.
•ATA-66: DMA protocol on ATA bus supporting host and target throttling and
transfer rates of up to 66 MB/s. ATA-66 protocol is similar to Ultra DMA and is
device driver compatible.
•ATA-100: DMA protocol on ATA bus allows host and target throttling. The
controller’s ATA-100 logic can achieve read transfer rates up to 100 MB/s and write
transfer rates up to 88 MB/s.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce
reflections, noise, and inductive coupling.
The PATA interface also supports ATAPI devices (such as optical drives) and ATA
devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector
(ECHS) translation modes. The drive reports the transfer rate and translation mode to
the BIOS.
For information about Refer to
The location of the PATA connector Figure 10, page 44
22
Product Description
1.6.3.2 SATA Interfaces
The board provides six SATA connectors through the PCH, which support one device
per connector:
• Five internal SATA connectors (black)
• One eSATA connector (red) on the back panel for external connectivity
The Intel ICH10R SATA controller provides independent SATA ports with a theoretical
maximum transfer rate of 3 Gb/s per port. A point-to-point interface is used for host
to device connections.
For compatibility, the underlying SATA functionality is transparent to the operating
system. The SATA controller supports IDE and AHCI (Microsoft Windows Vista* only)
configuration and can operate in both legacy and native modes. In legacy mode,
standard ATA I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode,
standard Conventional PCI bus resource steering is used. Native mode is the
preferred mode for configurations using the Windows* XP and Windows Vista
operating systems.
For information about Refer to
Obtaining AHCI driver Section 1.3, page 16
The location of the SATA connectors Figure 10, page 44
1.6.3.2.1 Serial ATA RAID
The board supports the Intel® Matrix Storage Technology which provides the following
RAID (Redundant Array of Independent Drives) levels:
• RAID 0 - data striping
• RAID 1 - data mirroring
• RAID 0+1 (or RAID 10) - data striping and mirroring
• RAID 5 - distributed parity
1.6.3.2.2 Intel
®
Rapid Recover Technology
The board incorporates the Intel® Rapid Recover Technology (Intel® RRT). Intel®
Rapid Recover Technology is a feature of Intel
®
Matrix Storage Manager. It uses
RAID 1 (mirroring) functionality to copy data from a designated master drive to a
designated recovery drive. The master drive data can be copied to the recovery drive
either continuously or on request.
When using the continuous update policy, changes made to the data on the master
drive while the recovery drive is disconnected or offline are automatically copied to the
recovery drive when it is reconnected. When using the on request update policy, the
master drive data can be restored to a previous state by copying the data on the
recovery drive back to the master drive.
For information about Refer to
Intel® Matrix Storage and Intel® Rapid Recovery Technology http://www.intel.com/design/chipsets/
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When
the computer is not plugged into a wall socket, the battery has an estimated life of
three years. When the computer is plugged in, the standby current from the power
supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at
25 ºC with 3.3 VSB applied.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded
into CMOS RAM at power-on.
When the voltage drops below a certain level, the BIOS Setup program settings stored
in CMOS RAM (for example, the date and time) might not be accurate. Replace the
battery with an equivalent one. Figure 1 on page 13 shows the location of the battery.
1.8 Legacy I/O Controller
The Legacy I/O controller provides the following features:
• One serial port header
• PS/2-style keyboard/mouse interfaces
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• Intelligent power management, including a programmable wake-up event interface
• Conventional PCI bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.8.1 Serial Port
The board has one serial port header located on the component side of the board. The
serial port supports data transfers at speeds up to 115.2 kb/s with BIOS support.
For information about Refer to
The location of the serial port header Figure 10, page 44
The signal names of the serial port header Table 15, page 46
24
Product Description
1.9 Audio Subsystem
The audio subsystem consists of the following:
• Intel 82801JIR (Intel ICH10R)
• Realtek ALC888S-VC audio codec
The audio subsystem supports the following audio connectors and headers:
• S/PDIF header
• Front panel audio header with support for Intel
Audio) and AC ‘97 audio
•Back panel audio connectors
NOTE
Systems built with an AC ‘97 audio front panel will not be able to obtain the Microsoft
Windows Vista logo.
Table 5 lists the supported functions of the front panel and back panel audio jacks.
®
High Definition Audio (Intel® HD
Table 5. Audio Jack Retasking Support
Audio Jack
FP Green Default Ctrl panel
FP Pink Default
Rear Blue Ctrl panel Default Ctrl panel
Rear Green Ctrl panel Default
Rear Pink Default
Rear Black Default
Rear Orange Default
Audio software and drivers are available from Intel’s World Wide Web site.
For information about Refer to
Obtaining audio software and drivers Section 1.2, page 16
1.9.2 Audio Connectors and Headers
The board contains audio connectors on the back panel and audio headers on the
component side of the board. The front panel audio header provides mic in and line
out signals for the front panel. Microphone bias is supported for both the front and
back panel microphone connectors.
The front/back panel audio connectors and headers are configurable through the audio
device drivers. The available configurable back panel audio connectors are shown in
Figure 4.
Item Description
A Rear surround
B Center channel and LFE (subwoofer) audio out
C S/PDIF digital audio out (optical)
D Headphones/line in/side surround
E Mic in
F Headphones/front speaker
Figure 4. Back Panel Audio Connectors
For information about Refer to
The location of the front panel audio header Figure 10, page 44
The signal names of the front panel audio header Table 12, page 46