INFINEON SPP80N08S2L-07, SPB80N08S2L-07 User Manual
SPP80N08S2L-07
SPB80N08S2L-07
OptiMOS Power-Transistor
j
stg
Feature
• N-Channel
• Enhancement mode
• Logic Level
• 175°C operating temperature
• Avalanche rated
• dv/dt rated
Product Summary
V
DS
R
DS(on)
I
D
P- TO263 -3-2 P- TO220 -3-1
max. SMD version 6.8 mΩ
75 V
80 A
Type Package Ordering Code
SPP80N08S2L-07 P- TO220 -3-1 Q67060-S6015
SPB80N08S2L-07 P- TO263 -3-2 Q67060-S6016
Marking
2N08L07
2N08L07
Maximum Ratings, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Value Unit
Continuous drain current
TC=25°C
1)
I
D
80
A
80
Pulsed drain current
TC=25°C
Avalanche energy, single pulse
ID=80 A , VDD=25V, RGS=25Ω
Repetitive avalanche energy, limited by T
Reverse diode dv/dt
IS=80A, VDS=60V, di/dt=200A/µs, T
jmax
=175°C
jmax
I
D puls
E
AS
2)
E
AR
dv/dt 6 kV/µs
320
810 mJ
30
Gate source voltage V
Power dissipation
TC=25°C
Operating and storage temperature T
IEC climatic category; DIN IEC 68-1
Page 1
P
GS
tot
, T
±20
300 W
-55... +175
55/175/56
V
°C
2003-05-09
SPP80N08S2L-07
SPB80N08S2L-07
Thermal Characteristics
Parameter Symbol Values Unit
min. typ. max.
Characteristics
Thermal resistance, junction - case
Thermal resistance, junction - ambient, leaded
SMD version, device on PCB:
@ min. footprint
@ 6 cm2 cooling area
3)
R
R
R
thJC
thJA
thJA
- 0.3 0.5 K/W
- - 62
-
-
-
-
62
40
Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Values Unit
min. typ. max.
Static Characteristics
Drain-source breakdown voltage
VGS=0V, ID=1mA
Gate threshold voltage, VGS = V
ID=250µA
Zero gate voltage drain current
VDS=75V, VGS=0V, Tj=25°C
DS
V
(BR)DSS
V
GS(th)
I
DSS
75 - - V
1.2 1.6 2
-
0.01
1
µA
VDS=75V, VGS=0V, Tj=125°C
Gate-source leakage current
VGS=20V, VDS=0V
Drain-source on-state resistance
VGS=4.5V, ID=67A
VGS=4.5V, ID=67A, SMD version
Drain-source on-state resistance
VGS=10V, ID=67A
VGS=10V, ID=67A, SMD version
1
Current limited by bondwire ; with an R
information see app.-note ANPS071E available at www.infineon.com/optimos
2
Defined by design. Not subject to production test.
3
Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical without blown air.
4
Diagrams are related to straight lead versions
2)
I
GSS
R
DS(on)
4)
= 0.5K/W the chip is able to carry ID= 135A at 25°C, for detailed
thJC
R
DS(on)
-
1
100
- 1 100 nA
-
-
-
-
6.5
6.2
5.3
5
9
8.7
7.1
6.8
mΩ
Page 2
2003-05-09
SPP80N08S2L-07
SPB80N08S2L-07
Electrical Characteristics
Parameter Symbol Conditions Values Unit
min. typ. max.
Dynamic Characteristics
Transconductance g
Input capacitance C
Output capacitance C
Reverse transfer capacitance C
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
Gate Charge Characteristics
Gate to source charge Q
Gate to drain charge Q
Gate charge total Q
Gate plateau voltage V
fs
iss
oss
rss
d(on)
r
d(off)
f
gs
gd
g
(plateau)
VDS≥2*ID*R
ID=80A
VGS=0V, VDS=25V,
f=1MHz
DS(on)max
,
74 148 - S
- 5130 6820 pF
- 993 1320
- 415 620
VDD=40V, VGS=10V,
ID=80A,
RG=1.1Ω
- 25 38 ns
- 81 122
- 76 114
- 78 117
VDD=60V, ID=80A - 18 23 nC
- 66 83
VDD=60V, ID=80A,
VGS=0 to 10V
VDD=60V, ID=80A - 3.3 - V
- 186 233
Reverse Diode
Inverse diode continuous
I
forward current
Inv. diode direct current, pulsed
I
Inverse diode forward voltage V
Reverse recovery time t
Reverse recovery charge Q
S
SM
SD
rr
rr
TC=25°C - - 80 A
- - 320
VGS=0V, IF=80A - 0.9 1.3 V
VR=40V, I
diF/dt=100A/µs
Page 3
F=lS
,
- 81 100 ns
- 197 250 nC
2003-05-09
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