SPP21N50C3
SPI21N50C3, SPA21N50C3
Cool MOS™ Power Transistor
Feature
• New revolutionary high voltage technology
• Worldwide best R
DS(on
• Ultra low gate charge
• Periodic avalanche rated
• Extreme dv /dt rated
• Ultra low effective capacitances
• Improved transconductance
Type
SPP21N50C3
SPI21N50C3
in TO 220
Package
PG -TO220
PG -TO262
Ordering Code
Q67040-S4565
Q67040-S4564
VDS @ T
R
PG -TO220FP P G-TO262 PG-TO220
3
2
1
DS(on
I
D
max
560 V
0.19 Ω
21 A
Marking
21N50C3
21N50C3
SPA21N50C3
PG -TO220FP
Maximum Ratings
Parameter
Continuous drain current
T
= 25 °C
C
T
= 100 °C
C
Pulsed drain current, t p limited by T
Avalanche energy, single pulse
I
=10A, V
D
Avalanche energy, repetitive t
I
=21A, V
D
Avalanche current, repetitive t
DD
DD
=50V
=50V
limited by T
AR
limited by T
R
Gate source voltage
Gate source voltage AC (f >1Hz)
Power dissipation,
TC = 25°C
SP000216364
max
jmax
max
2)
21N50C3
Symbol
I
D
I
Dpuls
E
AS
E
AR
I
R
V
GS
V
GS
P
tot
SPP_I
21
13.1
63
690
1
21
±20
± 30
208
Value
SPA
21
13.1
63
690
1
21
±20
± 30
34.5
Unit
A
1)
1)
A
mJ
A
V
W
T
,
Operating and storage temperature
Reverse diode dv/dt
Rev. 3.0 P age 1
7)
T
st
dv/dt
-55...+150
1 5
°C
V/ns
2007 -08-30
Maximum Ratings
SPP21N50C3
SPI21N50C3, SPA21N50C3
Parameter
Drain Source voltage slope
V
= 400 V, I
DS
= 21 A, T
D
= 125 °C
j
Symbol Value Unit
dv /dt 50 V/ns
Thermal Characteristics
Parameter Symbol Values Unit
min. typ. max.
Thermal resistance, junction - case
R
Thermal resistance, junction - case, FullPAK R
Thermal resistance, junction - ambient, leaded
R
Thermal resistance, junction - ambient, FullPAK R
SMD version, device on PCB:
R
@ min. footprint
@ 6 cm
2
cooling area
Soldering temperature, wavesoldering
1.6 mm (0.063 in.) from case for 10s
3)
T
4)
thJC
thJC_FP
thJA
thJA_FP
thJA
sold
- - 0.6 K/W
- - 3.6
- - 62
- - 80
-
-
-
35
62
-
- - 260 °C
Electrical Characteristics, at T j=25°C unless otherwise specified
Parameter Symbol Conditions Values Unit
min. typ. max.
Drain-source breakdown voltage
Drain-Source avalanche
V
(BR)DSS
V
(BR)DS
V
=0V, I D=0.25mA 500 - - V
GS
V
=0V, I D=21A - 600 -
GS
breakdown voltage
Gate threshold voltage V
Zero gate voltage drain current I
Gate-source leakage current I
Drain-source on-state resistance R
Gate input resistance
R
GS(th
DSS
GSS
DS(on)
G
ID=1000µ A, VGS=V
VDS=500V, V
T
=25°C
j
T
=150°C
j
VGS=20V, V
V
=10V, I D=13.1A
GS
T
=25°C
j
T
=150°C
j
f =1MHz, open drain - 0.53 -
=0V,
GS
=0V - - 100 nA
DS
2.1 3 3.9
D
-
-
-
-
0.1
-
0.16
0.54
µA
1
100
Ω
0.19
-
Rev. 3.0 P age 2
2007 -08 -30
Electrical Characteristics
SPP21N50C3
SPI21N50C3, SPA21N50C3
Parameter
Symbol Conditions Values Unit
Transconductance g
Input capacitance C
Output capacitance C
Reverse transfer capacitance C
Effective output capacitance,
5)
C
energy related
Effective output capacitance,
6)
C
time related
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
fs
iss
oss
rss
o(er)
o(tr)
d(on)
r
d(off)
f
V
≥2*I D*R
DS
I
=13.1A
D
VGS=0V, V
f=1MHz
VGS=0V, V
VDD=380V, V
I
=21A,
D
R
=3.6Ω
G
DS
DS
min. typ. max.
DS(on)max
=25V,
,
- 18 - S
- 2400 - pF
- 1200 -
- 30 -
=400V - 87 -
- 181 -
=0/10V,
GS
- 10 - ns
- 5 -
- 67 -
- 4.5 -
Gate Charge Characteristics
Gate to source charge
Gate to drain charge Q
Gate charge total Q
Gate plateau voltage V
1
Limited only by maximum temperature
2
Repetitve avalanche causes additional power losses that can be calculated as P
3
Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical without blown air.
4
Soldering temperature for TO-263: 220°C, reflow
5
C
is a fixed capacitance that gives the same stored energy as C
o(er)
6
C
is a fixed capacitance that gives the same charging time as C
o(tr)
7
ISD<=I
Identical low-side and high-side switch.
, di/dt<=2 00A/us, V
D
DClink
Q
gs
gd
g
plateau
=400V, V
V
=380V, I D=21A - 10 - nC
DD
V
=380V, I D=21A,
DD
V
=0 to 10V
GS
V
=380V, I D=21A - 5 - V
DD
peak<VBR, DSS
, Tj<T
j,max.
oss
while V
oss
while V
- 50 -
- 95 -
=E AR*f .
AV
is rising from 0 to 80% V
DS
is rising from 0 to 80% V
DS
DSS
DSS
.
.
Rev. 3.0 Page 3
2007 -08 -30
Electrical Characteristics
SPP21N50C3
SPI21N50C3, SPA21N50C3
Parameter
Symbol Conditions Values Unit
min. typ. max.
T
Inverse diode continuous
I
S
=25°C - - 21 A
C
forward current
Inverse diode direct current,
I
SM
- - 63
pulsed
Inverse diode forward voltage V
Reverse recovery time t
Reverse recovery charge Q
Peak reverse recovery current I
Peak rate of fall of reverse
dirr/dt
SD
rr
rr
rrm
=0V, I F=I
GS
V
=380V, I F=I S ,
R
di
/dt=100A/µs
F
T
=25°C - 1200 - A/µs
j
S
- 1 1.2 V
- 450 ns
- 9 - µC
- 60 - A
V
recovery current
Typical Transient Thermal Characteristics
Symbol Value Unit Symbol Value Unit
SPP_I SPP_I
SPA SPA
R
R
R
R
R
R
th1
th2
th3
th4
th5
th6
0.00769 0.00769 K/W C
0.015 0.015 C
0.029 0.029 C
0.114 0.16 C
0.136 0.319 C
0.059 2.523 C
T
R
j T
th1
P
(t)
tot
C
th1
C
th2
R
C
th,n
th,n
th1
th2
th3
th4
th5
th6
0.0003763 0.0003763 Ws/K
0.001411 0.001411
0.001931 0.001931
0.005297 0.005297
0.012 0.008659
0.091 0.412
External Heatsink
T
case
amb
Rev. 3.0 P age 4
2007 -08 -30
SPP21N50C3
SPI21N50C3, SPA21N50C3
1 Power dissipation
P
= f (T
tot
tot
P
240
W
200
180
160
140
120
100
80
60
40
20
)
C
SPP21N50C3
0
0 20 40 60 80 100 120
°C
2 Power dissipation FullPAK
P
= f (T
tot
35
W
25
tot
P
20
15
10
160
T
C
)
C
5
0
0 20 40 60 80 100 120
°C
160
T
C
3 Safe operating area
= f ( VDS )
I
D
parameter : D = 0 , T
2
10
A
1
10
D
I
0
10
tp = 0.001 ms
tp = 0.01 ms
tp = 0.1 ms
-1
-2
10
tp = 1 ms
tp = 10 ms
DC
0
10
10
10
C
1
=25°C
10
4 Safe operating area FullPAK
= f (V
I
D
parameter: D = 0, T
10
A
10
D
I
10
10
2
V
3
10
V
DS
10
DS
2
1
0
-1
-2
0
10
)
tp = 0.001 ms
tp = 0.01 ms
tp = 0.1 ms
tp = 1 ms
tp = 10 ms
DC
10
= 25°C
C
1
10
2
V
3
10
V
DS
Rev. 3.0 P age 5
2007 -08 -30
SPP21N50C3
SPI21N50C3, SPA21N50C3
5 Transient thermal impedance
Z
= f (t p)
thJC
parameter: D = t
0
10
K/W
-1
10
thJC
Z
-2
10
-3
10
-4
10
10-710-610-510-410-310
/T
p
D = 0.5
D = 0.2
D = 0.1
D = 0.05
D = 0.02
D = 0.01
single pulse
6 Transient thermal impedance FullPAK
Z
= f (t
thJC
parameter: D = t
10
K/W
10
thJC
Z
10
10
-2
s
0
10
t
p
10
)
p
/t
p
1
0
-1
-2
-3
10-610-510-410-310-210
D = 0.5
D = 0.2
D = 0.1
D = 0.05
D = 0.02
D = 0.01
single pulse
-1
s
t
p
10
1
7 Typ. output characteristic
= f (V DS); T
I
D
parameter: t
70
A
50
D
I
40
30
20
10
0
0 5 10 15
=25°C
j
= 10 µs, V
p
Vgs = 20V
Vgs = 7V
Vgs = 6.5V
GS
Vgs = 6V
Vgs = 5.5V
Vgs = 5V
Vgs = 4.5V
Vgs = 4V
V
V
DS
25
8 Typ. output characteristic
= f (V DS); T
I
D
parameter: t
40
A
30
D
25
I
20
15
10
5
0
0 5 10 15
=150°C
j
= 10 µs, V
p
Vgs = 20V
Vgs = 7V
Vgs = 6V
Vgs = 5.5V
GS
Vgs = 5V
Vgs = 4.5V
Vgs = 4V
V
V
25
DS
Rev. 3.0 P age 6
2007 -08 -30
SPP21N50C3
SPI21N50C3, SPA21N50C3
9 Typ. drain-source on resistance
R
DS(on)
parameter: T
R
=f (I
)
D
=150°C, V
j
1.5
Ω
DS(on)
0.9
0.6
0.3
0 5 10 15 20 25 30
GS
Vgs = 4V
Vgs = 4.5V
Vgs = 5V
Vgs = 5.5V
Vgs = 6V
Vgs = 20V
A
10 Drain-source on-state resistance
R
DS(on)
parameter : I
R
40
I
D
= f (T j)
= 13.1 A, V
D
SPP21N50C3
1.1
Ω
0.9
0.8
DS(on)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-60 -20 20 60 100
98%
typ
= 10 V
GS
°C
180
T
j
11 Typ. transfer characteristics
= f ( VGS ); VDS≥ 2 x I D x R
I
D
DS(on)max
parameter: t p = 10 µs
70
A
Tj = 25°C
50
D
I
40
30
20
10
0
0 2 4 6
Tj = 150°C
V
12 Typ. gate charge
= f (Q
V
GS
parameter: I
SPP21N50C3
16
V
12
GS
10
V
8
6
4
2
10
V
GS
0
0 20 40 60 80 100
)
Gate
= 21 A pulsed
D
0,2
V
DS max
0,8 V
DS max
nC
Q
140
Gate
Rev. 3.0 P age 7
2007 -08 -30
SPP21N50C3
SPI21N50C3, SPA21N50C3
13 Forward characteristics of body diode
I
= f (VSD)
F
parameter: T
2
SPP21N50C3
10
A
1
10
F
I
0
10
-1
10
0 0.4 0.8 1.2 1.6 2 2.4
, tp = 10 µs
Tj = 25 °C typ
Tj = 150 °C typ
Tj = 25 °C (98%)
Tj = 150 °C (98%)
3
V
V
SD
14 Avalanche SOA
I
= f (t AR)
AR
par.: T
I
≤ 150 °C
j
20
A
AR
10
5
0
10-310-210-110010110
Tj(Start)=125°C
Tj(Start)=25°C
2
µs
t
AR
10
4
15 Avalanche energy
= f (T
E
AS
par.: I
mJ
AS
E
750
600
550
500
450
400
350
300
250
200
150
100
)
j
= 10 A, V
D
50
0
20 40 60 80 100 120
= 50 V
DD
°C
16 Drain-source breakdown voltage
V
(BR)DSS
(BR)DSS
V
160
T
j
= f (T
SPP21N50C3
600
V
570
560
550
540
530
520
510
500
490
480
470
460
450
-60 -20 20 60 100
)
j
°C
180
T
j
Rev. 3.0 P age 8
2007 -08 -30
SPP21N50C3
SPI21N50C3, SPA21N50C3
17 Avalanche power losses
P
= f (f )
AR
parameter: E
500
W
AR
P
300
200
100
0
4
10
AR
=1mJ
10
5
Hz
18 Typ. capacitances
C = f (V
parameter: V
10
pF
10
10
C
10
10
6
10
f
10
)
DS
=0V, f =1 MHz
GS
5
4
Ciss
3
2
1
0
0 100 200 300
Crss
Coss
V
500
V
DS
19 Typ. C
=f (V
E
oss
10
µJ
oss
E
6
4
2
0
0 50 100 150 200 250 300 350 400
stored energy
oss
)
DS
V
500
V
DS
Rev. 3.0 P age 9
2007 -08 -30
Definition of diodes switching characteristics
SPP21N50C3
SPI21N50C3, SPA21N50C3
Rev. 3.0 P age 10
2007 -08 -30
PG -TO220-3-1, PG-TO220-3-21
SPP21 N5 0C3
SPI21 N5 0C3, SPA21 N5 0C3
Rev. 3.0 P age 11
2007 -08 -30
SPP21 N5 0C3
SPI21 N5 0C3, SPA21 N5 0C3
PG -TO220-3-3 1/-3-111:Outline/Fully isolated package (2500VAC; 1 minute)
Rev. 3.0 P age 12
2007 -08 -30
PG -TO26 2-3-1, PG-TO262-3-21 (I²-PAK)
SPP21 N5 0C3
SPI21 N5 0C3, SPA21 N5 0C3
Rev. 3.0 P age 13
2007 -08 -30
SPP21N50C3
SPI21N50C3, SPA21N50C3
Published by
Infineon Technologies AG,
Bereichs Kommunikation
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Reprensatives worldwide (see address list).
Warnings
Due to technical requirements components may contain dangerous substances.
For information on the types in question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express
written approval of Infineon Technologies, if a failure of such components can reasonably be expected to
cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device
or system Life support devices or systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health
of the user or other persons may be endangered.
Rev. 3.0 P age 14
2007 -08 -30