MK2011
ICRO
C
LOCK
Description
The MK2011 is the ideal way to generate clocks
for Fast Ethernet cards or systems. It provides
20MHz, 25MHz, and 50MHz clocks. In an 8 pin
SOIC, the MK2011 can save component count,
board space, and cost over surface mount crystals
and oscillators, and increase reliability by
eliminating two or three mechanical devices from
the board.
MicroClock offers many other clocks for
computers and computer peripherals. Consult
MicroClock when you need to remove crystals and
oscillators from your board.
Fast Ethernet Clock Source
Features
• Packaged in 8 pin SOIC
• Input crystal or clock frequency of 20.00 MHz
• Lowest jitter in the industry reliably clocks
sensitive Ethernet devices.
• Output clock frequencies of 20.00 MHz,
25.00 MHz, and 50.00 MHz
• 25mA drive capability at TTL levels
• 3.3V or 5V±10% supply voltage
• Advanced, low power CMOS process
• Insensitive to input clock duty cycle
Block Diagram
VDD GND
Output
PLL
20.00 MHz
xtal or clock
X1
Crystal
Oscillator
X2
MDS 2011 B 1 Revision 120597 Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
Clock Synthesis
Circuitry
Buffer
Output
Buffer
Output
Buffer
50 MHz
25 MHz
20 MHz
MK2011
Pin Assignment
X1/ICLK
VDD
GND
25M
1 8
2
3
4
ICRO
8 pin SOIC
C
LOCK
7
6
5
Suggested Layout
X2
20M
GND
50M
V
0.1µF
G
33Ω (optional)
Fast Ethernet Clock Source
20.00 MHz in
(crystal caps not
shown)
Pin 1
2
3
4
8
7
33Ω (optional)
6
5
33Ω (optional)
20MHz
out
25MHz out 50MHz out
Pin Descriptions
Number Name Type Description
1 X1/ICLK I Crystal Connection. Connect to a 20.000 MHz crystal or clock.
2 VDD P Connect to +5V.
3 GND P Connect to ground.
4 25M O 25.000 MHz clock output.
5 50M O 50.000 MHz clock output.
6 GND P Connect to ground.
7 20M O 20.000 MHz buffered crystal clock output.
8 X2 O Crystal Connection to a 20.000 MHz crystal, or leave unconnected for clock input.
Key: I = Input, O = output, P = power supply connection
External Components/Crystal Selection
A minimum number of external components are required for proper oscillation. For a crystal input, one
22pF load capacitor should be connected to each of the X1 and X2 pins and ground, and a parallel
resonant 20.000 MHz, 16pF load, crystal is recommended. The frequency tolerance of the crystal should
be 50ppm or better. For a clock input, connect to X1 and leave X2 unconnected. A decoupling capacitor of
0.1µF should be connected between VDD and GND on pins 2 and 3, and 33Ω terminating resistors
should be used on clock outputs with traces longer than 1 inch.
MDS 2011 B 2 Revision 120597 Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MK2011
ABSOLUTE MAXIMUM RATINGS (note 1)
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
ICRO
C
LOCK
Fast Ethernet Clock Source
Electrical Specifications
Parameter Conditions Minimum Typical Maximum Units
Supply Voltage, VDD Referenced to GND 7 V
Inputs Referenced to GND -0.5 VDD+.5V V
Clock Outputs Referenced to GND -0.5 VDD+.5V V
Ambient Operating Temperature 0 70 °C
Soldering Temperature Max of 20 seconds 260 °C
Storage temperature -65 150 °C
Operating Voltage, VDD 4.5 5.5 V
Input High Voltage, VIH, input clock only Clock input 3.5 2.5 V
Input Low Voltage, VIL, input clock only Clock input 2.5 1.5 V
Output High Voltage, VOH IOH=-4mA VDD-0.4 V
Output High Voltage, VOH IOH=-25mA 2.4 V
Output Low Voltage, VOL IOL=25mA 0.4 V
Operating Supply Current, IDD, 5V No Load 19 mA
Operating Supply Current, IDD, 3.3V No Load 10 mA
Input Capacitance 7 pF
Actual Mean Frequency versus Target With exact crystal 0 ppm
AC CHARACTERISTICS
Input Clock or Crystal Frequency 20.0000 MHz
Input Crystal Accuracy 50 ppm
Input Clock Duty Cycle, 20.000MHz Time above 2.5V 20 80 %
Output Clock Rise Time 0.8 to 2.0V 1.5 ns
Output Clock Fall Time 2.0 to 0.8V 1.5 ns
Output Clock Duty Cycle Time above 1.5V 45 50 55 %
Absolute Clock Period Jitter, 20 MHz output -400 250 400 ps
Absolute Clock Period Jitter, 50, 25 MHz clocks -300 150 300 ps
One Sigma Clock Period Jitter All outputs 70 ps
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. Typical values are at 25°C.
MDS 2011 B 3 Revision 120597 Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
MK2011
Inches
Millimeters
ICRO
C
LOCK
Package Outline and Package Dimensions
8 pin SOIC
E H
Pin 1
h x 45°
c
Q
D
e
b
Fast Ethernet Clock Source
Symbol Min Max Min Max
A 0.055 0.068 1.397 1.7272
b 0.013 0.019 0.330 0.483
D 0.185 0.200 4.699 5.080
E 0.150 0.160 3.810 4.064
H 0.225 0.245 5.715 6.223
e
h 0.015 0.381
Q 0.004 0.01 0.102 0.254
A
Ordering Information
While the information presented herein has been checked for both accuracy and reliability, MicroClock Incorporated assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by MicroClock. MicroClock reserves the right to change any circuitry or specifications without notice. MicroClock does not
authorize or warrant any MicroClock product for use in life support devices or critical medical instruments.
MDS 2011 B 4 Revision 120597 Printed 11/15/00
MicroClock Division of ICS•1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
Part/Order Number Marking Package Temperature
MK2011S MK2011S 8 pin SOIC 0-70°C
MK2011STR MK2011S Add tape and reel 0-70°C
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