bandwidth PLL timing channel. A 16.666MHz crystal is used
as the input to the on-chip oscillator. The M is configured to
produce a fixed output frequency of 200MHz.
Programmable features of the ICS8431-01 support four
operational modes. The four modes are spread spectrum
clocking (SSC), non-spread spectrum clock and two test
modes which are controlled by the SSC_CTL[1:0] pins. Unlike other synthesizers, the ICS8431-01 can immediately
change spread-spectrum operation without having to reset
the device.
In SSC mode, the output clock is modulated in order to
achieve a reduction in EMI. In one of the PLL bypass test
modes, the PLL is disconnected as the source to the
differential output allowing an external source to be
connnected to the TEST_I/O pin. This is useful for incircuit testing and allows the differential output to be driven
at a lower frequency throughout the system clock tree. In the
other PLL bypass mode, the oscillator divider is used as the
source to both the M and the Fout divide by 2. This is useful
for characterizing the oscillator and internal dividers.
The ICS8431-01 is a general purpose clock
frequency synthesizer for IA64/32 application and
a member of the HiPerClockS™ family of High
Performance Clock Solutions from ICS. The
ICS8431-01 consists of one independent low
FEATURES
• Fully integrated PLL
• Differential 3.3V L VPECL output
• 200MHz output frequency
• 48% to 52% duty cycle
• Crystal oscillator interface
• Spread Spectrum Clocking (SSC) fixed at 1/2% modulation
for environments requiring ultra low EMI. T ypical10dB EMI
reduction can be achieved with spread spectrum modulation
• LVTTL / L VCMOS control inputs
• PLL bypass modes supporting in-circuit testing and on-chip
functional block characterization
• 28 lead SOIC
• RMS cycle-to-cycle jitter of 2ps
• Typical cycle-to-cycle jitter of 18ps
• 0° to 85°C ambiant operating temperature
BLOCK DIAGRAMPIN ASSIGNMENT
nc
XTAL1
XTAL2
SSC_CTL0
SSC_CTL1
ICS8431CM-01www.icst.com/products/hiperclocks.htmlREV. A JUNE 5, 2001
OSC
÷ 16
PHASE
DETECTOR
÷ M
SSC
Control
Logic
PLL
VCO
÷ 2
FOUT
nFOUT
TEST_I/O
1
SSC_CTL0
SSC_CTL1
TEST_I/O
1
nc
2
nc
3
nc
4
nc
5
nc
6
nc
7
nc
8
nc
9
10
11
VEE
12
13
VDD
14
ICS8431-01
28-Lead SOIC
M Package
Top View
28
27
26
25
24
23
22
21
20
19
18
17
16
15
nc
VDDI
XTAL2
XTAL1
nc
nc
VDDA
VEE
RESERVED
nc
VDDO
FOUT
nFOUT
VEE
ICS8431CM-01www.icst.com/products/hiperclocks.htmlREV. A JUNE 5, 2001
2
Integrated
Circuit
Systems, Inc.
ICS8431-01
200MHZ, LOW JITTER,
L VPECL FREQUENCY SYNTHESIZER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage 4.6V
Inputs-0.5V to VDD + 0.5V
Outputs-0.5V to VDDO + 0.5V
Ambient Operating T emperature 0°C to 85°C
Storage T emperature-65°C to 150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only and functional operation of product at these condition or any conditions beyond those listed in
DC Characteristics
the
periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = VDDI = VDDO = 3.3V±5%, TA = 0°C TO 85°C