Icom id5100e, id5100a User Manual
DUAL BAND TRANSCEIVER
S-15103XZ-C1
June 2014
INTRODUCTION CAUTION
This service manual describes the latest technical information for the ID-5100A and ID-5100E
DUAL BAND TRANSCEIVER, at
the time of publication.
MODEL VERSION
TPE 25 W
ID-5100A
ID-5100E
USA
KOR
EXP
EUR
ITR
TX OUTPUT
POWER
50 W
NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than the specifi ed voltage. This
will ruin the transceiver.
DO NOT expose the transceiver to rain, snow or liquids.
DO NOT reverse the polarities of the power supply when con-
necting the transceiver.
DO NOT apply an RF signal of more than 20 dBm (100 mW) to
the antenna connector. This could damage the transceiver’s
front-end.
To upgrade quality, any electrical or mechanical parts
and internal circuits are subject to change without notice
or obligation.
ORDERING PARTS
Be sure to include the following four points when ordering
replacement parts:
1. 10-digit Icom part number
2. Component name
3. Equipment model name and unit name
4. Quantity required
<ORDER EXAMPLE>
1110003491 S.IC TA31136FNG ID-5100A MAIN UNIT 5 pieces
8820001210 Screw 2438 screw ID-5100A Top cover 10 pieces
Addresses are provided on the inside back cover for your
convenience.
(ID-5100A)
REPAIR NOTES
1. Make sure that the problem is internal before dis-assembling the transceiver.
2. DO NOT open the transceiver until the transceiver is dis-
connected from its power source.
3. DO NOT force any of the variable components. Turn them
slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An insulated
tuning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the trans-
ceiver is defective.
6. DO NOT transmit power into a Standard Signal Generator
or a Sweep Generator, otherwise the RF power may damage them.
7. ALWAYS connect a 50 dB to 60 dB attenuator between the
transceiver and a Deviation Meter or Spectrum Analyzer,
when using such test equipment.
8. READ the instructions of the test equipment thoroughly
before connecting it to the transceiver.
Icom, Icom Inc. and the Icom logo are registered trademarks of Icom Incorporated (Japan) in Japan, the United States, the
United Kingdom, Germany, France, Spain, Russia and/or other countries.
TABLE OF CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEWS
SECTION 3 DISASSEMBLY INSTRUCTION
SECTION 4 CIRCUIT DESCRIPITON
4-1 RECEIVER CIRCUITS ...................................................................................... 4-1
4-2 TRANSMITTER CIRCUITS ............................................................................... 4-3
4-3 FREQUENCY SYNTHESIZER CIRCUITS ....................................................... 4-5
4-4 VOLTAGE BLOCK DIAGRAM ........................................................................... 4-6
4-5 PORT ALLOCATIONS ...................................................................................... 4-6
SECTION 5 ADJUSTMENT PROCEDURES
5-1 PREPARATION ................................................................................................. 5-1
5-2 FREQUENCY ADJUSTMENT .......................................................................... 5-2
5-3 TRANSMIT ADJUSTMENTS ............................................................................ 5-3
5-4 RECEIVE ADJUSTMENTS ............................................................................... 5-5
SECTION 6 PARTS LIST
SECTION 7 MECHANICAL PARTS
SECTION 8 BOARD LAYOUTS
SECTION 9 BLOCK DIAGRAM
SECTION 10 VOLTAGE DIAGRAM
SECTION 1. SPECIFICATIONS
General
■
• Frequency coverage:
EUR
ITR
TPE
USA
KOR
EXP
RX 118–174 MHz*
TX 144–146 MHz, 430–440 MHz
RX 118–136.99166 MHz*
TX 144–146 MHz, 430–434 MHz, 435–438 MHz
RX 144–146 MHz, 430–432 MHz
TX 144–146 MHz, 430–432 MHz
RX 118–174 MHz*
TX 144–148 MHz, 430–450 MHz*
RX 144–146 MHz, 430–440 MHz
TX 144–146 MHz, 430–440 MHz
RX 118–174 MHz*
TX 137–174 MHz*4, 400–470 MHz*
1
, 375–550 MHz*
3
, 144–146 MHz, 430–434 MHz, 435–438 MHz
4
, 375–550 MHz*
4
, 375–550 MHz*
2
5
5
2
2
*1 Guaranteed only 144–146 MHz, *2 Guaranteed only 430–440 MHz,
*4 Guaranteed only 144–148 MHz, *5 Guaranteed only 440–450 MHz
*3 Not guaranteed,
• Mode: F2D/F3E (FM/FM-N), F7W (DV), A3E (AM/AM-N) RX only
• Number of memory channels: 1000 channels
• Number of program scan channels: 25 channels
(2 edge frequencies in each channel)
• Number of call channels: 4 channels (2 channels × 2 bands)
• Antenna connector: SO-239
• Antenna impedance: 50 ø
• Usable temperature range: –10˚C to +60˚C; +14˚F to +140˚F
• Frequency stability: ±2.5 ppm (–10˚C to +60˚C; +14˚F to +140˚F)
•
Digital transmission speed
: 4.8 kbps
• Voice coding speed: 2.4 kbps
• Frequency resolution: 5 kHz, 6.25 kHz, 8.33 kHz, 10 kHz, 12.5 kHz, 15 kHz, 20 kHz, 25 kHz, 30 kHz, 50 kHz
(The 8.33 kHz step is selectable only when the VHF air band is selected.)
• Power supply: 13.8 V DC ±15% (negative ground)
• Current drain:
Transmit
Maximum current drain: 10.5 A (TPE version)
13.0 A (Other versions)
Receive
Standby: 1.2 A
Maximum audio: 1.8 A
• Dimensions (projections not included):
Main unit: 150(W) 40(H) 172.6(D) mm; 5.9(W) 1.6(H) 6.8(D) inch
Controller:
182.2(W) 24.8(H) 81.5(D) mm;
7.2(W) 1.0(H) 3.2(D) inch
• Weight (approximately):
Main unit: 1.3 kg; 2.9 lb
Controller: 260 g; 9.2 oz
1-1
Transmitter
■
• Modulation system:
FM/FM-N Variable reactance frequency modulation
DV GMSK reactance frequency modulation
• Maximum Deviation:
FM ±5.0 kHz
FM-N ±2.5 kHz
• Microphone impedance: 600 ø
• Spurious emission: –60 dBc
• Output power: High 25 W, Mid 15 W, Low 5 W (TPE version)
High 50 W, Mid 15 W, Low 5 W (Other versions)
Receiver
■
• Receive system: Double superheterodyne system
• IF frequencies:
Band A 1st IF 38.85 MHz
2nd IF 450 kHz
Band B 1st IF 46.35 MHz
2nd IF 450 kHz
• Sensitivity (except spurious points)
Amateur bands
FM/FM-N (12 dB SINAD)
0.18 µV
DV (BER 1%) 0.28 µV
Except Amateur bands
FM/FM-N (12 dB SINAD)
0.32 µV (137.000 to 159.995 MHz)
0.56 µV (160.000 to 174.000 MHz)
0.56 µV (375.000 to 399.995 MHz)
0.32 µV (400.000 to 499.995 MHz)
0.56 µV (500.000 to 550.000 MHz)
AM (10 dB S/N) 1 µV (118.000 to 136.99166 MHz)
• Squelch sensitivity: 0.13 µV (Threshold)
• Selectivity:
FM 60 dB
FM-N 55 dB
DV 50 dB
• Spurious and image rejection ratio:
60 dB
55 dB (A band UHF)
• AF output power: 2.0 W (at 10% distortion with an 8 ø load)
• AF output impedance: 8 ø
All stated specifi cations are typical and subject to change without notice or obligation.
1-2
SECTION 2. INSIDE VIEWS
IC7
IC8
Q3
Q6
IC2
IC5
IC6
X1
• CONTROL UNIT
(TOP VIEW)
3.3 V REGULATOR
(IC6)
IC6
IC5
IC2
X1
RESET IC
(IC5)
C80
CPU CLOCK
(X1)
• CONTROL UNIT
(BOTTOM VIEW)
3.3 V REGULATOR
(IC7)
CONTROLLER CPU
(IC2)
Q6
IC7
Q3
TOUCH SCREEN CONTROLLER
(IC8)
IC8
2-1
FI104
FI105
IC1
IC3
IC4
IC100
IC101
IC102
IC103
IC104
IC107
IC108
IC109
IC110
IC111
IC112
IC113
IC117
IC120
IC121
IC122
IC123
IC124
IC125
IC202
IC203
IC205
IC207
IC208
IC301
IC302
IC307
IC308
IC312
IC314
IC315
IC316
IC317
IC318
IC319
IC320
IC323
IC324
IC400
IC403
IC404
IC405
IC406
IC407
X301
X400
D/A CONVERTER
(IC1)
1ST MIXER
(Band A)
1ST MIXER
(Band B)
LO AMP & LO SW
(Band B)
1ST IF FILTER (Band B)
(FI104)
1ST IF FILTER (Band A)
(FI105)
LO AMP & LO SW
(Band A)
IF IC (Band B)
(IC120)
VCO
(Band B)
EXPANDER
(IC317)
EXPANDER
(IC316)
EXPANDER
(IC315)
• MAIN UNIT
(TOP VIEW)
IC124
FI104
IC120
IC122
IC208
IC4
IC317
IC316
IC315
IC207
AF SW
(IC205)
IC125
FI105
IC121
IC205
IC123
IF IC (Band A)
(IC121)
IC1
IC203
IC3
IC100
AF SW
(IC100)
VCO
(Band A)
IC202
IC102
IC101
IC104
AF SW
(IC104)
IC318
IC111
X301
IC302
IC407
IC406
IC117
IC112
RS232 LEVEL CONVERTER
(IC318)
AF SW
IC324
IC320
(IC111)
AF SW
IC110
IC323
IC314
IC109
IC107
IC319
IC108
IC312
(IC109)
RTC BACKUP BATTERY
(IC301)
REAL TIME CLOCK (RTC) IC
(IC302)
AF LPF & HPF
(IC407)
DSP CLOCK
(X400)
IC301
X400
IC405
IC403
IC308
IC400
IC404
AF LPF & HPF
IC113
(IC406)
AF SW
(IC113)
IC307
AF BUFFER
(IC117)
IC103
AUDIO SIGNAL PROCESSOR
(IC103)
VOLTAGE DETECTOR
(IC324)
ELECTRIC VOLUME IC
(IC110)
5 V REGULATOR
(IC319)
EEPROM
(IC301)
DSP
(IC400)
2-2
8 V REGULATOR
(IC313)
• MAIN UNIT
(BOTTOM VIEW)
CURRENT DETECTOR
(IC310)
APC AMP
(IC2)
8 V REGULATOR
AF POWER AMP
AF POWER AMP
6 V SWITCHING REGULATOR
3.3 V REGULATOR
LINER CODEC
(IC402)
3.3 V REGULATOR
3.3 V REGULATOR
(IC321)
(IC106)
(IC105)
(IC309)
(IC311)
MAIN CPU CLOCK
MAIN CPU
(IC300)
DSP FLASH ROM
SUB CPU CLOCK
SUB CPU
(IC303)
(IC306)
(IC305)
QUAD BUS BUFFER
REFERENCE FREQUENCY OSCILLATOR (Band A)
SRAM
(IC304)
(X300)
(IC401)
(X302)
(IC200)
PLL IC (Band A)
(IC201)
(X200)
2ND IF FILTER (Band A)
(FI102)
PLL IC (Band B)
(IC206)
DISCRIMINATOR (Band A)
(X101)
2ND IF FILTER (Band A)
(FI101)
2ND IF FILTER (Band A)
(FI100)
REFERENCE FREQUENCY
OSCILLATOR (Band B)
(X201)
AF SW
(IC119)
DISCRIMINATOR (Band A)
(X102)
2ND IF FILTER (Band A)
(FI103)
2-3
SECTION 3. DISASSEMBLY INSTRUCTION
M
Removing the CONTROL UNIT from the controller.
1) Remove two dials and four knobs from the front
panel.
Knob
3) Take off the rear panel carefully in the direction of
the arrow, and then disconnect the fl at cable.
BE CAREFUL when you disassemble the rear panel from
the CONTROL UNIT. Otherwise the flat cable and the
connector may be cut.
Rear panel
Dial
Knob
Dial
2) Remove four screws from the rear panel.
Four screws
CONTROL UNIT
FLAT CABLE
BE CAREFUL about the locks.
Release the locks
Flat cable
flat cable
Pull straight
Flat cable
4) Disconnect two fl at cables.
5) Remove four screws from the CONTROL UNIT.
6) Remove the CONTROL UNIT from the front panel.
(Continued on the right above.)
FRONT PANEL
BE CAREFUL about the locks.
Release the locks
Flat cable
flat cable
3-1
Four screws
CONTROL UNIT
FLAT CABLE
Pull straight
Flat cable
M Removing the MAIN UNIT from the chassis.
Before disassembling:
REMOVE the SD card if inserted. Otherwise the MAIN
UNIT and chassis cannot be separated.
1) Remove eight screws from the top cover.
Eight screws
Bottom cover
4) Remove total of 14 screws from the MAIN UNIT.
14 screws
2) Remove the clip and disconnect the speaker cable.
SPEAKER
CABLE
Clip
Speaker
3) Remove eight screws from the bottom cover.
Eight screws
Bottom cover
5) Disconnect the cooling fan cable, and unsolder fi ve
points (at the antenna connector and the DC cable).
UNSOLDER
Solder
remover
FAN
CABLE
6) Remove the MAIN UNIT from the chassis in the direction of the arrow.
MAIN UNIT
(Continued on the right above.)
3-2
SECTION 4. CIRCUIT DESCRIPTION
4-1 RECEIVE CIRCUITS
RF CIRCUITS (MAIN UNIT)
VHF BAND (108–174 MHz)
The RF signal from the antenna is passed through two LPFs
(L90, L94, L96, C409, C418 and L79, L83, L87, C378, C386,
C394), ANT SW (D66, D69, D70 and D77), and then applied
to the RF AMP (Q24).
• Band A
The amplifi ed signal is passed through the ATT (D34), BPF
(D28, D88, L24, L26, L31 L34, C127 and C128), and then
applied to another RF AMP (Q20).
The amplifi ed signal is applied to the 1st IF circuit, through
the BPF (D20, D87, L10, L18, C71 and C74) and RX circuit
SW (D14).
• Band B
The amplifi ed signal is passed through the ATT (D33), BPF
(D27, D85, L23, L25, L32, L33, C125 and C126), and then
applied to another RF AMP (Q19).
The amplifi ed signal is applied to the 1st IF circuit, through
the BPF (D19, D86, L9, L17, C69 and C70) and RX circuit
SW (D13).
UHF BAND (380–479 MHz)
The RF signal from the antenna is passed through the LPF
(L90, L94, L96, C409 and C418) and HPF (L84, L88, C391,
C395 and C402) and ANT SW (D68, D73, D75 and D84), and
then applied to the RF AMP (Q23).
• Band A
The amplifi ed signal is passed through the ATT (D32), BPF
(D24, D26, L21, L28, C113 and C114), and then applied to
the RF AMP (Q18).
The amplifi ed signal is applied to the 1st IF circuit, through
the BPF (D12, D16, L4, L12, C42 and C43) and RX circuit
SW (D8).
• Band B
The amplifi ed signal is passed through the ATT (D31), BPF
(D23, D25, L22, L27, C107, C111, C112 and C121), and then
applied to the RF AMP (Q17).
The amplifi ed signal is applied to the 1st IF circuit, through
the BPF (D11, D15, L3, L11, C36, C40, C41 and C49) and
RX circuit SW (D7).
• RF CIRCUITS
1st IF
circuit
D84
D68/D73/D75
LIMITER
118-174MHz
375-550MHz
TX/RX
SW
D66/D69/
D70/D77
TX/RX
SW
400-470MHz
137-174MHz
VHF BAND
D34D28/D88Q20D20/D87D14
RX
SW
RX
SW
D8
RX
SW
D7
RX
SW
BPF
BPF
D10/D12/
D16/D18
BPF
D9/D11/
D15/D17
BPF
RF
AMP
RF
AMP
UHF BAND
Q18
RF
AMP
Q17
RF
AMP
BPF
BPF
D22/D24/
D26/D30
BPF
D21/D23/
D25/D29
BPF
ATT
D33D27/D85Q19D19/D86D13
ATT
D32
ATT
D31
ATT
Band A
Band B
Band A
Band B
Q24
RF
AMP
Q23
RF
AMP
375-550MHz
HPF
118-174MHz
LPF
D79D81
LIMITER
ANTENNA
118-550MHz
LPF
1st IF
circuit
4-1
1ST IF CIRCUITS (MAIN UNIT)
• Band A
The RX signal from the RF circuit is applied to the 1st mixer
(IC125) and mixed with the 1st LO signal, resulting in the
38.85 MHz 1st IF signal. The converted signal is passed
through the 1st IF fi lter (FI105), and then applied to the 1st
IF AMP (Q138). The amplifi ed signal is applied to the 2nd IF
circuit, through the limiter (D114).
• 1ST IF CIRCUITS (Band A)
Band A
2nd IF
circuit
D114
LIMITER
IF
AMP
Q138/
D116/D118
FI105
XTAL
BPF
38.85MHz
• Band B
The RX signal from the RF circuit is applied to the 1st mixer
(IC124) and mixed with the 1st LO signal, resulting in the
46.35 MHz 1st IF signal. The converted signal is passed
through the 1st IF fi lter (FI104), and then applied to the 1st
IF AMP (Q137). The amplifi ed signal is applied to the 2nd IF
circuit, through the limiter (D113).
1st LO
LIF
IC125
• 1ST IF CIRCUITS (Band B)
2nd IF
circuit
D113
LIMITER
IF
AMP
Q137/
D115/D117
Band B
FI104
46.35MHz
XTAL
BPF
1st LO
RIF
IC124
2ND IF CIRCUITS (MAIN UNIT)
• Band A
The 1st IF signal from the 1st IF circuit is applied to the IF IC
(IC121, pin 20), which contains the 2nd IF AMP, 2nd mixer,
FM demodulator, and so on.
The 1st IF signal is mixed with the 38.4 MHz 2nd LO signal,
resulting in the 450 kHz 2nd IF signal. The converted signal
is passed through the external 2nd IF fi lter (FM mode: FI103,
FM-N or DV mode: FI102) to remove sideband noise.
While operating in the FM or AM mode, the fi ltered signal is
amplifi ed by the 2nd IF AMP, and then demodulated by the
internal demodulator circuit. The demodulated signal is applied to the RX AF circuit, through the RX mode SW (IC119),
AF fi lter (Q113 and Q140) and AF SW (IC111).
While operating in the DV mode, the fi ltered signal is amplifi ed by the 2nd IF AMP, and then demodulated by the internal demodulator circuit. The demodulated signal is applied
to the digital demodulation circuit, through the RX mode SW
(IC119) and buffer AMP (IC117).
• 2ND IF CIRCUITS (Band A)
Q200
38.4MHz
IF IC
WIDE/NARROW
SELECTOR
CERAMIC
CERAMIC
BPF
FI102 FI103
X3
BPF
12.8MHz
X102
X200
Digital
demodulation
Cricut
IC111 Q113/Q140
RX AF
Cricut
DIGI/AN
AFMUTE
Band A
IC117 IC119 IC121
BUFF
AF
FIL
DV
FM/AM
Q122/Q124/Q142
Q128/D107/D108
D111/D112
DET OUT
SELECT
AM
FM
• Band B
The 1st IF signal from the 1st IF circuit is applied to the IF IC
(IC120, pin 20), which contains the 2nd IF AMP, 2nd mixer,
FM demodulator, and so on.
The 1st IF signal is mixed with the 45.9 MHz 2nd LO signal,
resulting in the 450 kHz 2nd IF signal. The converted signal
is passed through the external 2nd IF fi lter (FM mode: FI101,
FM-N or DV mode: FI100) to remove sideband noise.
While operating in the FM or AM mode, the fi ltered signal is
amplifi ed by the 2nd IF AMP, and then demodulated by the
internal demodulator circuit. The demodulated signal is applied to the RX AF circuit, through the RX mode SW (IC119),
AF fi lter (Q112 and Q139) and AF SW (IC111).
While operating in the DV mode, the fi ltered signal is amplifi ed by the 2nd IF AMP, and then demodulated by the internal demodulator circuit. The demodulated signal is applied
to the digital demodulation circuit, through the RX mode SW
(IC119) and buffer AMP (IC117).
• 2ND IF CIRCUITS (Band B)
Digital
demodulation
Cricut
RX AF
Cricut
DIGI/AN
AFMUTE
IC117 IC120IC119
BUFF
IC111
Q112/Q139
AF
FIL
DV
FM/AM
Q121/Q123/Q141
Q127/D105/D106
D109/D110
Band B
DET OUT
SELECT
AM
FM
CERAMIC
Q220
45.9MHz
X3
IF IC
WIDE/NARROW
SELECTOR
CERAMIC
BPF
BPF
FI100 FI101
15.3MHz
X101
X201
4-2
DIGITAL DEMODULATION CIRCUIT (MAIN UNIT)
While operating in the DV mode, the demodulated signal (digital audio signal) is passed through the LPF (Band A: R1195,
R1206, C1461 and C1475/Band B: R1194, R1205, C1460
and C1474) and amplifi ed by the AF AMP (Band A: IC407/
Band B: IC406). The amplifi ed signal is applied to the liner
codec (IC402) to be converted into the digital audio signal.
The digital audio signal is demodulated by the DSP (IC400),
and then applied to the linear codec (IC402) again, to be decoded into an analog audio signal.
The decoded AF signal is applied to the RX AF circuit, through
the HPF (Band A: IC407/Band B: IC406) and LPF (Band A:
IC407/Band B: IC406) and AF SW (IC111).
• DIGITAL DEMODULATION CIRCUIT
IC400
L_DAF
R_DAF
DSP
LINEAR
CODEC
IC402
IC407
AMP LPF
IC406
AMP LPF
L_DDET
R_DDET
4-2 TRANSMIT CIRCUITS
TX AF CIRCUIT (MAIN UNIT)
The AF signal from the microphone (MIC signal) is passed
through the MIC SW (IC100) and ATT (IC100), and then applied to the MIC AMP (IC102).
The amplifi ed signal is applied to the audio processor LSI
(IC103), through the mute SW (IC104).
The audio processor LSI contains 16-bit liner CODEC, MIC
AMP, audio fi lters, D/A converter, and so on.
• When operating in the DV mode
The applied signal is further amplifi ed by the ALC AMP. The
amplifi ed signal is applied to the liner CODEC, to be encoded
into a digital audio signal.
The digital audio signal is processed by the DSP (IC400), and
then passed through the mode SW (IC104) and LPF (IC103),
and then applied to the D/A converter (IC103), to be adjusted
in level.
IC407
HPF
IC406
HPF
IC407
IC406
LPF
LPF
IC111
DIGI/AN
AFMUTE
IC111
DIGI/AN
AFMUTE
L_DAF
R_DAF
RX AF CIRCUIT (MAIN UNIT)
The demodulated AF signal from the AF SW (IC111) is applied to the electric volume (IC110), which separately adjusts
the A and B bands AF signal in level. The level-adjusted AF
signal is passed through the AF line SW (IC109).
When the AF signal is output from the internal speaker
or [SP1] jack:
The AF signal is passed through two speaker mute SWs
(Q105 and Q104), and then amplifi ed by the AF power AMP
(IC105).
The amplifi ed AF signal is output to the internal speaker
(CHASSIS: SP1) or external speaker, through the [SP1] jack
(J101).
When the AF signal is output from the [SP2] jack:
The AF signal is passed through the speaker mute SW
(Q106), and then amplifi ed by the AF power AMP (IC106).
• When operating in the FM/FM-N mode
The applied signal is passed through the HPF (IC103), IDC
(IC103), LPF (IC103), mode SW (IC104) and LPF (IC103),
and then applied to the D/A converter (IC103) to be adjusted
in level.
The level-adjusted signal is applied to the modulation circuit.
• TX AF CIRCUIT
IC307
BTMIC
MIC
BUFF
J100
1
2
3
4
5
6
7
8
IC100 IC100
BTMIC
SW
IC103
DV
ALC
AMP
IC102
MIC
ATT
AMP
Audio Processor LSI
IDC
HPF
DSP
IC400
LPF
IC104
MUTE
SW
IC104
FMFM
MODE
DV
SELECT
D/AA/D
IC103
LPF
IC103
D/A
The amplifi ed AF signal is applied to the [SP2] jack (J102).
• RX AF CIRCUITS
[SP1]
J101
SP1
[SP2]
J102
IC105 Q104 Q105
AF
SP
AMP
MUTE
IC106 Q106
AF
AMP
SP
MUTE
SP
MUTE
IC109 IC110
AFSW
ELEC.
VR
A band AF
B band AF
4-3
MODULATION CIRCUITS (MAIN UNIT)
The MIC signal from the TX AF circuits is applied to the VCO
as the GMSK (For the DV mode) or Frequency Modulation
(For the FM mode) modulation signal.
VHF BAND
The modulation signal is applied to the VHF VCO (Q211,
D203, D204 and D228).
The modulated VCO output signal is amplifi ed by the buffer
(Q215) and LO AMP (IC203), and then applied to the TX AMP
circuits as the TX signal, through the LO SW (D50).
UHF BAND
The modulation signal is applied to the UHF VCO (Q232,
D223, D224 and D227) as a modulation signal.
TX AMP CIRCUITS (MAIN UNIT)
VHF BAND
The TX signal is passed through the LPF (L50, L51, C215,
C220 and C225) and ATT (R146, R147 and R151), and then
sequentially amplifi ed by the YGR (Q36), drive AMP (Q40)
and power AMP (IC3).
The amplifi ed TX signal is passed through the LPF (L67,
C291 and C297), TX output power detector (D59 and D63),
ANT SW (D66) and two LPFs (L90, L94, L96, C409, C418
and L79, L83, L87, C378, C386, C394), before being applied
to the antenna.
UHF BAND
The TX signal is passed through the HPF (L52 and C232) and
ATT (R155, R156 and R162), and then sequentially amplifi ed
by the YGR (Q38), drive AMP (Q41) and power AMP (IC4).
The modulated VCO output signal is amplifi ed by the buffer
(Q235) and LO AMP (IC208), and then applied to the TX AMP
circuits as the TX signal, through the LO SW (D52).
• TX AMP AND APC CIRCUITS
UHF TX VCO
IC205
VCOMOD
MOD
MUTE
Q232
Q227
Q211
Q207
VHF TX VCO
Q235
BUFF
Q215
BUFF
IC208
LO
AMP
IC203
LO
AMP
D52
TX/RX
SW
D50
TX/RX
SW
HPF
LPF
Q38 Q41 IC4 D62/D67 D68/D73/D75
YGR
ATT
Q36 Q40 IC3 D59/D63
ATT
YGR
The amplifi ed TX signal is passed through the LPF (L69,
C310 and C319), TX output power detector (D62 and D67),
ANT SW (D68 and D84), HPF (L84, L88, C391, C395 and
C402) and LPF (L90, L94, L96, C409, C418), before being
applied to the antenna.
APC CIRCUITS (MAIN UNIT)
At the TX output power detector, the RF signal at the LPFs
(VHF band: L68, C301, C302 and C326/UHF band: L73,
C322, C323 and C350) is rectifi ed by the diodes (VHF band:
D59 and D63, UHF band: D62 and D67), and it is used as the
TX power sensing voltage.
The voltage is applied to the APC AMP (IC2), and the output
voltage controls the bias voltages of the power AMP (VHF
band: IC3, UHF band: IC4) to keep the TX output power constant.
DRIVE
AMP
DRIVE
AMP
UHF band
VHF band
PWR
LPFHPF
AMP
PWR
LPF
AMP
IC2
APC
CTRL
PWR
DET
PWR
DET
D84
TX/RX
SW
D66/D69/
D70/D77
TX/RX
SW
375-550MHz
HPFLPF
118-174MHz
LPF
118-550MHz
ANTENNA
LPF
4-4
VHF RX circuit
UHF RX circuit
4-3 FREQUENCY SYNTHESIZER CIRCUIT
(MAIN UNIT)
VCOs
The ID-5100A/E has total of fi ve VCOs: three VCOs for Band
A and another two for Band B.
• Band A
VHF VCO #1
(Used when the Heterodyne function is set to "Normal")
The VHF VCO #1 (Q211, D204, D206 and D228) generates
both 1st LO signal (for receiving a VHF signal on Band A)
and the VHF TX signal. The output of buffer (Q215) is amplifi ed by the LO AMP (IC203), and then used as the VHF TX/
RX LO signal.
While receiving, the LO signal is applied to the 1st IF mixer
(IC125) for receiving a signal on the VHF band, through the
RX LO SW (D212 and D217) and LPF (L314, L316, C986,
C992 and C997).
While transmitting, the LO signal is applied to the TX AMP
circuits, through the LO SW (D50).
VHF VCO #2
(Used when the Heterodyne function is set to "Reverse")
The VHF VCO #2 (Q237, D238 and D239) generates the 1st
LO signal (for receiving a VHF signal on Band A). The output
of buffer (Q215) is amplifi ed by the LO AMP (IC203), and
then applied to the 1st IF mixer (IC125) for receiving a signal
on the VHF band, through the RX LO SW (D212 and D217)
and LPF (L314, L316, C986, C992 and C997).
PLL
•Band A
A portion of VHF and UHF VCOs output signal is amplifi ed by
the buffer (Q213), and then fed back to the PLL IC (IC201).
The PLL IC (IC201) phase-compares the output of reference
frequency oscillator (TCXO: X200) and VCO, and the phase
difference is output as the charge pump current. The current
is passed though the loop fi lter (R715, R717, R719, R722,
C924, C926 to C928 and C930) to be converted into the lock
voltage, which controls the oscillating frequency of VCO.
When the oscillation frequency drifts, its phase changes from
that of the reference frequency, causing a lock voltage change
to compensate for the drift in the VCO oscillating frequency.
• Band B
A portion of VHF and UHF VCOs output signal is amplifi ed by
the buffer (Q234), and then fed back to the PLL IC (IC206).
The PLL IC (IC206) phase-compares the output of reference
frequency oscillator (TCXO: X201) and VCO, and the phase
difference is output as the charge pump current. The current
is passed though the loop fi lter (R797, R799, R802, R805,
C1041, C1043 to C1045 and C1048) to be converted into the
lock voltage, which controls the oscillating frequency of VCO.
When the oscillation frequency drifts, its phase changes from
that of the reference frequency, causing a lock voltage change
to compensate for the drift in the VCO oscillating frequency.
UHF VCO
The UHF VCO (Q205, Q210, D201, D202 and D205) generates the 1st LO signal (for receiving a UHF signal on Band
A). The output of buffer (Q214) is amplifi ed by the LO AMP
(IC203), and then applied to the 1st IF mixer (IC125), through
the RX LO SW (D213 and D216) and LPF (L315, C988 and
C995).
• Band B
VHF VCO
The VHF VCO (Q228, Q233, D225, D226 and D230) generates the 1st LO signal (for receiving a UHF signal on Band
A). The output of buffer (Q236) is amplifi ed by the LO AMP
(IC208), and then applied to the 1st IF mixer (IC124), through
the RX LO SW (D235 and D237) and LPF (L338, L339,
C1103, C1105 and C1106).
UHF VCO
The UHF VCO (Q232, Q227, D223, D224, D227 and D229)
generates both 1st LO signal (for receiving a UHF signal on
Band B) and the UHF TX signal. The output of buffer (Q235)
is amplifi ed by the LO AMP (IC208), and then used as the
UHF TX/RX LO signal.
While receiving, the LO signal is applied to the 1st IF mixer
(IC124) for receiving a signal on the UHF band, through the
RX LO SW (D234 and D236) and LPF (L337, C1102 and
C1104).
While transmitting, the LO signal is applied to the TX AMP
circuits, through the LO SW (D52).
• FREQUENCY SYNTHESIZER CIRCUIT
2nd LO
IC121
2nd LO
IC120
12.8 MHz
Q200
IF IC
IF IC
X3
38.4 MHz
15.3 MHz
Q220
X3
45.9 MHz
X200
X201
IC202/Q202
LOOP
FIL
IC201
PLL
IC
IC207/Q222
LOOP
FIL
IC206
PLL
IC
Q210
D201,D202,D205
RX:361.15-511.15 MHz
Q211
D203,D204,
D206,D228
TX:
137-174 MHz
RX:
156.85-212.85 MHz
RX:79.15-135.15 MHz
Q237
D238,D239
A band
Q232
D223,D224,
D227,D227
TX:400-470 MHz
RX:353.65-516.35 MHz
Q233
D225,D226,D230
RX:164.35-220.35 MHz
B band
Q213
Q235
BUFF
Q236
BUFF
Q234
BUFF
Q214
BUFF
BUFF
L_UHF
Q215
BUFF
L_VHF
R_VHF
R_UHF
IC208
AMP
IC203
AMP
D216
D217
D52/D234/D235
D236
D237
D50
D212/D213
TX/RX
SW
LPFLPF
RX
SW
1st LO
1st mixer
IC125
TX/RX
SW
LPFLPF
RX
SW
1st LO
1st mixer
IC124
4-5
W300
NOISE
FILTER
Q301
PWR
PCON
CTRL
PDV
To CPU
MAIN UNIT
LOW V
DET
Q302/Q306
IC309
IC324
IC320
ALARM
To BT
I SENS
VCC
SW
PSC
SW
REG(6V)
FANHV
IC310
CURRENT
DETECT
IC313
+8
REG
IC321
CTRL8V
IC323 C1340
4.2V
REG
IC311
3.3V
REG
IC306
IC305
REG
SW
BT3V
REG
SD3V
REG
CONT8V
HV
IDET
VCC
IC319Q303
5V
REG
SUPER
CAP
CPU3.3V
BT3.3V
SD3.3V
UTX_C
VTX_C
IC404
1.3V
REG
IC403
3.3V
REG
IC314
3.3V
REG
Q32/Q34
UT8
REG
Q27/Q28
VT8
REG
DSP1.3V
DSP3.3V
5VS
3VS
UT8
VT8
4-5 PORT ALLOCATIONS4-4 VOLTAGE DIAGRAM
• CONTROLLER CPU (CONTROL UNIT: IC2)
Ball
Line Name Description I/O
No.
7 TWDTX
14 RESET Reset signal input. I
15 R_VOLV Band B [VOL] input. I
8V
16 R_SQLV Band B [SQL] input. I
17 L_VOLV Band A [VOL] input. I
18 L_SQLV Band A [SQL] input. I
25 G_TXD
26 G_RXD I
29 DIM_DA LCD backlit brightness control. O
30 G_RES
31 GPSC
32 LCDRST
33 TEMP
38–41LCDD4–
LCDD7
47 FLTXD
48 FLRXD
51 L_DIALB Band A [DIAL] phase-B. I
52 L_DIALA Band A [DIAL] phase-A. I
53 R_DIALB Band B [DIAL] phase-B. I
54 R_DIALA Band B [DIAL] phase-A. I
58 LCDCD
61 LCDD0
62 LCDD1
65 TWCS
66 TWBUSY
78 TWPIRQ
79 TWDCLC
80 TWDRX Touch panel controller serial data. O
81 LCDD2 LCD control data. O
86 LCDWR0
88 LCDCS LCD controller chip select. O
Touch panel controller touch sens-
ing data.
GPS data.
GPS module (EP13) reset.
L= Resets.
O
O
O
GPS module (EP13) power supply
control.
O
L=GPS module is activated.
LCD controller reset.
L= Resets.
O
LCD controller temperature sens-
ing voltage.
LCD control data. I/O
Control signal to the main CPU
(IC300).
O
Control signal from the main CPU
(IC300).
LCD controller data/command se-
lect.
O
H=While sending the control data.
LCD control data. I/O
Touch panel controller chip select.
L=While inputting/outputting data.
O
Touch panel controller status.
H=Busy.
Touch panel controller interrupt.
L=Touching detected.
Touch panel controller serial
clock.
Touch panel controller read/write
control.
O
O
I
I
I
I
4-6
• MAIN CPU (MAIN UNIT: IC300)
Ball
Line Name Description I/O
No.
A4 R_LV Lock voltage input. (Band B) I
A6 VIN External power supply voltage. I
A7 L_WXALT
A8 MICUD
A9 AUDI
A11 PSC
A12 DA_STB D/A converter serial strobe. O
B1 DTMF
B4 R_RSSI RSSI voltage. (Band B) I
B7 IDET Transmit current sensing voltage. I
B8 TEMP
B9 AURES
C2 DTCS
C4 R_DTCSIN
C7 L_DTCSIN
C9 DTMUTE
C11 DSP_PD
D1 DA_DATA Serial data to the D/A converter. O
D2 BTRXD
D4 R_WXALT
D5 R_LV Lock voltage. (Band B) I
D6 VOX VOX sensing voltage. I
D7 L_RSSI RSSI voltage. (Band A) I
D8 AUSTB Audio IC serial strobe. O
D11 DA_CK Serial clock to the D/A converter. O
E4 BTTXD Serial data to the Bluetooth
G1 RESET
G3 BT_RES
G4 MIC_PTT PTT input from the microphone. I
H14 SCSCK
H15 SCRXD
J4 RTC_IRQ
J12 BWD
J13 BTPLAY
WX alert signal (1050 Hz). (Band
A)
The [UP]/[DOWN] key input from
the microphone.
Response signal from the audio
IC.
5VS power supply line control.
L= While in the power save mode.
DTMF tone, European tone and
beep sound signals.
Transceiver temperature sensing
voltage.
Audio IC reset.
L=Reset.
TSQL/DTCS tone fi lter switching
control.
H= While the DTCS tone is used.
TSQL/DTCS tone signal. (Band
B)
TSQL/DTCS tone signal. (Band
A)
Tone signal (BEEP/DTMF/
ETONE) modulation mute.
L=Mute.
DSP power down control.
H= Power down.
Serial data from the Bluetooth
unit.
Weather alert signal (1050 Hz)
detect. (Band B)
®
unit. O
CPU reset signal.
L=Reset.
®
Bluetooth
unit reset signal.
H=Reset.
Serial clock to the sub CPU
(IC303).
Serial data from the sub CPU
(IC303).
Interrupt detection from the real
time clock IC.
L= Alerm detected.
The [RWD] key input from the Blu-
®
etooth
unit.
L=When pushed.
The [PLAY] key input from the Blu-
®
etooth
unit.
L=When pushed.
Ball
Line Name Description I/O
No.
®
Bluetooth
J15 BT_SW
I
I
K1 L_SQL
trol.
H= The Bluetooth
vated.
Noise level detection. (Band A)
H= Noise signal is detected.
unit power supply con-
®
unit is acti-
O
I
K3 IOSTB Expander serial strobe. O
I
K14 FWD
O
The [FWD] key input from the Blu-
®
etooth
unit.
L=When pushed.
I
K15 IOEN Expander chip enable. O
O
M1 98_DATA
M2 TX_DATA
Control serial data from the microphone.
Control serial data to the CPU on
the CONTROL UNIT.
I
O
M5 DSP_STB DSP serial strobe. O
I
O
O
I
I
O
M7 ECK EEPROM serial clock. O
M8 L_UNLK
M9 VOL_DATA
M12 TX232
N1 RX_DATA
N2 SD_SENC
PLL unlock detection. (Band A)
L=Unlocked.
Serial data to the audio volume
IC.
UART data (RS-232C).
(4800/9600/38400 bps)
Control serial data from the CPU
on the CONTROL UNIT.
SD card insert detection.
L=Inserted.
N3 SD_TXD Serial data to the SD card. O
I
O
O
I
I
N4 DSP_SI DSP serial data. I
O
®
I
I
N5 CLIN
N6 RTC_SDA
N7 ESIO EEPROM serial data. I/O
N9 VOL_CK
N12 DATA
N13 SCTXD
CI-V/CLONE UART data.
(300–38400 bps)
Serial data to/from the real time
clock IC.
Serial clock to the audio volume
IC.
Common serial clock to the D/A
converter and expander.
Serial data to the sub CPU
(IC303).
I
I/O
O
O
O
P1 SD_CS Chip select to the SD card. O
P2 SD_SCK Serial clock to the SD card. O
I
R8 R_UNLK
PLL unlock detection. (Band B)
L=Unlocked.
I
K4 DSP_REQ DSP "REQEST" signal. I
O
P4 DSP_CK DSP serial clock. O
P5 PDV Power supply voltage drop detect. I
[PTT] input from the Bluetooth
O
P6 H_PTT
unit.
®
I
L=Pushed.
I
P7 SD_SW
I
P10 SCACK "ACK" signal from the sub CPU. I
P12 BTUNIT
I
P13 RX232
I
R1 SD_RXD Serial data from the SD card. I
SD card driver power supply control.
H=SD card driver is activated.
Bluetooth
®
unit mount detect.
L=Mounted.
RS-232C UART data.
(4800/9600 bps)
O
I
I
R2 DSP_SO DSP serial data. O
4-7
• MAIN CPU (MAIN UNIT: IC300) (continued)
Ball
Line Name Description I/O
No.
R4 CLOUT
R5
DSP_RESET
R6 RTC_SCL
R7 PCON
R9 SD_PTC
R10 SCRES Sub CPU reset. O
R11 SCTRG "TRG" signal to the sub CPU. O
R12 SCTXS "TXS" signal to the sub CPU. O
R13 CK
R14 MICSEL
59 L_AFMUTE
56 MICMUTE
27 DCSFT
17 R_PLLSTB PLL serial strobe. (Band B) O
63 R_AFMUTE
55 PLAY
22 VTX_C
23 UTX_C
20 L_PLLSTB PLL serial strobe. (Band A) O
CI-V/CLONE UART data.
(300–38400 bps)
DSP reset control.
L=Reset.
Serial clock to the real time clock
IC.
Main power supply line control.
H= Power ON.
SD card write protect control.
H=Write protect.
Common serial clock to the D/A
converter and expander.
External microphone connection
detect.
AF output mute. (A band)
H=Mute.
MIC mute switch control.
H= Mute.
DSP clock shift control.
L=+600 Hz shifted.
RX AF mute control. (Band B)
L= Mute.
Modulation signal line switching
control.
H= Recorded audio is transmitted.
VHF band transmit circuit power
control.
H= While transmitting.
UHF band transmit circuit power
control.
H= While transmitting.
• SUB CPU (MAIN UNIT: IC303)
Ball
Line Name Description I/O
No.
O
O
O
O
O
O
I
O
O
O
O
O
O
O
1 L_REFC
2 R_REFC
7 SCRES Sub CPU reset. I
18 PLLCK PLL serial clock. O
19 PLLDATA PLL serial data. O
31 AF_SW
24 L_RMUTE
25 R_RMUTE
26 DTCS_SEL
34
MAIN_DASEL
36 MIC1 Microphone gain control. O
48 SCSCK Sub CPU clock. I
49 SCTXD Sub CPU data to the main CPU. I
50 SCRXD Main CPU data. O
51 MIC2 Microphone gain control. O
52 SCTRG "TRG" signal from the main CPU. I
53 SCTXS "TXS" signal from the main CPU. I
57 VRX_RPT
58 URX_RPT
60 CLSFT3
61 CLSFT2*
62 CLSFT1*
64 SCACK
Reference frequency control.
(Band A)
Reference frequency control.
(Band B)
AF output control.
H= AF signal is output from the ex-
ternal speaker.
AF mute control. (Band A)
L=Mute.
AF mute control. (Band B)
L=Mute.
Tone signal (CTCSS/DTCS) fi lter
switching control.
H=While sending DTCS signal.
Operating mode (FM/DV) switching control.
H= While operating in the DV
mode.
Demodulated signal polarity
switching control.
H= While operating on the VHF
band.
Demodulated signal polarity
switching control.
H= While operating on the UHF
band.
Sub CPU clock frequency shift
control.
H=Shifted.
Main CPU clock frequency shift
control.
Sub CPU "ACK" signal to the main
CPU.
O
O
O
O
O
O
O
O
O
O
O
O
*: Clock frequency shifting range.
Line name CLSFT1 CLSFT2 Shifting range
H H –1.2 kHz
Line state
4-8
H L ±0 kHz
L L +1.2 kHz
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