Icom IC-T7H Service Manual

SERVICE
MANUAL

DUAL BAND FM TRANSCEIVIER

INTRODUCTION

DANGER

ORDERING PARTS

REPAIR NOTES

This service manual describes the latest service information
for the IC-T7H DUAL BAND FM TRANSCEIVER at the time
of publication.
4 version of the IC-T7H have been designed. This serves
manual cover each versions.

NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than 16 V. This will ruin the
transcever.

DO NOT expose the transceiver to rain, snow or any liquids.
DO NOT reverse the polarities of the power supply when

connecting the transceiver.
DO NOT apply an RF signal of more than 20 dBm (100mW)
to the antenna connector. This could damage the transceiv­er’s front end.

Be sure to include the following four points when ordering
replacement parts:

1. 10-digit order numbers

2. Component part number and name

3. Equipment model name and unit name

4. Quantity required
<SAMPLE ORDER>

1110002700 S.IC NJM2904M-T1 IC-T7H 1F UNIT 5pieces
8810008750 Screw PH BO 2 x 15 ZK IC-T7H Chassis 10pieces

Addresses are provided on the inside back cover for your
convenience.

1. Make sure a problem is internal before disassembling the transceiver.

2. DO NOT open the transceiver until the transceiver is disconnected from its power source.

3. DO NOT force any of the variable components. Turn them slowly and smoothly.

4. DO NOT short any circuits or electronic parts. An insulated turning tool MUST be used for all adjustments.

5. DO NOT keep power ON for a long time when the transceiver is defective.

6. DO NOT transmit power into a signal generator or a sweep generator.

7. ALWAYS connect a 40 dB to 50 dB attenuator between the transceiver and a deveiation meter or spectrum analyzer when
using such test equipment.

8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver.

To upgrade quality, all electrical or mechanical parts and
internal circuits are subject to change without notice or
obligation.

MODEL

IC-T7H

VERSION SYMBOL

Europe

Italy

SE Asia

U.S.A.

EUR

ITA

SEA

USA-3

SECTION 1 SPECIFICATIONS

SECTION 2 INSIDE VIEWS

SECTION 3 DISASSEMBLY INSTRUCTIONS

SECTION 4 CIRCUIT DESCRIPTION

4 - 1 RECEIVER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 1

4 - 2 TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 2

4 - 3 PLL CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 3

4 - 4 POWER SUPPLY CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 4

4 - 5 OTHER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 4

4 - 6 PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 5

SECTION 5 ADJUSTMENT PROCEDURES

5 - 1 PLL AND TRANSMITTER ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 1

5 - 2 RECEIVER ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 3

SECTION 6 PARTS LIST

SECTION 7 MECHANICAL PARTS AND DISASSEMBLY

SECTION 8 SEMI-CONDUCTOR INFORMATION

SECTION 9 BOARD LAYOUTS

9 - 1 LOGIC UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 - 1

9 - 2 2F UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 - 3

9 - 3 1F UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 - 5

SECTION 10 BLOCK DIAGRAM

SECTION 11 VOLTAGE DIAGRAM

TABLE OF CONTENTS

SECTION 1 SPECIFICATIONS

1 - 1

All stated specifications are subject to change without notice or obligation.

Frequency
coverage

Mode
Frequency stability

(–30 ˚C to +50 ˚C;

+32 ˚F to +122 ˚F)
Tuning steps
Antenna connector
External DC power

High power
Low power
Rated audio
Power saved

(at 9.6 V)
Usable temperature range
Dimensions

(Projections not included)

Weight

RF output power
(at 13.5 V DC)

Modulation system
Max. frequency deviation
External mic.connector
Spurious emissions
Receive system
Intermediate frequencies
Sensitivity
Squelch sensitivity
Selectivity
Spurious and image rejection

ratio
Audio output power

( at 13.5 V)
External speaker connector

144 MHz band 430 MHz band

RECEIVER TRANSMITTER GENERAL

Tx: 144 MHz–148 MHz Tx: 430 MHz–450 MHz*

2

Rx: 118 MHz–174 MHz*

1

Rx: 400 MHz–470 MHz*

2

144 MHz–146 MHz 430 MHz–440 MHz
Tx: 140 MHz–148 MHz*

1

430 MHz–440 MHz

Rx: 118 MHz–174 MHz*

1

136 MHz–174 MHz*

1

400 MHz–470 MHz*

3

F3 / F2

± 5 ppm

5, 10, 12.5, 15, 20, 25, 30 or 50 kHz

BNC (50 Ω)

4.5 to 16 V DC

1.6 A (typical) 1.6 A (typical)

0.6 A (typical) 0.7 A (typical)
180 mA (typical) 190 mA (typical)

16 mA (typical) 18 mA (typical)

–10 ˚C to +60 ˚C (+14˚F to +140˚F)

57(W)

× 110(H) × 27(D) mm; 2

1

⁄4(W) × 45⁄16(H) × 11⁄16(D) inch (with BP-170)

57(W) × 122(H) × 29(D) mm; 21⁄4(W) × 413⁄16(H) × 15⁄32(D) inch (with BP-173/180)

285 g; 10.1 oz (with BP-170 and dry cell batteries)
320 g; 10.8 oz (with BP-180)
405 g; 10.8 oz (with BP-173)

High: 6.0 W High: 6.0 W
Low: 0.5 W Low: 0.5 W

Variable reactance frequency modulation

± 5.0 kHz

3-conductor 2.5 mm (

1

⁄10 in) (2 kΩ)

Less than 60 dB

Double-conversion super heterodyne

1st: 45.150 MHz, 2nd 450 kHz

Less than 0.16 µV (typical) for 12 dB SINAD

Less than 0.18 µV

More than 7.5 kHz / –60 dB, Less then 15 kHz / –6 dB

More than 60 dB More than 50 dB
(More than 50 dB at

1

⁄2 IF)

More than 500 mW at 10 % distortion with an 8 Ω load

3-conductor 3.5 mm (

1

⁄8 in) (8 Ω)

USA-3
Europe

SE Asia
Italy

Current drain

(at 13.5 V)

Tx

Rx

Guaranteed frequency range: *1144 MHz–148 MHz, *2440 MHz–450 MHz, *3430 MHz–440 MHz

SECTION 2 INSIDE VIEWS

•

LOGIC UNIT AND 2F UNIT

2 - 1

•

1F UNIT

CPU system clock
(X1: CR534 5.03MHz)

CPU system clock
(IC1: M38267M8L-165GP)

Speaker

Initial matrix
Microphone amplifier/lpf

(IC2: BA4510F)

UHF band pass filter
(FI201: EFCH445MWN)

UHF RF amplifier*
(Q201: 2SC4226)

* Located under side of these points

AF power amplifier
(IC151: 2SC5226)

VHF RF amplifier*
(Q51: 2SC5226)

1st IF filter
(FI401: FL244)

2nd IF filter
(FI101: CFWM450E)

+3V regulater
(IC2: S-81335HG-K)

2F UNIT LOGIC UNIT

CPU system clock
(IC1: M38267M8L-165GP)

DUAL VCO board

Power amplifier
(Q402: 2SK3075)

PA board

Drive amplifier
(Q401: 2SK3074)

SECTION 3 DISASSEMBLY INSTRUCTIONS

3 - 1

•

DISASSEMBLING PANELS

1 Unscrew 4 screws, A from the rear panel and 2 screws, B

from the rear plate to separate front and rear panels.

2 Unscrew 4 screws, C from the rear plate to remove it.

•

REMOVING LOGIC UNIT

1 Unscrew 4 screws, D from the LOGIC Unit.
2 Unsolder jumper wires from the speaker as shown below.

•

REMOVING 2F UNIT

1 Unscrew 1 screw, E from the 2F unit.
2 Unsolder the point, F, then remove the 2F unit with the

contact base.
(Disconnect J1 on reverse side of the 2F unit to remove).

Rear panel

C

Front panel

Rear panel

A

A

B

C

Ground lug

Front panel

Speaker

LOGIC unit

Unsolder

D

D

2F unit

F

E

Rear panel

Contact base

J1

•

REMOVING 1F UNIT

1 Pull the 2 knobs off and then unscrew the nut.
2 Unscrew 3 screws, G and 2 screws, H from the 1F unit.
3 Unsolder 2 points, I then remove the 1F unit.

Ground lug

Knob

1F unit

Nut

I

H

G

Rear panel

SECTION 4 CIRCUIT DESCRIPTION

4 - 1

4-1 RECEIVER CIRCUITS

4-1-1 DUPLEXER CIRCUIT (1F UNIT)

The transceiver has a duplexer (low-pass and high-pass fil­ters) on the first stage from the antenna connector to sepa­rate the signals into VHF and UHF signals. The low-pass fil­ter (L10–L12, C16–C22) for VHF signals and high-pass filter
(L1–L3, C1–C5) for UHF signals. The separated signals are
applied to each RF circuit.

4-1-2 VHF ANTENNA SWITCHING CIRCUIT

(1F UNIT)

The antenna switching circuit functions as a low-pass filter
while receiving. However, Its impedance becomes very high
while transmitting by applying a current to D51 and D52.
Thus, transmit signals are blocked from entering the receiv­er circuits. The antenna switching circuit employs a 1/4 λ
type diode switching system. The passed signals are then
applied to the RF amplifier circuit on the 2F unit.

4-1-3 VHF RF CIRCUIT (2F UNIT)

The RF circuit amplifies signals within the range of frequen­cy coverage and filters out-of-band signals.

The signals from the antenna switching circuit are applied to
the limitter (D55), and are then passed through the band­pass filter (D52, L53). The filtered signal is applied to the RF
amplifiers (Q51, Q52). The amplifier consists of a cascade
circuit. The amplified signals are passed through the next
stage band-pass filter (D53, D54, L54, L55) to suppress
unwanted signals. The filtered signals are then applied to
the mixer circuit (Q401).

D53 and D54 track the band-pass filters and are controlled
by the PLL lock voltage. These diodes tune the center fre­quency to obtain good image response rejection.

4-1-4 UHF RF CIRCUIT (2F UNIT)

The signals from the antenna switching circuit (1F unit;
D551, D552, D722–D724 and Q204) are applied to the limit­ter (D201), and are then amplified at the the RF amplifier
(Q201). The amplified signals are passed through the band­pass filter (FI201), and are then applied to another RF ampli­fier (Q202). The amplified signals are applied to the 1st
mixer circuit (Q401).

Common circuits with VHF band are used later stage from
the 1st mixer.

4-1-5 1ST MIXER AND 1ST IF CIRCUITS

(2F UNIT)

The mixer circuit converts the received signal to a fixed fre­quency of the 1st IF signal with a 1st LO (VCO output) fre­quency. By changing the PLL frequency, only the desired
frequency will be passed through a crystal filter at the next
stage of the mixer.

The received signals from the VHF or UHF RF circuit are
mixed with the 1st LO signal (VCO output signal) at the 1st
mixer (Q401) to produce a 45.15 MHz 1st IF signal.

The 1st IF signal is applied to a crystal filter (FI401) to sup­press out-of-band signals. The filtered 1st IF signal is ampli­fied at the IF amplifier (Q101) and is then applied to the 2nd
mixer circuit (IC101, pin 16).

4-1-6 2ND IF AND DEMODULATOR CIRCUITS

(2F UNIT)

The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double superheterodyne system (which converts
receive signals twice) improves the image rejection ratio and
obtains stable receiver gain.

The FM IF IC (IC101) contains the 2nd mixer, 2nd local
oscillator, limiter amplifier, S-meter detector and quadrature
detector circuits.

• 2nd IF AND DEMODULATOR CIRCUITS

Mixer

16

Limiter
amp.

2nd IF filter
450 kHz

PLL IC

IC851

X1

15.2 MHz

RSSI

IC2 TA31136FN

13

2nd IF (45.15 MHz)
from Q101 (1F unit)

"SD" signal to the CPU
pin 3 (Logic unit: IC1)

11

10

9

87 5 3

2

17

16

Active
filter

FI101

Noise

detector

FM

detector

Noise
comp.

"NOISE" signal to the CPU
pin 12 (Logic unit: IC1)

12

C107

C115

R112

C501

C112

C111

C113

R104

L21

AF signal "DETO"
to the LOGIC unit

3

Q356

2nd local
oscillator

C116

R113

R106

L102

R111

R112

"LO" signal from Q852
on the LOGIC unit

1F unit
2F unit

4 - 2

The 1st IF signal (45.15 MHz) from the IF amplifier (Q101)
is applied to the 2nd mixer section of IC101 (pin 16), and is
mixed with the 2nd LO signal (45.6 MHZ) for conversion to
a 450 kHz 2nd IF signal at the 2nd mixer section.

The 2nd IF signal (450 kHz) from the 2nd mixer section
(IC101, pin 3) passes through the ceramic filter (FI101)
where unwanted signals are suppressed. It is then amplified
at the limiter amplifier section (IC101, pin 5) and applied to
the quadrature detector section to demodulate the 2nd IF
signal into AF signals.

AF signals output from IC101 (pin 9) are applied to the AF
drive amplifier (Q12) on the LOGIC unit. The S-meter out­put “SD” signal from IC101 (pin 12) is applied to the CPU
(LOGIC unit; IC1, pin 3).

4-1-7 AF AMPLIFIER CIRCUIT (LOGIC UNIT)

The AF amplifier circuit, including an AF mute switch, ampli­fies the demodulated signals to drive a speaker.

The demodulated AF signals (“DETO” signals) from the FM
IF IC (IC101) on the 2F unit are applied to the drive amplifi­er (Q12, pin 3) via the band-pass filter (C44, C45). The
band-pass filter suppresses subaudible tones and higher
noise signal components.

The amplified signals from Q12 (pin 1) pass through the AF
mute switch (Q10) and are then applied to the AF volume
control on the 1F unit via the “AF” signal line.

4-1-8 AF POWER AMPLIFIER CIRCUIT

(2F UNIT)

The AF signals from the AF volume control (“AFV” signals)
are amplified at the AF power amplifier IC (IC151, pin4). The
amplified AF signals are applied to the loud speaker via the
external speaker jack (1F unit; J902).

4-1-9 NOISE SQUELCH UNIT (2F UNIT)

A noise squelch circuit cuts out AF signals when no RF sig­nal is received. By detecting noise components in the AF
signals, the squelch circuit switches the AF mute switch.

Some of the noise components in the AF signals from the
FM IF IC (IC101, pin 9) are applied to the active filter section
(IC101, pins 7 and 8). The variable register (R504) adjusts
the active filter input level.

The active filter section amplifies noise components with fre­quencies of 20 kHz and above. The filtered signals are rec­tified at the noise detector section and converted into
“NOlSE” (pulse type) signals at the noise comparator sec­tion. The “NOISE” signal is applied to the CPU (LOGIC unit;
IC1, pin 12).

The CPU (LOGIC unit; IC1) detects the signal level from the
number of the pulses, and outputs an “MM/RM” signal from
IC1 pin 44 on LOGIC unit. This signal controls the AF mute
switch (LOGIC unit; Q10) to cut the AF signal line.

4-2 TRANSMITTER CIRCUITS

4-2-1 MICROPHONE AMPLIFIER CIRCUIT

(LOGIC AND 2F UNIT)

The microphone amplifier circuit amplifies audio signals with
+6 dB/octave pre-emphasis from the microphone to a level
needed for the modulation circuit.

The AF signals from the built-in condenser microphone
(LOGIC unit; MC1), or from the [MIC] Jack (1F unit; J901)
via the “EXT MIC” line are applied to the limiter amplifier
(LOGIC unit; IC12, pin 3) which has +6 dB/octave pre­emphasis characteristics.
The amplified AF signals pass through the splatter filter
(IC12, pins 5–7). The filtered signals are applied to frequen­cy deviation pots (2F unit; R308 for VHF, R314 for UHF) and
are then applied to the modulation circuit on the DUAL VCO
board.

Q32 on the LOGIC unit is the PTT control circuit and outputs
a “High” signal to the CPU when transmitting.

4-2-2 MODULATION CIRCUIT

(DUAL VCO BOARD)

The modulation circuit modulates the VCO oscillating signal
(RF signal) using the microphone audio signals.

The “VMOD” signals change the reactance of a diode
(D304) to modulate the oscillated signal at the VHF-VCO cir­cuit (Q304, Q305 and D303).

The “UMOD” signals are applied to the UHF-VCO circuit via
the “USHIFT” line. The applied signals change the reac­tance of a diode (D302) to modulate the oscillated signal at
the UHF-VCO circuit (Q301, Q302 and D301).

The VCO output is buffer-amplified at Q306 and then
applied to the band switch (D351 and D352) via the LO
amplifiers (Q852 and Q351).

4-2-3 POWER AMPLIFIER CIRCUIT (1F UNIT)

Q401 is a drive and Q402 is a power amplifier. They are
designed to use both VHF and UHF commonly. They pro­vide more than 6 W for VHF and 6 W for UHF with a 13.5 V
DC power source via one power amplifier system.

An RF signal from the band switch (D351 and D352) is
buffer-amplified at Q201 (for VHF) or Q701 (for UHF) and
then applied to the drive amplifier (PAboard; Q401) via the
other band switch (D201 and D701). The applied RF signal
from the band switch is amplified at a drive amplifier (Q401)
and then amplified again at the power amplifier (Q402).

The amplified RF signal is passed through the low-pass fil­ter (VHF) or high-pass filter (UHF), and then applied to the
antenna connector via the transmit/receive switching circuit
(Q51, D52 and Q202 are for VHF, D551, D552, D722–D724
and Q204 are for UHF).

4 - 3

4-2-4 APC CIRCUIT (1F AND 2F UNITS)

The APC circuit stabilizes transmit output power and selects
HIGH and LOW output power. The APC circuit consists of
APC sensor, APC control (1F unit) and APC set (2F unit) cir­cuits.

The APC sensor circuit (1F unit; R250) detects a driving cur­rent from a drive voltage at the PAboard. The detected cur­rent is applied to the ope-amplifier IC (1F unit; IC250, pin 2)
in the APC control circuit, and compared with a “PSET” volt­age which is supplied from the APC set circuit (2F unit;
IC301). The output voltage from pin 1 of IC250 is applied to
the APC control circuit (1F unit; Q255 base) to control
“VGGC” voltage.

The “VGGC” APC control signal is separated for VHF
(VGG1) and UHF (VGG2) by resistors. The VGG1 line is for
the APC control signal for the drive amplifier and the VGG2
line is for the power amplifier.

Low output power is obtained by changing the “PSET” volt­age coming from pin 1 of IC301 on the 2F unit. The “PSET”
voltage is controlled by power set pots (2F unit; R302 for
VHF, 2F unit; R304 for UHF) and an “H/L” signal via the CPU
(LOGIC unit; IC1, pin 56). Athermistor (R266) controls APC
reference voltage (“PREF” voltage) to reduce the output
power when the temperature is increased.

4-2-5 ANTENNA SWITCHING CIRCUIT

(1F UNIT)

The antenna switching circuit applies receive signals to the
receiver circuit and transmit signals to the antenna connec­tor.

(1) VHF ANTENNA SWITCHING CIRCUIT

When transmitting, D51 D52 and D202 are turned ON. The
signal passes through the low-pass filter (L10–L12,
C16–C22) and is then applied to the antenna connector. The
low-pass filter suppresses high harmonic components.

(2) UHF ANTENNA SWITCHING CIRCUIT

When transmitting, D722-D724, D551, D552 and Q204 are
turned ON. The signal passes through the low-pass (L7–L9,
C9–C15) and high-pass (L1–L3, C1–C5) filters and is then
applied to the antenna connector. The high-pass filter sup­presses low harmonic components.

4-3 PLL CIRCUITS

4-3-1 VHF PLL CIRCUIT (1F UNIT)

The oscillated signal at the VCO circuit (DUAL VCO board;
Q304, Q305 and D303) is amplified at a buffer-amplifier
(Q306) and is again amplified at another buffer-amplifier
(Q352). The amplified signal is applied to the PLLIC (IC851,
pin 2), and then divided by serial data from the CPU and
phase-detected with the divided reference frequency. The
phase difference is output as pulses.

The output signals from IC851 (pin 8) are converted to DC
voltages (lock voltage) by the loop filter (R366–R368, C362,
and C364) and are then fed back to the VHF VCO circuit to
stabilize the VCO frequency.

The DC voltage is also applied to the receiver tuned band­pass filters as a “VTUNE” signal.

4-3-2 UHF PLL CIRCUIT (1F UNIT)

The oscillated signal at the VCO circuit (DUAL VCO board;
Q301, Q302, D301 and D302) is amplified at a buffer-ampli­fier (Q306) and is again amplified at another buffer-amplifier
(Q352). The amplified signal is applied to the PLLIC (IC851,
pin 19), and then divided by serial data from the CPU. It is
the phase-detected with the divided reference frequency
and the phase difference is output as pulses.

The output signals from IC851 (pin 13) are converted to DC
voltages (lock voltage) by the loop filter (R866–R868, C862
and C864) and are then fed back to the UHF VCO circuit to
stabilize the VCO frequency.

• APC CIRCUIT

R303
R302

R304

IC250

"H/L" signal from
the LOGIC unit

"PREF" signal
from the 1F unit

2F unit

1F unit

6
7

3
2

APC control

APC set

R401
R281

From UHF buffer amp. (Q701)

From VHF buffer amp. (Q201)

D201

D701

Q401

6, 7

2, 3

1, 4
5, 8

C401

T8

L102

R284

R403

L203

R250

VCC

MRF9742

Q402
MRF5007

L405

C411

to VHF RF circuit
to UHF RF circuit

4 - 4

4-5 OTHER CIRCUITS

4-5-1 TONE SQUELCH CIRCUIT (LOGIC UNIT)

A portion of the detected audio signals from the “DETO” line
are passed through the low-pass filter (IC13). The filtered
signal is then applied to the CPU (IC1, pin 4), and is com­pared with the programmed tone signal. The CPU (IC1) out­puts control signals to the AF mute and AF regulator circuits
to open the squelch when a matched tone signal is received.

The programmed subaudible tone signal is output from the
CPU (LOGIC unit; IC1, pin 9) directly when transmitting with
a tone.

LINE

HV

VCC

VHT2V

UHT2V

R3V

+3S

DESCRIPTION

The voltage from the external power supply or
attached battery pack.

The same voltage as the HV line (external power
supply or battery pack) which is controlled by the
power switch ([POWER] control).

Common 3 V converted from the VCC line by the
+3CPU regulator IC (LOGIC unit; IC2). The out­put voltage is supplied to the +3C, R3 and T4
regulator circuits, etc.

Common 3 V converted from the VCC line by the
+3C regulator circuit (LOGIC unit; Q4, Q5, Q40
and D3) using the +3CPU regulator (LOGIC unit;
IC2).

3 V for receiver circuit converted from the VCC
line by the R3 regulator circuit (2F unit; Q4, Q5
and D402).

4 V for transmitter circuit converted from the
VCC line by the T4 regulator circuit (1F unit;
Q702, Q703 and D702). The T4 regulator circuit
is controlled by the CPU (LOGIC unit; IC1, pin

45) via T4 control regulator circuit (1F unit;
Q704).

4-4 POWER SUPPLY CIRCUITS

VOLTAGE LINE

• PLL circuit

Shift register

Prescaler

Phase
detector

Loop

filter

Programmable
counter

Programmable
divider

Ref. osc. X1

(15.2 MHz)

"2NDLO" signal to the
FM IF IC (2F unit)

Q304, Q305, D303, D304

V VCO

U VCO

Buffer

Buffer

Buffer

Q852

Q352

Q306

3
4
5

PSTB

IC851 (PLL IC)

CLK
DATA

17

16

13

19

Q301, Q302, D301, D302

DUAL VCO BOARD

Prescaler

Programmable
counter

Phase
detector

3

8

Loop

filter

"VTUNE" signal to VHF
RF circuit (2F unit)

2

Buffer

Q351

D351

D352

to VHF buffer amp.
circuit

to UHF buffer amp.
circuit

Pin Port

Description

number name

Pin Port

Description

number name

4 - 5

4-5 PORT ALLOCATIONS

4-5-1 CPU (LOGIC UNIT; IC1)

2

3

4

5

6

7

8

9

10

12

17

21
22

23
24

28–31

32

33

39

40

41

REMOTE

SD

CTCIN

PCON

PLST

PLCK/ECK

PDA/UL

CTCSS

DTMF

NOISE

LOCK

DIUD
DICK

POWER

CONT

KR3–KR0

PTT

RESET

CFC

ESIO

BLED

Input port for remote control signal
from an optional HM-75A microphone
via the [EXT MIC] jack.

Input port for detected S-meter signals
from the IC101 (pin 12) on the 2F unit.

Input port for received CTCSS tone
signals.

Output port for +3C regulator circuit
control signals.

“HIGH”: Power ON.
Output PLL strobe signals.
Output port for clock signals to PLL

and EEPROM ICs.
DATAbus line for PLL.

• Outputs PLL DATA when PLL is

locked.

• When PLL is unlocked, PLL IC

releases the port being pulled up,
therefore, the CPU receives “HIGH”

level signal.
Output port for CTCSS tone signals.
Output port for:

• Beep audio signals while receiving.

• DTMF signals or 1,750 Hz tone sig-

nal while transmitting.

(According to versions)
Input pulse signals for noise squelch

from the IC101 (pin 13) on the 2F unit.
Input port for the [LOCK] switch.

“LOW” : [LOCK] switch is ON.

Inputs up/down signals from the
[DIAL] control.

Input port for dial clock signals.
Input port for the [POWER] switch.

“Low” : [POWER] switch is pushed.
Outputs LCD contrast control signals.
Input port for key matrix.
Input port for the PTT control circuit.

“HIGH”: When transmitting.
Input port for reset circuit (LOGIC unit;

IC3, pin 1).
Outputs control signals to the power

supply of the CTCSS band-pass filter
(LOGIC unit; Q45).

“LOW” : Activates the BPF.
DATA bus line for the EEPROM

(LOGIC unit; IC15) data signals.
Outputs [BUSY] LED control signals.

“HIGH”: The [BUSY] LED lights.

42

43

44

46

47

48

49

55

56

Outputs LCD backlight control signals.

“High” : The backlight lights.

Output port for the microphone ampli­fier (LOGIC unit; IC12).

“LOW” : Activates the mic. amplifier.

Output a mute signal.

[MM] : Microphone mute for DTMF

or 1,750 Hz tone while
transmitting.

[RM] : Audio mute for squelch cir-

cuit while receiving.

“HIGH”: To mute one of above.

Outputs transmit frequency band con­trol signals.

“HIGH”: UHF band.
“LOW” : VHF band.

Output port for the UHF band VCO
(DUAL-VCO board; Q301, Q302 and
D301) control signals.

“HIGH”: Activates the UHF-VCO.

Output port for the VHF band VCO
(DUAL-VCO board; Q304, Q305 and
D303) control signals.

“HIGH”: Activates the VHF-VCO.

Output port for SHIFT signals to the
shift switches (1F unit; Q354, Q854).

“HIGH”: Transmit on VHF.
“LOW” : Transmit on UHF.

Outputs control signals to the AF reg­ulator circuit (2F unit; Q151,Q152).

“HIGH”: Activates the AF amplifier.

Output port for the TX output power
(HIGH or LOW) select signals.

“LOW” : HIGH power is selected.

LIGHT

MICC

MM/RM

TXSEL

HVCO

LVCO

SHIFT

AFON

H/L

5 - 1

SECTION 5 ADJUSTMENT PROCEDURES

5-1 PLL AND TRANSMITTER ADJUSTMENT

PLL LOCK
VOLTAGE
(VHF)

(UHF)

PLL
REFERENCE
FREQUENCY

OUTPUT
POWER

FM
DEVIATION

DTMF
DEVIATION
(USA-3,SEA
only)

TONE CALL
DEVIATION
(EUR, ITA
only)

ADJUSTMENT

ADJUSTMENT ADJUSTMENT CONDITION

MEASUREMENT

VALUE

POINT

UNIT LOCATION UNIT ADJUST

1

2
1

2
1

1

2

3

4

1

2

1

1

• Displayed frequency :

145.000 MHz

• Receiving

• Transmitting

• Displayed frequency :

440.000 MHz [USA-3]

430.000 MHz [Other]

• Receiving

• Transmitting

• Displayed frequency :

445.000 MHz [USA-3]

435.000 MHz [Other]

• Transmitting

• Displayed frequency :

145.000 MHz

• Output power: High

• Transmitting

• Output power: Low

• Transmitting

• Displayed frequency :

445.000 MHz [USA-3]

435.000 MHz [Other]

• Output power: High

• Transmitting

• Output power: Low

• Transmitting

• Displayed frequency :

145.000 MHz

• Connect an audio generator to
the [MIC] connector and set as:
1 kHz/95 mV

• Set the FM deviation meter as :

HPF : OFF
LPF : 20 kHz
De-emphasis : OFF
Detector : (P–P)/2

• Output power: High

• Transmitting

• Displayed frequency :

445.000 MHz [USA-3]

435.000 MHz [Other]

• Output power: High

• Transmitting

• Displayed frequency :

445.000 MHz [USA-3]

435.000 MHz [SEA]

• Push [D] key while transmitting

• Displayed frequency:

435.000 MHz

• Push [TONE] key while transmit-

ting

1F

Top

panel

Top

panel

Top

panel

Top

panel

Top

panel

Connect a digital
multimeter or an
oscilloscope to the
“VLV”.

Connect a digital
multimeter or an
oscilloscope to the
“ULV”.

Loosely couple a
frequnecy counter
to the antenna con­nector.

Connect an RF
power meter to the
antenna connector.

Connect an FM
deviation meter to
the antenna con­nector through an
attenuator.

Connect an FM
deviation meter to
the antenna con­nector through an
attenuator.

Connect an FM
deviation meter to
the antenna con­nector through an
attenuator.

1.3 V

0.9 V – 1.7 V

2.2 V

1.9 – 2.5 V

445.0000 MHz
[USA-3]

435.0000 MHz
[Other]

5.5 W

0.5 W

5.5 – 6.0 W

0.5 W

± 4.3 kHz

± 4.3 kHz

± 3.5 kHz

± 3.5 kHz

DUAL-

VCO

1F

2F

2F

LOGIC

LOGIC

L303

Verify

L301

Verify
C369

R302

R316

R304

R313

R308

R314

R147

R147