Icom IC-F5062, IC-F5061, IC-F5063 User Manual

VHF TRANSCEIVERS

S-14319XZ-C1 Feb. 2007

INTRODUCTION CAUTION

This service manual describes the latest service information for the IC-F5061/F5062/F5063 VHF TRANSCEIVERS at the time of publication.

MODEL VERSION CHANNEL SPACING TX POWER

IC-F5061 USA-01 15.0/30.0 kHz 50 W IC-F5062 EXP-01 12.5/25.0 kHz IC-F5063 EUR-01 12.5/20/25.0 kHz

To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation.

25 W

NEVER connect the transceiver to an AC outlet or to a DC power supply that uses more than 15 V. This will ruin the transceiver.

DO NOT expose the transceiver to rain, snow or any liquids.

DO NOT reverse the polarities of the power supply when

connecting the transceiver.

DO NOT apply an RF signal of more than 20 dBm (100 mW) to the antenna connector. This could damage the transceiver’ s front end.

ORDERING PARTS

Be sure to include the following four points when ordering replacement parts:

1. 10-digit Icom parts numbers

2. Component part number and name

3. Equipment model name and unit name

4. Quantity required

1110003491 S.IC TA31136FNG IC-F5061 MAIN UNIT 5 pieces

8820001210 Screw 2438 screw IC-F5062 Top cover 10 pieces

Addresses are provided on the inside back cover for your convenience.

REPAIR NOTES

1. Make sure a problem is internal before disassembling the transceiver.

2. DO NOT open the transceiver until the transceiver is disconnected from its power source.

3. DO NOT force any of the variable components. Turn them slowly and smoothly.

4. DO NOT short any circuits or electronic parts. An insulated tuning tool MUST be used for all adjustments.

5. DO NOT keep power ON for a long time when the transceiver is defective.

6. DO NOT transmit power into a signal generator or a sweep generator.

7. ALWAYS connect a 50 dB to 60 dB attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.

8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver.

Icom, Icom Inc. and Kingdom, Germany, France, Spain, Russia and/or other countries.

logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United

CONTENTS

SECTION 1 SPECIFICATIONS

SECTION 2 INSIDE VIEWS

SECTION 3 DISASSEMBLY INSTRUCTIONS

SECTION 4 OPTIONAL UNITS INSTALLATIONS

SECTION 5 CIRCUIT DESCRIPITON

5-1 RECEIVER CIRCUITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

5-2 TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2

5-3

5-4 POWER SUPPLY CIRCUITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4

5-5 PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5

SECTION 6 ADJUSTMENT PROCEDURES

6-1 PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

6-2 FREQUENCY ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2

6-3 TRANSMIT ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3

6-4 RECEIVE ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4

FREQUENCY SYNTHESIZER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3

SECTION 7 PARTS LIST

SECTION 8 MECHANICAL PARTS AND DISASSEMBLY

SECTION 9 BOARD LAYOUTS

SECTION 10 BLOCK DIAGRAM

SECTION 11 VOLTAGE DIAGRAM

SECTION 12 HM-152

SECTION 1 SPECIFICATIONS

[USA] [EXP] [EUR]

• Frequency coverage 136–174 MHz

• Type of emission Wide 16K0F3E (25.0 kHz)

Middle – 14K0F3E (20.0 kHz)

11K0F3E (12.5 kHz)

Narrow

• Number of programable channels max. 512 channels (128 zones)

• Antenna impedance

• Operating temperature range −30˚ to +60˚; −22˚F to +140˚F –25˚C to +55˚C

• Power supply requirement

GENERAL

(negative ground)

• Current drain (approx.)

• Dimensions (projections not included)

Stand-by 300 mA

Max.audio 1200 mA

at 25 W 7 A

at 50 W 14 A

8K10F1E/D (12.5 kHz)

4K00F1E/D(6.25 kHz)

50 Ω (nominal)

13.6 V DC (nominal) 13.2 V DC (nominal)

160 (W) × 45 (H) × 150 (D) mm

; 2 3/32 (W) × 4 23/32 (H) × 1 9/32 (D) in

8K50F3E (12.5 kHz)

4K00F1E/D (6.25 kHz)

• Weight (with BP-231, approx.)

• Transmit output power 50 W 25 W

• Modulation Variable reactance frequency modulation

• Max. permissible deviation Wide ±5.0 kHz

Middle – ±4.0 kHz

Narrow ±2.5 kHz

• Frequency error ±1.0 ppm ±1.5 kHz

• Spurious emission

• Adjacent channel power Wide More than 70 dB

TRANSMITTER

• Audio harmonic distortion 3% typ. (with 1 kHz AF 40% deviation)

• FM hum and noise (without CCITT filter)

• Limiting charact of modulation 70–100% of max. deviation

• Microphone impedance 600

• Receive system Double-conversion superheterodyne

• Intermediate frequencies 1st IF; 46.35 MHz, 2nd IF; 450 kHz

• Sensitivity

• Squelch sensitivity (at threshold) 0.25 µV typ.

• Adjacent channel selectivity

RECEIVER

• Spurious response More than 85 dB (90 dB typ.)

• Intermodulation More than 75 dB (77 dB typ.) More than 65 dB (70 dB typ.)

• Hum and noise (without CCITT filter)

• Audio output power 4 W typ. at 10% distortion with a 4 Ω load

• Audio output impedance 4

Measurements made in accordance with EIA-152-C/204D, TIA-603 ([USA],

All stated specifications are subject to change without notice or obligation.

Middle – More than 70 dB

Narrow More than 60 dB

Wide More than 40 dB (45 dB typ.) –

Narrow More than 34 dB (40 dB typ.) –

0.25 µV typ. at 12 dB SINAD

Wide More than 80 dB (85 dB typ.)

Middle − More than 78 dB (83 dB typ.)

Narrow More than 70 dB (75 dB typ.)

Wide More than 45 dB (50 dB typ.) –

Narrow More than 40 dB (45 dB typ.) –

75 dB typ.

[EXP]) or

1310 g; 2 Ib 14 oz

0.25 µW (≤1 GHz),

1.0 µW (>1 GHz)

Ω

−4 dBµV (EMF) typ.

at 20 dB SINAD

Ω

EN 300 086 ([EUR]).

1 - 1

SECTION 2 INSIDE VIEWS

• FRONT UNIT

FRONT CPU

(IC503: HD64F3687)

FRONT CPU CLOCK

(X501: CR-764)

LCD DRIVER (IC501: S1D15206F)

• MAIN UNIT

REF OSC (X1: CR-826)

PLL IC (IC4: LMX2352TM)

CPU CLOCK (X5: CR-764)

AF LPF (IC7: NJM12902V)

LEVEL CONV. (IC19: DS14C232TM)

AF SWITCH/AMP (IC1: NJM12902V)

BBIC CLOCK (X2: CR-765)

IF IC (IC170: TA31136FNG)

VCO

2 - 1

SECTION 3 DISASSEMBLY INSTRUCTION

1. Removing the front panel

q Turn the transceiver’s power OFF, then disconnect the DC power cable w Unscrew the 4 bottom screws, then remove the bottom cover from the transceiver in the direction of the arrow.

Bottom cover

e Remove the front panel from the main body using a standard cabinet screw driver as shown below.

Standard screw driver

Main body

2. Removing the MAIN UNIT

q Unscrew 7 screws A, and unsolder 3 points B.

w Unscrew 3 screws C and remove the shield cover. e Unsolder 3 points D (at the antenna connector) and

5 points E (at the PA module). r Remove the clip.

Shield cover

Front panel

r Disconnect the flat cable from the front panel.

Flat cable

Front panel

Main body

Front panel

Clip

t Remove the bush, and remove the MAIN UNIT in the direction of the arrow.

Bush

3 - 1

SECTION 4 OPTIONAL UNITS INSTALLATION

BEFORE INSTALLING OPTIONAL UNITS

A sponge with an adhesive strip has been added to optional units (UT-96R, UT-108R, UT-109R, UT-110R, UT-119R, UT-119H, UT-124, UT-124R). Remove the bottom protective papar, and attach the sponge to the speciﬁ ed position on the optional units as below.

• UT-96R • UT-108R/UT-124/UT-124R

Supplied sponge

• UT-109R/UT-110R • UT-119R

Supplied sponge

4 - 1

Optional UT-96R or UT-119H installation

Install the optional UT-96R or UT-119H unit as follows:

Turn the power OFF, then disconnect the DC power cable.

Unscrew the 4 cover screws, then remove the bottom cover.

Install the UT-96R to J1 and the UT-119H to J2 as shown

in the diagram below.

Remove the protective paper from the supplied sponge,

then attach it on the installed unit.

Replace the bottom cover and screws, then re-connect

the DC power cable.

Sponge

UT-96R

*This illustration describes the UT-96R installation.

Front panel

Optional UT-109R or UT-110R installation

Turn the power OFF, then disconne ct the DC power cable.

Unscrew the 4 cover screws, then remove the bottom cover.

Cut the pattern on the PCB at the A (MIC) and B (AF OUT)

as shown below.

Install the scrambler unit to J1 as described in the instal-

lation of optional UT-96R installation as above.

Remove the protective paper from the supplied sponge,

then attach it on the installed unit.

Replace the bottom cover and screws.

Front panel

NOTE: When uninstalling the unit

Be sure to re-solder the disconnected points as below when you remove the unit. Otherwise no TX modulation or AF output is available.

Re-solder

4 - 2

SECTION 5 CIRCUIT DESCRIPTION

5-1 RECEIVER CIRCUITS

RF CIRCUITS

The antenna switching circuit toggles between the receive (RX) line and transmit (TX) line. RF ampliﬁ er received signals within the frequency coverage.

Received signals from the antenna are passed through Low Pass filter (LPF; L40, C369, C370), TX power detector (D47, D49, D51) and another LPF (L38, L39, C343, C345, C356, C357), then applied to the antenna switching circuit (D38/ D39, L37, C337, C346).

The received signals are passed through the antenna switching circuit as an LPF (L37, C337, C346), LPF (L35, C322, C322, C323, C336) and two-staged tuned Bandpass Filter (BPF; D34, L32, C299, C300 and D31, L31, C278, C279), then applied to the RF amplifier (Q31).

The amplified signals are passed through another twostaged tuned BPF (D27, L28, C260−C263, C242 and D26, L26, C219, C220, C240) and applied to the 1st mixer (IC10; pins 4, 5, L18, L19, L24).

1ST IF CIRCUITS

The amplified received signals from the RF circuit are converted into the 1st IF signal, ﬁ ltered and ampliﬁ ed at the 1st IF circuits.

The received signals from the RF circuits are mixed with 1st Local Oscillator (LO) signal from the RX VCOs, to be converted into the 1st IF signal. The converted 1st IF signal is amplified by 1st IF amplifier (Q50). The amplified 1st IF signal is passed through the 1st IF filter (FI3 for analog mode, FI4 for digital mode) via filter switches (Q20, D21, D66, D67 on input side; D6, D68, D69 on output side) to suppress unwanted signals. The filtered 1st IF signal is amplified by another 1st IF amplifier (Q12), then applied to the 2nd IF circuits.

2ND IF CIRCUITS

The 1st IF signal is converted into the 2nd IF signal, amplified and demodulated in the IF IC.

ampliﬁ es the

The 1st IF signal from the 1st IF amplifier (Q12) is applied to the IF IC (IC5, pin 16). The applied signal is converted into the 2nd IF signal by being mixed with the 2nd LO signal from X1 via tripler (Q3, L3, L2, C32−C35).

The converted 2nd IF signal is output from pin 3, and passed through the 2nd IF filter (FI1). The filtered 2nd IF signal is passed through (bypassed) another 2nd IF filter (FI2) via filter switches (D1 on input side; D2 on output side). The filtered signal is then applied to the IF IC (IC5, pin

5), and amplified by 2nd IF amplifier. The amplified signal is FM-demodulated by quadrature detector (IC5, pins 10, 11; X3).

The demodulated AF signals are output from pin 9, then applied to the AF circuits.

AF CIRCUITS

The demodulated AF signals from the IF IC are amplified and ﬁ ltered at AF circuits.

This transceiver employs the base band IC for audio signal processing for both transmit and receive. The base band IC is an audio processor and composed of pre-amplifier, compressor, expander, scrambler, etc. in its package.

The demodulated AF signals from IF IC (IC5, pin 9) are passed through Digital/Analog switch (IC8, pins 2, 15), and applied to the base band IC (IC2, pin 23).

The applied AF signals are amplified at the amplifier section and level adjusted at the volume controller section, then suppressed unwanted 3 kHz and higher audio signals at LPF. The filtered AF signals are applied (bypassed) the TX/ RX HPF, scrambler, de-emphasis sections in sequence.

The TX/RX HPF filters out 250 Hz and lower audio signals, and the de-emphasis circuit obtains –6 dB/oct of audio characteristics. The expander expands the compressed audio signals and also noise reduction function is provided.

The AF signals are then level adjusted at the volume controller section and amplified at the amplifier section, then output from pin 20 (IC2).

• 2nd IF AND DEMODULATOR CIRCUITS

D/A converter

Demodulated signals to the AF circuits

(IC6)

Quadrature

detector

Filter amp.

1110

Limiter amp.

Buffer

N/W SW

735

Q13

+5V

RSSI

5 - 1

FI2

N/W SW

FI1

Noise

detector

Mixer

45.9 MHz

BPF

IF IC (IC5)

1312

“D_IF” signal to the optional digital unit via J2

1st IF signal from the IF amplifier (Q12)

“NOIS” signal to the CPU (IC14: pin 113)

“RSSI” signal to the CPU (IC14: pin 71)

15.3 MHz

The processed AF signals from the base band IC (IC2) are passed through the AF mute switch (IC8, pins 3, 4) and D/A converter (IC6, pins 15, 16) for level adjustment. The level adjusted AF signals are amplified by AF amplifier (IC22).

The amplified AF signals are then;

- Output from D-sub 25 pin connector (CONNECT UNIT; J602). or

- Buffer-amplified by Q49, then applied to connected micro phone via FRONT UNIT. or

- Applied to the AF power amplifier (IC21, pin 1) to obtain AF output power level, then applied to the internal/external speaker via external speaker jack (J7).

5-2 TRANSMITTER CIRCUITS

MICROPHONE AMPLIFIER CIRCUITS

The AF signals from the microphone (MIC signals) are filtered and level-adjusted at the microphone amplifier circuits.

AF signals from the connected microphone (MIC signals) are passed through (bypassed) the ALC (Automatic Level Control) amplifier (FRONT UNIT; IC505, pins 3, 5) via AF switch (FRONT UNIT; IC507, pins 1, 6/7), then applied to the microphone amplifier (FRONT UNIT; IC508, pin 3). The amplified MIC signals are output from pin 4, and applied to the MAIN UNIT.

The MIC signals from the FRONT UNIT are passed through the Int./Ext. MIC switch (IC23, pins 1, 6), and applied to the base band IC (IC2, pin 3) and processed.

SQUELCH CIRCUITS <NOISE SQUELCH>

The squelch mutes the AF output signals when no RF signals are received. By detecting noise components (30 kHz and higher signals) in the demodulated AF signals, the squelch circuit toggles the AF power ampliﬁ er ON and OFF.

A portion of the demodulated AF signals from the IF IC (IC5, pin 9) are applied to the D/A converter (IC6, pin 1) for level adjustment (squelch threshold adjustment). The level-adjusted AF signals are output from pin 2 and passed through the noise filter (IC5, pins 7, 8, R121−R124, C216

−C218). The filtered noise signals are amplified the noise components only.

The ampliﬁ ed noise components are converted into the pulsetype signal at the noise detector section, and output from pin 13 as the “NOIS” signal. The “NOIS” signal is applied to the CPU (IC14, pin 113), Then the CPU outputs signal “AFON2” signal from pin 15 to the AF power amplifier controller (Q51, Q52, D65), according to the “NOIS” signal level. The AF power ampliﬁ er controller toggles AF power ampliﬁ er (IC21) ON and OFF according to the “AFON” signal.

The tone squelch circuit detects tone signals and opens the squelch only when receiving a signal containing a matched sub audible tone. When the tone squelch is in use, and a signal with a mismatched or no sub audible tone is received, the tone squelch circuit mutes the AF signals even when the noise squelch is open.

• CTCSS/DTCS

A portion of the demodulated AF signals are passed through the active LPF (Q4, R45, R46, R47, R63, R64, C45, C46, C47, C71) to filters CTCSS/DTCS signal. The filtered signal is applied to the CPU (IC14, pin 64). The CPU compares the applied signal and the set CTCSS/DTCS, then outputs control signal as same as “NOISE SQUELCH.”

• 2/5 TONE AND DTMF

2/5 tone signals in the demodulated AF signals are passed through the LPF in the base band IC (IC2) and output from pin 21, then applied to the CPU (IC14, pin 63) via tone amplifer (IC1, pins 8, 9), and decoded.

• BASE BAND IC BLOCK DIAGRAM

The applied MIC signals are ampliﬁ ed at the ampliﬁ er (TXA1), and level adjusted at the volume controller (VR1). The level adjusted MIC signals are applied (bypassed) the compressor section, pre-emphasis section, TX/RX HPF, de-scrambler, limiter, splatter, in sequence, then applied to another volume controller.

The compressor compresses the MIC signals to provide high S/N ratio for receive side, and the pre-emphasis obtains +6 dB/oct audio characteristics. The TX/RX HPF filters out 250 Hz and lower audio signals, the limiter limits its level and the splatter filters out 3 kHz and higher audio signals. The filtered MIC signals are level adjusted at another volume controller (VR2), and then output from pin 7 via smoothing ﬁ lter (SMF).

The MIC signals from the base band IC are passed through the digital/analog switch (IC8, pins 12, 14), FM/PM switch (IC3, pins 13, 14), and applied to the AF mixer (IC1, pin

13) where the MIC signals and tone signals are mixed with. The mixed MIC signals are passed through D/A converter (IC6, pins 3, 4) for level adjustment. The level adjusted MIC signals are then applied to the VCO as modulation signals.

MODULATION CIRCUITS

The modulation circuits modulates the VCO oscillating signal using the modulation signals.

The MIC signals from the microphone amplifier circuits are applied to the D20 of TX VCO (Q19, D14, D17, D18, D20) as the modulation signals, and modulate the VCO oscillating signal by changing the reactance of D20.

The FM-modulated VCO output is amplified by bufferamplifiers (Q22, Q29), then applied to the power amplifiers via D24 as the TX signal.

SIGNALING ENCODE

5/2-TONE, DTMF and CTCSS/DTCS signals are output from the CPU (IC14) and passed through the LPF (IC7) and level converter (IC6), then applied to the AF mixer (IC1, pin 13) and mixed with MIC signals. The mixed tone signals are passed through the D/A converter (IC6, pins 3,

4) for level adjustment. The level adjusted tone signals are applied to the both of TX VCO (Q19, D14, D17, D18, D20) and reference frequency oscillator (X1, pin 1) via the level adjuster (IC1, pins 1, 3).

BASE BAND IC (IC2)

Com-

pressor

LPF

Pre-

emphasis

TX/RX

HPF

Scrambler/

De-scrambler

Limiter Splatter VR2

De-

emphasis

Expander

VR4

SMF

RXA2

7 MOD

SIGNAL

TXA1

RXA1

VR1

(HPF)

VR3

(HPF)

3TXIN

23RXIN

21SDEC

5 - 2

TX POWER AMPLIFIERS

The transmit signal from the TX VCO is amplified to the transmit output level by the transmit ampliﬁ ers.

The TX VCO output signal from buffer amplifier (Q29) is applied to the YGR amplifier (Q30) via the TX/RX switch (D24). The amplified TX signal is passed through the LPF (L29, L30, C269−C271, C290), and applied to the RF power module (IC15, pin 1) and power-amplified to obtain 50 W/25 W (max.) of TX output power.

The power-amplified TX signal is passed through the LPF as a harmonic filter (L33, C305−C308), the antenna switching circuit (D38, D39) and LPF (L38, L39, C343, C345, C356, C357).

The TX signal is also gone through the power detector (D47, D49, D51) and LPF (L40, C369, C370) before being applied to the antenna connector.

• APC CIRCUIT

APC CIRCUIT

The APC (Automatic Power Control) circuit prevents the transition of the transmit output power level which is caused by load mismatching or heat effect, etc. At the power detector, a portion of the transmit signal is rectified to produce DC voltage which is in proportion of the transmit power level.

The rectified voltage is applied to the inverted input terminal of the operational amplifier (IC17, pin 3). The TX power setting voltage “T2” from the D/A converter (IC12, pin 2) is applied to the non-inverted input terminal as the reference.

The operational amplifier compares the rectified voltage and reference voltage “T2,” and the difference of the voltage is output from the operational amplifier pin 4, and the output voltage controls the bias of YGR (Q30) amplifier and power module (IC15) for stable transmit output power.

HV T8V

Q30

IC17

YGR amp.

LPF

Transmit signal from TX/RX switch (D24)

“T2”

Q53

“TMUT”

OP. amp.

–

5-3 FREQUENCY SYNTHESIZER CIRCUITS

VCO

VCO is a oscillator whose oscillating frequency is controlled by adding voltage (lock voltage).

• RX VCO1 (Q18, D10, D13)

RX VCO1 generates the 1st LO signal for receiving 155−174 MHz signals.

• RX VCO2 (Q17, D8, D9)

RX VCO2 generates the 1st LO signal for receiving 136−155 MHz signals.

to the 1st mixer (IC10)

IC15 Powe r amp.

ANT

D47

LPF

D49

to the antenna

D51

Each output signals are amplified by the buffer amplifiers (Q22, Q29), and applied to the 1st mixer (IC10, pins 4, 5) via TX/RX switch (D25 is ON, D24 is OFF) and LPF (L22, L23, C215, C216, C236, C237), to be mixed with the received signals to produce the 46.35 MHz 1st IF signal.

• TX VCO (Q19, D14, D17, D18, D20)

The output signal is applied to the transmit ampliﬁ ers via the buffer ampliﬁ ers (Q22, Q29) and TX/RX switch (D24 is ON, D25 is OFF).

A portion of the buffer-amplified VCO output signals from the buffer amplifier (Q22) are applied to the PLL IC (IC4, pin 6) via doubler (Q25) and BPF (Q5, D4, D5, L4, R77, C84−C90).

• PLL CIRCUITS

RX VCO1 (155–174 MHz)

Q18, D10, D13

RX VCO2 (136–155 MHz)

Q17, D8, D9

Loop

filter

PLL unlock signal to the CPU (IC14, pin 73)

TX VCO

Q19, D14, D17, D18, D20

Charge

pump

Phase

detector

Programmable

Divide

ratio

adjustment

divider

Reference

divider

Buffer Q22

PLL IC (IC4)

Prescaler

Shift register

5 - 3

Buffer Q29

×3

Q25

14 15

BPF

SCK

SSO

PLL control signals from the CPU (IC14)

PLST

15.3 MHz reference frequency signal

D14

to transmitter circuit

D15

to 1st mixer circuit

15.3 MHz

+ 25 hidden pages