IBM PC 100, PC 300 Technical Manual

Technical Information Manual
PC 100 (Type 6260) and PC 300 (Type 6560)
S78H-5142-00
BM
I
IBM
Technical Information Manual
PC 100 (Type 6260) and PC 300 (Type 6560)
S78H-5142-00
Note
Before using this information and the product it supports, be sure to read the general information under Appendix B, “Notices and Trademarks” on page 43.
First Edition (August 1996)
The following paragraph does not apply to the United Kingdom or any country where such provisions are inconsistent with local law: INTERNATIONAL BUSINESS MACHINES CORPORATION PROVIDES THIS PUBLICATION “AS IS” WITHOUT
WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Some states do not allow disclaimer of express or implied warranties in certain transactions, therefore, this statement may not apply to you.
This publication could include technical inaccuracies or typographical errors. Changes are periodically made to the information herein; these changes will be incorporated in new editions of the publication. IBM may make improvements and/or changes in the product(s) and/or the program(s) described in this publication at any time.
It is possible that this publication may contain reference to, or information about, IBM products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that IBM intends to announce such IBM products, programming, or services in your country.
Requests for technical information about IBM products should be made to your IBM reseller or IBM marketing representative.
Copyright International Business Machines Corporation August 1996. All rights reserved.
Note to U.S. Government Users — Documentation related to restricted rights — Use, duplication or disclosure is subject to restrictions set forth in GSA ADP Schedule Contract with IBM Corp.
Contents
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Related Publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Manual Style . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v
Chapter 1. System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Personal Computer Description .......................................... 2
System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
System Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
System Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
System Address Maps ............................................... 7
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Input/Output Address Map ........................................... 7
DMA I/O Address Map ............................................. 9
IRQ and DMA Channel Assignments ...................................... 10
Interrupt Request Assignments (IRQ) .................................... 10
DMA Channel Assignments .......................................... 10
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power Output Parameters ............................................. 11
Component Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Advanced Power Management (APM) ...................................... 14
Chapter 2. Connectors and Jumpers ..................................... 15
System Board Connectors ............................................ 16
Diskette Drive Connector ............................................ 16
Hard Disk Drive Connectors (Primary/Secondary) ............................. 17
ISA Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PCI Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Power Supply Connectors ........................................... 20
System Board Memory Connectors ...................................... 21
Video Feature Connector ............................................ 22
I/O Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Keyboard and Auxiliary-Device (Mouse) Connectors ............................ 23
Serial Port Connectors ............................................. 24
Parallel Port Connector ............................................. 25
Monitor Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Chapter 3. Memory Subsystems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Memory-Module Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Memory-Module Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Cache Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Cache Upgrade Options ............................................ 30
Chapter 4. System Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Hardware Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Hardware Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Diskette Drives and Controller ......................................... 33
Hard Disk Drives and Controller ........................................ 34
Copyright IBM Corp. August 1996 iii
Software Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Software Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Machine-Sensitive Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
BIOS Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Chapter 5. Bus Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Bus Architecture Descriptions ........................................... 37
ISA Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
PCI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Expansion-Bus Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Bus Voltage Levels ............................................... 39
Appendix A. Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
POST Error Codes ................................................. 40
Beep Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Appendix B. Notices and Trademarks .................................... 43
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
iv Technical Information Manual
Figures
1. System Board Devices, Features, and Options ............................. 4
2. System Board Diagram ........................................... 6
3. System Memory Map ............................................ 7
4. I/O Address Map ............................................... 7
5. DMA I/O Addresses for Memory Addresses, Word Counts, and Command/Status Registers ... 9
6. Interrupt Request Assignments ...................................... 10
7. DMA Channel Assignments ........................................ 10
8. AC Input Power Requirements ....................................... 11
9. Power Output Parameters (145 Watt) ................................... 11
10. Component Maximum Current ....................................... 12
11. Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
12. Advanced Power Management Modes .................................. 14
13. Diskette Drive Connector Signal and Pin Assignments ......................... 16
14. EIDE Connector Signal and Pin Assignments .............................. 17
15. I/O Channel (ISA Bus) Connector ..................................... 18
16. PCI Connector Signal and Pin Assignments ............................... 19
17. Power Supply Connector (Internal Devices) Signal and Pin Assignments .............. 20
18. Power Supply Connector (System Board) Signal and Pin Assignments ............... 20
19. System Board Memory Connector Signal and Pin Assignments ................... 21
20. Video Feature Connector .......................................... 22
21. Keyboard Signal and Pin Assignments .................................. 23
22. Auxiliary-Device (Mouse) Signal and Pin Assignments ......................... 23
23. Serial Port Connector Signal and Pin Assignments ........................... 24
24. Parallel Port Connector Signal and Pin Assignments .......................... 25
25. Monitor Connector Signal and Pin Assignments ............................. 27
26. Memory-Module Type, Speed, and Size – PC 100 ........................... 29
27. Memory-Module Type, Speed, and Size – PC 300 ........................... 29
28. System Memory Table ........................................... 29
29. L1 and L2 Cache .............................................. 30
30. Features of IBM Option Kit 76H0236 ................................... 30
31. 5.25-Inch Diskette Drive Reading, Writing, and Formatting Capabilities ............... 33
32. 3.5-Inch Diskette Drive Reading, Writing, and Formatting Capabilities ................ 33
33. POST Error Messages – PC 100 and PC 300 .............................. 40
34. Beep Codes – PC 100 ........................................... 42
35. Beep Codes – PC 300 ........................................... 42
Copyright IBM Corp. August 1996 v
Preface
This
Technical Information Manual
PC 300 (Type 6560). It is intended for developers who want to provide hardware and software products to operate with these IBM computers and provides a more in-depth view of how the computers work. Users of this publication should have an understanding of computer architecture and programming concepts.
Related Publications
In addition to this manual, the following IBM publications provide information related to the operation of the PC 100 and PC 300. To order publications in the U.S. and Puerto Rico, call 1-800-879-2755. In other countries, contact an IBM reseller or an IBM marketing representative.
Using Your Personal Computer – PC 100
Hardware Maintenance Manual – PC 100
Using Your Personal Computer – PC 300
Installing Options in Your Personal Computer – PC 300
provides information about the IBM PC 100 (Type 6260) and the IBM
1
1
Understanding Your Personal Computer – PC 300
Hardware Maintenance Manual – PC 300
Manual Style
Attention: The term
Use of reserved areas can cause compatibility problems, loss of data, or permanent damage to the hardware. When the contents of a register are changed, the state of the reserved bits must be preserved. When possible, read the register first and change only the bits that must be changed.
In this manual, signals are represented in a small, all-capital-letter format ( the signal indicates that the signal is active low. No sign in front of the signal indicates that the signal is active high.
In this manual, use of the letter “h” indicates a hexadecimal number. Also, when numerical modifiers such as “K”, “M” and “G“ are used, they typically indicate powers of 2, not powers of 10 (unless expressing hard disk storage capacity). For example, 1 KB equals 1024 bytes (2 and 1 GB equals 1 073741824 bytes (230).
When expressing storage capacity, MB equals 1000 KB (1024000). The value is determined by counting the number of sectors and assuming that every two sectors equals 1 KB.
The actual storage capacity available to the user can vary, depending on the operating system and other system requirements.
reserved
describes certain signals, bits, and registers that should not be changed.
-ACK). A minus sign in front of
10
), 1 MB equals 1 048576 bytes (220),
1
Not available in the U.S. and Puerto Rico.
vi  Copyright IBM Corp. August 1996
Chapter 1. System Description
Chapter 1. System Description
Personal Computer Description .......................................... 2
System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
System Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
System Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
System Address Maps ............................................... 7
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Input/Output Address Map ........................................... 7
DMA I/O Address Map ............................................. 9
IRQ and DMA Channel Assignments ...................................... 10
Interrupt Request Assignments (IRQ) .................................... 10
DMA Channel Assignments .......................................... 10
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power Output Parameters ............................................. 11
Component Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Physical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Advanced Power Management (APM) ...................................... 14
Copyright IBM Corp. August 1996 1
Chapter 1. System Description
Personal Computer Description
The IBM PC 100 (Type 6260) and PC 300 (Type 6560) are versatile products designed to provide state-of-the-art computing power with room for growth in the future. The two computer models are similar in design, utilizing the same cover, frame assembly, and system board. They differ in the type of BIOS resident and in the mix of standard features.
The major features of the PC 100 and PC 300 are:
Intel Pentium microprocessorUp to 128 MB of system memoryCirrus GD5436 video subsystem1 MB of video memory with sockets for additional 1 MB
Industry-standard compatibility
ISA/PCI I/O-bus compatibilityISA/PCI expansion slotsEnhanced EIDE hard disk driveBus master-capable EIDE controllerTwo 16550-UART serial ports (serial A and serial B)L2 cache sockets for pluggable SRAMS (256 KB)Support for advanced power management
EnergyStar compliant
Support for Plug and Play adapters and monitors
Security features
System unit size
– Four expansion slots
– Four drive bays
Note: Several model variations are available for both the PC 100 and the PC 300.
2 Technical Information Manual
Chapter 1. System Description
System Overview
Microprocessor
- Coprocessor
- L1 Cache
Processor (Local) Bus - 64-Bit
Data Buffers
Control
(ISA, DMA,
IRQ)
CMOS, Flash
Keyboard,
Mouse Ports
I/O Control
. .
Memory (DRAM)
PCI I/O Bus - 32-Bit
EIDE Control
Hard
Disk Drive,
CD-ROM
ISA I/O Bus - 16-Bit
Serial Ports
Controls
(Memory,
L2 Cache,
PCI)
Video Control,
DRAM
Video
Port
Parallel Port
L2 Cache
(SRAM) Sockets
Riser Card
(ISA/PCI Slots)
Diskette Drive
Chapter 1. System Description 3
System Features
The following figure lists the devices and features of the PC 100 and PC 300 system board. It also includes some of the options that may be added to these computers.
Figure 1 (Page 1 of 2). System Board Devices, Features, and Options
Device Features Microprocessor Intel Pentium (75/100/120/133 MHz)
32-bit address bus, 64-bit data bus8 KB internal (L1) write-through code cache8 KB internal (L1) write-back data cacheSuperscalar architecture (two execution units)Math coprocessor function included in the Pentium
Microprocessor is upgradable for future Intel microprocessor technology
External Cache (L2) DIP sockets for user-installable data/tag RAMs
256 KB asynchronous write-back unified (code and data)
Video Subsystem Cirrus Logic GD5436 SVGA video controller
Plug and Play monitor support (DDC2)Advanced Power ManagementLocal peripheral bus (LPB) interface64-bit data path width on PCI bus
Integrated DAC
64-bit graphics accelerator
1 MB of 70 ns FP DRAM
Fast Page Mode DRAMSockets for additional 1 MB
Bus Architecture ISA/PCI-bus-compatible I/O expansion slots
Synchronous 25/30/33 MHz PCI bus 50/60/66 MHz processor bus Integrated L2 cache controller
Flash ROM Subsystem 256 KB flash ROM for POST/BIOS RAM Subsystem 8 MB standard DRAM, upgradable to 128 MB
70-ns fast page (FP) or 60-ns extended data output (EDO), non-parity, dynamic random access memory (DRAM) Four 72-pin SIMM sockets in two banks
SIMMs (4 MB, 8 MB, 16 MB, or 32 MB)Matched pairs required in each bank
CMOS RAM Subsystem 128-byte CMOS RAM with real-time clock, calendar, and battery ISA/PCI Bridge ISA/PCI interface
PCI bus-master EIDE interface ISA-compatible interrupt controller ISA-compatible DMA controller
DMA Controller Seven AT-compatible DMA channels
Four 8-bit channelsThree 16-bit channels
Interrupt Controller 15 levels of system interrupts
AT bus interrupts are edge triggeredPCI bus interrupts are level sensitive
System Timers Channel 0–System timer
Channel 1–Refresh generation Channel 2–Tone generation for speaker
Audio Subsystem On-board Piezo electric beeper
2
Chapter 1. System Description
2
MHz denotes internal clock speed of the microprocessor only; other factors might also affect application performance.
4 Technical Information Manual
Chapter 1. System Description
Figure 1 (Page 2 of 2). System Board Devices, Features, and Options
Device Features Diskette Drive Controller Controller supports up to two internal diskette drives
A 3.5-in. diskette drive (1.44 MB) is standardA 5.25-in. diskette drive (1.2 MB) is optionalA second 3.5-in. diskette drive (1.44 MB) is optional and requires a 3.5-in.
conversion kit for a 5.25-in. bay
FIFO operations
Keyboard/Auxiliary-Device Controller
Parallel Port Controller One ECP/EPP parallel port
Serial Port Controller Two 16550-UART serial ports (Serial A and B) Hard Disk Drive Controller Controller supports four EIDE devices
Power 145 watt (115/230 V ac, 50/60 Hz) power supply
Security Power-on password
101-key or 104-key keyboard
Keyboard connector
Auxiliary-device (mouse) connector
Supports standard I/O mode, extended capabilities port (ECP) mode, and enhanced parallel port (EPP) mode
PCI bus-master EIDE interface
Two PCI bus-master channelsOne channel for each EIDE connector (primary and secondary)SCSI hard disk drives require a PCI SCSI adapter
Built-in overload and surge protection Advanced Power Management
Administrator password
Startup sequence control Unattended Start mode Diskette I/O control Hard disk I/O control
Chapter 1. System Description 5
Chapter 1. System Description
System Board
The following is a diagram of the PC 100 and PC 300 system board. Note that the system board for these computers might differ slightly from the one shown. A diagram of the system board, including switch and jumper settings, is provided on the underside of the computer cover.
.1/ J3 Power connector (5 V) .2/ JP11 Flash jumper .3/ JP21 FDD write protect .4/ JP4 PS/2 mouse enable/disable .5/ J5 Diskette drive connector .6/ JP23 HDD detect .7/ J8 Primary IDE connector .8/ J7 Secondary IDE connector .9/ Battery .1ð/ J9 Password jumper (CMOS clear) .11/ L2 cache memory sockets .12/ JP22 Burst mode .13/ JP19 CPU voltage .14/ Processor socket .15a/ J12 Power LED connector .15b/ J12 Hard disk drive LED connector .16/ J13 CPU fan connector .17/ JP17 CPU clock .18/ SIMM connector 1 - Bank 1 .19/ SIMM connector 2 - Bank 1 .2ð/ SIMM connector 3 - Bank 0 .21/ SIMM connector 4 - Bank 0 .22/ Tag RAM socket .23/ J6 Video feature connector .24/ JP13 Cache memory size .25/ JP14 CPU bus clock .26/ JP3 On-board VGA .27/ P4 Monitor (display) port .28/ P1 Parallel port .29/ Video memory sockets .3ð/ P2 Serial (B) port .31/ PCI/ISA riser connector .32/ P3 Serial (A) port .33/ J2 Auxiliary device (mouse) port .34/ J1 Keyboard port
3
26
25
24
2323
22
21
20
27
28
29 30
31 3232
15a
1819
15b
33 34
1
2 3
4 5
6 7 8
9
10
11
12
13
141617
Figure 2. System Board Diagram
3
Extended capabilities port/enhanced parallel port (ECP/EPP)
6 Technical Information Manual
Chapter 1. System Description
System Address Maps Memory Map
The first 640 KB of system board RAM is mapped starting at address 0000000h. A 256-byte area and a 1 KB area of this RAM are reserved for BIOS data areas. Memory can be mapped differently if POST detects an error. See the section about BIOS data areas in the
Computer BIOS Interface Technical Reference
Figure 3. System Memory Map
Address Range (Decimal)
1024K–131072K 100000–8000000 127M Extended memory 960K–1023K F0000–FFFFF 64K System BIOS 944K–959K EC000–EFFFF 16K Available 936K–943K EA000–EBFFF 8K ESCD (Plug and Play configuration area) 928K–935K E8000-E9FFF 8K Available 896K–927K E0000–E7FFF 32K BIOS reserved 800K–895K C8000–DFFFF 96K Available HI DOS memory (open to ISA and PCI bus) 640K–799K A0000–C7FFF 160K Video memory and BIOS 512K–639K 80000–9FFFF 128K Extended 0K–511K 00000–7FFFF 512K DOS applications (conventional)
Address Range (Hex)
for details.
Size Description
IBM Personal System/2 and Personal
Input/Output Address Map
The following figures list the system board I/O address maps. Any addresses that are not shown are reserved.
Figure 4 (Page 1 of 3). I/O Address Map
Address (Hex) Device
0000–000F DMA 1 0020–003F Interrupt controller 1 0040–0043 Timer 1 0044–0047 Available I/O for ISA/PCI bus 0048–004B Timer 2 004C–005F Available I/O for ISA/PCI bus 0060 Keyboard controller data byte 0061 System Port B 0062–0063 Available I/O for ISA/PCI bus 0064 Keyboard controller, command and status byte 0065–006F Available I/O for ISA/PCI bus 0070, bit 7 Enable/disable NMI 0070, bits 6:0 Real time clock address 0071 Real time clock data 0072–0077 Available I/O for ISA/PCI bus 0078 Reserved-system board setup 0079 Reserved-system board setup 007A–007F Available I/O for ISA/PCI bus 0080 POST checkpoint register 0080-008F DMA page register 0090–009F Available I/O for ISA/PCI bus 00A0–00BF Interrupt controller 2 00C0–00DE DMA 2 00DF–00EF Available I/O for ISA/PCI bus
Chapter 1. System Description 7
Figure 4 (Page 2 of 3). I/O Address Map
Address (Hex) Device
00F0 Coprocessor busy–Clear 00F1 Coprocessor reset 00F2–016F Available I/O for ISA/PCI bus 0170–0177 IDE channel 1 01F0–01F7 IDE channel 0 01F8–021F Available I/O for ISA/PCI bus 0220–0227 SMC FD-37C669, serial port 3 or 4 0228–0277 Available I/O for ISA/PCI bus 0278–027F SMC FD-37C669, parallel port 3 0280–02E7 Available I/O for ISA/PCI bus 02E8–02EF SMC FD-37C669, serial port 3 or 4 02F0–02F7 Available I/O for ISA/PCI bus 02F8–02FF SMC FD-37C669, serial port 2 (system board) 0300–0337 Available I/O for ISA/PCI bus 0338–033F SMC FD-37C669, serial port 3 or 4 0340–0375 Available I/O for ISA/PCI bus 0376–0377 IDE channel 1 0377, bit 7 IDE, diskette change 0378–037F SMC FD-37C669, parallel port 2 0380–03B0 Available I/O for ISA/PCI bus 03BC–03BE SMC FD-37C669, parallel port 1 (system board) 03E0–03E7 Available I/O for ISA/PCI bus 03E8–03EF SMC FD-37C669, serial port 3 or 4 03F0–03F5 SMC FD-37C669, diskette channel 0 03F6 IDE channel 0 03F7, bit 7 IDE, diskette change 03F7, bits 6:0 IDE channel 0 03F8–03FF SMC FD-37C669, serial port 1 (system board) 0400–0537 Available I/O for ISA/PCI bus 0CF8–0CFB PCI configuration address register 0CFC–0CFF PCI configuration data registers 0D00–0E7F Available I/O for ISA/PCI bus 0E80–0E87 Available I/O for ISA/PCI bus 0E88–0F3F Available I/O for ISA/PCI bus 0F40–0F47 Available I/O for ISA/PCI bus 0F47–042E7 Available I/O for ISA/PCI bus 42E8 Cirrus GD5436 42E9–4AE7 Available I/O for ISA/PCI bus 4AE8 Cirrus GD5436 4AE9–82E7 Available I/O for ISA/PCI bus 82E8 Cirrus GD5436 82E9–86E7 Available I/O for ISA/PCI bus 86E8 Cirrus GD5436 86E9–8AE7 Available I/O for ISA/PCI bus 8AE8 Cirrus GD5436 8AE9–8EE7 Available I/O for ISA/PCI bus 8EE8 Cirrus GD5436 8EE9–92E7 Available I/O for ISA/PCI bus 92E8 Cirrus GD5436 92E9–96E7 Available I/O for ISA/PCI bus 96E8 Cirrus GD5436 96E9–9AE7 Available I/O for ISA/PCI bus 9AE8 Cirrus GD5436 9AE9–9EE7 Available I/O for ISA/PCI bus 9EE8 Cirrus GD5436 9EE9–A2E7 Available I/O for ISA/PCI bus A2E8 Cirrus GD5436 A2E9–A6E7 Available I/O for ISA/PCI bus A6E8 Cirrus GD5436 A6E9–AAE7 Available I/O for ISA/PCI bus AAE8 Cirrus GD5436 AAE9–B2E7 Available I/O for ISA/PCI bus B2E8 Cirrus GD5436
Chapter 1. System Description
8 Technical Information Manual
Chapter 1. System Description
Figure 4 (Page 3 of 3). I/O Address Map
Address (Hex) Device
B2E9–B6E7 Available I/O for ISA/PCI bus B6E8 Cirrus GD5436 B6E9–BAE7 Available I/O for ISA/PCI bus BAE8 Cirrus GD5436 BAE9–BEE7 Available I/O for ISA/PCI bus BEE8 Cirrus GD5436 BEE9–E2E7 Available I/O for ISA/PCI bus E2E8 Cirrus GD5436 E2E9 Available I/O for ISA/PCI bus E2EA Cirrus GD5436 E2EB–FFFF Available I/O for ISA/PCI bus
DMA I/O Address Map
Figure 5 (Page 1 of 2). DMA I/O Addresses for Memory Addresses, Word Counts, and Command/Status Registers
Address (hex) Description Bits Byte Pointer
0000 Channel 0, Memory Address register 00–15 Yes 0001 Channel 0, Transfer Count register 00–15 Yes 0002 Channel 1, Memory Address register 00–15 Yes 0003 Channel 1, Transfer Count register 00–15 Yes 0004 Channel 2, Memory Address register 00–15 Yes 0005 Channel 2, Transfer Count register 00–15 Yes 0006 Channel 3, Memory Address register 00–15 Yes 0007 Channel 3, Transfer Count register 00–15 Yes 0008 Channels 0–3, Read Status/Write Command
register 0009 Channels 0–3, Write Request register 00–02 000A Channels 0–3, Write Single Mask register bits 00–02 000B Channels 0–3, Mode register (write) 00–07 000C Channels 0–3, Clear byte pointer (write) N/A 000D Channels 0–3, Master clear (write)/temp (read) 00–07 000E Channels 0–3, Clear Mask register (write) 00–03 000F Channels 0–3, Write All Mask register bits 00–03 0081 Channel 2, Page Table Address registerñ 00–07 0082 Channel 3, Page Table Address registerñ 00–07 0083 Channel 1, Page Table Address registerñ 00–07 0087 Channel 0, Page Table Address registerñ 00–07 0089 Channel 6, Page Table Address registerñ 00–07 008A Channel 7, Page Table Address registerñ 00–07 008B Channel 5, Page Table Address registerñ 00–07 008F Channel 4, Page Table Address/Refresh register 00–07
00–07
00C0 Channel 4, Memory Address register 00–15 Yes 00C2 Channel 4, Transfer Count register 00–15 Yes 00C4 Channel 5, Memory Address register 00–15 Yes 00C6 Channel 5, Transfer Count register 00–15 Yes 00C8 Channel 6, Memory Address register 00–15 Yes 00CA Channel 6, Transfer Count register 00–15 Yes 00CC Channel 7, Memory Address register 00–15 Yes 00CE Channel 7, Transfer Count register 00–15 Yes 00D0 Channels 4–7, Read Status/Write Command
register 00D2 Channels 4–7, Write Request register 00–02 00D4 Channels 4–7, Write Single Mask register bit 00–02 00D6 Channels 4–7, Mode register (write) 00–07 00D8 Channels 4–7, Clear byte pointer (write) N/A 00DA Channels 4–7, Master clear (write)/temp (read) 00–07 00DC Channels 4–7, Clear Mask register (write) 00–03 00DE Channels 4–7, Write All Mask register bits 00–03
Chapter 1. System Description 9
00–07
Figure 5 (Page 2 of 2). DMA I/O Addresses for Memory Addresses, Word Counts, and Command/Status Registers
Address (hex) Description Bits Byte Pointer
00DF Channels 5–7, 8- or 16-bit mode select 00–07 ñ Upper byte of Memory Address register
IRQ and DMA Channel Assignments
The following figures list the interrupt request (IRQ) and direct memory access (DMA) channel assignments.
Interrupt Request Assignments (IRQ)
Figure 6. Interrupt Request Assignments
Interrupt
Request (IRQ)
NMI Critical system error SMI System/power management interrupt
0 Reserved (internal timer) 1 Reserved (keyboard buffer full) 2 Reserved (cascade interrupt from slave) 3 Serial port 2ñ 4 Serial port 1ò 5 Parallel port 2ñ 6 Diskette controllerò 7 Parallel port 1ò 8 Reserved (real-time clock)
9 Video adapter (if installed)ñ 10 ISA/PCI bus 11 ISA/PCI bus 12 Mouse portñ 13 Reserved (math coprocessor) 14 IDE Channel 1ñ 15 IDE Channel 2ò
ñ If not assigned, this resource is available for the ISA/PCI bus. ò If not assigned, this resource is available for the ISA bus.
System Resource
Chapter 1. System Description
DMA Channel Assignments
Figure 7. DMA Channel Assignments
DMA
Channel
0 8 bits ISA busñ
1 8 bits ISA busñ
2 8 bits Reserved (diskette drive)
3 8 bits ECP/EPP parallel portñ
4 Reserved (cascade channel)
5 16 bits ISA bus
6 16 bits ISA bus
7 16 bits ISA bus
ñ If not assigned, this resource is available for the ISA bus.
10 Technical Information Manual
Data Width
System Resource
Loading...
+ 40 hidden pages