For low-power testing proposal.
It can be cancel for cost-down proposal
VIO18_PMU
VTCXO_PMU
VIO18_PMU
VIO18_PMU
DVDD12_EMI
T13
T16
T17
T18
T21
M11
U11
U12
V11
V12
U201-B
T11
DVSS
R11
DVSS
R2
DVSS
G6
DVSS
G7
DVSS
G14
DVSS
G17
DVSS
G20
DVSS
H10
DVSS
M20
DVSS
N11
DVSS
A19
DVSS
A26
DVSS
B4
DVSS
B10
DVSS
E21
DVSS
F6
DVSS
B12
DVSS
B14
DVSS
B17
DVSS
B22
DVSS
B24
DVSS
C4
DVSS
C8
DVSS
C11
DVSS
C12
DVSS
C16
DVSS
C17
DVSS
C18
DVSS
C20
DVSS
C21
DVSS
C22
DVSS
C23
DVSS
C25
DVSS
D4
DVSS
D5
DVSS
D7
DVSS
D9
DVSS
D11
DVSS
D13
DVSS
D15
DVSS
D17
DVSS
D21
DVSS
D24
DVSS
E5
DVSS
E8
DVSS
E10
DVSS
E18
DVSS
F18
DVSS
P21
DVSS
L10
DVSS
AE5
AVSS18_WBG
V7
DVSS
U7
DVSS
W7
DVSS
Y7
AVSS18_WBG
AB6
AVSS18_WBG
AB8
AVSS18_WBG
AC3
AVSS18_WBG
AC5
AVSS18_WBG
AC7
AVSS18_WBG
AD4
AVSS18_WBG
AE3
AVSS18_WBG
W20
DVSS
U20
DVSS
V20
DVSS
V21
DVSS
U21
DVSS
W21
DVSS
Y20
AVSS18_MD
Y21
AVSS18_MD
AA21
AVSS18_MD
AB21
AVSS18_MD
U17
DVSS
U18
DVSS
A2
AVSS18_MEMPLL
R24
AVSS33_USB
AE21
AVDD18_MD
AE19
AVDD18_AP
AE22
AVDD28_DAC
AE18
DVDD18_PLLGP
A3
AVDD18_MEMPLL
AC21
AVSS18_MD
AD22
AVSS18_MD
AG26
C112
C108
C109
100nF
100nF
100nF
C110
100nF
AVSS18_MD
V17
DVSS
V18
DVSS
AA18
AVSS18_AP
AB19
AVSS18_AP
AF3
AVSS18_WBG
AG1
AVSS18_WBG
MT6592
V13
H18
DVDD12_EMI
H16
DVDD12_EMI
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
H15
DVDD12_EMI
G9
DVDD12_EMI
G11
DVDD12_EMI
G13
DVDD12_EMI
G15
DVDD12_EMI
G16
DVDD12_EMI
G18
DVDD12_EMI
H8
DVDD12_EMI
E7
DVDD12_EMI
F7
DVDD12_EMI
F8
DVDD12_EMI
DVDD12_EMI
DVDD12_EMI
DVDD12_EMI
DVDD28_MSDC1
DVDD28_MSDC2
DVDD28_BPI
DVDD28_MD
DVDD18_MSDC0
DVDD18_IO0
DVDD18_IO1
DVDD18_IO2
DVDD18_IO3
DVDD18_IO4
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
VCCK_VPROC
DVDD18_MIPITX
DVDD18_MIPIIO
AVDD33_USB
AVDD18_USB
DVSS18_MIPIIO
DVSS18_MIPIIO
DVSS18_MIPIIO
DVSS18_MIPIIO
DVSS18_MIPITX
DVSS18_MIPITX
DVSS18_MIPITX
DVSS18_MIPITX
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
DVSS
J21
T12
K21
H12
H20
H17
H14
M16
M17
check MSDC1/2
G8
H11
IO power
H13
E1
V1
AD26
U25
G26
L26
Y26
D1
W1
AG13
R10
VCCK
P9
VCCK
L11
VCCK
L12
VCCK
L13
VCCK
L14
VCCK
L15
VCCK
L16
VCCK
VCCK
L17
VCCK
M10
VCCK
M18
VCCK
N10
VCCK
N18
VCCK
P18
VCCK
R9
VCCK
R18
VCCK
T10
VCCK
U10
VCCK
V10
VCCK
VCCK_VPROC
N12
N13
N14
N15
N16
N17
P14
R15
P15
R14
R13
R12
R16
R17
T14
T15
U15
U16
V15
V16
M15
DVSS
N21
DVSS
P10
DVSS
P11
DVSS
P12
DVSS
P13
DVSS
P16
DVSS
P17
DVSS
L18
DVSS
M14
DVSS
M13
DVSS
M12
DVSS
L2
G1
T24
P26
H4
H5
J5
J7
L4
M7
M8
N3
DVSS
V14
1.2V IO for DDR2
C130
C144
C151
C143
C142
100nF
100nF
C125
100nF
C104
100nF
C156
100nF
100nF
100nF
100nF
C115 close to pin E1 (150mil)
C125 close to pin G26 (150mil)
C115
C116
100nF
1.0uF
C124
C131
100nF
100nF
C157
C158
100nF
C117
100nF
C140
1.0uF
C148
Bottom cap/1st cap group
C123
C122
100nF
100nF
C152
C129
C153
1.0uF
1.0uF
10uF
C155
C154
C132
1.0uF
1.0uF
1.0uF
22uF
10uF
C127
100nF
C136
10uF
1st cap group Bottom cap
C133
22uF
1st cap group Bottom cap
HT107
HT103
(1)VPROC_BB, GND pin of 1st cap group should be laid differential
pair with ground shielding remote sense to PMIC
(2)R107 & R103 must be close to 1st cap group.
If you want to remove them,
please make sure the VPROC_FB/GND_VPROC_FB must connect from 1st cap. group of VPROC
C111
VUSB_PMU
VIO18_PMU
100nF
C120
C119
100nF
1uF
R106
0
For low-power testing proposal.
It can be cancel for cost-down proposal
For low-power testing proposal.
It can be cancel for cost-down proposal
R101 0
R102 0
R103 0
R104 0
C128
100nF
C137
22uF
C134
22uF
[3] GND_VPROC_FB
[3,4] VPROC_FB
R105
0
C113
For low-power testing proposal.
It can be cancel for cost-down proposal
100nF
To MT6323 GND_VPROC_FB pin
To MT6323 VPROC_FB pin
VIO18_PMU
VM_PMU
VM12_SW_PMU
check MSDC1/2
IO power
VMC_PMU
VIO18_PMU
VIO18_PMU
VIO18_PMU
[4] BUCK1_FB
[4] VCORE_SW_FB
VPROC_PMU
MT6582 R119=NF, R101=0, R102=NF, R120=NF, R110=0
MT6592 R119=0, R101=NF, R102=0, R120=0, R110=NF
MT6582 C135, C137,
可以NF
MT6592 C135=22uF, C137=22uF
TITLE:
DOCUMENT NO.:
DEPARTMENT:
COMPANY:
DESIGNER:
01_MT6582_POWER
<DESIGNER>
<TITLE>
Hardware DEPT.
Last Saved Date:
2014-7-30
REV:
<REV>
SIZED:
A1
OF
SHEET:
1
33
TX_BBIP
TX_BBIN
TX_BBQP
TX_BBQN
RX_BBIP
RX_BBIN
RX_BBQP
RX_BBQN
WG_GGE_PA_VRAMP
DCOC_FLAG
U201-D
ED31
C26
U201-A
DVDD28_BPI
DVDD18_IO4
BPI_BUS0
BPI_BUS1
BPI_BUS2
BPI_BUS3
BPI_BUS4
BPI_BUS5
BPI_BUS6
BPI_BUS7
BPI_BUS8
BPI_BUS9
BPI_BUS10
BPI_BUS11
BPI_BUS12
BPI_BUS13
BPI_BUS14
BPI_BUS15
BSI_CLK
BSI_DATA0
BSI_DATA1
BSI_DATA2
AB24
AB23
AD25
AC24
AC23
AE25
AD24
AF16
AA17
AD16
AC16
AF15
AC17
AB17
AC15
Y15
AG14
VM0
AF14
VM1
AD14
BSI_EN
Y14
AB14
AA14
AC14
VM0
VM1
ASM_VCTRL_A
ASM_VCTRL_B
ASM_VCTRL_C
WG_GGE_PA_ENABLE
W_PA_B1_EN
W_PA_B2_EN
W_PA_B5_EN
W_PA_B8_EN
TD_PA_B40_EN
SP3T_A
SP3T_B
RTC32K_BPI_BUS14
BSI-A_EN
BSI-A_CK
BSI-A_DAT0
BSI-A_DAT1
BSI-A_DAT2
[25]
[2,6] EVREF
DVDD12_EMI
2
8.2K
C205
100nF
12
1
R209
2
8.2K
C206
1
R211
100nF
12
C207
12
1.0uF
[2,6] EVREF
AF22
UL_I_P
AF21
UL_I_N
AG20
UL_Q_P
AF20
UL_Q_N
AG25
DL_I_P
AG24
DL_I_N
AG22
DL_Q_P
AG23
DL_Q_N
AF25
VBIAS
AE24
APC
AE14
TXBPI
MT6592
T250
RDQ31
ED30
C24
RDQ30
ED29
A25
RDQ29
ED28
B25
RDQ28
ED27
B26
RDQ27
ED26
B23
RDQ26
ED25
A23
RDQ25
ED24
D25
RDQ24
ED23
A11
RDQ23
ED22
A14
RDQ22
ED21
A13
RDQ21
ED20
D12
RDQ20
ED19
A10
RDQ19
ED18
B13
RDQ18
ED17
C10
RDQ17
ED16
B11
RDQ16
ED15
D22
RDQ15
ED14
B20
RDQ14
ED13
D20
RDQ13
ED12
A22
RDQ12
ED11
C19
RDQ11
ED10
B19
RDQ10
ED9
A20
RDQ9
ED8
B21
RDQ8
ED7
B16
RDQ7
ED6
A17
RDQ6
ED5
B18
RDQ5
ED4
A16
RDQ4
ED3
B15
RDQ3
ED2
C15
RDQ2
ED1
D14
RDQ1
ED0
C14
RDQ0
F16
VREF
A1
TP_MEMPLL
MT6592
RCS0_B
RCS1_B
RDQS0_B
RDQS1_B
RDQS2_B
RDQS3_B
RCLK0_B
REXTDN
B7
[6] ECS0_B
B6
ECS1_B
[6]
B5
RCKE
RDQM0
RDQM1
RDQM2
RDQM3
RDQS0
RDQS1
RDQS2
RDQS3
RCLK0
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
RA8
RA9
[6]ECKE
D16
EDQM0
[6]
D18
[6] EDQM1
D10
[6] EDQM2
D23
[6] EDQM3
F15
[6] EDQS0
F17
[6] EDQS1
F12
EDQS2
[6]
E20
[6] EDQS3
E15
E17
E12
F20
F9
E9
B8
B9
D8
A8
A7
C7
A5
D6
C6
A4
B3
[6] EDQS0_B
[6] EDQS1_B
[6] EDQS2_B
[6] EDQS3_B
[6] EDCLK_B
[6] EDCLK
EA0
EA1
EA2
EA3
EA4
EA5
EA6
EA7
EA8
EA9
1
R221
54.9欧姆, 1%, 0402
54.9
2
VIO18_PMU
1
1
2.2K
2.2K
2
R218
R217
2
[2,18]
SCL2
[2,18]
SDA2
VIO18_PMU
1
1
1K
1K
R212
2
R210
[2,4,13]SCL1
[2,4,13]
[2,12]
SCL0
[2,12]
SDA0
Plasse reservr R336/NTC301 & R339/NTC302
for thermal protection option
[2] AUX_IN0_NTC [2] AUX_IN1_NTC
2
SDA1
VIO18_PMU
1
1
2.2K
2.2K
2
R219
R220
2
VIO18_PMU
10K 10K
VIO18_PMU
R222
NTC201
[2,12] SCL0
[2,12] SDA0
[2,4,13] SCL1
[2,4,13] SDA1
[2,18]
SCL2
[2,18]
SDA2
AB13
AC13
AD13
KPCOL0
KPCOL1
KPROW0
SYSRSTB
SRCLKENAI
SRCLKENA
PWRAP_SPI0_CK
PWRAP_SPI0_MI
PWRAP_SPI0_MO
PWRAP_INT
AUD_CLK_MOSI
AUD_DAT_MISO
AUD_DAT_MOSI
SIM1_SCLK
SIM1_SIO
SIM1_SRST
SIM2_SCLK
SIM2_SIO
SIM2_SRST
PCM_CLK
PCM_SYNC
MSDC0_RSTB
G25
[21,25] LTE_AP_RSTB
[21,22] LTE_PMU_EN_P
EINT18_HP
AE13
PCM_RX
PCM_TX
KPROW1
GPIO12
GPIO13
EINT10
[5]
Y13
AA13
KPCOL2
KPROW2
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
EINT7
EINT8
EINT9
EMMC_CMD
EMMC_DAT5
[12] EINT14_CTP_RST
[18] EINT_ACC
[24]
MT6290_GPIO17
[15]
MC1INSI
[4]
GPIO_CHG_EN
EINT20_GY
[18]
MT6605 OSC_EN (SRCLKENAI) need to default low
for MT6605 TESTMODE boot-strap
M25
M24
N25
J23
H23
J24
H22
H24
K26
K25
J25
AG10
AF9
L21
K23
L23
L20
L24
K24
W22
V22
AA24
V24
W25
Y25
AA23
AA26
AA25
Y23
Y22
V23
V26
V25
U24
[6] EMMC_RST
[6]
[6] EMMC_CLK
[6] EMMC_DAT0
[6] EMMC_DAT1
[6] EMMC_DAT2
[6] EMMC_DAT3
[6] EMMC_DAT4
[6]
[6] EMMC_DAT6
[6] EMMC_DAT7
[15] MC1CM
[15]
MC1CK
[15] MC1DA0
[15] MC1DA1
[15]
MC1DA2
[15] MC1DA3
[21,23]
MC2CM
[21,23]
MC2CK
[21,23]
MC2DA0
[21,23]
MC2DA1
[21,23]
MC2DA2
[21,23]
MC2DA3
[17]
KCOL0
[17]
KROW0
[17] KCOL1
KROW1
KCOL2
GPIO93_DRVVBUS
AUD_CLK
AUD_DAT_MOSI
GPIO12
GPIO13
[4] EINT0_MT6333
EINT1_A
[12] EINT2_CTP
EINT3_SUB_CMRST
EINT4_SUB_CMPDN
EINT5_RSTB_FROM_LTE
EINT7_SDIO_INTB_LTE
EINT8_AGPS_OUT_LTE
[14] EINT17_IDDIG
[2,3] SYSRST_B
[4]
[21] SRCLKENAI
NF
C208
[3,4,21,29] SRCLKENA
[3] PMIC_SPI_CS
[3] PMIC_SPI_SCK
[3] PMIC_SPI_MISO
[3] PMIC_SPI_MOSI
[3] EINT_PMIC
C208 are for ESD ehnhace proposal.
[3]
It can be cancel for cost-down proposal
[3] AUD_DAT_MISO
[3]
[21,25]
[18] EINT6_M
[21,23]
[24]
[13] EINT9_MAINCAM_RST
[13]
EINT10_CMPDN
[21,24] AP_PCM_CK
AP_PCM_RX
[21,24]
[21,24] AP_PCM_FSYNC
[21,24]
AP_PCM_TX
[2,3] SYSRST_B
BAT_ID [2]
For earpohne & MSDC hotplug EINT,
plase choose EINT[0:15]
with HW de-bounce function.
Notice :
Please choose EINT[0:15] with
HW debouce for
mechanism plug in/out related application.
Ex: earphone, MSDC, SIM hot-plug
BAT_ID
T205
T206
[21]
T204
T202
T201
[29] CLK1_BB
RTC32K_CK
[3] RTC32K_CK
R223 0
TESTMODE
0
R224
FSOURCE_P
[3]
WATCHDOG_B
T209
T210
T211
T212
5.1K
2
R201
Close to MT6582
[21,24]
1
[2] AUX_IN0_NTC
[2] AUX_IN1_NTC
AP_WAKEMD_INT
90 Ohm
differential
USB_VRT
[14] USB_DP
[14] USB_DM
[3] CHD_DP
[3] CHD_DM
C202 100PF
C203
100PF
[12] LCD_ID_ADC
39K
10k
区分硬件配置
注意ADC 的最大输入电压为1.5V
[3] BAT_ID_ADC
C204 100PF
C213
1uF
UTXD3
URXD2
URXD2
UTXD2
UTXD2
[21]
URXD1
T203
UTXD1
URXD0
UTXD0
T23
R23
AA3
AC8
AC9
AB9
Y2
W2
U2
V2
P23
U201-C
AF26
CLK26M
L25
RTC32K_CK
AF11
TESTMODE
R5
FSOURCE_P
R4
DVDD18_EFUSE
N26
WATCHDOG
AF12
JTCK
AE12
JTDO
AG11
JTDI
AF13
JTMS
P25
USB_VRT
R26
USB_DP
R25
USB_DM
N23
CHD_DP
N24
CHD_DM
DVDD18_IO3
V5
I2S_BCK
U5
I2S_LRCK
W5
I2S_DATA_IN
AC19
AUX_IN0
AD19
AUX_IN1
AF18
AUX_XP
AG17
AUX_XM
AF17
AUX_YP
AG16
AUX_YM
REFP
AG19
REFP
AF19
AVSS_REFN
100PF
MT6592
C210
P22
UTXD0
UTXD3
UTXD1
UTXD2
URXD3
URXD0
URXD1
URXD2
DVDD28_MD DVDD18_IO3
DVDD28_MSDC2 DVDD28_MSDC1 DVDD18_MSDC0
MSDC2_DAT3T1MSDC2_DAT2T5MSDC2_DAT1T6MSDC2_DAT0R7MSDC2_CLKT3MSDC2_CMDD3MSDC1_DAT3C2MSDC1_DAT2D2MSDC1_DAT1E4MSDC1_DAT0C3MSDC1_CLKE3MSDC1_CMD
T2
AD7
AB3
AD8
AE7
AA2
AA1
SCL0
SCL1
SCL2
SDA0
SDA1
SDA2
SPI_MI
SPI_CS
SPI_MO
AC10
AF10
AF8
AG8
AE10
AC11
AD10
AE9
EINT20
EINT11
EINT14
EINT15
EINT16
EINT17
EINT18
EINT19
SPI_CK
PWRAP_SPI0_CSN
DVDD28_MD
MSDC0_DAT7
MSDC0_DAT6
MSDC0_DAT5
MSDC0_DAT4
MSDC0_DAT3
MSDC0_DAT2
MSDC0_DAT1
MSDC0_DAT0
MSDC0_CLK
MSDC0_CMD
F22
F24
E23
E26
E25
E24
D26
G24
G23
G22
HT201
C213 Close to MT6582
AF19 should connect to C213.2 first,
than connect to GND by via
[12] MIPI_TCP
[12] MIPI_TCN
[12] MIPI_TDP0
[12]
MIPI_TDN0
[12]
MIPI_TDP1
[12] MIPI_TDN1
MIPI_TDP2
MIPI_TDN2
MIPI_TDP3
MIPI_TDN3
MIPI_RCP
MIPI_RCN
MIPI_RDP0
MIPI_RDN0
MIPI_RDP1
MIPI_RDN1
MIPI_RDP2
MIPI_RDN2
[13]
CMDAT5
[13]
CMDAT4
[13]
CMDAT7
[13]
CMDAT6
[13]
CMVSYNC
[13]
CMHSYNC
[13]
CMDAT3
[13]
CMDAT2
Close to MT6582
<Parallel Cam./MIPI CSI Mux Table>
MIPI CSI IF Port Parallel Camera IF Port
RDP2 CMDAT9
RDN2 CMDAT8
RDP3 CMDAT5
RDN3 CMDAT4
RCP_A CMDAT7
RCN_A CMDAT6
RDP0_A CMVSYNC
RDN0_A CMHSYNC
RDP1_A CMDAT3
RDN1_A CMDAT2
CMDAT1 CMDAT1
CMDAT0 CMDAT0
CMMCLK CMMCLK
CMPCLK CMPCLK
U201-E
M3
TCP
M4
TCN
M1
TDP0
DISP_PWM
M2
TDN0
P2
TDP1
N2
TDN1
P1
TDP2
R1
TDN2
N5
TDP3
M5
TDN3
K6
RCP
K5
RCN
L3
RDP0
K3
RDN0
K1
RDP1
K2
RDN1
J1
RDP2_
J2
RDN2_
G2
RDP3_
H2
RDN3_
F5
RCP_A_
G5
RCN_A_
G4
RDP0_A
G3
RDN0_A
J3
RDP1_A
H3
RDN1_A
MIPI_VRT
N1
VRT
1
R203
MT6592
1.5K
2
TITLE:
DOCUMENT NO.:
02_MT6582_BASEBAND
DEPARTMENT:
COMPANY:
<DESIGNER> SHEET:
DESIGNER:
U3
LCM_RST
Y3
DSI_TE
AD9
B2
CMMCLK
B1
CMPCLK
E2
CMDAT0
F2
CMDAT1
<TITLE>
Hardware DEPT.
Last Saved Date:
CMMCLK
CMPCLK
2014-7-30
[12] LRSTB
[12] LPTE
[12] PWM
[13]
[13]
[13] CMDAT0
[13] CMDAT1
<REV>
REV:
SIZED:
A1
OF
2
33
Regulator
Output Voltage(V) Output Current(mA) Input Decoupling Output Decoupling Notes
0.7~1.4
VPROC
2.2
VSYS
0.5~3.4
VPA
LDO Input Decoupling
Output Voltage(V) Output Current(mA)
VM
1.24 /1.39/1.54/1.84
VRF18
1.825
VIO18
1.8
VCN18
1.8
VCAMD
1.2
/1.3/1.5/1.8
VCAM_IO
1.8
VGP3
1.2 /1.3/1.5/1.8
VA
2.8
VTCXO
2.8
VCN28
2.8
VCAMA
2.8
VCN33
3.3/3.4/3.5/3.6
VIO28
2.8
VUSB
3.3
VMC
1.8 /3.3
3.0 /3.3
VMCH
3.0 /3.3
VEMC_3V3
1.2/1.3/1.5/1.8
VCAM_AF
2.8/3.0/3.3
VSIM1
1.8 /3.0
VSIM2
1.8 /3.0
1.2/1.3/1.5/1.8/2.0
VGP1
2.8
/3.0/3.3
1.2/1.3/1.5/1.8/2.0
VGP2
2.5
/2.8/3.0
1.2
VIBR
/1.3/1.5/1.8/2.0
2.8/3.0/3.3
VDIG18
2.8
VRTC
2800
1200
600
700
200
300
120
150
100
200
150
40
30
150
240(MT6323)
350(MT6322)
200
20
100
400
400
/2.0
100
50
50
100
100
100
20 1.8
2
>10uF
>10uF
>4.7uF
10uF
1uF -20%~+200%
4.7uF -20%~+200%
1uF
1uF
1uF
1uF
1uF
1uF Far-end bypass cap
1uF
3.2uF
2.2uF
1uF
1uF
2.2uF
4.7uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
0.1uF to 1000uF
L=0.68uH,C=10uF*4
L=0.68uH,C=10uF*2
L=2.2uH,C=2.2uF+2.2uF
Output Decoupling Notes
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+200%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
-20%~+20%
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
1uF near-end
Far-end bypass cap 4.7uF
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Far-end bypass cap
Total outptu cap>40uF
Total outptu cap>20uF
Output cap range 4.4uF +/-20%
,2.2uF Far-end bypass cap
1. Close to Battery Connector.
(Rsense (R328) <10mm)
2. Main path should be 40mil.
(VBUS -> U303's E, -> U303's C -> R328 -> VBAT)
3. Star connection from R328 to BAT Connector
cap rating depends on
Phone OVP spec.
9C10
4D8C7
1
C
C
U302
B
6S5
2E3
VDRV
[3]
TP-1.0MM
TP309
BATTERY
1
CONNECTOR
CON302
1
2
3
4
5
6
BATTCON-R6593004-20005A
VIO18_PMU
Based on your system level design , if
better ESD performance is needed on
R302
TP-1.0MM
your system, please refer to ESD
TP305
performance enhance proposal
47K
1
R301
1K
R305
100K
VR305
Vibra
G
CHR_LDO
[3]
TP-1.0MM
TP310
D
POWER-NFET+PNP-MI5809
TP-1.0MM
TP311
1
1
Charger
ISENSE_R
[4]
VR301
VR302
C339
0.01uF
VIBR_PMU
1uF
Before you select BJT , please take power dissipation into consideration.
Refer to MT6323 design notice
VBUS
R329
[3]VCDT
VCDT rating: 1.268V
VCDT rating: 1.268V
330K
R324
39K
1uF
C329
40mils
Rsense
TP-1.0MM
TP312
40mils
40mils
40mils
40mils
1
0.02
R328
SR0805
2
40mils
TP-1.0MM
TP313
1
1
VIB-GS-2701
C311
CON301
R331
3.3K
4mil
Differential
4mil
AUXADC_REF
16.9K 1%
1%
R334
16.9K
40mils
R317
1K
R335
27K
R334,R335 must to be close to
27PF
C335
PMIC AUXADC_REF pin
if battery NTC is 10kohm, R334=16.9K, R335=27K
if battery NTC is 47kohm, R334=61.9K, R335=100K
R e f e r t o M T 6 3 2 3 H W d e s i g n n o t i c
[2] BAT_ID_ADC
1
3
P
N
2
[3]CHR_LDO
HT303
[3]ISENSE
[3]BATSNS
HT304
[3] AUXADC_REF
[3]VA_PMU
VBAT
[3,4,12,21,22,30,31]
VBAT
[3]BAT_ON
e
VBAT
80mil
Add Zenar Diode
500mW
Place on the path
from VBAT to IC
(Battery connector
or test point or IO
connector)
VF : 4.85V~5.36V
Between IC and IO port
Refer to MT6323 design
notice for Zener selection
C310
D302
21
Refer to MT6323 design notice
for Buck GND layout rule
22uF
C330
10uF_NF
VSYS_PMU
VIO18_PMU
CLOSE Batconnector
Based on your system level design , if
better EOS performance is needed on your
system, please refer to EOS performance
enhance proposal
ISENSE/BSTSNS 4mil
[3]BATSNS
[6]
differential to Rsense
[3]ISENSE
[3]BAT_ON
[3]VCDT
[3]VDRV
[3]CHR_LDO
1.0uF
C316
Close to PMIC
40mil
30mil (4mil if VPA no use)
VBAT
20mil
VBAT
20mil
VBAT
20mil
20mil
20mil
10uF
10uF
C301
4.7uF
C350
4.7uF
C303
C305
1.0uF
C304
HT302
refer to system analog LDO
performance improve proposal
Refer to GPS co-clock layout rule
C302 100PF
VBAT
VBAT
10uF
C306
C309
VBAT
VA_PMU
C317
1uF
10uF
C307
C308 1uF
MICBIAS0
1.0uF
C326
[17] PWRKEY
1.0uF
[2]
WATCHDOG_B
[2] SYSRST_B
T301
[3] AUXADC_REF
AUXADC_TSX
100nF
C322 must to be close
to PMIC AUXADC_TSX pin
Connect TSX/XTAL GND
to AUXADC_GND first
than connect to main GND
U301
BGA145-5.8X5.8-0.4E0.25B(MT6323)
C313
P1
MICBIAS1
[2] EINT_PMIC
EXT_PMIC_EN
[2] AUD_DAT_MOSI
[2]
[2] AUD_DAT_MISO
[2,4,21,29]
[3]FCHR_ENB
[2] PMIC_SPI_SCK
[2] PMIC_SPI_CS
PMIC_SPI_MOSI
[2]
[2] PMIC_SPI_MISO
C322
HT301
[5] AU_VIN0_P
[5] AU_VIN0_N
[5]
[5] AU_VIN1_N
GND_AUXADC
[2] CHD_DM
[2]
2.2uF
AU_VIN1_P
AU_VIN2_P
AU_VIN2_N
R303 0
AUD_CLK
SRCLKENA
AUXADC_REF
AUXADC_TSX
CHD_DP
SIM1_SCLK
SIM1_SIO
SIM1_SRST
SIM2_SCLK
SIM2_SIO
SIM2_SRST
VBAT_SPK
L2
GND_SPK
F2
AU_MICBIAS0
G2
AU_MICBIAS1
E4
AU_VIN0_P
F4
AU_VIN0_N
G3
AU_VIN1_P
G4
AU_VIN1_N
D2
AU_VIN2_P
D1
AU_VIN2_N
J2
AVDD28_ABB
D3
AVDD28_AUXADC
H2
GND_ABB
E2
ACCDET
E1
CLK26M
BATSNS
P13
BATSNS
ISENSE
P12
ISENSE
BAT_ON
K3
BATON
VCDT
A12
VCDT
VDRV
M13
VDRV
CHR_LDO
N13
CHRLDO
CONTROL SIGNAL
M2
PWRKEY
A1
SYSRSTB
K4
RESETB
A9
FSOURCE
A7
INT
N12
EXT_PMIC_EN
N2
PMU_TESTMODE
E7
AUD_MOSI
E8
AUD_CLK
B6
AUD_MISO
A2
SRCLKEN
M1
[3]FCHR_ENB
FCHR_ENB
D9
SPI_CLK
B7
SPI_CSN
D8
SPI_MOSI
B8
SPI_MISO
F13
VBAT_VPROC
F14
VBAT_VPROC
G13
VBAT_VPROC
A13
VBAT_VPA
H13
VBAT_VSYS
P8
VBAT_LDOS3
P6
VBAT_LDOS3
P5
VBAT_LDOS2
P2
VBAT_LDOS1
J14
AVDD22_BUCK
M14
AVDD22_BUCK
A8
DVDD18_DIG
A5
DVDD18_IO
C2
AUXADC_VREF18
B1
AUXADC_AUXIN_GPS
B2
AVSS28_AUXADC
BC 1.1
A10
CHG_DM
A11
CHG_DP
B5
SIM1_AP_SCLK
M11
SIMLS1_AP_SIO
E6
SIM1_AP_SRST
C5
SIM2_AP_SCLK
K11
SIMLS2_AP_SIO
D6
SIM2_AP_SRST
M9
SCLK
SIMLS1_SCLK
N11
SIO
SIMLS1_SIO
M10
SRST
SIMLS1_SRST
K9
SCLK2
SIMLS2_SCLK
L11
SIO2
SIMLS2_SIO
K10
SRST2
SIMLS2_SRST
GND_LDO
J10
MT6323
VBAT
1.0uF
C312
VA_PMU
[5] ACCDET
1.0uF
CLK_26M_MT6323
[29]
C327
R316 1K
[4]
DVDD18_DIG_PMIC
VIO18_PMU
GND_AUXADC
C323
1.0uF
VBAT INPUT
K1
[5]AU_SPKP
SPK_P
L1
[5]AU_SPKN
SPK_N
H1
[5]AU_HSP
AU_HSP
G1
[5]AU_HSN
AU_HSN
H4
[5] AU_HPL
AU_HPL
J4
AU_HPR
[5] AU_HPR
E9
LED_RED
ISINK0
DRIVER
AUDIO
C9
LED_GREEN
ISINK1
E10
LED_BLUE
ISINK2
C10
ISINK3
ISINK3
BUCK OUTPUT
C14
VPROC
D14
VPROC
E14
VPROC
B12
VPROC_FB
CHARGER
C12
GND_VPROC_FB
A14
VPA
B14
VPA
D12
VPA_FB
VSYS_SW
H14
VSYS
ALDO OUTPUT
M3
VA
N3
VCN28
L4
VTCXO
P3
VCAMA
M6
VCN33
C3
AVDD33_RTC
C355
DLDO OUTPUT
J13
VM
H11
VRF18
L12
VIO18
M4
VIO28
J12
VCN18
K14
VCAMD
L13
VCAM_IO
P7
VEMC_3V3
L6
VMC
P4
VMCH
N6
VUSB
P9
VSIM1
N9
VSIM2
L8
VGP1
M7
VIBR
N8
VGP2
L14
VGP3
N7
VCAM_AF
AUXADC
SIM LVS
GND_LDO
H10
VREF
P14
VREF
N14
GND_VREF
D5
RTC_32K1V8
RTC
C4
RTC_32K2V8
32K_IN
A3
XIN
32K_OUT
A4
XOUT
B10
GND_ISINK
G11
GND_VSYS
E13
GND_VPA
E11
GND_VPROC
F11
GND_VPROC
F10
GND_VPROC
K6
GND_LDO
K8
GND_LDO
F5
GND_LDO
F6
GND_LDO
F7
GND_LDO
F8
GND_LDO
F9
GND_LDO
G5
GND_LDO
G6
GND_LDO
GND_LDOH9GND_LDO
GND_LDO
GND_LDOG8GND_LDOG9GND_LDOH6GND_LDOH7GND_LDOJ9GND_LDOJ8GND_LDOJ7GND_LDOJ6GND_LDO
H8
H5
G7
,C357 ,C358 ,BUCK 电路输出端的小电容
C356
请选择耐压值
Please use inductor recommand by MTK
Refer to MT6323 design notice
VPROC_SW
L301
C356
NF
VPA_SW
C357
NF
C358
NF
VA_PMU
VCN_2V8_PMU
VTCXO_PMU
VCAMA_PMU
VCN_3V3_PMU
VRTC
100nF
1.0uF
DVDD12_EMI
VRF18_PMU
VCN18_PMU
VCAMD_PMU
VCAMD_IO_PMU
VEMC_3V3_PMU
VMC_PMU
VMCH_PMU
VUSB_PMU
VSIM1_PMU
VSIM2_PMU
VGP1_PMU
VIBR_PMU
VGP3_PMU
VCAM_AF_PMU
C320
100nF
HT305
[2] RTC32K_CK
10V以上的
0.68UH
L303
0.68UH
C331
VIO18_PMU
VIO28_PMU
VGP2_PMU
dedicate VSS ball, must return to cap then to main GND:
1. GND_VREF(N14) => C320
X301
RTC 32K : X301+C324+C319=> mount, R333=> NC
32K-less: X301+C324=> remove, C319+R333=> 0R
12
18PF
C324
XTAL-32.768K-KYOCERA
Close to chip
VRTC
1K
R312
22uF
C325
==> for longer RTC time sustain after battery remove,
please refer to RTC design notice
C333
4.7uF
VPA_PMU
VEMC_3V3_PMU
C319
C354
18PF
[1,4]
VPROC_FB
[1] GND_VPROC_FB
VPA for WCDMA
VSYS_PMU
VA_PMU
100nF
1.0uF
C332
C353
DCXO_32K
DVDD12_EMI
VPROC_PMU
470nF
0.47uF
RTC
[1,3,4] VPROC_PMU
TITLE:
DOCUMENT NO.:
DEPARTMENT:
COMPANY:
<TITLE>
03_MT6323_PMIC_AUDIO
Hardware DEPT.
<DESIGNER> SHEET:
Last Saved Date:
DESIGNER:
<REV>
REV:
SIZED:
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3
33
当使用Switching charger :Rsense R328 use 56m ohm
VBUS VBUS_1
GND
GND
VBAT
[3,4,12,21,22,30,31]
GND
[2] GPIO_CHG_EN
FN5405 R410=10K,R412=NF, C402=NF
FN5402 R410=NF, R412=10K,C402=NF
BQ24158 R410=10K,R412=NF, C402=10nF
[2] GPIO93_DRVVBUS
GND
VBUS_1
[2,4,13] SDA1
[2,4,13] SCL1
OTG-BOOST
[4]
If switching charger is used:
(1) R1801~R1805, C1801~C1806, L1801, U1801 are needed
(2) U303, U304 change to NC
(3) R328 change to 56m Ohm
Switching Charger
MT6333 switching charger function de-feature (Need to add external SWCHR)
Change notice:
Page 4
1. Delete R813/C839/U3/R817/R1812/C1815/R335
2. Change C1809 to 1uf
3. Add R341/C1810 for ESD protection
4. Delete ISENSE/BATSNS net
5. Change C1806 location (close to MT6333)
6. Add U402 and related circuits
10V
25V rating
40mil
MT6333 I2C Address: 0xD6, 0xD7
25mil
40mil
25mil
OTG-BOOST
[4]
NC : FN5405/FN54015
10nF : BQ24153
GND
ISENSE_R
BATSNS_L
GND
L1801 / L304 / L305 / L306
Please use inductor recommand by MTK
Refer to MT6333 design notice
40mil
40mil 40mil
40mil
GND GND GND
EXT_PMIC
U302 placement, please be close to MT6322
I2C Address
FAN53555 : 0xC0
NCP6335D: 0x1C
[10] ANT_SEL1
[10] ANT_SEL2
[3,4] ISENSE_R
[3,4,12,21,22,30,31] VBAT
[2,4,13] SDA1
[2,4,13] SCL1
L307 placement, please be close to L301
VBAT
C337 must to be close
to U302
VPROC_PMU
As short as possible and L307 as close as possible to L301,
then connect to VPROC_PMU
VPROC_FB should be ground shielding.
[1,3] VPROC_FB
External DC-DC for VPROC
VIO18_PMU
[2] EINT0_MT6333
Need pull-up resistor to VIO18
[3]
EXT_PMIC_EN
[2,4,13] SCL1
[2,4,13] SDA1
[2,3,21,29]SRCLKENA
VLED
25mil
40mil
40mil
40mil
40mil
VBAT
Close to L1801
BUCK1_SW
BUCK1_FB
BUCK2_SW
[1,4] BUCK1_FB
VCORE_SW_FB
VRF_SW_PMU
VM12_SW_PMU
VCORE_SW_PMU
C338 / C339 are for VMEM_FB / VCORE_FB decoupling proposal.
It can be cancel for cost-down proposal
TITLE:
DOCUMENT NO.:
DEPARTMENT:
COMPANY:
DESIGNER:
<TITLE>
04_POWER_SWCHR_EXT_PMIC
Hardware DEPT.
<DESIGNER> SHEET:
Last Saved Date:
2014-7-30
<REV>
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SIZED:
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Based on your system level design , if better
desense performance is needed on your
system , please refer to desense
performance enhance proposal
Receiver
close to connector close to IC
[3]
[3]
R520
[3] AU_HSP
0
R521
[3] AU_HSN
0
Earphone Audio
Reserve bead+C footprint for FM
performance tuning
1800ohm
BEAD503
[3] AU_HPL
BEAD504
[3]
33PF
C505
100PF
C504
33PF
CON503
AUDIO-RECIEVER-1506-S3001/11.5
VR503
VR502
C506
AU_HPR
Based on your system level design , if better ESD
performance is needed on your system, please
refer to ESD performance enhance proposal
1800ohm
22uF
C519
C520
22uF
close to IC
close to connector
NF
NF
C553
C552
100
HP_MP3L
R507
100
R508
HP_MP3R
33PF
C521
same power domain
R505
470
R530
R506 47K
BEAD501
BEAD502
BEAD505
470
R531
1800ohm
1800ohm
1800ohm
470K
AUDIO-EAR-PJES-050-1-G-BLK
6
5
4
3
1
2
CON501
L502
2.5Kohm
[5] HP_MIC-1
[5] HP_MP3L-1
[5]
EAR_DET
[5] HP_MP3R-1
1 2
VR501
R501
1
0
R502
1
0
[5] FM_ANT-1
2
[10] FM_ANT
2
[10] FM_RX_N_6572
[5]HP_MP3R-1
[5]EAR_DET
[5]HP_MP3L-1
[5]FM_ANT-1
[5]HP_MIC-1
Single via to GND plane
VIO18_PMU
EINT18_HP
[2]
[5]
HP_MIC
33PF
C522
VR506
VR505
VR504
[3]
小板喇叭
220ohm
AU_SPKP
[3]
AU_SPKN
BEAD507
BEAD506
220ohm
SPK_P
SPK_N
Handset Microphone 1
C511
[3] AU_VIN0_P
[3] AU_VIN0_N
100nF
C512
100nF
if you use digital MIC,
please change cap
(C511,C512) to 1.0uF
together then single via to main GND
MICBIAS0
R532
R515
C513
4.7uF
R516
1K
XJ501
XJ502
1
1
C503
100PF
33PF
33PF
VR511
Close to
MIC
33PF
C510
VR510
Analog MIC
C508
100PF
33PF
C509
C501
C502
1K
Close to
BB
1.5K
1.5K
R517
Close to
MIC
XJ503
1
XJ504
1
PAD-2.0X2.0
Analog MIC
PAD-2.0X2.0SS
AU_VIN1_N1
MICBIAS1
1K
GND of C(4.7uF) and headset
should tie together and single
R511
4.7uF
C554
via to GND plane
Close to EarJack
1.5K
1K
GND
[5] HP_MIC
together then single
via to main GND
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R518
C526
33PF
100PF
C551
C525
33PF
R519
Earphone MICPHONE
Close to BB Close to MIC
100nF
C550
[3] AU_VIN1_N
100nF
C560
[3]AU_VIN1_P
[3] ACCDET
TP-1.0MM
TP501
R522
R523 0
TP-1.0MM
TP502
1
1
CON502
0
1
2
AUDIO-MIC-SMT4013-PRJ7665
VR508
VR509
eMMC+LPDDR2
0
162 Ball, 0.5mm pitch
VDD1=1.8V
VDD2=1.20V
VDDCA=1.2V
VDDQ= 1.20V
EA0
U3
CA0
T3
EA1
CA1
EA2
R3
CA2
R2
EA3
CA3
R1
EA4
CA4
K2
EA5
CA5
J2
EA6
CA6
J3
EA7
CA7
H3
EA8
CA8
H2
EA9
CA9
T8
ED0
DQ0
ED1
R8
DQ1
R7
ED2
DQ2
R9
ED3
DQ3
R6
ED4
P7
ED5
P8
ED6
P9
ED7
K9
ED8
K8
ED9
K7
ED10
ED11
J6
J9
ED12
J7
ED13
J8
ED14
H8
ED15
W7
ED16
U6
ED17
W8
ED18
T5
ED19
U7
ED20
W9
ED21
V8
ED22
T6
ED23
H6
ED24
F8
ED25
E9
ED26
G7
ED27
H5
ED28
E8
ED29
G6
ED30
E7
ED31
R609
2
1
G3
2
1
F3
240
R610
GND
240
F6
F9
G10
H10
J5
K10
M5
P10
R5
T10
U10
V6
V9
T1
M1
H1
B9
E1
F2
F5
G1
L2
M8
U1
V2
V5
C3
A1
A2
A9
A10
B1
B10
E10
W1
W10
GND
Y1
Y2
Y9
Y10
Power
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
eMMC
DQ27
DQ28
DQ29
DQ30
DQ31
ZQ0
ZQ1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSCA
VSSCA
VSSCA
VSSM
VSSM
LP-DDR2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQM
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
DNU
BGA162-12X13.5-0.5PB0.27(H9TP32A8JDMCPR)
VDD1 : Core 1
DVDD18_EMI
U601
E6
VDD1
F1
VDD1
V1
VDD1
W6
VDD1
E5
VDD2
G2
VDD2
K1
VDD2
M7
VDD2
U2
VDD2
W5
VDD2
F7
VDDQ
F10
VDDQ
G5
VDDQ
H9
VDDQ
J10
VDDQ
L6
VDDQ
M6
VDDQ
N6
VDDQ
R10
VDDQ
T9
VDDQ
U5
VDDQ
V7
VDDQ
V10
VDDQ
J1
VDDCA
L1
VDDCA
T2
VDDCA
A8
EMMC_VCC
VCC
B2
VCC
B8
EMMC_VCCQ
A5
0
R614
B5
C1
RST
C5
CMD
B4
A4
A6
B6
A7
B7
B3
A3
P1
P2
ECKE
N1
N2
ECKE
M3
EDCLK
CLK
L3
EDCLK_B
P6
P5
K6
K5
U8
U9
G8
G9
N5
DM0
L5
DM1
T7
DM2
H7
DM3
K3
M9
C2
NC
C4
NC
C6
NC
100nF
D1
NC
D2
NC
4.7uF
C638
D3
NC
D4
NC
D5
C641
NC
D6
GND GND
NC
E2
NC
E3
NC
M2
NC
N3
NC
P3
NC
V3
NC
W2
NC
W3
NC
Hynix H9TP32A4GDMCPR;Micron MT29PZZZ4D4TKETF-25
VREFCA
VREFDQ
VCCQ
VDDI
CLKM
DAT7
DAT6
DAT5
DAT4
DAT3
DAT2
DAT1
DAT0
CS0#
CS1#
CKE0
CKE1
CLK#
DQS0
DQS0#
DQS1
DQS1#
DQS2
DQS2#
DQS3
DQS3#
VDD2 : Core 2
DVDD12_EMI
[2] ECS0_B
[2] ECS1_B
[2,6] ECKE
[2,6] ECKE
[2]EDCLK
[2]EDQS0
[2]EDQS1
[2]EDQS2
[2]EDQS3
[2] EDQM0
[2] EDQM1
[2] EDQM2
[2] EDQM3
[2]EVREF
R618
VIO18_PMU
100nF
2.2uF
C631
C642
GND GND
C627
C629
C628
100nF
100nF
2.2uF
C640
4.7uF
C639
GND GND GND GND GND GND
1. VCC : Core Voltage 2.7v ~ 3.6v
2. VCCQ : IO Voltage 1.7v~1.95v (low voltage range)
[2] EMMC_CLK
100nF
[2] EMMC_RST
[2] EMMC_CMD
[2] EMMC_DAT7
[2] EMMC_DAT6
[2] EMMC_DAT5
[2] EMMC_DAT4
[2] EMMC_DAT3
[2] EMMC_DAT2
[2] EMMC_DAT1
[2] EMMC_DAT0
[2] EDCLK_B
[2] EDQS0_B
[2] EDQS1_B
[2] EDQS2_B
[2] EDQS3_B
C624
C637
0.22uF
C636
4.7uF
C623 1uF
C634
GND GND GND GND
Close to Memory
Check MCP part's requirement
DVDD18_EMI
C601
100nF
C630
100nF
100nF
R612
VEMC_3V3_PMU
0
VIO18_PMU
R613
2.2uF
C643
0
100nF
GND
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X1001
XTAL-CRYSTAL-26M-7L26002009
0
R1013
[10]XO_IN
WIFI/BT/GPS Single ANT Ref.
ANT1001
ANT1002
1
1
U1007
1
6
WIFI
0
12
NF
C1042
[5] FM_RX_N_6572
[5] FM_ANT
U1004
1
C1031
4
IN
OUT
33PF
GND3GND
GND
2
5
0
12
R1006
R1005
NF
L1004
Based on your system level design , if
better WiFi TX performance is needed on
your system, please refer to WiFi
performance enhance proposal
100NH
L1001
9.1nH
NF
C1030
GND
2
5
GND
ANT
3
GPS4GND
NF
RF-SAW-DP1608-V1524CAT
L1015
GND
FM_RX_N_6572
L1011
FM_LANT_P
82nH
91NH
L1012
91NH
U1002
1
6
GND
RFOUT
2
5
GND
EN
3
RFIN4VDD
GPS-LNA-RDALN16
Based on your system level design , if
better GPS performance is needed on
your system, please refer to GPS
performance enhance proposal
2
U1003
NF
L1031
GND3GND
1
IN
OUT5GND
RF-SAW-885033
4
1 2
C1026 18PF
AVDD33_WB
[10]
50 Ohm
VCN_2V8_PMU_FM
[10]
AVDD18_GPS
[10]
0
NF
R1010
L1032
R1032
0
1.0uF
C1025
100PF
0
C1020
R1002
3
2
[3,10] VCN_2V8_PMU
OUTPUT
GND
SYSCLK_WCN
50 Ohm
L1020
50 Ohm
NF
[10] WB_CTRL4
[10] WB_CTRL5
[10] AVDD18_WB
50 Ohm
50 Ohm
[10] ANT_SEL0
WB_RSTB
[10]
[10]FM_DATA
[10]
WB_SCLK
[10]
WB_SDATA
[10]
[10] WB_SEN
FM_CLK
VCC
GND
31
WB_GPS_RF_IN
32
GPS_DPX_RFOUT
33
AVDD33_WBT
34
NC
35
NC
36
AVDD28_FM
37
FM_LANT_N
38
FM_LANT_P
39
GPS_RFIN
40
AVDD18_GPS
41
DVSS
4
1
1.0uF
C1028
NF
VCN_2V8_PMU
C1022
27
29
30
W_LNA_EXT
AVDD18_WBT
28
WB_CTRL5
WB_CTRL4
26
WB_CTRL3
U1000
MQFN40-5X5-0.4E(MT6627)
钢网做屏蔽处理
AVDD28_FSOURCE4F2W_DATA6SCLK
HRST_B
FM_DBG
1
2
F2W_CLK
3
5
25
WB_CTRL2
24
WB_CTRL1
SDATA
7
23
WB_CTRL0
22
WB_RX_IP
CEXT8SEN
9
C1012
100PF
1.0uF
C1011
21
WB_RX_IN
WB_RX_QP
WB_RX_QN
WB_TX_IP
WB_TX_IN
WB_TX_QP
WB_TX_QN
GPS_RX_IP
GPS_RX_IN
GPS_RX_QP
GPS_RX_QN
XO_IN
MT6627 SMD QFN40
10
U201-F
AF6
WB_RSTB
WB_RSTB
FM_DATA
FM_CLK
[10] WB_CTRL3
[10]
WB_CTRL2
[10]
WB_CTRL1
[10] WB_CTRL0
[10] WB_RX_IP
[10] WB_RX_IN
20
19
WB_RX_QN
18
17
16
15
14
13
GPS_RX_IN
12
11
XO_IN
[10]
[10] WB_RX_QP
[10]
[10] WB_TX_IP
[10] WB_TX_IN
[10] WB_TX_QP
[10] WB_TX_QN
[10] GPS_RX_IP
[10]
[10] GPS_RX_QP
[10] GPS_RX_QN
VCN_2V8_PMU_FM
[10]AVDD33_WB
[10]AVDD18_WBG
[10]
AVDD18_WB
[10]AVDD18_GPS
Close to MT6627
Close to MT6572
C1007
1nF
C1005
C1004 100PF
HT1004
HT1002
HT1003
Star Conn
100nF
refer to FM desense performance
enhance proposal
0.01uF
C1002
4.7uF
C1003
for WB/GPS/WBG 1V8
C1008
1.0uF
C1006
100PF
FB1010
600ohm
VCN_2V8_PMU
HT1001
2.2uF
0.22uF
C1041
C1040
VCN18_PMU
VCN18_PMU
VCN18_PMU
VCN_3V3_PMU
Y10
F2W_DATA
AA10
F2W_CLK
WB_SCLK
AG7
WB_SCLK
WB_SDATA
AF7
WB_SDATA
WB_SEN WB_TX_IN
AE6
WB_SEN
WB_CTRL0
Y6
WB_CRTL0
WB_CTRL1
AA6
WB_CRTL1
WB_CTRL2
AA5
WB_CRTL2
WB_CTRL3
AA4
WB_CRTL3
WB_CTRL4
AB5
WB_CRTL4
WB_CTRL5
AB4
WB_CRTL5
MT6592
AVDD18_WBG
XIN_WBG
GPS_RXQN
GPS_RXQP
GPS_RXIN
GPS_RXIP
WB_TXQN
WB_TXQP
WB_TXIN
WB_TXIP
WB_RXQN
WB_RXQP
WB_RXIN
WB_RXIP
ANT_SEL0
ANT_SEL1
ANT_SEL2
AE4
AD6
XO_IN
AF5
GPS_RX_QN
AG5
GPS_RX_QP
AG4
GPS_RX_IN
AF4
GPS_RX_IP
WB_TX_QN
AF2
WB_TX_QP
AG2
AF1
WB_TX_IP
AE1
WB_RX_QN
AE2
WB_RX_QP
AD2
WB_RX_IN
AC2
WB_RX_IP
AC1
ANT_SEL0
AB25
ANT_SEL1
AC26
ANT_SEL2
AC25
Debug usage
AVDD18_WBG
C1046
100nF
[10] ANT_SEL0
T1002
T1001
T1003
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