HP VECTRA VL 6/XXX 6 User Manual

Page 1
Technical Reference Manual Hardware and BIOS
HP Vectra VL
6/xxx Series 6 PC
Page 2
Notice
Hewlett-Packard makes no warranty of any kind with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose.
Hewlett-Packard shall not be liable for errors contained herein or for incidental or consequential damages in connection with the furnishing, performance, or use of this material.
Hewlett-Packard assumes no responsibility for the use or reliability of its software on equipment that is not furnished by Hewlett-Packard.
This document contains proprietary information that is protected by copyright. All rights are reserved. No part of this document may be photocopied, reproduced, or translated to another language without the prior written consent of Hewlett-Packard Company.
Adobe
Microsoft®, Windows® and MS-DOS® are U.S. registered trademarks of
Pentium® is a U.S. registered trademark of Intel Corporation.
TM
is a trademark of Adobe Systems Incorporated which may be registered
in certain jurisdictions.
Microsoft Corporation.
Hewlett-Packard France Commercial Desktop Computing Division 38053 Grenoble Cedex 9 France
1997 Hewlett-Packard Company
Page 3
Preface
This manual is a technical reference and BIOS document for engineers and technicians providing system level support. It is assumed that the reader possesses a detailed understanding of AT-compatible microprocessor functions and digital addressing techniques.
Technical information that is readily available from other sources, such as manufacturer’s proprietary publications, has not been reproduced.
This manual contains summary information only. For additional reference material, refer to the bibliography, on the next page.
Conventions
The following conventions are used throughout this manual to identify specific numeric elements:
Hexadecimal numbers are identified by a lower case h.
For example,
Binary numbers and bit patterns are identified by a lower case b.
For example,
0FFFFFFFh or 32F5h
1101b or 10011011b
iii
Page 4
Bibliography
HP Vectra VL 6/xxx Series 6 User’s Guide manual (D5040-90001).
HP Vectra VL 6/xxx MT Series 6 User’s Guide manual (D5050-90001).
HP Vectra VL 6/xxx Series 6 Familiarization Guide (D5040-90901).
HP Network Administrator’s Guide (online).
HP Vectra Accessories Service Handbook - 7th edition
(5965-4074). HP Vectra PC Service Handbook (Volume 1) - 12th edition
(to be announced). HP Support Assistant CD-ROM (by subscription).
The following Intel® publications provide more detailed information:
Pentium Pro Family Developer’s Manual, Volume 1: Specifications,
Intel, 1996, ISBN 1-55512-259-0 Pentium Pro Family Developer’s Manual, Volume 2: Programmer’s
reference manual, Intel, 1996, ISBN 1-55512-260-4 Pentium Pro Family Developer’s Manual, Volume 3: Operating
System Writer’s Manual, Intel, 1996, ISBN 1-55512-261-2
iv
Page 5
Contents
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Bibliography. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv
1 System Overview
Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Minitower Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Specifications and Characteristic Data . . . . . . . . . . . . . . . . . . . . . . . 12
Physical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Environmental Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical Specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Where to Find the Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2 System Board
System Board and Backplane Boards . . . . . . . . . . . . . . . . . . . . . . . . 18
Architectural View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Chip-Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
The PMC, PL/PCI Bridge Chip (82441 FX) . . . . . . . . . . . . . . . . . . . . . . . 21
The DBX, Data Bus Accelerator Chip (82442 FX) . . . . . . . . . . . . . . . . . 22
The PIIX3, PCI/ISA Bridge Chip (82371SB) . . . . . . . . . . . . . . . . . . . . . . 23
The SIO, Super I/O Controller (NS 87308) . . . . . . . . . . . . . . . . . . . . . . . 24
Devices on the Processor-Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . 26
Intel Pentium II Microprocessor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Cache Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
DRAFT v
Page 6
Contents
Main Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Devices on the PCI Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Integrated Drive Electronics (IDE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Universal Serial Bus (USB) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Devices on the ISA Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Super I/O Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Little Ben . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Other PCI and ISA Accessory Devices Under Plug and Play. . . . . . . . . 35
3 Interface Devices and Mass-Storage Drives
Cirrus 5446 Graphics Controller Chip. . . . . . . . . . . . . . . . . . . . . . . . . 38
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Video Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Video Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Available Video Resolutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Matrox MGA Millennium II Graphics Controller Board . . . . . . . . . . 44
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Video Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Available Video Resolutions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Video BIOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Audio Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Mass-Storage Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Hard Disk Drives. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Flexible Disk Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
CD-ROM Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Connectors and Sockets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
vi DRAFT
Page 7
Contents
4 Summary of the HP/Phoenix BIOS
HP/Phoenix BIOS Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Setup Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Main Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Configuration Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Security Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Power Menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Power Saving and Ergonometry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Power-On from Space-Bar . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Soft Power Down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
BIOS Addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
System Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Product Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
HP I/O Port Map (I/O Addresses Used by the System). . . . . . . . . . . . . . 65
5 Power-On Self-Test and Error Messages
Order in Which the Tests are Performed . . . . . . . . . . . . . . . . . . . . . . 72
Error Message Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Beep Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Lights on the Status Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
DRAFT vii
Page 8
Contents
viii DRAFT
Page 9
1
System Overview
This manual describes the HP Vectra VL 6/xxx Series 6 PC, and provides detailed system specifications.
This chapter introduces the external features, and lists the specifications and characteristic data of the system. It also summarizes the documentation which is available.
9
Page 10
Front view
Front view with cover removed
1 System Overview
Package
Package
activity light status light
(Multimedia models only)
Hard disk drive 24✕ CD-ROM drive Flexible disk drive
Rear view
System board switches
Video memory
Processor
VRM
Main memory
Security lock hole
(All icons shown here are for information, and do not necessarily appear on the PC).
Display
Key boa rd
USB
Mouse
Par al lel
Retaining brackets
Serial A
Serial B
10
Page 11
Minitower Package
1 System Overview
Package
Front view with cover removed
Rear view
System board switches
Processor
VRM
Video memory
Main memory
Serial B
Serial A
Par al lel
Mouse
USB
Key boa rd
Voltage selection switch
Display
(All icons shown here are for information, and do not necessarily appear on the PC).
11
Page 12
1 System Overview
Specifications and Characteristic Data
Specifications and Characteristic Data
Physical Characteristics
System Processing Unit
Desktop Minitower
Weight 9 kg (20 lbs) 15 kg (33 lbs) Dimensions 44.6 cm (D) by 43.5 cm (W) by 13.2 cm (H)
17.5 inches by 17.1 inches by 5.2 inches
Footprint 0.194 m
2
(2.08 sq ft) 0.085 m2 (0.91 sq ft)
44 cm (D) by 19.2 cm (W) by 43.8 cm (H)
17.3 inches by 7.6 inches by 17.2 inches
Keyboard
Flat 464 mm (W) by 178 mm (D) by 33 mm (H) (18.3 inches by 7 inches by 1.3 inches) Standing 464 mm (W) by 178 mm (D) by 51 mm (H) (18.3 inches by 7 inches by 2 inches)
Environmental Specification
System Processing Unit with a Hard Disk
Acoustic noise emission (operating) LwA < 40 dB LpA < 35 dB Acoustic noise emission (operating
with hard disk drive access) Acoustic noise emission (operating
with flexible disk drive access) Operating temperature +10°C to +40°C (+50°F to 104° F) Recommended operating temperature +15°C to +40°C (+59°F to +104°F) Storage temperature -40°C to +70°C (-40°F to +158°F) Over temperature shutdown +50°C (+122°F) Operating humidity 15% to 80% (relative) Storage humidity 8% to 80% (relative), non-condensing at 40°C (104°F) Operating altitude 3100 m max (10000 ft max) Storage altitude 4600 m max (15000 ft max)
LwA < 41 dB LpA < 35 dB
LwA < 43 dB LpA < 38 dB
Operating temperature and humidity ranges may vary depending upon the mass storage devices installed. High humidity levels can cause improper operation of disk drives. Low humidity levels can aggravate static electricity problems and cause excessive wear of the disk surface.
12
Page 13
Electrical Specification
For the desktop models:
1 System Overview
Specifications and Characteristic Data
Parameter
Input voltage
Limit for the Power
Supply
100-127
Vac
200-240
Vac
Notes
Auto-ranging
Limit per PCI
Accessory
Slot
Limit per ISA
Accessory
Slot
Input voltage range 90-264 Vac
Input current (max) 3 A
Input power (max) 150 W
Input power (typical1) <63 W
<31 W <30 W <24 W
<1.2 W
<65 W <34 W <30 W <24 W
<2.8 W
Fully-on mode (with input/output) Fully-on mode (without input/output) Standby mode Suspend mode Off (but plugged in)
Input frequency 45 Hz to 66 Hz
Available power 120 W (continuous) 25 W (max) 7 W (max)
Max current at +5 V 13.5 A 4.5 A 4.5 A
Max current at +3.3 V 6 A
Max current at -5 V 0.1 A
——
0.1 A
Max current at +12 V
4.5 A 0.5 A 1.5 A
Max current at -12 V 0.3 A 0.1 A 0.3 A
1.
Dependant on operating system and PC configuration
13
Page 14
1 System Overview
Specifications and Characteristic Data
For the minitower models:
Parameter
Input voltage 100-127
Input voltage range 90-140
Input current (max) 5 A 3 A Input power (max) 200 W Input power (typical
Input frequency 45 Hz to 66 Hz Available power 160 W (continuous) Max current at +5 V 20 A 4.5 A 4.5 A Max current at +3.3 V 12 A Max current at -5 V 0.2 A
Limit for the Power
Vac
Vac
1
) <59 W
<35 W <30 W <24 W
<1.3 W
Supply
200-240
Vac
180-264
Vac
<58 W <35 W <30 W <24 W
<1.3 W
Notes
Switch selectable
Fully-on mode (with input/output) Fully-on mode (without input/output) Standby mode Suspend mode Off (but plugged in)
Limit per PCI
Accessory
Slot
25 W (max) 7 W (max)
——
Limit per ISA
Accessory
Slot
0.1 A Max current at +12 V 4.4 A Max current at -12 V 0.5 A 0.1 A 0.3 A Max current at +5 Vst
1.
Dependant on operating system and PC configuration
0.05 A
1.5 A 0.5 A
When the computer is turned off, but left plugged in at the mains, the power consumption falls below 5 watts, but is not zero. If the computer is completely unplugged from the mains, the real time clock continues to operate from the charge stored in the battery. If the computer is left plugged in, but not turned on, it continues to supply power to the real time clock, and also keeps the battery recharged. The life-time of rechargeable batteries is considerably extended by keeping them in a fully charged state.
The battery can be recharged by plugging the computer back in for at least an hour. It is not necessary to start the computer.
14
Page 15
1 System Overview
Documentation
Documentation
The table below summarizes the availability of documentation that is appropriate to the HP Vectra VL 6/xxx Series 6 PCs. Only selected publications are available on paper. Most are available as viewable files (which can also be printed) from the HP division support servers, and on the HP Support Assistant CD-ROM.
Division Support Server Support Assistant CD-ROM Paper-based
HP Vectra VL 6/xxx Series 6 User’s Guide
HP Vectra VL 6/xxx Series 6 Familiarization Guide
HP Vectra VL 6/xxx Series 6 Technical Reference Manual
HP Vectra PC Service Handbook (Vol 1, 12th Edition)
HP Vectra Accessory Service Handbook (7th Edition)
PDF file PDF file
PDF file PDF file D5040-90901
PDF file PDF file no
PDF file PDF file To be announced
PDF file PDF file 5965-4074
DT
: D5040A
MT
: D5050A
Each PDF file (portable document format) can be viewed on the screen by opening the file with Acrobat Reader. To print the document, press Ctrl+P whilst you have the document on the screen. You can use the page-up, page­down, goto page, search string functions to read the document on the screen. (Note, though, that for some documents, there is difference between the page number that is printed on the page, and the page number that Acrobat Reader indicates, because of the presence of the front matter pages).
15
Page 16
1 System Overview
Documentation
Where to Find the Information
The following table summarizes the availability of information within the HP Vectra VL 6/xxx Series 6 PC documentation set.
User Guide User Online
Introducing the computer
Product features Key features Exploring New features Exploded view
Product model numbers Product range
Using the computer
Connecting cables and turning on
Finding on-line information
Environmental Working in
Formal documents Software license agreement
Opening the computer Full details Supported accessories Some part number details Full PN details Replacing accessories How to install New procedures Configuring devices Configuring
Fields and their options within Setup
Troubleshooting Basic New symptoms Service notes Advanced Technical information Basic Detailed Advanced System board Jumpers, switches and
BIOS Basic details Upgrading Technical details
Power-On Self-Test routines (POST)
Keyboard, mouse, display, network, printer, power
Finding READ.MEs and on­line documentation
Warranty information
connectors
Key error codes and suggestions for corrective action
comfort S/w license
agreement
Upgrading the computer
peripherals
Repairing the computer
Familiarization
Guide
Jumpers, switches and connectors
How to replace
Service
Handbook
Parts list
CPL dates
Jumpers, switches and connectors
Technical
Reference
Manual
Key features
System overview
Problem fixes
Key fields
Jumpers, switches and connectors
Chip-set details
Memory maps Order of tests
Complete list
16
Page 17
2
System Board
The next chapter describes the graphics, disk and audio devices which are supplied with the computer.
This chapter describes the components of the system board, taking in turn the components of the Processor-Local Bus, the Peripheral Component Interconnect (PCI) bus and the Industry Standard Architecture (ISA) bus.
17
Page 18
2 System Board
System Board and Backplane Boards
System Board and Backplane Boards
Most desktop and minitower models are supplied with a Matrox graphics controller on a PCI board, and do not have the integrated graphics controller loaded on the system board.
Status Panel
A A B
Not Used
B
Power Connector
Memory Slots
C C
Voltage Regulator Module
3.3 V Connector
342 mm
CD-ROM Connector
Flexible Disk Connector
Display
Hard Disk Connector
(Items shown in grey are present only on models with integrated graphics controller)
Graphics Controller Chip
VESA Connector
2
Kbd
USB
Mou
Video Memory
Internal Speaker
External Start
Parallel Port Serial Port A
210 mm
Processor Slot
External Speaker Connector
System Board Switches
External Battery Connector
Serial Port B
18
Page 19
2 System Board
System Board and Backplane Boards
Desktop (front view)
2 PCI slot (shown in white)
2 ISA/PCI combination slot
(shown in light grey)
1 system board slot (shown
in dark grey)
Desktop (rear view)
1 ISA slot (shown in grey)
PCI Slot #4 (J12) PCI Slot #3 (J5)
PCI Slot #2 (J11) PCI Slot #1 (J6)
Minitower (top view)
2 ISA slot (shown in grey)
2 PCI slot (shown in white)
2 ISA/PCI combination slot
(shown in light grey)
1 system board slot (shown
in dark grey)
PCI Slot #4 (J12)
PCI Slot #3 (J5) PCI Slot #2 (J11)
PCI Slot #1 (J6)
19
Page 20
2 System Board
Architectural View
Architectural View
Pentium II Processor
L2 cache
memory
Processor-Local Bus (64 bit, 60/66 MHz)
82441 FX
PL/PCI Bridge (PMC)
PL bus
interface
DBX
interface
PCI bus
interface
Memory
controller
Main
memory
82442 FX
Data bus accelerator (DBX)
PMC
interface
DRAM
interface
PCI Bus
(32 bit, 30/33 MHz)
82371 SB
PCI/ISA Bridge (PIIX3)
Interrupt
controller
PCI bus
interface
2✕USB
controller
DMA
controller
ISA bus
interface
2✕IDE
controller
Hard
disk
Serial
EEPROM
Little Ben (HP ASIC)
ISA Bus
(16 bit, 7.5/8.25 MHz)
20
PL bus
interface
PCI bus
interface
CL5446 or Millennium II
Graphics controller
Keyboard
controller
Par alle l
controller
2✕serial
controller
System
ROM
PC87308
Super I/O
Mouse
controller
ISA bus
interface
FDD
Controller
Flexible
disk
Page 21
2 System Board
Chip-Set
Chip-Set
The chip-set comprises four chips. These interface between the three main buses (the Processor-Local bus, the PCI bus and the ISA bus).
The PMC chip (82441FX) is a combined PL/PCI bridge and main memory controller.
The DBX chip (82442FX) is the data bus accelerator, implementing the datapath between the processor local bus and main memory.
The PIIX3 chip (82371SB) is a combined PCI/ISA bridge and IDE controller and USB controller.
The Super I/O chip (37C932) is a combined serial interface and parallel
interface and keyboard controller and mouse controller and flexible disk drive controller.
PL Bus Interface
PCI Bus Interface
The PMC, PL/PCI Bridge Chip (82441 FX)
This forms the bridge between the Processor Local Bus (PL Bus) and the PCI Bus.
The PMC chip monitors each cycle that is initiated by the processor, and forwards those to the PCI bus that are not targeted at the local memory. It translates PL bus cycles into PCI bus cycles.
The chip supports the SMM mode of the Pentium processor, the CPU stop clock hardware function, and the keyboard lock function. These are used by the LittleBen chip, as described on page 34.
Sequential PL-to-PCI memory write cycles are translated into PCI zero wait state burst cycles. The maximum PCI burst transfer can be between 256 bytes and 4 KB. The chip supports advanced snooping for PCI master bursting, and provides a pre-fetch mechanism dedicated for IDE read.
The PCI arbiter supports PCI bus arbitration for up to four masters using a rotating priority mechanism. Its hidden arbitration scheme minimizes arbitration overhead.
21
Page 22
2 System Board
Chip-Set
Main Memory Controller
DBX Interface
PMC Interface
PL Bus Interface
Data Path
The main memory controller supports up to 512 MB of dynamic random access memory (DRAM), arranged in banks of any mixture of memory capacities, provided that each bank contains a pair of identical single interline memory modules (SIMMs). With the 32 MB module from HP, the three banks on these PCs gives a total capacity of 192 MB. With a 64 MB module from HP, it will give a total capacity of 384 MB.
The DBX chip, described next, is controlled by the PMC chip.
The DBX, Data Bus Accelerator Chip (82442 FX)
The DBX chip implements a 64-bit data path (not interleaved) between the Processor-Local bus and main memory modules.
This unit takes the data from the Processor Local bus that is to be written to the memory, and takes the data out to the Processor Local bus that has been read from the memory.
Storage elements are provided for bidirectional data buffering among the 64-bit PL data bus, the 64/32-bit memory data bus, and the 32-bit PCI address/data bus.
DRAM Interface
There are three FIFO (first-in first-out) queues, and one read buffer for the paths between the PL, PCI, and Memory buses. This buffering is used, partly, to smooth the differences in bandwidths between the three buses, thereby improving the overall system performance. During bus operations between the PL, PCI and Memory buses, the chip receives control signals from the PMC, performs functions such as data latching, data forwarding to the destination bus, and data assemble and disassemble.
Whilst accesses to the local memory are in progress, whether it be from the PL or PCI bus, the PMC maintains control of the secondary cache, DRAMs, and the datapath.
In the case of 66 MHz PL bus operation, memory accesses have a timing pattern of 5-2-2-2 for a page-hit. This degrades to 8-2-2-2 for a row-miss, and to 11-2-2-2 for a page-miss. When the banks have been filled in an arbitrary order, back-to-back burst reads keep to the 5-2-2-2,5-2-2-2 timing
22
Page 23
2 System Board
Chip-Set
pattern. When the banks have been filled contiguously (bank A, then bank B, then bank C), back-to-back burst reads are improved to a 5-2-2-2,3-2-2-2 timing pattern.
The controller supports relocation of system management memory. It supports a read cycle power saving mode, and a CAS before RAS Intelligent Refresh mode of operation, with a CAS# driving current that is programmable.
The controller is fully configurable for the characteristics of the shadow RAM (640 KB to 1 MB). It supports concurrent write back.
The PIIX3, PCI/ISA Bridge Chip (82371SB)
This chip is encapsulated in a 208 pin plastic quad flat pack (PQFP) package.
PCI Bus Interface
ISA Bus Interface
IDE Controller
USB Controller
DMA Controller
This part of the chip is responsible for transferring data between the PCI bus and the ISA expansion bus. It performs PCI-to-ISA, and ISA-to-PCI bus cycle translation. It supports the Plug-and-Play mechanism. Data buffers are provided, to isolate the PCI and ISA buses.
As well as accepting cycles from the PCI bus interface, and translating them for the ISA bus, the ISA bus interface also requests the PCI master bridge to generate PCI cycles on behalf of a DMA or ISA master. The ISA bus interface contains a standard ISA bus controller and data buffering logic. It can directly support six ISA slots without external data or address buffering.
The PCI master/slave IDE controller, supporting four devices, two on each of two channels, is described on page 29.
The PCI USB controller, supporting two connectors, is described on page 30.
The seven channel DMA controller incorporates the functionality of two 82C37 DMA controllers. Channels 0 to 3 are for 8-bit DMA devices, while channels 5 to 7 are for 16-bit devices (see page 67). The channels can be programmed for any of the four transfer modes: the three active modes (single, demand, block), can perform three different types of transfer: read, write and verify. The address generation circuitry supports a 24-bit address for DMA devices.
23
Page 24
2 System Board
Chip-Set
Interrupt Controller
Counter / Timer
The sixteen channel interrupt controller incorporates the functionality of two 82C59 interrupt controllers. The two controllers are cascaded, giving 14 external and two internal interrupt sources (see page 67).
The chip contains a three-channel 82C54 counter/timer. The counters use a division of the 14.318 MHz OSC input as the clock source.
The SIO, Super I/O Controller (NS 87308)
The Super I/O chip (NS 87308) provides the control for two FDC devices, two serial ports and one bidirectional multi-mode parallel port.
Function Logical device number
Flexible disk controller 0 ?? Parallel port controller 3 ?? UART1 controller 4 ?? UART2 controller 5 ?? RTC 6 ?? Keyboard controller 7 ??
Serial / parallel communications ports
Mouse controller 7 ?? General purpose I/O (GPIO) 8 ??
The two 9-pin serial ports (whose pin layouts are depicted on page 55) support RS-232-C and are buffered by 16550 UARTs, with 16 Byte FIFOs. They can be programmed as COM1, COM2, COM3, COM4, or disabled.
The 25-pin parallel port (also depicted on page 55) is Centronics compatible, supporting IEEE 1284. It can be programmed as LPT1, LPT2, or disabled. It can operate in the following four modes:
Standard mode (PC/XT, PC/AT, and PS/2 compatible).
Bidirectional mode (PC/XT, PC/AT, and PS/2 compatible).
Enhanced mode (enhanced parallel port, EPP, compatible).
High speed mode (MS/HP extended capabilities port, ECP, compatible).
24
Page 25
2 System Board
Chip-Set
FDC
RTC
Keyboard and Mouse Controller
Serial EEPROM
The integrated flexible disk controller (FDC) supports any combination of two of the following: tape drives, 3.5-inch flexible disk drives, 5.25-inch flexible disk drives. It is software and register compatible with the 82077AA, and 100% IBM compatible. It has an A and B drive-swapping capability and a non-burst DMA option.
The real-time clock (RTC) is 146818A-compatible. With an accuracy of 20 ppm (parts per million). The configuration RAM is implemented as 256 bytes of CMOS memory.
The computer has an 8042-based keyboard and mouse controller. The connector pin layouts are shown on page 55. The Power-On keyboard is described on page 31.
This is the non-volatile memory which holds the values for the Setup program (they are no longer stored in the CMOS memory).
25
Page 26
2 System Board
Devices on the Processor-Local Bus
Devices on the Processor-Local Bus
Intel Pentium II Microprocessor
The Pentium II processor and level-2 cache memory are packaged in a self­contained, pre-sealed module, installed in a socket on the system board. The heat-sink is supplied with the processor, and is bolted to it by the manufacturer. The module is held in place by a bracket. There are two plastic clips, one on the top of each pillar of the bracket, to hold the processor module in place.
Plastic clips
Bracket pillars
Heat-sink
To remove the old processor module:
Press the two plastic clips towards each other.
1
Carefully pull the processor module away from its connector on the
2
system board.
Only upgrades, pin compatible with the original processor, manufactured by Intel, are supported.
Every processor that is installed, or replaced, must be accompanied by the voltage regulator module (VRM) that is supplied with it. Each VRM is specific to the processor with which it is supplied, and should be used only with that processor.
26
Page 27
2 System Board
Devices on the Processor-Local Bus
Bus Frequencies
There is a 14.318 MHz crystal oscillator on the system board. This frequency is multiplied to 60 or 66 MHz by a phase locked loop. This is further scaled by an internal clock multiplier within the processor. For example, the Pentium II 233 MHz processor multiplies the 66 MHz system clock by 3.5. Switches 1 and 2, on the system board switches, set the frequency of the Processor-Local bus. Switches 3, 4 and 5 set the clock multiplier ratio.
Switch
1 2 3 4 5
Closed Open 60 MHz 30 MHz 7.5 MHz Open Open Closed 2.5 : 1 150 MHz
Open Open 66 MHz 33 MHz 8.25 MHz Open Open Closed 2.5 : 1 166 MHz
Closed Open 60 MHz 30 MHz 7.5 MHz Open Closed Open 3 : 1 180 MHz
Open Open 66 MHz 33 MHz 8.25 MHz Open Closed Open 3 : 1 200 MHz
Open Open 66 MHz 33 MHz 8.25 MHz Open Closed Closed 3.5 : 1 233 MHz
Open Open 66 MHz 33 MHz 8.25 MHz Closed Open Open 4 : 1 266 MHz
1.
These processors are not available for these models of HP Vectra PC at the time of printing. This information is provided for completeness only
.
Processor Local Bus
Frequency
PCI Bus
Frequency
ISA Bus
Frequency
Switch Frequency
Ratio
Processor :
Local Bus
Processor Frequency
1
1
1
1
The computer may execute erratically, if at all, or may overheat, if it is configured to operate at a higher processor speed than the processor is capable of supporting. This can cause damage to the computer.
Setting the switches to operate at a slower speed, than the processor is capable of supporting, can still cause erratic behavior in some cases, and would reduce the instruction throughput in others.
Cache Memory
The level-2 cache memory is pre-packaged in the processor module. The level-1 cache memory is fabricated on the Pentium II processor chip. Each bank of level-1 cache memory (I-cache and D-cache) has a capacity of 16 KB. The level-2 cache memory has a capacity of 256 KB or 512 KB. The amount of both types of cache memory is set at the time of manufacture, so cannot be changed.
Data is stored in lines of 32-bytes (256 bits). Thus four consecutive 64-bit transfers with the main memory are involved for each transaction.
27
Page 28
2 System Board
Devices on the Processor-Local Bus
Main Memory
There are six main memory module sockets, arranged in three banks (A to C). One bank is already occupied by the pair of single interline memory modules (SIMMs) that contain the 16 MB or 32 MB of memory that is supplied with the computer.
Different banks can have different capacities (8, 16, 32 or 64 MB), but must be composed of identical pairs of modules (2✕4, 2✕8, 2✕16 or 2✕32 MB). By installing a pair of 32 MB SIMMs in every bank, first removing the memory modules that were supplied with the computer, the maximum capacity of 192 MB of main memory can be attained.
The banks can be filled, or left empty, in any order. However, there is a performance advantage to filling the banks in the order A, B, C.
Each bank that is used must contain a pair of identical modules: the same speed (60 or 70 ns), the same width (32-bit or 36-bit), and the same technology (extended data out, EDO, or fast page mode, FPM). Different banks can contain different speed modules (but the computer will work at the speed of the slowest bank). Different banks can contain different technology modules.
The following table indicates the recommended capacities of main memory.
Operating System Minimum Memory Capacity Recommended Memory Capacity
Windows 3.11 4 to 8 MB 12 to 16 MB Windows 95 8 MB 16 to 24 MB Windows NT 12 MB 24 to 32 MB OS/2 4 to 8 MB 16 MB
The Setup program automatically detects which memory module capacity, speed, and type is installed in each bank. Individual pages of memory can be configured as cacheable or non-cacheable by software or hardware. They can also be enabled and disabled by hardware or software.
28
Page 29
Devices on the PCI Bus
2 System Board
Devices on the PCI Bus
PCI Device Device Name
PL/PCI bridge PCI/ISA bridge IDE controller USB controller Integrated graphics controller PCI slot #1 PCI slot #2 PCI slot #3 PCI slot #4
Device
Number
PMC 0 (00h) 0 11
PIIX3 4 (04h) 0 15
CL 5446 13 (0Dh) 0 24 A
J6 7 (07h) 18 A B C D
J11 10 (0Ah) 21 D A B C
J5 6 (06h) 17 C D A B
J12 12 (0Ch) 23 B C D A
Function AD[xx]
1 — 2
Chip-set Interrupt Connection
INTA INTB INTC INTD
The distribution of the interrupt lines is described more fully on page 68.
Integrated Drive Electronics (IDE)
The IDE controller is implemented as part of the PIIX3 chip (the PCI/ISA bridge). It is driven from the PCI bus, and has PCI-Master capability. It supports Enhanced IDE (EIDE) and Standard IDE. To use the Enhanced IDE features the drives must be compliant with Enhanced IDE.
Up to four IDE devices are supported: two (one master and one slave) connected to the primary channel, and two (one master and one slave) to the secondary channel. The primary channel is fitted with an IDE cable with two connectors. The secondary channel is fitted with an IDE cable with one or two connectors. If a single drive is attached to a channel, it should be in the master position (this is the connector that is closest to the system board, unless the markings on the cables state otherwise).
It is possible to mix a fast and a slow device, such as a hard disk drive and a a CD-ROM, on the same channel without affecting the performance of the fast device. The BIOS sends a command to each drive to determine, automatically, the fastest configuration that it supports. However, in general, the primary channel cable is recommended for hard disk drives, and the secondary channel cable for CD-ROM drives.
29
Page 30
2 System Board
Devices on the PCI Bus
Transfer Rates Versus Modes of Operation
Disk Capacity Versus Modes of Addressing
The controller supports 32-bit Windows I/O transfers. Five PIO modes, and three DMA modes are supported. The five supported PIO modes allow the following transfer rates.
Mode 01234 Cycle time (ns) 600 383 240 180 120 Transfer rate (MB/s) 3.33 5.22 8.33 11.1 16.7
The three DMA modes allow the following transfer rates:
Mode 012 Cycle time (ns) 480 150 120 Transfer rate (MB/s) 4.2 13.3 16.7
The amount of addressable space on a hard disk is limited by three factors: the physical size of the hard disk, the addressing limit of the IDE hardware, and the addressing limit of the BIOS. The Extended-CHS addressing scheme allows larger disk capacities to be addressed than under CHS, by performing a translation. If the Setup field has been set to
extended
, the logical block
addressing (LBA) mode will be selected for each device that supports it.
Cylinders per
Device
Heads per
Cylinder
Sectors per Track
Bytes per
Sector
Bytes per
Device
CHS 64 16 1024 512 528 M ECHS 64 256 1024 512 8.4 G
28
LBA - - 256 M (=2
) 512 137 G
Universal Serial Bus (USB) Controller
The OpenHCI (for USB release 1.0) USB controller is implemented as part of the PIIX3 chip (the PCI/ISA bridge). It is driven from the PCI bus, and provides support for the two stacked USB connectors on the back panel. Over-current detection and protection is provided, but shared between the two ports.
USB works only if the USB interface has been enabled within the HP Setup program. Currently, only the Microsoft Windows 95 operating system provides support for the USB.
The Microsoft Supplement 2.1 software, which provides support of the Universal Serial Bus, can be obtained from the Hewlett-Packard World Wide Web site:
30
http://www.hp.com/go/vectrasupport/
Page 31
Devices on the ISA Bus
ISA Device Index Data
2 System Board
Devices on the ISA Bus
Super I/O
Little Ben (HP ASIC)
15Ch 15Dh
496h 497h
Super I/O Controller
The Super I/O chip (NS 87308) is part of the chip set, and is described on page 24.
The computer is supplied with a Logitech 2-button mouse, and a C3758A keyboard with the following features:
Space bar power on, to start the computer from the Off state (if
from keyboard
Windows key (next to the keys), which has the same effect as
is enabled in the Setup program).
power on
clicking the “Start” button on the Windows 95 task bar. Pull-down key (next to the right key), which has the same effect as
clicking the right mouse button.
Serial EEPROM
The computer uses 4 Kbit of Serial EEPROM implemented within a single 512 K✕8-bit ROM chip. Serial EEPROM is ROM in which one byte at a time can be returned to its unprogrammed state by the application of appropriate electrical signals. In effect, it can be made to behave like very slow, non­volatile RAM. It is used for storing the tatoo string, the serial number, and the parameter settings for the Setup program.
When installing a new system board, the Serial EEPROM will have a blank serial number field. This will be detected automatically by the BIOS, which will then prompt the user to enter the serial number which is printed on the identification label on the back of the computer.
31
Page 32
2 System Board
Devices on the ISA Bus
Flash EEPROM (the System ROM)
The computer uses 256 KB of Flash EEPROM implemented within a single 256 K✕8-bit ROM chip (or in two 128 K✕8-bit chips). Flash EEPROM is ROM in which the whole memory can be returned to its unprogrammed state by the application of appropriate electrical signals to its pins. It can then be reprogrammed with the latest firmware.
The System ROM contains: 64 KB of system BIOS (including the boot code, the ISA and PCI initialization, DMI, the Setup program and the Power-On Self-Test routines, plus their error messages); 32 KB of video BIOS; 32 KB of Plug-and-Play code; and 32 KB of power management code. The functions of these are summarized in Chapters 4 and 5.
Updating the System ROM
The System ROM can be updated with the latest BIOS. This can be downloaded, as a compressed file, from the HP Electronic Services. You must specify the model of the computer since the utility which is supplied for a different model cannot be used with this one. (More information is given in the “Hewlett-Packard Support and Information Services” chapter in the User’s Guide that was supplied with the computer).
The compressed file, once downloaded, can be executed. This causes it to be expanded out into a number of files, including:
the Flash EEPROM reprogramming utility program,
the BIOS upgrade file,
the binary file,
the batch file,
a number of
PFMHD106.bin
flash.bat
*.txt
HD0700xx.FUL
files, giving information about the new version of the
BIOS, and instructions on how to install it.
The Phlash utility must be run from a diskette.
Do not switch off the computer until the system BIOS update procedure has completed, successfully or not, otherwise irrecoverable damage to the ROM may be caused. The control panel switches are automatically disabled to prevent accidental interruption of the flash programming process.
phlash.exe
32
Page 33
System Board Switches
Five of the system board switches (whose location is shown on page 18) set the working frequencies for the computer, as summarized on page 27. The others set the configuration for the computer, as summarized in the following table.
Switch Functions of the System Board Switches
1-5
6
7
8
9
10
Bus frequencies (see the table on page 27) Clear CMOS:
Open = normal operation
Closed = clear CMOS (to reload the Password:
Open = normal operation
Closed = disabled / clear User and Administrator passwords Keyboard space-bar power-on:
Open = disabled
Closed= normal operation
For test purposes only, do not use:
Open = normal operation
Product identification:
Open = normal operation
Closed = clear the product identification field in the CMOS memory
Setup
program defaults)
2 System Board
Devices on the ISA Bus
By setting switch SW6 in the
Closed
position, not only is the configuration data cleared (in the CMOS memory and the Serial EEPROM), but also all the Plug-and-Play data that had been saved in the Serial EEPROM. However, the serial number, the tattooing string, the date and the time are each retained.
By setting switch SW8 in the
Closed
position, the Power-On Space-Bar
function is enabled. Note, though, that it must also be enabled in the
Power-On Space-Bar
Turning the computer on, with switch SW10 in the
field of the Power Menu in the Setup program.
Closed
position, clears the product identification field in the BIOS, and causes the computer to prompt for the new information. By identifying the product correctly (after replacing a defective system board by a new one), the BIOS is able to tailor itself for the particular product, and to enable the appropriate features.
33
Page 34
2 System Board
Devices on the ISA Bus
Updating the BIOS Before Considering Replacing the System Board
If the computer is faulty, but it starts up correctly, and the fault is not clearly due to the system board hardware, then it is advisable to check the BIOS version number. The BIOS version number can be found from the summary screen, or the Setup program, obtained by pressing or , respectively, when the computer has just been restarted, as described in Chapter 4.
If it is not the current version of the BIOS, the System ROM should be flashed with the new version, as described on the previous page. The computer should then be re-run to see if this has cleared the problem.
Little Ben
Little Ben is an HP application specific integrated circuit (ASIC), designed to be a companion to the Super I/O chip. It interfaces between the chip-set and the processor, and contains the following:
BIOS timer
hardware wired 50 ms long 880 Hz beep module.
automatic blinker that feeds the LEDs module with a 1 Hz oscillator
signal.
security protection (access, flash and anti-virus protection)
For 128, 256 or 512 KB Flash EEPROMs.
For the Super I/O space: the Serial EEPROM, serial ports, parallel port
and mass storage drives (disable write on Flexible Disk Drive, disable boot on any drive, disable use of any embedded drive)
hard and soft control for the power supply (available with Windows NT and Windows 95, but not with OS/2)
Advanced power management (APM) version 1.2 (available with Win­dows 95 and OS/2, but not with Windows NT)
glue logic (such as programmable chip selects)
The computer can be turned on by typing the space-bar on the keyboard, or when it receives an external signal from a network board. When VccState and PowerGood pins are both low, all output pins are in tri-state mode, except for RemoteOnBen which continues to be driven. The power consumption has been kept as low as possible. This allows the computer to be powered from the standby power supply, and to be restarted even after a power loss has occurred.
34
Page 35
2 System Board
Devices on the ISA Bus
When the user requests a ShutDown from the operating system, the environment is first cleared. Any request to turn off the computer, from the control panel, or from the operating system, can only be granted if the computer is not locked by Little Ben’s lock bit (otherwise the power remains on, a red light is illuminated, and the buzzer is sounded).
Other PCI and ISA Accessory Devices Under Plug and Play
Plug and Play is an industry standard for automatically configuring the computer’s hardware. When you start the computer, the Plug and Play system BIOS can detect automatically which hardware resources (IRQs, DMAs, memory ranges, and I/O addresses) are used by the system-based components.
All PCI accessory boards are Plug and Play, although not all ISA boards are. Check the accessory board’s documentation if you are unsure.
The computer is PCI 2.1 compliant, and PnP 1.1 compliant. Accessory boards which are Plug and Play are automatically configured by the BIOS.
In general, in a Plug and Play configuration, resources for an ISA board have to be reserved first, and then you can plug in your board. If you want to install an ISA board when running a non Plug-and-Play operating system, such as Windows for Workgroups, you have to reserve the resources for the board using the ICU (ISA configuration utility). Failure to do so may lead to resource conflicts.
35
Page 36
2 System Board
Devices on the ISA Bus
36
Page 37
3
Interface Devices and Mass-Storage Drives
This chapter describes the graphics, mass storage and audio devices which are supplied with the computer. It also summarizes the pin connections on the internal and external connectors.
37
Page 38
3 Interface Devices and Mass-Storage Drives
Cirrus 5446 Graphics Controller Chip
Cirrus 5446 Graphics Controller Chip
Some models are supplied with a graphics controller chip integrated on the system board (all other models are supplied with a Matrox Millennium II PCI graphics controller on a board fitted in a PCI accessory slot, as described in the next section of this chapter). The Cirrus Logic CL-GD5446, can be characterized as follows:
®
100% hardware- and BIOS-compatible with IBM
64-bit video memory access with 2 MB, 50 ns, EDO, video DRAM (this is not upgradeable since it is already fitted to capacity).
Hardware acceleration of graphical user interface (GUI) operations through a bit-block transfer mechanism
VGA display standard
Support for up to 4 MB, 50 ns EDO video DRAM (though space is only provided on the system board for 2 MB)
Integrated 24-bit, 135 MHz RAMDAC
Integrated programmable, dual-clock synthesizer
Green power saving features
Standard and Enhanced Video Graphics Array (VGA) modes
Acceleration for playback, continuous interpolation on X, continuous interpolation on Y
DDC 2B compliant.
Superior TV-like quality video performance: hardware video window; YUV video support; color key, chroma key; X & Y interpolated zooming.
Connectors
The Video Electronics Standards Association (VESA) defines a standard video connector, variously known as the VESA feature connector, auxiliary connector, or pass-through connector. The graphics controller supports an input/output VESA feature connector. This connector (whose pin names are listed in a table on page 51) is integrated on the system board, and is connected directly to the pixel data bus and the synchronization signals.
38
Page 39
3 Interface Devices and Mass-Storage Drives
Cirrus 5446 Graphics Controller Chip
Video Memory
The video RAM (also known as the frame buffer) is a local block of 50 ns EDO DRAM for holding both the on-screen surface (reflecting what is currently displayed on the screen), and the off-screen surface (video frame, fonts, double buffer).
Video Modes
The following table details the standard VGA modes which are currently implemented in the video BIOS. These modes are supported by standard BIOS functions; that is, the video BIOS (which is mapped contiguously in the address range C0000h to C7FFFh) contains all the routines required to configure and access the graphics subsystem.
Standard VGA Modes
Mode No. Standard
00h, 01h 02h, 03h
04h, 05h
06h
07h MDA text 720 x 400 monochrome 70 Hz 31.5 kHz
0Dh 0Eh 0Fh 10h
11h 11h+ 11h+
12h 12h+ 12h+ 12h+
13h
CGA CGA
CGA CGA
EGA EGA EGA EGA
VGA VGA VGA VGA VGA VGA VGA VGA
Interface
Type
text text
graphics graphics
graphics graphics graphics graphics
graphics graphics graphics graphics graphics graphics graphics graphics
Resolution
360 x 400 720 x 400
320 x 200 640 x 200
320 x 200 640 x 200 640 x 350 640 x 350
640 x 480 640 x 480 640 x 480 640 x 480 640 x 480 640 x 480 640 x 480 320 x 200
No. of
Colors
16/256K 16/256K
4/256K 2/256K
16/256K 16/256K
monochrome
16/256K
2/256K 2/256K
2/256K 16/256K 16/256K 16/256K 16/256K
256/256K
Vertical Refresh
70 Hz 70 Hz
70 Hz 70 Hz
70 Hz 70 Hz 70 Hz 70 Hz
60 Hz 72 Hz 75 Hz 60 Hz 72 Hz 75 Hz 85 Hz 70 Hz
Horizontal
Refresh
31.5 kHz
31.5 kHz
31.5 kHz
31.5 kHz
31.5 kHz
31.5 kHz
31.5 kHz
31.5 kHz
31.5 kHz
37.9 kHz
37.5 kHz
31.5 kHz
37.9 kHz
37.5 kHz
43.3 kHz
31.5 kHz
Notes
39
Page 40
3 Interface Devices and Mass-Storage Drives
Cirrus 5446 Graphics Controller Chip
Extended Video Modes
Extended
Mode No.
58h, 6Ah 58h, 6Ah 58h, 6Ah 58h, 6Ah
5Ch 5Ch 5Ch 5Ch 5Ch
5Dh i
5Dh 5Dh 5Dh 5Dh
5Eh 100h graphics 640 x 400 256/256K 70 Hz 31.5 kHz
5Fh 5Fh 5Fh 5Fh
60h i
60h 60h 60h 60h
60h d
64h 64h 64h 64h
65h 65h 65h 65h 65h
66h 66h 66h 66h
67h 67h 67h 67h 67h
VESA
Mode No.
102h
102h 102h ergo 102h ergo
103h
103h 103h ergo 103h ergo 103h ergo
104h
104h
104h
104h 104h ergo
101h 101h ergo 101h ergo 101h ergo
105h
105h
105h
105h 105h ergo 105h ergo
111h 111h ergo 111h ergo 111h ergo
114h
114h 114h ergo 114h ergo 114h ergo
110h 110h ergo 110h ergo 110h ergo
113h
113h 113h ergo 113h ergo 113h ergo
Interface
Type
graphics graphics graphics graphics
graphics graphics graphics graphics graphics
graphics graphics graphics graphics graphics
graphics graphics graphics graphics
graphics graphics graphics graphics graphics graphics
graphics graphics graphics graphics
graphics graphics graphics graphics graphics
graphics graphics graphics graphics
graphics graphics graphics graphics graphics
Resolution
800 x 600 800 x 600 800 x 600 800 x 600
800 x 600 800 x 600 800 x 600 800 x 600 800 x 600
1024 x 768 1024 x 768 1024 x 768 1024 x 768 1024 x 768
640 x 480 640 x 480 640 x 480 640 x 480
1024 x 768 1024 x 768 1024 x 768 1024 x 768 1024 x 768 1024 x 768
640 x 480 640 x 480 640 x 480 640 x 480
800 x 600 800 x 600 800 x 600 800 x 600 800 x 600
640 x 480 640 x 480 640 x 480 640 x 480
800 x 600 800 x 600 800 x 600 800 x 600 800 x 600
No. of
Colors
16/256K 16/256K 16/256K 16/256K
256/256K 256/256K 256/256K 256/256K 256/256K
16/256K 16/256K 16/256K 16/256K 16/256K
256/256K 256/256K 256/256K 256/256K
256/256K 256/256K 256/256K 256/256K 256/256K 256/256K
65,536 65,536 65,536 65,536
65,536 65,536 65,536 65,536 65,536
32,768 32,768 32,768 32,768
32,768 32,768 32,768 32,768 32,768
Vertical Refresh
56 Hz 60 Hz 72 Hz 75 Hz
56 Hz 60 Hz 72 Hz 75 Hz 85 Hz
43 Hz i
60 Hz 70 Hz 72 Hz 75 Hz
60 Hz 72 Hz 75 Hz 85 Hz
43 Hz i
60 Hz 70 Hz 72 Hz 75 Hz 85 Hz
60 Hz 72 Hz 75 Hz 85 Hz
56 Hz 60 Hz 72 Hz 75 Hz 85 Hz
60 Hz 72 Hz 75 Hz 85 Hz
56 Hz 60 Hz 72 Hz 75 Hz 85 Hz
Horizontal
Refresh
35.2 kHz
37.8 kHz
48.1 kHz
46.9 kHz
35.2 kHz
37.9 kHz
48.1 kHz
46.9 kHz
53.7 kHz
35.5 kHz
48.3 Hz 56 kHz 58 kHz 60 kHz
31.5 kHz
37.9 kHz
37.5 kHz
43.3 kHz
35.5 kHz
48.3 kHz 56 kHz 58 kHz 60 kHz
68.3 kHz
31.5 kHz
37.9 kHz
37.5 kHz
43.3 kHz
35.2 kHz
37.8 kHz
48.1 kHz
46.9 kHz
53.7 kHz
31.5 kHz
37.8 kHz
37.5 kHz
43.3 kHz
35.2 kHz
37.8 kHz
48.1 kHz
46.9 kHz
53.7 kHz
Notes
interlaced
interlaced
clock-doubled 8 bpp
40
Page 41
3 Interface Devices and Mass-Storage Drives
Cirrus 5446 Graphics Controller Chip
Extended Mode No.
68h i
68h 68h 68h 68h
69h i 119h graphics 1280 x 1024 32,768 43 Hz i 48 kHz interlaced
6Ch i 106h graphics 1280 x 1024 16/256K 43 Hz i 48 kHz interlaced
6Dh i 6Dh d 6Dh d 6Dh d
71h 71h 71h 71h
74h i
74h 74h 74h 74h
75h i 11Ah graphics 1280 x 1024 65,536 43 Hz i 48 kHz interlaced
78h 78h 78h 78h 78h
79h i
79h 79h 79h 79h
7Ch d 7Ch d
VESA
Mode No.
116h
116h 116h ergo 116h ergo 116h ergo
107h
107h 107h ergo 107h ergo
112h
112h
112h
112h
117h
117h 117h ergo 117h ergo 117h ergo
115h
115h
115h
115h
115h
118h
118h 118h ergo 118h ergo 118h ergo
-
-
Interface
Type
graphics graphics graphics graphics graphics
graphics graphics graphics graphics
graphics graphics graphics graphics
graphics graphics graphics graphics graphics
graphics graphics graphics graphics graphics
graphics graphics graphics graphics graphics
graphics graphics
Resolution
1024 x 768 1024 x 768 1024 x 768 1024 x 768 1024 x 768
1280 x 1024 1280 x 1024 1280 x 1024 1280 x 1024
640 x 480 640 x 480 640 x 480 640 x 480
1024 x 768 1024 x 768 1024 x 768 1024 x 768 1024 x 768
800 x 600 800 x 600 800 x 600 800 x 600 800 x 600
1024 x 768 1024 x 768 1024 x 768 1024 x 768 1024 x 768
1152 x 864 1152 x 864
No. of
Colors
32,768 32,768 32,768 32,768 32,768
256/256K 256/256K 256/256K 256/256K
16.7 M
16.7 M
16.7 M
16.7 M
65,536 65,536 65,536 65,536 65,536
16.7 M
16.7 M
16.7 M
16.7 M
16.7 M
16.7 M
16.7 M
16.7 M
16.7 M
16.7 M
256/256K 256/256K
Vertical Refresh
43 Hz i
60 Hz 70 Hz 75 Hz 85 Hz
43 Hz i
60 Hz
71.2 Hz 75 Hz
60 Hz 72 Hz 75 Hz 85 Hz
43 Hz i
60 Hz 70 Hz 75 Hz 85 Hz
56 Hz 60 Hz 72 Hz 75 Hz 85 Hz
43 Hz i
60 Hz 70 Hz 75 Hz 85 Hz
70 Hz 75 Hz
Horizontal
Refresh
35.5 kHz
48.3 kHz 56 kHz 60 kHz
68.3 kHz
48 kHz 65 kHz 76 kHz 80 kHz
31.5 kHz
37.8 kHz
37.5kHz
43.3 kHz
35.5 kHz
48.3 kHz 56 kHz 60 kHz
68.3 kHz
35.2 kHz
37.8 kHz
48.1 kHz
46.9 kHz
53.7 kHz
35.5 kHz
48.3 kHz 56 kHz 60 kHz
68.3 kHz
63.9 kHz
67.5 kHz
interlaced
non Vesa timing
interlaced clock-doubled clock-doubled clock-doubled
interlaced
non Vesa timing
interlaced
non Vesa timing
clock-doubled
clock-doubled 8 bpp
Notes
The “non Vesa timing”, on modes 68h, 74h and 79h, arises because the VESA pixel frequency on the 5446 is 87.7 MHz, as opposed to 94.5 MHz. This should not present major problems; most of the displays that can support such video modes are high end displays that use micro-controller based electronics.
41
Page 42
3 Interface Devices and Mass-Storage Drives
Cirrus 5446 Graphics Controller Chip
Available Video Resolutions
The number of colors supported is limited by the graphics device and the video memory. The resolution/color/refresh-rate combination is limited by a combination of the display driver, the graphics device, and the video memory. If the resolution/refresh-rate combination is set higher than the display can support, you risk damaging the display.
The following table lists the video resolutions that are available from the BIOS:
Resolution Number of colors Refresh Rate (Hz) Memory
640 x 480 16, 256, 32K, 64K, 16M 60, 72, 75, 85 1 MB
16
56, 60, 72, 75
800 x 600
256, 32K, 64K 16
1024 x 768
256
1280 x 1024 16 i87
56, 60, 72, 75, 85
1
, 60, 70, 75
i87
1
, 60, 70, 75, 85
i87
1
800 x 600 16M 56, 60, 72, 75, 85 2 MB 1024 x 768 64K i87 1280 x 1024 256 i87
1.
Interlaced.
1
, 60, 70, 75, 85
1
, 60, 72, 75
(additional modes available)
The table, on the following page, lists the available video resolutions using the current drivers. The available resolutions may be different with later versions of each of these drivers.
Resolution Number of colors Refresh Rate (Hz) Memory
Windows NT 640 x 480 16, 256, 32K, 64K, 16M 60, 75, 85 1 MB
800 x 600
16 256, 64K
16
1024 x 768
256 1280 x 1024 16 i87 800 x 600 16M 60, 72, 75, 85 2 MB 1024 x 768 64K i87 1280 x 1024 256 i87
56, 60, 72, 75 56, 60, 72, 75, 85
1
, 60, 70, 75
i87
1
, 60, 70, 75, 85
i87
1
1
, 60, 70, 75, 85
1
, 60, 72, 75
42
Page 43
3 Interface Devices and Mass-Storage Drives
Cirrus 5446 Graphics Controller Chip
Resolution Number of colors Refresh Rate (Hz) Memory
Windows 95 640 x 480 16, 256, 64K, 16M 60, 72, 75, 85 1 MB
16
56, 60, 72, 75
800 x 600
256, 64K
1024 x 768 256 i87
56, 60, 72, 75, 85
1
, 60, 70, 75, 85 800 x 600 16M 56, 60, 72, 75, 85 2 MB 1024 x 768 64K i87 1280 x 1024 256 i87
1
, 60, 70, 75, 85
1
, 60, 72, 75
OS/2 640 x 480 256, 64K 60, 72, 75, 85 1 MB
800 x 600 256, 64K 56, 60, 72, 75, 85
1
, 60, 70, 75, 85
1
, 60, 70, 75, 85 2 MB (additional
1
, 60, 72, 75
1.
Interlaced.
1024 x 768 256 i87 1024 x 768 64K i87 1280 x 1024 256 i87
(additional modes available)
modes available)
43
Page 44
3 Interface Devices and Mass-Storage Drives
Matrox MGA Millennium II Graphics Controller Board
Matrox MGA Millennium II Graphics Controller Board
Some models are supplied with a Matrox MGA Millennium PCI graphics controller on a board fitted in a PCI accessory slot. The on-board MGA­2064W processor communicates with the Pentium II processor along the PCI bus. The controller can be characterized as follows:
®
100% hardware- and BIOS-compatible with IBM
64-bit video memory access
Hardware acceleration of graphical user interface (GUI) operations
Support for up to 8 MB Window RAM (WRAM) at 50 ns
VGA display standard
Matrox VESA connector
Media XL connector
Integrated 24-bit, 220 MHz RAMDAC
Pixel clock maximum frequency of 135 MHz
Green power saving features
Standard and Enhanced Video Graphics Array (VGA) modes
Acceleration for 3D, playback, MPEG (when an optional upgrade module from Matrox is fitted), continuous interpolation on X, replication on Y
DDC 2B compliant.
VESA pass-through connector
4 MB memory chips
Top and bottom halves of the upgrade socket. (For the installation of a video memory upgrade module or the Matrox MPEG module).
44
Page 45
3 Interface Devices and Mass-Storage Drives
Matrox MGA Millennium II Graphics Controller Board
Connectors
The Video Electronics Standards Association (VESA) defines a standard video connector, variously known as the VESA feature connector, auxiliary connector, or pass-through connector. The video controller supports an output-only VESA feature connector in VGA mode. This connector (whose pin names are listed in a table on page 51) is integrated on the PCI board, is connected directly to the pixel data bus and the synchronization signals, and is automatically enabled all of the time.
There are two connectors on the back panel: the normal DB15 VGA connector, for connecting to HP displays, and a Media XL connector (used by the MPEG accessory, not supported by HP). The layout of the pins for the DB15 VGA connector are shown on page 55.
If you install a VESA-standard video accessory board that uses the MGA video adapter, connect the accessory board’s cable to the VESA pass­through connector on the board.
Video Memory
The video memory (also known as window RAM, or WRAM) is a local block of RAM for holding two major data structures: the double buffer (to hold one frame steady on the screen whilst the next one is being processed), and the Z-buffer (for storing depth information for each pixel). It is dual ported, so that it can be inputting and outputting simultaneously. There is also hardware support for Gouraud shading, Phong shading and texture mapping.
The Matrox MGA Millennium graphics controller board is supplied with 4 MB of video memory. This can be upgraded with an HP upgrade module. The upgrade socket can alternatively be used for the installation of the Matrox MGA Media XL upgrade module (also ordered from Matrox) to support MPEG.
Available Video Resolutions
The number of colors supported is limited by the graphics device and the video memory. The resolution/color/refresh-rate combination is limited by a combination of the display driver, the graphics device, and the video memory. If the resolution/refresh-rate combination is set higher than the display can support, you risk damaging the display.
45
Page 46
3 Interface Devices and Mass-Storage Drives
Matrox MGA Millennium II Graphics Controller Board
Resolution Number of colors Maximum Refresh Rate
Memory
(Hz)
640 x 480 256, 64K, 16M 200 2 MB 800 x 600 256, 64K, 16M 1024 x 768 256, 64K 120 1280 x 1024 256 110 1600 x 1200 256 85 640 x 480 256, 64K, 16M 200 4 MB 800 x 600 256, 64K, 16M 1024 x 768 256, 64K, 16M 120 1280 x 1024 256, 64K, 16M (24 bpp) 110 1600 x 1200 256, 64K 85 640 x 480 256, 64K, 16M 200 8 MB 800 x 600 256, 64K, 16M 1024 x 768 256, 64K, 16M 120 1280 x 1024 256, 64K, 16M 110 1600 x 1200 256, 64K, 16M (24 bpp) 85
The table below summarizes the 2D video resolutions which are supported. Note, though, SCO Unix only supports 15 bpp (bits per pixel), instead of 16 bpp, and does not support 32 bpp; OS/2 does not support 24 bpp.
Number of
256 64 K
Colors
Bits per Pixel
8 162432
640 480 800 600 1024 768 1152 882
1
1280 1024 1600 120
1.
1152 882 is not preset on HP displays
2 MB, 120 Hz 4 MB, 120Hz 2 MB, 120 Hz 4 MB, 120 Hz
2 MB, 110 Hz 4 MB, 110 Hz 8 MB, 110 Hz
2 MB, 85 Hz 4 MB, 85 Hz 8 MB, 85 Hz Not supported
46
Hi-Color
2 MB, 200 Hz 2 MB, 200 Hz
16.7 M
True-Color
16.7 M
True-Color
Page 47
3 Interface Devices and Mass-Storage Drives
Matrox MGA Millennium II Graphics Controller Board
The maximum 2D resolutions for any given video memory capacity and color scale can be found from the following table:
Number of
Colors
Bits per Pixel
2 MB 1600 1200 1024 768 800 600 800 600 4 MB 1600 1200 1600 1200 1280 1024 1152 882 8 MB 1600 1200 1600 1200 1600 1200 Not supported
1.
1152 882 is not preset on HP displays
256 64 K
Hi-Color
8 162432
16.7 M
True-Color
16.7 M
True-Color
1
Video BIOS
The board has a flash video BIOS that can be updated like a system BIOS, using a flash utility. This is achieved as follows:
Create a DOS boot diskette, and copy the following files to it:
1
xxxxxxxx.bin (a binary file whose name depends on the version)
dos4gw.exe
progbios.exe
updbios.bat Switch off the PC, insert the boot diskette, and switch on the PC.
2
Run the
3
Switch off the PC, and take out the boot diskette, and switch on the PC.
4
updbios.bat
command file or
progbios.exe -i *.bin
.
Executing
progbios.exe -d
allows the BIOS revision date to be checked. The video BIOS revision number can be checked by clicking on the MGA control panel.
47
Page 48
3 Interface Devices and Mass-Storage Drives
Audio Controller
Audio Controller
The Creative Labs CT2970 SoundBlaster 16 audio interface, supplied on some models in an ISA slot, can be summarized as follows:
line-out (stereo) jack: 20 Hz to 20 kHz frequency response, 83 dB signal to noise ratio, 0.2% total harmonic distortion
headphones jack: 2 W PMPO per channel, 32 load
speaker connector: 0.2% total harmonic distortion
line-in (stereo) jack: 15 kΩ, 0 V to 2 V peak-to-peak
CD audio-in connector: 15 kΩ, 0 V to 2 V peak-to-peak
microphone input: 600 Ω, dynamic, 30 mV to 200 mV peak-to-peak
MIDI /joystick interface connector: MPU-401 UART compatible
8-bit and 16-bit stereo sampling: 5 kHz to 44.1 kHz
Creative OPL3 synthesizer: 20 polyphonic voices
typical electrical current: +5 V (250 mA), +12 V (250 mA), -12 V (50 mA)
Telephone answering device connector
AUX-IN connector
Multimedia control panel
microphone connector
Multimedia control panel connector
The board is compliant with Microsoft PC 95 revised / PC 96. It has a full duplex codec, and supports a volume control on the front panel.
CD audio connector
Line-In MIC-In Line-Out Speaker-Out
Internal speaker connector
Joystick connector
48
Page 49
3 Interface Devices and Mass-Storage Drives
Audio Controller
Drivers
Drivers for the audio board, working with the Windows NT operating system, are supplied with the computer. These are required since the board is Plug­and-Play, but the operating system is not. It is the user’s responsibility to avoid conflicts with other devices using the same resources (such as IRQ, DMA and I/O lines). The user can use the configuration manager to change the board settings, choosing either the default configuration, or changes to any of the parameters.
49
Page 50
3 Interface Devices and Mass-Storage Drives
Mass-Storage Drives
Mass-Storage Drives
The IDE controller is described on page 29. The flexible disk controller is described on page 20.
Hard Disk Drives
A 3.5-inch hard disk drive is supplied on an internal shelf in some models.
4.0 GB IDE 2.5 GB IDE
HP product number D2687-69001 D2786-69001 Manufacturer Quantum Quantum Product name Fireball TM 2550
Flexible Disk Drives
A 3.5-inch, 1.44 MB flexible disk drive (D2035B) is supplied on the top front-access shelf of all minitower models. Desktop models are supplied with the new bezelless version of the drive (D2035-63162) mounted vertically on the right hand side of the front panel.
CD-ROM Drives
Most models have a 24 Max IDE CD-ROM drive (D4383A) supplied in a
5.25-inch front-access shelf.
24✕ Max IDE
HP product number D4383A Manufacturer Hitachi Product name Formatted storage capacity 650 MB
If a disk is still in the drive after power failure or drive failure, the disk can be reclaimed by inserting a stout wire, such as the end of a straightened paper-clip, into the small hole at the bottom of the door.
In order to allow correct CD-ROM drive detection by the Setup program, leave the device configuration jumper on the rear connector in the cable select (CS) or master (MA) positions.
50
Page 51
3 Interface Devices and Mass-Storage Drives
Connectors and Sockets
Connectors and Sockets
IDE Hard Disk Drive Data Connector Flexible Disk Drive Data Connector
Pin Signal Pin Signal Pin Signal Pin Signal
1 Reset# 2 Ground 1 Ground 2 LDENSEL# 3 HD7 4 HD8 3 Ground 4 Microfloppy 5 HD6 6 HD9 5 Ground 6 EDENSEL 7 HD5 8 HD10 7 Ground 8 INDX#
9 HD4 10 HD11 9 Ground 10 MTEN1# 11 HD3 12 HD12 11 Ground 12 DRSEL0# 13 HD2 14 HD13 13 Ground 14 DRSEL1# 15 HD1 16 HD14 15 Ground 16 DTEN0# 17 HD0 18 HD15 17 Ground 18 DIR# 19 Ground 20 orientation key 19 Ground 20 STP# 21 DMARQ 22 Ground 21 Ground 22 WRDATA# 23 DIOW# 24 Ground 23 Ground 24 WREN# 25 DIOR# 26 Ground 25 Ground 26 TRK0# 27 IORDY 28 SPSYNC:CSEL 27 Ground 28 WRPRDT# 29 DMACK# 30 Ground 29 Ground 30 RDDATA# 31 INTRQ 32 IOCS16# 31 Ground 32 HDSEL1# 33DA1 34PDIAG# 33Ground 34DSKCHG# 35 DA0 36 DA2 37 CS0# 38 CS1# 39 DASP# 40 Ground
Status Panel Connector
Pin Signal Pin Signal
1 LCK_LED_K 2 LCK_LED_A 3 PWR_LED_K 4 PWR_LED_A 5 not connected 6 common 7 Push_On 8 RED_LED_A
9 HDD_LED_K 10 HDD_LED_A 11 _Reset 12 Ground 13 LCK_PUSH2 14 LCK_PUSH2
External Start and Remote Start Connectors
Pin Signal Pin Signal
1 ExternalStart 2 Ground
3 Wake1# 4 Wake2#
5 not connected 6 Wake3#
7 PowerGood 8 not connected
9 Vstandby 10 orientation key
51
Page 52
Audio Board Connectors
3 Interface Devices and Mass-Storage Drives
Connectors and Sockets
Wavetable Connector Goldfinch Connector
Pin Signal Pin Signal Pin Signal Pin Signal
1 Ground 2 not connected 1 Line-in (right) 2 Analog ground 3 Ground 4 MIDI input 3 Line-in (left) 4 Analog ground 5 Ground 6 Vcc 5 orientation key 6 Analog ground 7 Ground 8 MIDI output 7 Analog ground 8 Analog ground 9 Ground 10 Vcc
11 Ground 12 not connected Aux2 MPEG Connector 13 not connected 14 Vcc Pin Signal 15 Ground 16 not connected 1 Left channel 17 Ground 18 +12 V 2 Ground 19 Ground 20 Line-in (right) 3 Ground 21 Ground 22 -12 V 4 Right channel 23 Ground 24 Line-in (left) 25 Ground 26 Reset B CD Audio Connector
Pin Signal
Int. Speaker Connector 1 Ground
Pin Signal 2 Left channel
1 Power signal out 3 Ground 2 Analog ground 4 Right channel
Modem Connector Front Panel Connector
Pin Signal Pin Signal Pin Signal Pin Signal
1 Analog ground 2 orientation key 1 Ground 2 orientation key 3 Line-in 4 Analog ground 3 Headphones left 4 Head return left 5 Line-out (left) 6 Analog ground 5 Headphones right 6 Head return right 7 Line-out (right) 8 Modem speaker 7 Volume low limit 8 Volume DC cntl 9 Analog ground 10 Microphone in 9 Volume high limit 10 not used
Microphone Connector
Pin Signal
2nd ring: 3 Signal and power
3rd ring: 2 Ground
1st ring: 1 Signal and power
52
Page 53
3 Interface Devices and Mass-Storage Drives
Connectors and Sockets
PCI Connector
Pin Signal Pin Signal Pin Signal Pin Signal
B1 -12 V A1 TRST# B47 AD[12] A47 AD[11] B2 TCK A2 +12 V B48 AD[10] A48 Ground B3 Ground A3 TMS B49 +3.3 V A49 AD[09] B4 TDO A4 TDI B50 AD[08] A50 C/BE#[0] B5 +5 V A5 +5 V B51 AD[07] A51 +3.3 V B6 +5 V A6 INTA# B52 Ground A52 AD[06] B7 INTB# A7 INTC# B53 AD[05] A53 AD[04] B8 INTD# A8 +5 V B54 AD[03] A54 Ground
B9 Ground A9 reserved B55 Ground A55 AD[02] B10 reserved A10 PRSNT# B56 AD[01] A56 AD[00] B11 +3.3 V A11 reserved B57 +5 V A57 +5 V
orientation key orientation key B58 +5 V A58 +5 V B12 reserved A12 reserved B59 +5 V A59 +5 V B13 Ground A13 RESET# B60 ACK64# A60 REQ64# B14 CLK A14 +3.3 V orientation key orientation key B15 Ground A15 GNT# B61 reserved A61 Ground B16 REQ# A16 Ground B62 Ground A62 C/BE#[7] B17 +3.3 V A17 reserved B63 C/BE#[5] A63 C/BE#[6] B18 AD[31] A18 AD[30] B64 C/BE#[4] A64 +3.3 V B19 AD[29] A19 Ground B65 Ground A65 PAR64 B20 Ground A20 AD[28] B66 AD[63] A66 AD[62] B21 AD[27] A21 AD[26] B67 AD[61] A67 Ground B22 AD[25] A22 +3.3 V B68 +3.3 V A68 AD[60] B23 Ground A23 AD[24] B69 AD[59] A69 AD[58] B24 C/BE#[3] A24 IDSEL B70 AD[57] A70 Ground B25 AD[23] A25 Ground B71 Ground A71 AD[56] B26 +3.3 V A26 AD[22] B72 AD[55] A72 AD[54] B27 AD[21] A27 AD[20] B73 AD[53] A73 +3.3 V B28 AD[19] A28 Ground B74 Ground A74 AD[52] B29 Ground A29 AD[18] B75 AD[51] A75 AD[50] B30 AD[17] A30 AD[16] B76 AD[49] A76 Ground B31 C/BE#[2] A31 +3.3 V B77 +3.3 V A77 AD[48] B32 Ground A32 FRAME# B78 AD[47] A78 AD[46] B33 IRDY# A33 Ground B79 AD[45] A79 Ground B34 +3.3 V A34 TRDY# B80 Ground A80 AD[44] B35 DEVSEL# A35 Ground B81 AD[43] A81 AD[42] B36 Ground A36 STOP# B82 AD[41] A82 +3.3 V B37 LOCK# A37 +3.3 V B83 Ground A83 AD[40] B38 PERR# A38 SDONE B84 AD[39] A84 AD[38] B39 Ground A39 SBO# B85 AD[37] A85 Ground B40 SERR# A40 Ground B86 +3.3 V A86 AD[36] B41 +3.3 V A41 C/BE#[1] B87 AD[35] A87 AD[34] B42 AD[15] A42 PAR B88 AD[33] A88 Ground B43 +3.3 V A43 +3.3 V B89 Ground A89 AD[32] B44 +3.3 V A44 +3.3 V B90 reserved A90 reserved B45 AD[14] A45 +3.3 V B91 reserved A91 Ground B46 Ground A46 AD[13] B92 Ground A92 reserved
53
Page 54
3 Interface Devices and Mass-Storage Drives
Connectors and Sockets
16-bit ISA Connector
(8-bit ISA uses the A and B connectors)
Pin Signal Pin Signal
B1 Ground A1 CHCHK# B2 RESDRV A2 SD7 B3 +5 V A3 SD6 B4 IRQ9 A4 SD5 B5 -5 V A5 SD4 B6 DRQ2 A6 SD3 B7 -12 V A7 SD2 B8 NOWS# A8 SD1
B9 + 12 V A9 SD0 B10 Ground A10 CHRDY B11 SMWTC# A11 AENx B12 SMRDC# A12 SA19 B13IOWC# A13SA18 B14IORC# A14SA17 B15 DEK3# A15 SA16 B16 DRQ3 A16 SA15 B17 DAK1# A17 SA14 B18 DRQ1 A18 SA13 B19 REFRESH# A19 SA12 B20 BCLK A20 SA11 B21 IRQ7 A21 SA10 B22 IRQ6 A22 SA9 B23 IRQ5 A23 SA8 B24 IRQ4 A24 SA7 B25 IRQ3 A25 SA6 B26 DAK2# A26 SA5 B27 TC A27 SA4 B28 BALE A28 SA3 B29 +5 V A29 SA2 B30OSC A30SA1 B31 Ground A31 SA0
D1 M16# C1 SBHE#
D2 IO16# C2 LA23
D3 IRQ10 C3 LA22
D4 IRQ11 C4 LA21
D5 IRQ12 C5 LA20
D6 IRQ15 C6 LA19
D7 IRQ14 C7 LA18
D8 DAK0# C8 LA17
D9 DRQ0 C9 MRDC# D10DAK5# C10MWTC# D11 DRQ5 C11 SD8 D12DAK6# C12SD9 D13 DRQ6 C13 SD10 D14DAK7# C14SD11 D15 DRQ7 C15 SD12 D16 +5 V C16 SD13 D17 MASTER16# C17 SD14 D18 Ground C18 SD15
54
Page 55
3 Interface Devices and Mass-Storage Drives
Connectors and Sockets
Socket Pin Layouts
Power Supply Connector for System Board
Battery Pack
Connector
Pin Signal Pin Signal Pin Signal
1 PwrGood 13 Remote_On 1 VBATT 2 VSTDBY 14 -5 V supply 2 orientation key 3 +5 V supply 15 -12 V supply 3 not connected 4 +5 V supply 16 +12 V supply 4 Ground 5 +5 V supply 17 Ground 6 +5 V supply 18 Ground 7 +5 V supply 19 Ground USB Connector 8 +3.3 V supply 20 Ground Pin Signal
9 +3.3 V supply 21 Ground 1 Vcc 10 +3.3 V supply 22 Ground 2 Data — 11 +3.3 V supply 23 Ground 3 Data + 12 +3.3 V supply 24 Ground 4 Ground
MIDI Connector
VGA Connector
Keyboard and Mouse Connector
Serial Port Connector
Red-1
Green-2
Blue-3
NotUsed-4
Ground-5
6- Ground 7- Ground 8- Ground 9- Not used
10- Ground
11-NotUsed 12-NotUsed
13-H-Sync 14-V-Sync 15-NotUsed
Parallel Port Connector
55
Page 56
3 Interface Devices and Mass-Storage Drives
Connectors and Sockets
56
Page 57
4
Summary of the HP/Phoenix BIOS
The Setup program and HP/Phoenix BIOS are summarized in this chapter. The POST routines are described in the next chapter.
57
Page 58
4 Summary of the HP/Phoenix BIOS
HP/Phoenix BIOS Summary
HP/Phoenix BIOS Summary
The System ROM contains the POST (power-on self-test) routines, and the BIOS: the System BIOS, video BIOS (for models with an integrated video controller), and low option ROM. This chapter, and the following one, give an overview of the following aspects:
menu-driven Setup with context-sensitive help (in US English only), de-
scribed next in this chapter.
The address space, with details of the interrupts used, described at the end of this chapter.
The Power-On-Self-Test or POST, which is the sequence of tests the com­puter performs to ensure that the system is functioning correctly, de­scribed in the next chapter.
The system BIOS is identified by the version number
HD.07.xx
. The
procedure for updating the System ROM firmware is described on page 32. Press , to run the Setup program, while the initial “Vectra” logo is being
displayed immediately after restarting the PC. Alternatively, press to view the summary configuration screen, an example of which is depicted on the next page. By default, this remains on the screen for 20 seconds, but by pressing once, it can be held on the screen indefinitely until is pressed again. Pressing will cause the computer to be turned off.
58
Page 59
4 Summary of the HP/Phoenix BIOS
HP/Phoenix BIOS Summary
VL6/266 — Copyright 1997 Hewlett-Packard — HD.07.xx
Any line of text can be entered here as a ‘tatoo’ for the computer
BIOS version HD.07.xx PC Serial Number FR54011111
CPU Date Code N/A LAN MAC address not available
System RAM : 32 MB Processor type : Pentium II
Bank A : 32 MB (EDO) COM1 : 3F8H (Serial A)
Bank B : None COM2 : 2F8H (Serial B)
Bank C : None COM3 : None
Video RAM : Not available COM4 : None
System Cache : 512KB (Synchronous) LPT1 : 378H
Video Device : Matrox (External) LPT2 : None
1st IDE Device : HDD 2500 MB LPT3 : None
2nd IDE Device : None Flexible Disk A : 1.44 MB
3rd IDE Device : CD-ROM Flexible Disk B : None
4th IDE Device : None Display type : Not Available
ISA PnP : Not Installed PCI Slot #1 : Not Installed
ISA PnP : Not Installed PCI Slot #2 : Not Installed
ISA PnP : Not Installed PCI Slot #3 : Not Installed
PCI Slot #4 : Not Installed
<F1> to continue, <F2> to run Setup, <F10> to power off, <F5> to retain
59
Page 60
4 Summary of the HP/Phoenix BIOS
Setup Program
Setup Program
To run th e Setup program, interrupt the POST by pressing when the
F2=Setup
The band along the top of the screen offers five menus: Main, Configuration, Security, Power, and Exit. These are selected using the left and right arrow keys. Each menu is discussed in the following sub-sections. For a more complete description, see the User’s Guide that was supplied with the PC.
Main Menu
The Main Menu presents the user with a list of fields, such as “System Time” and “Key auto-repeat speed”. These can be selected using the up and down arrow keys, and can have their values changed using the and keys.
message appears on the initial “Vectra” logo screen.
The “Item-Specific Help” field changes automatically as the user moves the cursor between the fields. It tells the user what the presently highlighted field is for, and what the options are.
Some fields are not changeable. Examples include fields that are for information only, and fields whose contents become “frozen” by the setting of a value in some other field. Such fields are displayed in a different color, without the “[” and “]” brackets. When the user moves the cursor with the up and down arrow keys, these fields are skipped.
Some fields disappear completely when a choice in another field makes their appearance inappropriate.
Configuration Menu
The Configuration Menu does not have the same structure as the Main Menu and Power Menu. Instead of presenting a list of fields, it offers the user a list of sub-menus. Again, the user steps between the options using the up and down arrow keys, but presses the key to enter the chosen sub­menu (and the key to go back again when finished).
If access to devices has been disabled in the Security Menu, then the configuration of those devices on the Configuration Menu becomes frozen, as shown in the diagram below for Serial port A. The field becomes starred, appears in a different color, and cannot be changed.
60
Page 61
4 Summary of the HP/Phoenix BIOS
Phoenix BIOS Setup — Copyright 1985-95 Phoenix Technologies Ltd.
Copyright 1997 Hewlett-Packard Rev. HD.07.xx
Configuration
Integrated I/O Ports Item-Specific Help
Enables or disables the
Parallel port [378h IRQ7
Parallel port mode [Centronix TM]
Serial port A * 3F8h IRQ4
Serial port B [Disabled]
]
on-board parallel port at the specific address. ‘Disabled’ frees resources used by the port.
Setup Program
[*] = The device is disabled for security reasons. To enable it, use the Security/Hardware Protection menu.
F1
ESC
Help Exit
Select Item Select Menu
F7/F8
Enter
Disabling a device in the Configuration Menu (for example, Serial port B in the diagram above) has the advantage of freeing the resources (such as IRQs and peripheral addresses). Disabling a device in the Security Menu disables the access, not the device. It does not have the advantage of freeing the resources, but has the advantage of temporarily disabling the device without losing the configuration settings.
The
Modem IRQ
field, in the Modem sub-menu, is used when a modem accessory has been installed. It does not enable the IRQ on the modem. It is used to indicate, to the System BIOS, which of the IRQ lines should wake up the PC when the modem receives a ringing tone. It is only applicable with an APM 1.2 compatible operating system, such as Windows 95.
Change Values Select >Sub-Menu
F9
F10
Setup Defaults Previous Values
61
Page 62
4 Summary of the HP/Phoenix BIOS
Setup Program
Security Menu
Sub-menus are presented for changing the characteristics and values of the User Password, the System Administrator Password, the amount of protection against use of the system’s drives (using the Hardware Protection sub-menu), and the amount of protection against being able to boot from the system’s drives (using the Start-Up Center sub-menu).
The minimum lengths of either type of password can be set to a specific number of characters, or to characters. A limit can be set for the maximum number of retries that are permitted if the password is mistyped, and whether a delay should be imposed (of successively increasing lengths: 4 seconds, 8 seconds, 16 seconds, and finally 32 seconds) before successive retries are accepted (using the
exponential
setting for the “Lock Time Between Attempts”
field).
. The maximum length of each is 32
none
The “User Password” sub-menu grants access to the keyboard lock timer option. Once this password has been set, the menu gives access to the main sub-menu of user preferences.
Under the “Hardware Protection” sub-menu, the following devices can have their access
enabled/disabled
serial and parallel ports. Writes to the flexible disk can be
: flexible disk controller, IDE controllers,
disabled
, so as to prevent the exporting of data. Writes to the hard disk drive boot sector can be
disabled
, for instance as a protection against viruses.
Under the “Start-Up Center” sub-menu, the Setup program not only allows the user to select which devices are
enabled
or
disabled
for booting up the system, but also indicates their order of precedence when more than one is enabled.
Power Menu
The “Power” menu allows the user to set the standby delay. It also allows the system administrator to decide whether the serial ports, mouse, or space bar are enabled as a means of reactivating the system from Standby or Suspend.
62
Page 63
4 Summary of the HP/Phoenix BIOS
Power Saving and Ergonometry
Power Saving and Ergonometry
Power-On from Space-Bar
The power-on from the space-bar function is enabled, provided that:
The computer is connected to a Power-On keyboard (recognizable by the Power-On icon on the space bar).
The computer is running a Windows operating system.
The function has not been disabled by setting SW-8 to board switches.
The function has not been disabled in the “Power” menu of the Setup pro- gram.
on the system
open
Soft Power Down
When the user requests the operating system to shutdown, the environment is cleared, and the computer is powered off. Soft Power Down is available with the Windows NT and Windows 95 operating systems, but not with the OS/2 operating system.
The hardware to do this is contained within the HP ASIC chip, LittleBen. This chip is described on page 34.
63
Page 64
4 Summary of the HP/Phoenix BIOS
BIOS Addresses
BIOS Addresses
This section provides a summary of the main features of the HP system BIOS. This is software that provides an interface between the computer hardware and the operating system.
System Memory Map
Reserved memory used by accessory boards must be located in the area from C8000h to EFFFFh.
0 - 3FFh Interrupt vector table 640 KB: The addresses
400h - 4FFh BIOS data area
500h - 9EFFFh
0-9FFFFh are collectively known as the Base memory area
9F000h - 9FFFFh Extended BIOS data area
A0000h - BFFFFh 128 KB: Video memory area
C0000h - C7FFFh 32 KB: Video BIOS area
C8000h - D7FFFh 64 KB: available for accessory boards
(used by the boot ROM, if configured in the
D8000h - EFFFFh 96 KB: available after the POST (for upper memory block, UMB, for example)
F0000h - FFFFFh 64 KB: System BIOS area
100000h - FFFFFFFFh 1 MB plus: Extended memory
Setup
program)
Product Identification
The reserved addresses in the 64 KB BIOS ROM data area, which contain various product identification and BIOS identification strings, are no longer accessed directly. Instead, the information is obtained from utilities in the Desk Management Interface (DMI).
64
Page 65
4 Summary of the HP/Phoenix BIOS
BIOS Addresses
HP I/O Port Map (I/O Addresses Used by the System1)
Peripheral devices, accessory devices and system controllers are accessed via the system I/O space, which is not located in system memory space. The 64 KB of addressable I/O space comprises 8-bit and 16-bit registers (called I/O ports) located in the various system components. When installing an accessory board, ensure that the I/O address space selected is in the free area of the space reserved for accessory boards (100h to 3FFh).
Although the Setup program can be used to change some of the settings, the following address map is not completely BIOS dependent, but is determined partly by the operating system. Beware that some of the I/O addresses are allocated dynamically.
I/O Address Ports Function
0000h - 000Fh DMA controller 1
0020h - 0021h Interrupt controller 1
0040h - 0043h Interval timer 1
0060h, 0064h Keyboard controller
0061h System speaker, or NMI status and control
0070h NMI mask register, RTC and CMOS address
0071h RTC and CMOS data
0081h - 0083h, 008Fh DMA low page register
0092h Alternate reset and A20 Function
0096h - 009Fh Internal ports (Little Ben ASIC)
00A0h - 00A1h Interrupt controller 2
00C0h - 00DFh DMA controller 2
00EAh - 00EBh Internal port
00F0h - 00FFh Co-processor error
0102h Graphics controller (Matrox MGA)
0170h - 0177h IDE hard disk drive controller secondary channel
01F0h - 01F7h IDE hard disk drive controller primary channel
1. If configured (legacy resources only).
65
Page 66
4 Summary of the HP/Phoenix BIOS
BIOS Addresses
I/O Address Ports Function
0200h - 0207h Joystick port (Soundblaster)
0220h - 022Fh Audio interface 1 (Soundblaster)
0240h - 024Fh Audio interface 2 (Soundblaster)
0260h - 026Fh Audio interface 3 (Soundblaster)
0270h - 0273h IO read data port for ISA Plug and Play enumerator
0278h - 027Fh Parallel port 2
0280h - 028Fh Audio interface 4 (Soundblaster)
02E8h - 02EFh Serial port 4
02F8h - 02FFh Serial port 2
0300h - 0301h MPU-401 MIDI interface 2 (Soundblaster)
0330h - 0331h MPU-401 MIDI interface 1 (Soundblaster)
0370h - 0371h Super I/O controller
0372h - 0375h Secondary flexible disk drive controller
0376h IDE hard disk drive controller secondary channel
0377h Secondary flexible disk drive controller
0378h - 037Ah Parallel port 1
0388h - 038Bh Ad-lib / FM synthesized music (Soundblaster)
03B0h - 03DFh Graphics controller (Matrox MGA)
03E8h - 03EFh Serial port 3
03F0h - 03F5h Primary flexible disk drive controller
03F6h IDE hard disk drive controller primary channel
03F7h Primary flexible disk drive controller
03F8h - 03FFh Serial port 1
0496h - 049Fh Internal ports (Little Ben ASIC)
0678h - 067Bh Parallel port 2 if ECP mode is selected
0778h - 077Bh Parallel port 1 if ECP mode is selected
0CF8h - 0CFFh Configuration registers for PCI devices
66
Page 67
4 Summary of the HP/Phoenix BIOS
BIOS Addresses
DMA Channel Controllers
Only “I/O-to-memory” and “memory-to-I/O” transfers are allowed. “I/O-to-I/O” and “memory-to-memory” transfers are disallowed by the hardware configuration.
The system controller supports seven DMA channels, each with a page register used to extend the addressing range of the channel to 16 MB. The following table summarizes how the DMA channels are allocated.
First DMA controller (used for 8-bit transfers)
Channel Function
0 Available
1 SoundBlaster or ECP mode for parallel port
2 Flexible disk I/O
3 ECP mode for parallel port or SoundBlaster
Second DMA controller (used for 16-bit transfers)
Channel Function
4 Cascade from first DMA controller
5 SoundBlaster or Available
6 Available
7 Available or SoundBlaster
Interrupt Controllers
The system has two 8259A compatible interrupt controllers. They are arranged as a master interrupt controller and a slave that is cascaded through the master.
The following table shows how the master and slave controllers are con­nected. The Interrupt Requests (IRQ) are numbered sequentially, starting with the master controller, and followed by the slave.
67
Page 68
4 Summary of the HP/Phoenix BIOS
BIOS Addresses
IRQ (Interrupt Vector) Interrupt Request Description
IRQ0(08h) System Timer IRQ1(09h) Keyboard Controller IRQ2(0Ah) Slave IRQ Cascade connection from INTC2 (Interrupt Controller 2)
IRQ8(70h) Real Time Clock
IRQ9(71h) Available for accessory board (ISA/PCI) IRQ10(72h) SoundBlaster 3, or Available for accessory board (ISA/PCI) IRQ11(73h) Available for accessory board (ISA/PCI) IRQ12(74h) Mouse, or ISA accessory board IRQ13(75h) Co-processor IRQ14(76h) IDE, or ISA accessory board IRQ15(77h) Secondary IDE or ISA/PCI accessory board
IRQ3(0Bh) Serial Port 2, Serial Port 4, or ISA accessory board IRQ4(0Ch) Serial Port 1, Serial Port 3, or ISA accessory board IRQ5(0Dh) SoundBlaster 1, Parallel Port 2, or ISA accessory board IRQ6(0Eh) Flexible Disk Controller IRQ7(0Fh) SoundBlaster 2, Parallel Port 1, or ISA accessory board
Using the Setup program:
IRQ3 can be made available by disabling serial ports 2 and 4.
IRQ4 can be made available by disabling serial ports 1 and 3.
IRQ5 can be made available by disabling the parallel port 2.
IRQ7 can be made available by disabling parallel ports 1 and 2.
PCI Interrupt Request Lines
PCI devices generate interrupt requests using up to four PCI interrupt request lines (INTA#, INTB#, INTC#, and INTD#).
When a PCI device makes an interrupt request, the request is re-directed to the system interrupt controller. The interrupt request will be re-directed to one of the IRQ lines made available for PCI devices.
68
Page 69
4 Summary of the HP/Phoenix BIOS
BIOS Addresses
The PCI interrupt lines A, B, C and D are spread across the four inputs of the interrupt router (which is part of the PCI/ISA bridge, in the PIIX3 chip). Since most PCI devices are single-function, this allows for an even distribution of the lines. The distribution is shown in the following diagram. In this, Slot 4 is present only on minitower models (and is omitted on desktop models).
Integrated
graphics
A
Slot 1
ABCD
PCI interrupts are then mapped into ISA interrupts inside the PCI/ISA Bridge (in the PIIX3 chip), by configuring registers 60h through 63h.
7 Routing of interrupts: when enabled, this bit routes the PCI interrupt signal to the PC-
6:4 Reserved: read as 000
3:0 IRQx# Routing Bits: these bits specify which IRQ signal to generate.
Slot 2
ABCD
Slot 3
ABCD
Slot 4 (MT)
ABCD
Bit Description
compatible interrupt signal specified in bits[3:0]. At reset, this bit is disabled (set to 1)
Possible values are: 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, 15.
A B
PCI/ISA Bridge
C D
The possible choices given by the Setup program are 9, 10, 11, 15. If some of these are unavailable due to ISA cards, some interrupts will have to be shared.
The IDE controller (device 04h, function 01h) is configured in legacy mode, and uses IRQ 14 (IRQ 15 for the secondary channel).
69
Page 70
4 Summary of the HP/Phoenix BIOS
BIOS Addresses
70
Page 71
5
Power-On Self-Test and Error Messages
This chapter describes the Power-On Self-Test (POST) routines, which are contained in the computer’s ROM BIOS, the error messages which can result, and the suggestions for corrective action.
71
Page 72
5 Power-On Self-Test and Error Messages
Order in Which the Tests are Performed
Order in Which the Tests are Performed
Each time the system is powered on, or a reset is performed, the POST is executed. The POST process verifies the basic functionality of the system components and initializes certain system parameters.
The POST starts by displaying a graphic screen with the initial “Vectra” logo when the PC is restarted. If the POST detects an error, the error message is displayed inside a view system errors screen, in which the error message utility (EMU) not only displays the error diagnosis, but the suggestions for corrective action (see page 75 for a brief summary). Error codes are no longer displayed.
Devices, such as memory and newly installed hard disks, are configured automatically. The user is not requested to confirm the change. Newly removed hard disks are detected, and the user is prompted to confirm the new configuration by pressing . Note, though, that the POST does not detect when a hard disk drive has been otherwise changed.
During the POST, the BIOS and other ROM data is copied into high-speed shadow RAM. The shadow RAM is addressed at the same physical location as the original ROM in a manner which is completely transparent to applications. It therefore appears to behave as very fast ROM. This technique provides faster access to the system BIOS firmware.
The following table lists the POST routines in the order in which they are executed (from the shadow RAM). If the POST is initiated by a soft reset
and , the RAM tests are not executed and shadow RAM is
Delete
not cleared. In all other respects, the POST executes in the same way following power-on or a soft reset.
Test Description
System BIOS Tests
LED Test
System (BIOS) ROM Test
RAM Refresh Timer Test
Interrupt RAM Test
Tests the LEDs on the control panel.
Calculates an 8-bit checksum. Test failure causes the boot process to abort.
Tests the RAM refresh timer circuitry. Test failure causes the boot process to abort.
Checks the first 64 KB of system RAM used to store data corresponding to various system interrupt vector addresses. Test failures cause the boot process to abort.
72
Page 73
Shadow the System ROM BIOS
Load CMOS Memory
CMOS RAM Test
CPU Cache Memory Test
Initialize the Video
8042 Self-Test
Timer 0/Timer 2 Test
DMA Subsystem Test
Interrupt Controller Test
Real-Time Clock Test
Audio Test
RAM Address Line
Independence Test
Size Extended Memory
Real-Mode Memory Test (First
640KB)
Shadow RAM Test
5 Power-On Self-Test and Error Messages
Order in Which the Tests are Performed
Tests the system ROM BIOS and shadows it. Failure to shadow the ROM BIOS will cause an error code to display. The boot process will continue, but the system will execute from ROM. This test is not performed after a soft reset (using and ).
Delete
Checks the serial EEPROM and returns an error code if it has been corrupted. Copies the contents of the EEPROM into CMOS RAM.
Checks the CMOS RAM for start-up power loss, verifies the CMOS RAM checksums. Test failure causes error codes to display.
Tests the processor’s internal level-one cache RAM. Test failure causes an error code to display and the boot process to abort.
Video Tests
Initializes the video subsystem, tests the video shadow RAM, and, if required, shadows the video BIOS. A failure causes an error code to display, but the boot process continues.
System Board Tests
Downloads the 8042 and invokes the 8042 internal self-test. A failure causes an error code to display.
Tests Timer 0 and Timer 2. Test failure causes an error code to display.
Checks the DMA controller registers. Test failure causes an error code to display.
Tests the Interrupt masks, the master controller interrupt path (by forcing an IRQ0), and the industry-standard slave controller (by forcing an IRQ8). Test failure causes an error code to display.
Checks the real-time clock registers and performs a test that ensures that the clock is running. Test failure causes an error code to display.
If the audio board is present, invokes a built-in self-test. Test failure causes an error code to display.
Memory Tests
Verifies the address independence of real-mode RAM (no address lines stuck together). Test failure causes an error code to display.
Sizes and clears the protected mode (extended) memory and writes the value into CMOS bytes 30h and 31h. If the system fails to switch to protected mode, an error code is displayed.
Read/write test on real-mode RAM. (This test is using and ). The test checks each block of
Delete
not
done during a reset
system RAM to determine how much is present. Test failure of a 64 KB block of memory causes an error code to display, and the test is aborted.
Tests shadow RAM in 64 KB segments (except for segments beginning at A000h, B000h, and F000h). If they are
not
being used, segments C000h,
D000h and E000h are tested. Test failure causes an error code to display.
73
Page 74
5 Power-On Self-Test and Error Messages
Order in Which the Tests are Performed
Protected Mode RAM Test
(Extended RAM)
Keyboard Test
Mouse Test
Flexible Disk Controller
Subsystem Test
Internal Numeric Coprocessor
Test
Parallel Port Test
Serial Port Test
Hard Disk Controller Subsystem
Test
System Generation
Plug and Play Configuration
Tests protected RAM in 64 KB segments above 1 MB. (This test is during a reset using and ). Test failure causes an
Delete
not
done
error code to display.
Keyboard / Mouse Tests
Invokes a built-in keyboard self-test of the keyboard’s microprocessor and tests for the presence of a keyboard and for stuck keyboard keys. Test failure causes an error code to display.
If a mouse is present, invokes a built-in mouse self-test of the mouse’s microprocessor and for stuck mouse buttons. Test failure causes an error code to display.
Tests of Flexible Disk Drive A
Tests for proper operation of the flexible disk controller. Test failure causes an error code to display.
Coprocessor Tests
Checks for proper operation of the numeric coprocessor part of the processor. Test failure causes an error code to display.
Communication Port Tests
Tests the integrated parallel port registers, as well as any other parallel ports. Test failure causes an error code to display.
Tests the integrated serial port registers, as well as any other serial ports. Test failure causes an error code to display.
Hard Disk Drive Tests
Tests for proper operation of the hard disk controller. Test failure causes an error code to display. The test does not detect hard disk replacement or changes in the size of the hard disk.
System Configuration Tests
Initiation of the system generation (SYSGEN) process, which compares the configuration information stored in the CMOS memory with the actual system. If a discrepancy is found, an error code will be displayed.
Configures any Plug and Play device detected (either PCI or ISA): All PCI devices, and any ISA device necessary for loading the operating
system will be configured for use.
Any ISA device that is not required for loading the operating system, will
be initialized (prepared for loading of a device driver), but not fully configured for use.
74
Page 75
5 Power-On Self-Test and Error Messages
Error Message Summary
Error Message Summary
The POST section of the HP BIOS no longer displays numeric error codes (such as 910B) but gives a self-explanatory, descriptive diagnosis, and a list of suggestions for corrective action. The following table summarizes the most significant of the problems that can be reported.
Message Explanation or Suggestions for Corrective Action
Operating system not found Check whether the disk, HDD, FDD or CD-ROM disk drive is
connected.
Setup
.
Security
If it is connected, check that it is detected by POST Check that your boot device is enabled on the menu. If the problem persists, check that the boot device contains the operating system.
Missing operating system If you have configured HDD user parameters, check that they are
correct. Otherwise, use HDD type “Auto” parameters.
Failure fixed disk (preceded by a 30” time-out)
Diskette Drive A (or B) error Check whether the diskette drive is connected. Check
System battery is dead You may get this message if the computer is disconnected for a
Keyboard error Check that the keyboard is connected. Resource Allocation Conflict -PCI
device 0079 on system board Video Plug and Play interrupted or
failed. Re-enable in Setup and try again System CMOS checksum bad - run
Setup I/O device IRQ conflict Serial ports A and B may have been assigned the same IRQ. Assign
No message, system “hangs” after POST
Check that HDD is connected. Check that HDD is detected in POST. Check that boot on hard disk drive is enabled in
the configuration.
few days. When you Power-on the computer, run the configuration information. The message should no longer be displayed. Should the problem persist, replace the battery.
Clear CMOS.
You may have powered your computer Off/On too quickly and the computer turned off Video plug and play as a protection.
CMOS contents have changed between 2 power-on sessions. Run
Setup
for configuration.
a different IRQ to each serial port and save the configuration. Check that cache memory and main memory are correctly set in
their sockets.
Setup
Setup
.
Setup
for
to update
Other An error message may be displayed and the computer may “hang”
for 20 seconds and then beep. The POST is probably checking for a mass storage device which it cannot find and the computer is in Time-out Mode. After Time-out, run configuration.
Setup
to check the
75
Page 76
5 Power-On Self-Test and Error Messages
Beep Codes
Beep Codes
If a terminal error occurs during POST, the system issues a beep code before attempting to display the error. Beep codes are useful for identifying the error when the system is unable to display the error message.
Beep Pattern
Beep
Code
1
Numeric
Code
Description
- 1 B4h This does not indicate an error. There is one short beep before system startup.
- - 02 98h Video configuration failure or option ROMs check-sum failure
- - - - - - - 0223 16h BIOS ROM check-sum failure
- - - —
- - - —
- - -
- - - - - - - - - - 0343 2Eh RAM failure on data bits in low byte of memory bus
- - - - —
- - —
- - - - - - - —
- - — - - - - 02022 Continuous beeps. Keyboard error
- - -
- - - - —
0300 20h DRAM refresh test failure 0303 22h 8742 Keyboard controller test failure 0340 2Ch RAM failure
0400 30h RAM failure on data bits in high byte of memory bus
- - - - - 2023 46h ROM copyright notice check failure 2230 58h Unexpected interrupts test failure
1.
Where digits 1, 2, 3, 4 represent the number of short beeps, and 0
represents the occurrence of a single long beep.
Lights on the Status Panel
When the computer is first powered on, the power-on light on the status panel illuminates yellow for about a second before changing to green. This change of color is caused by the execution of an instruction early in the System BIOS code.
If the light remains at yellow, therefore, it indicates a failure of the processor or the System ROM in the instruction-fetch process. Check that the processor is correctly seated in its socket, and that its VRM is also correctly seated.
76
Page 77
A Audio 10, 11, 20, 48, 49, 52, 58, 60, 62, 65, 67, 72 B BIOS 32, 33, 34, 57, 58, 60, 62, 63, 64, 65, 67, 68, 71, 72, 75, 76 C Chapter 3 37 D Documentation 15, 16 G Graphics 10, 11, 18, 20, 38, 39, 42, 44, 45, 47, 55, 58, 60, 62, 64, 65, 68, 72, 75, 76 I IDE 10, 11, 18, 20, 23, 29, 30, 51, 58, 60, 62, 65, 67, 68, 72, 75 M Mass storage 10, 11, 20, 50, 51, 58, 60, 62, 65, 72 N Network 10, 11, 15, 18, 20, 34, 55, 58, 60, 62, 65, 72 O Operating systems 34, 35, 45, 49, 50, 63, 64, 75 P Package 10, 11, 12 Power supply 10, 11, 13, 18, 55 S SCSI 10, 11, 51, 64, 68, 72 System board 10, 11, 17, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 38, 44, 51, 55,
58, 60, 62, 63, 64, 65, 67, 68, 72, 75, 76 U USB 10, 11, 18, 20, 23, 30, 55, 58, 60, 62, 65, 72
Page 78
../../../pictures/logohp.tif @ 300 dpi 1 eps/mokt08a.tif @ 300 dpi 10 eps/mokt38a.tif @ 300 dpi 10 eps/mokt03a.eps 10 eps/mokt04a.eps 10 eps/mokt39a.tif @ 300 dpi 10 eps/mokt03m.eps 11 eps/mokt04m.eps 11 eps/mokt39m.tif @ 300 dpi 11 eps/mokt12a.tif @ 300 dpi 26 eps/mokt15a.tif @ 300 dpi 44 eps/dtt31a.eps 55 eps/dtt32a.eps 55 eps/dtt33a.eps 55 eps/dtt30d.eps 55
Loading...