HP OMEN 15-AX Schematics
1
2
3
4
5
6
7
8
POWER PAVILION PUFF INTEL SKL / KABY -H SYSTEM DIAGRAM
LPC
FAN
For Layout Review
PG.17
PG.18
PG.33
PG.32
PG.33PG.35
PG.12
PG.37
PG.38PG.38PG.38
DDR4 2133MHz
Channel A
DDR4 2133MHz
Channel B
SATA0 6GB/s
SATA0A
PCIEx4 32GB/s
LANE9,10,11,12
SATA0 6GB/s
SATA1B
PCI-E x 1 Gen1
USB 2.0
PORT7
SPI
LPC
INTEL
SkyLake - H4+2
Kaby Lake - H4+2
Processor : Quad Core
Power : 45 (Watt)
Package : BGA1440
Size : 42 x 28 (mm)
Die Size : 13.6 x 9.1 (mm)
DMI
INTEL PCH
Lynx Point
Power : Watt
Package : FCBGA837
Size : 23 x 23 (mm)
tms
AUDIO CODEC
ALC3258-CG
PG.2~8
PG.9~16
Azalia
PEG
X8 Lane
eDP (5.4Gb/s)
USB 3.0
USB 3.0 Ports
USB 2.0
(DB)
PG.28
NVIDIA N16P-GX / N16E-GR
Pa
ckage 29 x 29mm
40W
27MHz
PAGE 21
eDP
PORT1
PG.19~23
PORT2
USB 3.0 Ports
(DB)
PG.30
PORT1
PG.30
PORT2
PORT4PORT3
HD CAMUSB 2.0 Ports
PG.30
Headphone amplifier
A0022642RTJR
HP
VRAM gDDR5 x 4pcs
128M x32 / 256M x32
2.5GHz
PORT4
USB3.0 Re-Driving IC
PTN36241G
PORT5
HD + IR CAM
(OPTION)
Hp
PG.29
MIC
HDMI v2.0
17" eDP Panel
HD
/FHD/UHD
PG.26,34
Combo Jack
B)
(D
PG
.14~25
PG.27
PG
.26
Touch Screen
Synaptics S7817
PG.30
3D Camera
tel F200 3D
In
PORT8
PG.26PG.26
STACKUP
Charge
A A
PG.40
DDR4
PG.42
Config#3 SODIMM 1DPC
SODIMM1
Max. 8GB
STD
CPU Core
PG.43~45
+1.0V/+1.2VSUS
PG.47~48
+3V/+5V S5
B B
+VGACORE
PG.41
PG.49
SODIMM2
Max. 8GB
RSV
M.2 2280-S3 SSD
+1.35V_GFX
PG.50
HDD
C C
LANE7
LAN
RTL8107ESH/ 10/100
RTL8111HSH/ Gbe
TPM 2.0 SLB9665TT2.0
D D
(OPTION)
tms
PG.34
LANE5 LANE6
Card Reader
RTS5237S-GR
PG.36
G-Sensor
HP2DC
PG.34
SMBUS
KBC
ITE IT8987E/BX
KB TP
WLAN
BT COMBO
ROM
01
TOP
GND
IN1
IN2
VCC
IN3
GND
BOT
PG.31PG.31
Dual Digital MICSpeaker
PG.28 PG.28
1
2
3
4
5
3D CAM MIC
INT CAM MIC
PG.26
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
01 -- Block Diagram
01 -- Block Diagram
01 -- Block Diagram
Date: Sheet of
Date: Sheet of
6
7
Date: Sheet of
1 51Tuesday, December 01, 2015
1 51Tuesday, December 01, 2015
1 51Tuesday, December 01, 2015
8
1A
1A
1A
5
4
3
2
1
H_PECI (50ohm)
Tr
ace Length: <0.5 iches
Ra,Ca need placement close to PCH.
PCH_PECI11
EC_PECI37
D D
PROCHOT# (50ohm)
Trace Length <11 inches
Cb need placment near VR
H_PROCHOT#37,43
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches
C C
CPU_PLTRST#R11
PLTRST#12,16,19,33,34,35,36,37
Ra
R2 13/F_4
R4 499/F_4
C3
Cb
*47P/50V_4
R11 *1.5K/F_4
EC_PECI
C2
Ca
*47P/50V_4
H_PROCHOT#_R
H_PM_DOWN11
CPU_PLTRST#R
R13
*750/F_4
SKTOCC_N_R13
Host CLK:
Tra
ce length < 11000 mils
Trace spacing = 15 / 20 mils, Impendence 90 ohm
CLK_CPU_BCLKP11
CLK_CPU_BCLKN11
CPU_PCI_BCLKP11
CPU_PCI_BCLKN11
CLK_DPLL_NSCCLKP11
CLK_DPLL_NSCCLKN11
DDR_VTT_CNTL18
PM_SYNC (50ohm)
Trace Length: 1~11.25 inches
PM_SYNC11
+VCCSTPLL
R19 20_4
R15 0_4
R16 *10K_4
CPU CORE SVID HWP
Layout note:
1.
Need routing together
2.ALERT need between CLK and DATA.
+VCCSTPLL
PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE
B B
VR_SVID_CLK_R
CLOSE TO CPU
PLACE THE PU RESISTORS
H_CPU_SVIDALRT#
CLOSE TO CPU
PLACE THE PU RESISTORS
A A
R27 0_4
R25 220/F_4
R26
*54.9/F_4
+VCCSTPLL
+VCCSTPLL
R23
56.2/F_4
C5
*0.1U/10V_4
R28
100/F_4
Close to CPU
SVID CLK
VR_SVID_CLK 43
Close to CPU
SVID ALERT
VR_SVID_ALERT# 43
Close to CPU
PROCPWRGD (50ohm)
Trace Length: 1~11.25 inches
PROCPWRGD10
THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches
Rb need placment near PCH
PM_THRMTRIP#5,11,37
+VCCSTPLL
Ra(R10804) Not install in SKL-H
+VCCSTPLL
SVID DATA
H_CPU_SVIDDAT
5
R29 0_4
VR_SVID_DATA 43
4
SKYLAKE Processor (CLK,MISC,JTAG)
SKYLAKE_HALO
U1E
BCLKP
BCLKN
PCI_BCLKP
PCI_BCLKN
CLK24P
CLK24N
VIDALERT#
VIDSCK
VIDSOUT
PROCHOT#
DDR_VTT_CNTL
VCCST_PWRGD
PROCPWRGD
RESET#
PM_SYNC
PM_DOWN
PECI
THERMTRIP#
SKTOCC#
PROC_SELECT#
CATERR#
*SK
L_H_BGA_BGA
BGA1440
5 OF 14
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[17]
CFG[16]
CFG[19]
CFG[18]
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
Ra
R18
*10K_4
PROC_SEL#
R20
*0_4
CLK_CPU_BCLKP
CLK_CPU_BCLKN
CPU_PCI_BCLKP
CPU_PCI_BCLKN
CLK_DPLL_NSCCLKP
CLK_DPLL_NSCCLKN
H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
H_PROCHOT#_R
DDR_VTT_CNTL
H_VCCST_PWRGD
PROCPWRGD
CPU_PLTRST#R
H_PM_DOWN_R
EC_PECI
PM_THRMTRIP#
SKTOCC_NSKTOCC_N_R
PROC_SEL#
CATERR#
Rb
R14 1K_4
B31
A32
D35
C36
E31
D31
BH31
BH32
BH29
BR30
BT13
H13
BT31
BP35
BM34
BP31
BT34
J31
BR33
BN1
BM30
PM_THRMTRIP#
3
PROCPWRGD
R9
*10K_4
Processor pull-up (CPU)
BN25
CFG0
BN27
CFG1
BN26
CFG2
BN28
CFG3
BR20
CFG4
BM20
CFG5
BT20
CFG6
BP20
CFG7
BR23
CFG8
BR22
CFG9
BT23
CFG10
BT22
CFG11
BM19
CFG12
BR19
CFG13
BP19
CFG14
BT19
CFG15
BN23
CFG16
BP23
CFG17
BP22
CFG18
BN22
CFG19
BR27
XDP_BPM0
BT27
XDP_BPM1
BM31
XDP_BPM2
BT30
XDP_BPM3
BT28
XDP_TDO_CPU
BL32
XDP_TDI_CPU
BP28
XDP_TMS_CPU
BR28
XDP_TRST#_CPU
BP30
XDP_TRST#
BL30
XDP_PREQ#
BP27
XDP_PRDY#
BT25
CFG_RCOMP
Design Note(CFG_RCOMP):
DEFENSIVE DESIGN 50-OHM FOR R40PR (SV REQ)
CFG0 16
CFG1 16
CFG2 8,16
CFG3 8,16
CFG4 8,16
CFG5 8,16
CFG6 8,16
CFG7 16
CFG8 16
CFG9 16
CFG10 8,16
CFG11 16
CFG12 8,16
CFG13 8,16
CFG14 16
CFG15 16
CFG16 16
CFG17 16
CFG18 16
CFG19 16
XDP_BPM0 16
XDP_BPM1 16
TP2
TP1
XDP_TDO_CPU 16
XDP_TDI_CPU 16
XDP_TMS_CPU 16
XDP_TRST#_CPU 16
XDP_TRST# 15,16
XDP_PREQ# 15,16
XDP_PRDY# 15,16
R1749.9/F_4
D
Ra close to CPU side
H_V
CCST_PWRGD trace 0.3" - 1.5"
HWPG10,16,37,41,42,47,48
D2 RB500V-40
21
CPU VDDQ
Note: please keep plane is enough for VDDQ 2.8A
+1.2VSUS
2
02
H_PROCHOT#
XDP_TDO_CPU
XDP_TMS_CPU
XDP_TDI_CPU
XDP_PREQ#
XDP_TRST#_CPU
XDP_TRST#
+1.0V
H_VCCST_PWRGD_R H_VCCST_PWRGD
Placement close to CPU.
R3 1K_4
R5 51_4
R6 *51_4
R7 *51_4
R8 *51_4
R10 51_4
R12 51_4
+VCCSTPLL
R21
1K_4
C4
*10P/50V_4
C6 0.1U/16V_4
C7 *0.1U/10V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
R22
*1K_4
Ra
R24 60.4/F_4
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
02 -- SKL 1/7 (JTAG/MISC)
02 -- SKL 1/7 (JTAG/MISC)
02 -- SKL 1/7 (JTAG/MISC)
+1.0V
+1.0V
of
2 51Monday, November 30, 2015
2 51Monday, November 30, 2015
1
2 51Monday, November 30, 2015
1A
1A
1A
5
PEG_RXP019
PEG_RXN019
PEG_RXP119
PEG_RXN119
PEG_RXP219
D D
C C
DMI DMI
PEG_RXN219
PEG_RXP319
PEG_RXN319
PEG_RXP419
PEG_RXN419
PEG_RXP519
PEG_RXN519
PEG_RXP619
PEG_RXN619
PEG_RXP719
PEG_RXN719
PEG_RCOMP
Trace length < 400 MILS
T
race width = 12 MILS
Trace spacing = 15 MILS
+VCCIO
DMI_RXP09
DMI_RXN09
DMI_RXP19
DMI_RXN19
DMI_RXP29
DMI_RXN29
DMI_RXP39
DMI_RXN39
4
SKYLAKE Processor (DMI,PEG,FDI)
E25
D25
E24
F24
E23
D23
E22
F22
E21
D21
E20
F20
E19
D19
E18
F18
D17
E17
F16
E16
D15
E15
F14
E14
D13
E13
F12
E12
D11
E11
F10
E10
R30 24.9/F_4
PEG_COMP
G2
D8
E8
E6
F6
D5
E5
J8
J9
U1C
PEG_RXP[0]
PEG_RXN[0]
PEG_RXP[1]
PEG_RXN[1]
PEG_RXP[2]
PEG_RXN[2]
PEG_RXP[3]
PEG_RXN[3]
PEG_RXP[4]
PEG_RXN[4]
PEG_RXP[5]
PEG_RXN[5]
PEG_RXP[6]
PEG_RXN[6]
PEG_RXP[7]
PEG_RXN[7]
PEG_RXP[8]
PEG_RXN[8]
PEG_RXP[9]
PEG_RXN[9]
PEG_RXP[10]
PEG_RXN[10]
PEG_RXP[11]
PEG_RXN[11]
PEG_RXP[12]
PEG_RXN[12]
PEG_RXP[13]
PEG_RXN[13]
PEG_RXP[14]
PEG_RXN[14]
PEG_RXP[15]
PEG_RXN[15]
PEG_RCOMP
DMI_RXP[0]
DMI_RXN[0]
DMI_RXP[1]
DMI_RXN[1]
DMI_RXP[2]
DMI_RXN[2]
DMI_RXP[3]
DMI_RXN[3]
*S
KL_H_BGA_BGA
SKYLAKE_HALO
BGA1440
3 OF 14
PEG_TXP[0 ]
PEG_TXN[0]
PEG_TXP[1 ]
PEG_TXN[1]
PEG_TXP[2 ]
PEG_TXN[2]
PEG_TXP[3 ]
PEG_TXN[3]
PEG_TXP[4 ]
PEG_TXN[4]
PEG_TXP[5 ]
PEG_TXN[5]
PEG_TXP[6 ]
PEG_TXN[6]
PEG_TXP[7 ]
PEG_TXN[7]
PEG_TXP[8 ]
PEG_TXN[8]
PEG_TXP[9 ]
PEG_TXN[9]
PEG_TXP[1 0]
PEG_TXN[10]
PEG_TXP[1 1]
PEG_TXN[11]
PEG_TXP[1 2]
PEG_TXN[12]
PEG_TXP[1 3]
PEG_TXN[13]
PEG_TXP[1 4]
PEG_TXN[14]
PEG_TXP[1 5]
PEG_TXN[15]
DMI_TXP[0]
DMI_TXN[0]
DMI_TXP[1]
DMI_TXN[1]
DMI_TXP[2]
DMI_TXN[2]
DMI_TXP[3]
DMI_TXN[3]
B25
A25
B24
C24
B23
A23
B22
C22
B21
A21
B20
C20
B19
A19
B18
C18
A17
B17
C16
B16
A15
B15
C14
B14
A13
B13
C12
B12
A11
B11
C10
B10
B8
A8
C6
B6
B5
A5
D4
B4
PEG_TXP0_C
PEG_TXN0_ C
PEG_TXP1_C
PEG_TXN1_ C
PEG_TXP2_C
PEG_TXN2_ C
PEG_TXP3_C
PEG_TXN3_ C
PEG_TXP4_C
PEG_TXN4_ C
PEG_TXP5_C
PEG_TXN5_ C
PEG_TXP6_C
PEG_TXN6_ C
PEG_TXP7_C
PEG_TXN7_ C
3
C8 0.22U/10V_4
C9 0.22U/10V_4
C10 0.22U/10V_4
C11 0.22U/10V_4
C12 0.22U/10V_4
C13 0.22U/10V_4
C14 0.22U/10V_4
C15 0.22U/10V_4
C16 0.22U/10V_4
C17 0.22U/10V_4
C18 0.22U/10V_4
C19 0.22U/10V_4
C20 0.22U/10V_4
C21 0.22U/10V_4
C22 0.22U/10V_4
C23 0.22U/10V_4
PEG_TXP0 19
PEG_TXN0 19
PEG_TXP1 19
PEG_TXN1 19
PEG_TXP2 19
PEG_TXN2 19
PEG_TXP3 19
PEG_TXN3 19
PEG_TXP4 19
PEG_TXN4 19
PEG_TXP5 19
PEG_TXN5 19
PEG_TXP6 19
PEG_TXN6 19
PEG_TXP7 19
PEG_TXN7 19
DMI_TXP0 9
DMI_TXN0 9
DMI_TXP1 9
DMI_TXN1 9
DMI_TXP2 9
DMI_TXN2 9
DMI_TXP3 9
DMI_TXN3 9
DIS : Stuff
UMA: Un-Stuff
dGPUdGPU
2
1
03
B B
HDMI
11/03 modify for HDMI2.0
A A
5
4
K36
K37
J35
J34
H37
H36
J37
J38
D27
E27
H34
H33
F37
G38
F34
F35
E37
E36
F26
E26
C34
D34
B36
B34
F33
E33
C33
B33
A27
B27
U1D
DDI1_TXP[0]
DDI1_TXN[0]
DDI1_TXP[1]
DDI1_TXN[1]
DDI1_TXP[2]
DDI1_TXN[2]
DDI1_TXP[3]
DDI1_TXN[3]
DDI1_AUXP
DDI1_AUXN
DDI2_TXP[0]
DDI2_TXN[0]
DDI2_TXP[1]
DDI2_TXN[1]
DDI2_TXP[2]
DDI2_TXN[2]
DDI2_TXP[3]
DDI2_TXN[3]
DDI2_AUXP
DDI2_AUXN
DDI3_TXP[0]
DDI3_TXN[0]
DDI3_TXP[1]
DDI3_TXN[1]
DDI3_TXP[2]
DDI3_TXN[2]
DDI3_TXP[3]
DDI3_TXN[3]
DDI3_AUXP
DDI3_AUXN
*S
KL_H_BGA_BGA
BGA1440
4 OF 14
EDP_TXP[0]
EDP_TXN[0]
EDP_TXP[1]
EDP_TXN[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXP
EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
tms
D29
INT_EDP_TXP0
E29
INT_EDP_TXN0
F28
INT_EDP_TXP1
E28
INT_EDP_TXN1
B29
INT_EDP_TXN2
A29
INT_EDP_TXP2
B28
INT_EDP_TXN3
C28
INT_EDP_TXP3
C26
INT_eDP_AUXP
B26
INT_eDP_AUXN
A33
EDP_DISP_UTIL
D37
EDP_RCOMP
DP & PEG Compensation
y
eDP_RCOMP
race length < 100 Mils
T
Trace Width 20 Mils Trace Spacing 25 Mils
G27
AUD_AZACP U_SCLK
G25
AUD_AZACP U_SDO_R
G29
AUD_AZACP U_SDI_R
TP3
R31 24.9/F_4
R32 20_4
3
INT_EDP_TXP0 26
INT_EDP_TXN0 2 6
INT_EDP_TXP1 26
INT_EDP_TXN1 2 6
INT_EDP_TXN2 2 6
INT_EDP_TXP2 26
INT_EDP_TXN3 2 6
INT_EDP_TXP3 26
INT_eDP_AUXP 26
INT_eDP_AUXN 26
+VCCIO
eDP
AUD_AZACP U_SCLK 10
AUD_AZACP U_SDO_R 10
AUD_AZACP U_SDI 10
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
+1.2VSUS 2,6,10,17,18,42,48 ,51
+3VS5 10,12,14 ,16,26,3 3,37,41,42,46,47 ,48,51
+3V 5,9,10,11 ,12,13,14,16,17,1 8,19,22,26,27,28 ,29,30,3 2,33,34,35,36,37,38,43,46,49
2
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
03 -- SKL 2/7 (DMI/EDP/PEG)
03 -- SKL 2/7 (DMI/EDP/PEG)
03 -- SKL 2/7 (DMI/EDP/PEG)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
3 51Tuesday, December 01, 2015
3 51Tuesday, December 01, 2015
3 51Tuesday, December 01, 2015
1A
1A
1A
SKYLAKE_HALO
5
4
3
2
1
SKYLAKE Processor (DDR4)
D D
C C
B B
M_A_DQ[63:0]17
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U1A
BR6
DDR0_DQ[0]
BT6
DDR0_DQ[1]
BP3
DDR0_DQ[2]
BR3
DDR0_DQ[3]
BN5
DDR0_DQ[4]
BP6
DDR0_DQ[5]
BP2
DDR0_DQ[6]
BN3
DDR0_DQ[7]
BL4
DDR0_DQ[8]
BL5
DDR0_DQ[9]
BL2
DDR0_DQ[10]
BM1
DDR0_DQ[11]
BK4
DDR0_DQ[12]
BK5
DDR0_DQ[13]
BK1
DDR0_DQ[14]
BK2
DDR0_DQ[15]
BG4
DDR0_DQ[16]/DDR0_DQ[32]
BG5
DDR0_DQ[17]/DDR0_DQ[33]
BF4
DDR0_DQ[18]/DDR0_DQ[34]
BF5
DDR0_DQ[19]/DDR0_DQ[35]
BG2
DDR0_DQ[20]/DDR0_DQ[36]
BG1
DDR0_DQ[21]/DDR0_DQ[37]
BF1
DDR0_DQ[22]/DDR0_DQ[38]
BF2
DDR0_DQ[23]/DDR0_DQ[39]
BD2
DDR0_DQ[24]/DDR0_DQ[40]
BD1
DDR0_DQ[25]/DDR0_DQ[41]
BC4
DDR0_DQ[26]/DDR0_DQ[42]
BC5
DDR0_DQ[27]/DDR0_DQ[43]
BD5
DDR0_DQ[28]/DDR0_DQ[44]
BD4
DDR0_DQ[29]/DDR0_DQ[45]
BC1
DDR0_DQ[30]/DDR0_DQ[46]
BC2
DDR0_DQ[31]/DDR0_DQ[47]
AB1
DDR0_DQ[32]/DDR1_DQ[0]
AB2
DDR0_DQ[33]/DDR1_DQ[1]
AA4
DDR0_DQ[34]/DDR1_DQ[2]
AA5
DDR0_DQ[35]/DDR1_DQ[3]
AB5
DDR0_DQ[36]/DDR1_DQ[4]
AB4
DDR0_DQ[37]/DDR1_DQ[5]
AA2
DDR0_DQ[38]/DDR1_DQ[6]
AA1
DDR0_DQ[39]/DDR1_DQ[7]
V5
DDR0_DQ[40]/DDR1_DQ[8]
V2
DDR0_DQ[41]/DDR1_DQ[9]
U1
DDR0_DQ[42]/DDR1_DQ[10]
U2
DDR0_DQ[43]/DDR1_DQ[11]
V1
DDR0_DQ[44]/DDR1_DQ[12]
V4
DDR0_DQ[45]/DDR1_DQ[13]
U5
DDR0_DQ[46]/DDR1_DQ[14]
U4
DDR0_DQ[47]/DDR1_DQ[15]
R2
DDR0_DQ[48]/DDR1_DQ[32]
P5
DDR0_DQ[49]/DDR1_DQ[33]
R4
DDR0_DQ[50]/DDR1_DQ[34]
P4
DDR0_DQ[51]/DDR1_DQ[35]
R5
DDR0_DQ[52]/DDR1_DQ[36]
P2
DDR0_DQ[53]/DDR1_DQ[37]
R1
DDR0_DQ[54]/DDR1_DQ[38]
P1
DDR0_DQ[55]/DDR1_DQ[39]
M4
DDR0_DQ[56]/DDR1_DQ[40]
M1
DDR0_DQ[57]/DDR1_DQ[41]
L4
DDR0_DQ[58]/DDR1_DQ[42]
L2
DDR0_DQ[59]/DDR1_DQ[43]
M5
DDR0_DQ[60]/DDR1_DQ[44]
M2
DDR0_DQ[61]/DDR1_DQ[45]
L5
DDR0_DQ[62]/DDR1_DQ[46]
L1
DDR0_DQ[63]/DDR1_DQ[47]
BA2
DDR0_ECC[0]
BA1
DDR0_ECC[1]
AY4
DDR0_ECC[2]
AY5
DDR0_ECC[3]
BA5
DDR0_ECC[4]
BA4
DDR0_ECC[5]
AY1
DDR0_ECC[6]
AY2
DDR0_ECC[7]
DDR CHANNEL A
*SK
L_H_BGA_BGA
SKYLAKE_HALO
BGA1440
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT#
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSP[7]/DDR1_DQSP[5]
1 OF 14
DDR0_CKP[0]
DDR0_CKN[0]
DDR0_CKP[1]
DDR0_CKN[1]
DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_CS#[2]
DDR0_CS#[3]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_ODT[2]
DDR0_ODT[3]
DDR0_MA[3]
DDR0_MA[4]
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN[0]
DDR0_DQSN[1]
DDR0_DQSP[0]
DDR0_DQSP[1]
DDR0_DQSP[8]
DDR0_DQSN[8]
AG1
AG2
AK2
AK1
AL3
AK3
AL2
AL1
AT1
AT2
AT3
AT5
AD5
AE2
AD2
AE5
AD3
AE4
AE1
AD4
AH5
AH1
AU1
AH4
AG4
AD1
AH3
AP4
AN4
AP5
AP2
AP1
AP3
AN1
AN3
AT4
AH2
AN2
AU4
AE3
AU2
AU3
AG3
AU5
BR5
BL3
BG3
BD3
AA3
U3
P3
L3
BP5
BK3
BF3
BC3
AB3
V3
R3
M3
AY3
BA3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7
M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7
M_B_DQ[63:0]18
M_A_CLKP0 17
M_A_CLKN0 17
M_A_CLKP1 17
M_A_CLKN1 17
M_A_CKE0 17
M_A_CKE1 17
M_A_CS#0 17
M_A_CS#1 17
M_A_DIM0_ODT0 17
M_A_DIM0_ODT1 17
M_A_BS#0 17
M_A_BS#1 17
M_A_BG#0 17
M_A_RAS# 17
M_A_WE# 17
M_A_CAS# 17
M_A_A[13:0] 17
M_A_BG#1 17
M_A_ACT# 17
M_A_PARITY 17
M_A_ALERT# 17
M_A_DQSN[7:0] 17
M_A_DQSP[7:0] 17
R33 121/F_4
R34 75/F_4
R35 100/F_4
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
U1B
BT11
DDR1_DQ[0]/DDR0_DQ[16]
BR11
DDR1_DQ[1]/DDR0_DQ[17]
BT8
DDR1_DQ[2]/DDR0_DQ[18]
BR8
DDR1_DQ[3]/DDR0_DQ[19]
BP11
DDR1_DQ[4]/DDR0_DQ[20]
BN11
DDR1_DQ[5]/DDR0_DQ[21]
BP8
DDR1_DQ[6]/DDR0_DQ[22]
BN8
DDR1_DQ[7]/DDR0_DQ[23]
BL12
DDR1_DQ[8]/DDR0_DQ[24]
BL11
DDR1_DQ[9]/DDR0_DQ[25]
BL8
DDR1_DQ[10]/DDR0_DQ[26]
BJ8
DDR1_DQ[11]/DDR0_DQ[27]
BJ11
DDR1_DQ[12]/DDR0_DQ[28]
BJ10
DDR1_DQ[13]/DDR0_DQ[29]
BL7
DDR1_DQ[14]/DDR0_DQ[30]
BJ7
DDR1_DQ[15]/DDR0_DQ[31]
BG11
DDR1_DQ[16]/DDR0_DQ[48]
BG10
DDR1_DQ[17]/DDR0_DQ[49]
BG8
DDR1_DQ[18]/DDR0_DQ[50]
BF8
DDR1_DQ[19]/DDR0_DQ[51]
BF11
DDR1_DQ[20]/DDR0_DQ[52]
BF10
DDR1_DQ[21]/DDR0_DQ[53]
BG7
DDR1_DQ[22]/DDR0_DQ[54]
BF7
DDR1_DQ[23]/DDR0_DQ[55]
BB11
DDR1_DQ[24]/DDR0_DQ[56]
BC11
DDR1_DQ[25]/DDR0_DQ[57]
BB8
DDR1_DQ[26]/DDR0_DQ[58]
BC8
DDR1_DQ[27]/DDR0_DQ[59]
BC10
DDR1_DQ[28]/DDR0_DQ[60]
BB10
DDR1_DQ[29]/DDR0_DQ[61]
BC7
DDR1_DQ[30]/DDR0_DQ[62]
BB7
DDR1_DQ[31]/DDR0_DQ[63]
AA11
DDR1_DQ[32]/DDR1_DQ[16]
AA10
DDR1_DQ[33]/DDR1_DQ[17]
AC11
DDR1_DQ[34]/DDR1_DQ[18]
AC10
DDR1_DQ[35]/DDR1_DQ[19]
AA7
DDR1_DQ[36]/DDR1_DQ[20]
AA8
DDR1_DQ[37]/DDR1_DQ[21]
AC8
DDR1_DQ[38]/DDR1_DQ[22]
AC7
DDR1_DQ[39]/DDR1_DQ[23]
W8
DDR1_DQ[40]/DDR1_DQ[24]
W7
DDR1_DQ[41]/DDR1_DQ[25]
V10
DDR1_DQ[42]/DDR1_DQ[26]
V11
DDR1_DQ[43]/DDR1_DQ[27]
W11
DDR1_DQ[44]/DDR1_DQ[28]
W10
DDR1_DQ[45]/DDR1_DQ[29]
V7
DDR1_DQ[46]/DDR1_DQ[30]
V8
DDR1_DQ[47]/DDR1_DQ[31]
R11
DDR1_DQ[48]
P11
DDR1_DQ[49]
P7
DDR1_DQ[50]
R8
DDR1_DQ[51]
R10
DDR1_DQ[52]
P10
DDR1_DQ[53]
R7
DDR1_DQ[54]
P8
DDR1_DQ[55]
L11
DDR1_DQ[56]
M11
DDR1_DQ[57]
L7
DDR1_DQ[58]
M8
DDR1_DQ[59]
L10
DDR1_DQ[60]
M10
DDR1_DQ[61]
M7
DDR1_DQ[62]
L8
DDR1_DQ[63]
AW11
DDR1_ECC[0]
AY11
DDR1_ECC[1]
AY8
DDR1_ECC[2]
AW8
DDR1_ECC[3]
AY10
DDR1_ECC[4]
AW10
DDR1_ECC[5]
AY7
DDR1_ECC[6]
AW7
DDR1_ECC[7]
G1
DDR_RCOMP[0]
H1
DDR_RCOMP[1]
J2
DDR_RCOMP[2]
*SK
L_H_BGA_BGA
DDR CHANNEL B
SKYLAKE_HALO
BGA1440
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSP[5]/DDR1_DQSP[3]
2 OF 14
DDR1_CKP[0]
DDR1_CKN[0]
DDR1_CKP[1]
DDR1_CKN[1]
DDR1_CLKP[2]
DDR1_CLKN[2]
DDR1_CLKP[3]
DDR1_CLKN[3]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]
DDR1_ODT[0]
DDR1_ODT[1]
DDR1_ODT[2]
DDR1_ODT[3]
DDR1_MA[3]
DDR1_MA[4]
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN[6]
DDR1_DQSN[7]
DDR1_DQSP[6]
DDR1_DQSP[7]
DDR1_DQSP[8]
DDR1_DQSN[8]
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
AM9
AN9
AM7
AM8
AM11
AM10
AJ10
AJ11
AT8
AT10
AT7
AT11
AF11
AE7
AF10
AE10
AF7
AE8
AE9
AE11
AH10
AH11
AF8
AH8
AH9
AR9
AJ9
M_B_A0
AK6
M_B_A1
AK5
M_B_A2
AL5
M_B_A3
AL6
M_B_A4
AM6
M_B_A5
AN7
M_B_A6
AN10
M_B_A7
AN8
M_B_A8
AR11
M_B_A9
AH7
M_B_A10
AN11
M_B_A11
AR10
M_B_A12
AF9
M_B_A13
AR7
AT9
AJ7
AR8
BP9
M_B_DQSN0
BL9
M_B_DQSN1
BG9
M_B_DQSN2
BC9
M_B_DQSN3
AC9
M_B_DQSN4
W9
M_B_DQSN5
R9
M_B_DQSN6
M9
M_B_DQSN7
BR9
M_B_DQSP0
BJ9
M_B_DQSP1
BF9
M_B_DQSP2
BB9
M_B_DQSP3
AA9
M_B_DQSP4
V9
M_B_DQSP5
P9
M_B_DQSP6
L9
M_B_DQSP7
AW9
AY9
BN13
+SM_VREF
BP13
BR13
SMDDR_VREF_DQ1_M3
M_B_CLKP0 18
M_B_CLKN0 18
M_B_CLKP1 18
M_B_CLKN1 18
M_B_CKE0 18
M_B_CKE1 18
M_B_CS#0 18
M_B_CS#1 18
M_B_DIM0_ODT0 18
M_B_DIM0_ODT1 18
M_B_RAS# 18
M_B_WE# 18
M_B_CAS# 18
M_B_BS#0 18
M_B_BS#1 18
M_B_BG#0 18
M_B_A[13:0] 18
M_B_BG#1 18
M_B_ACT# 18
M_B_PARITY 18
M_B_ALERT# 18
M_B_DQSN[7:0] 18
M_B_DQSP[7:0] 18
TP8503
04
SM_VREF 17
SMDDR_VREF_DQ1_M3 18
A A
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
04 -- SKL 3/7 (DDR4 I/F)
04 -- SKL 3/7 (DDR4 I/F)
04 -- SKL 3/7 (DDR4 I/F)
1
4 51Monday, November 30, 2015
4 51Monday, November 30, 2015
4 51Monday, November 30, 2015
1A
1A
1A
5
4
3
2
1
SKYLAKE Processor (POWER)
Follow SKL H EDS page 133 to 45W(GT2): +VCCGT=55A
+VCCGT
AJ29
D D
C24
22U/6.3V_6
C27
22U/6.3V_6
C38
22U/6.3VS_6
C48
C C
B B
22U/6.3VS_6
C55
10U/6.3V_6
C64
1U/6.3V_4
C71
1U/6.3V_4
C78
1U/6.3V_4
C30
22U/6.3V_6
C34
22U/6.3V_6
C39
22U/6.3VS_6
C49
22U/6.3VS_6
C56
10U/6.3V_6
C65
1U/6.3V_4
C72
1U/6.3V_4
C79
1U/6.3V_4
C31
22U/6.3V_6
C35
22U/6.3V_6
C40
22U/6.3VS_6
C50
22U/6.3VS_6
C57
10U/6.3V_6
C66
1U/6.3V_4
C73
1U/6.3V_4
C80
1U/6.3V_4
C25
22U/6.3V_6
C36
22U/6.3V_6
C41
22U/6.3VS_6
C51
22U/6.3VS_6
C58
10U/6.3V_6
C67
1U/6.3V_4
C74
1U/6.3V_4
C81
1U/6.3V_4
C32
22U/6.3V_6
C28
22U/6.3V_6
C42
22U/6.3VS_6
C52
22U/6.3VS_6
C59
10U/6.3V_6
C68
1U/6.3V_4
C75
1U/6.3V_4
C82
1U/6.3V_4
C26
22U/6.3V_6
C29
22U/6.3V_6
C43
22U/6.3VS_6
C53
22U/6.3VS_6
C60
10U/6.3V_6
C62
47U/6.3V_8
C69
1U/6.3VS_4
C76
1U/6.3VS_4
C83
1U/6.3VS_4
C33
22U/6.3V_6
C37
22U/6.3V_6
C44
22U/6.3VS_6
C54
22U/6.3VS_6
C61
10U/6.3V_6
C63
47U/6.3V_8
C70
1U/6.3V_4
C77
1U/6.3V_4
C84
1U/6.3V_4
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP14
AP29
AP30
AP31
AP32
AP35
AP36
AP37
AP38
AR29
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38
AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38
U1N
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
tms
*S
KL_H_BGA_BGA
SKYLAKE_HALO
BGA1440
14 OF 14
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGTX
VCCGT_SENSE
VSSGTX_SENSE
VSSGT_SENSE
VCCGTX_SENSE
AF29
AF30
AF31
AF32
AF33
AF34
AG13
AG14
AG31
AG32
AG33
AG34
AG35
AG36
AH13
AH14
AH29
AH30
AH31
AH32
AJ13
AJ14
AH38
AH35
AH37
AH36
VCCGT_SENSE 43
VSSGT_SENSE 43
IO Thrm Protect
Location need thermal confirm
+3VPCU +3VPCU
R36
20K/F_4
For 75 degree, 1.2v limit, (HW)
THER_CPU THER_PIPE
R39
100K_4 NTC
THRM_MOINTOR2 37 THRM_MOINTOR1 37
C45
0.1U/16V_4
1 2
CPU Thermal Sensor
Location need thermal confirm
MBCLK210,18,37
MBDATA210,18,37
+3V
+1.0V
PM_THRMTRIP#2,11,37
MBCLK2
MBDATA2
CPU_THRMTRIP#
R42 *10K/F_4
R43*4.7K_4
1 3
*METR3904-G
For PIPE USEFor CPU USE
R38
20K/F_4
For 75 degree, 1.2v limit, (HW)
R41
100K_4 NTC
U4
8
7
6
4
2
Q3
SCLK
SDA
ALERT#
OVERT#
*G781P8
CPU_THRMTRIP#
VCC
DXP
DXN
GND
C47
0.1U/16V_4
1 2
1
2
3
5
C1 *0.01U/50V_4
CPU_THERMDA
C85
*2200P/50V_4
CPU_THERMDC
AL000431014
+VCC_CORE 7,43,44
+1.2VSUS 2,6,10,17,18,42,48,51
+3V
2
Q2
*METR3904-G
1 3
TMP431ADGKR(98h)
05
A A
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
05 -- SKL 4/7 (POWER)
05 -- SKL 4/7 (POWER)
05 -- SKL 4/7 (POWER)
1
5 51Tuesday, December 01, 2015
5 51Tuesday, December 01, 2015
5 51Tuesday, December 01, 2015
1A
1A
1A
of
5
4
3
2
1
Follow SKL H EDS page 135 to 45W(GT2): VCCSA=11.1A
+VCCSA
D D
Follow SKL H EDS P136 to 45W: VCCIO
+VCCIO = 0.95V
C C
B B
C106
10U/6.3V_6
C93
C86
10U/6.3V_6
10U/6.3V_6
C90
C91
10U/6.3V_6
10U/6.3V_6
C100
1U/6.3V_4
C114
1U/6.3V_4
+VDDQC +VCCSTG +VCCPLL_OC +V CCPLL+VCCIO
C119
C118
10U/6.3V_6
+VCCIO
C94
22U/6.3VS_6
C92
10U/6.3V_6
C101
1U/6.3V_4
C112
22U/6.3VS_6
C115
1U/6.3V_4
1U/6.3V_4
+VCCIO
C120
C87
22U/6.3VS_6
C107
10U/6.3V_6
C110
1U/6.3V_4
C113
22U/6.3VS_6
C116
10U/6.3V_6
1U/6.3V_4
C121
AG12
K29
K30
K31
K32
K33
K34
K35
L31
L32
L35
L36
L37
L38
M29
M30
M31
M32
M33
M34
M35
M36
G15
G17
G19
G21
H15
H16
H17
H19
H20
H21
H26
H27
J30
J15
J16
J17
J19
J20
J21
J26
J27
Close CPUUnder CPU
U1I
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
*SK
1U/6.3V_4
C122
SKYLAKE_HALO
BGA1440
.1 A 2.8 A
11
5.5 A
L_H_BGA_BGA
C123
1U/6.3V_4
0.26 A
0.145 A
9 OF 14
VCCPLL_O C
VCCPLL_O C
0.12 A
VCCSA_SE NSE
VSSSA_S ENSE
VCCIO_SENSE
VSSIO_SENSE
Follow SKL H EDS page 135 45W: VDDQ=2.8A
+1.2VSUS
AA6
VDDQ
AE12
VDDQ
AF5
VDDQ
AF6
VDDQ
AG5
VDDQ
AG9
VDDQ
AJ12
VDDQ
AL11
VDDQ
AP6
VDDQ
AP7
VDDQ
AR12
VDDQ
AR6
VDDQ
AT12
VDDQ
AW6
VDDQ
AY6
VDDQ
J5
VDDQ
J6
VDDQ
K12
VDDQ
K6
VDDQ
L12
VDDQ
L6
VDDQ
R6
VDDQ
T6
VDDQ
W6
VDDQ
Y12
VDDQC
BH13
G11
H30
VCCST
H29
VCCSTG
G30
VCCSTG
H28
VCCPLL
J28
VCCPLL
M38
M37
H14
J14
+VCCPLL_O C +1.2VSUS
+VCCPLL +VCCSTPLL
C95
22U/6.3VS_6
C108
10U/6.3V_6
C102
10U/6.3V_6
+VDDQC
+VCCPLL_O C
+VCCSTG
+VCCPLL
VCCSA_SE NSE 43
VSSSA_S ENSE 43
VCCIO_VCCSENSE
VSSIO_VSSSENSE
R44 0_6
R45*0_6
R470_6
R48 0_6
C88
22U/6.3VS_6
C109
10U/6.3V_6
C103
10U/6.3V_6
+VCCSTPLL
+VCCIO
+1.2VSUS+VDDQC
+1.2V_VCC PLL_OC
C117
1U/6.3V_4
R46
100_4
R49
100_4
C96
22U/6.3VS_6
C97
10U/6.3V_6
C104
10U/6.3V_6
C89
22U/6.3VS_6
C98
10U/6.3V_6
C105
10U/6.3V_6
C99
10U/6.3V_6
C111
10U/6.3V_6
BJ17
BJ19
BJ20
BK17
BK19
BK20
BL16
BL17
BL18
BL19
BL20
BL21
BM17
BN17
BJ23
BJ26
BJ27
BK23
BK26
BK27
BL23
BL24
BL25
BL26
BL27
BL28
BM24
BL15
BM16
BL22
BM22
BP15
BR15
BT15
BP16
BR16
BT16
BN15
BM15
BP17
BN16
BM14
BL14
BJ35
BJ36
AT13
AW13
AU13
AY13
BT29
BR25
BP25
R53 *49.9/F_4
R54 *49.9/F_4
R55 *49.9/F_4
TP76
TP77
TP6
TP7
CPU_OPC_COMP
CPU_OPCE_COMP
CPU_OPCE_COMP2
Unconnected for Processors without OPC.
SKYLAKE_HALO
U1J
BGA1440
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
VCCOPC
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
VCCOPC_SENSE
VSSOPC_SENSE
RSVD
RSVD
VCCEOPIO
VCCEOPIO
VCCEOPIO
RSVD
RSVD
RSVD
VCCEOPIO_SENSE
VSSEOPIO_SENSE
RSVD
RSVD
VCC_OPC_1P8
VCC_OPC_1P8
RSVD
RSVD
ZVM#
MSM#
ZVM2#
MSM2#
OPC_RCOMP
OPCE_RCOMP
OPCE_RCOMP2
10 OF 14
*SK
L_H_BGA_BGA
06
C125
C124
*22U/6.3V _6
*1U/6.3V_ 4
A A
5
4
+VCCSTG
R50 0_4
R51 *0 _4
R52 *0 _4
+VCCSTPLL
+1.0V
+VCCIO
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
06 -- SKL 5/7 (POWER&GND )
06 -- SKL 5/7 (POWER&GND )
06 -- SKL 5/7 (POWER&GND )
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
1
6 51Monday, November 30 , 2015
6 51Monday, November 30 , 2015
6 51Monday, November 30 , 2015
1A
1A
1A
5
4
3
2
1
07
+VCC_CORE
U1G
AA13
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13
AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38
AF35
AF36
AF37
AF38
K13
K14
L13
N13
N14
N30
N31
N32
N35
N36
N37
N38
P13
SKYLAKE_HALO
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
*S
KL_H_BGA_BGA
BGA1440
7 OF 14
VCC_SENSE
VSS_SENSE
V32
VCC
V33
VCC
V34
VCC
V35
VCC
V36
VCC
V37
VCC
V38
VCC
W13
VCC
W14
VCC
W29
VCC
W30
VCC
W31
VCC
W32
VCC
W35
VCC
W36
VCC
W37
VCC
W38
VCC
Y29
VCC
Y30
VCC
Y31
VCC
Y32
VCC
Y33
VCC
Y34
VCC
Y35
VCC
Y36
VCC
L14
VCC
P29
VCC
P30
VCC
P31
VCC
P32
VCC
P33
VCC
P34
VCC
P35
VCC
P36
VCC
R13
VCC
R31
VCC
R32
VCC
R33
VCC
R34
VCC
R35
VCC
R36
VCC
R37
VCC
R38
VCC
T29
VCC
T30
VCC
T31
VCC
T32
VCC
T35
VCC
T36
VCC
T37
VCC
T38
VCC
U29
VCC
U30
VCC
U31
VCC
U32
VCC
U33
VCC
U34
VCC
U35
VCC
U36
VCC
V13
VCC
V14
VCC
V31
VCC
P14
VCC
AG37
AG38
tms
VCC_SENSE
VSS_SENSE
C133
0.1U/16V_4
1 2
C150
0.1U/16V_4
1 2
C168
0.1U/16V_4
1 2
1 2
1 2
1 2
+VCC_CORE
C134
0.1U/16V_4
C151
0.1U/16V_4
C169
0.1U/16V_4
R56
*100_4
R57
*100_4
C135
0.1U/16V_4
1 2
1 2
C152
0.1U/16V_4
1 2
1 2
C170
0.1U/16V_4
1 2
1 2
VCC_SENSE 43
VSS_SENSE 43
C146
0.1U/16V_4
C153
0.1U/16V_4
C171
0.1U/16V_4
1 2
1 2
1 2
C136
C147
0.1U/16V_4
1 2
C154
0.1U/16V_4
1 2
C172
0.1U/16V_4
1 2
Sense resistor should be placed within 2
nches (50.8 mm) of the processor socket
i
0.1U/16V_4
C155
0.1U/16V_4
C173
0.1U/16V_4
1 2
1 2
1 2
C148
0.1U/16V_4
C156
0.1U/16V_4
C174
0.1U/16V_4
Trace Impendence 50 ohm
C137
0.1U/16V_4
1 2
C157
0.1U/16V_4
1 2
C175
0.1U/16V_4
1 2
1 2
1 2
1 2
C138
0.1U/16V_4
C158
0.1U/16V_4
C176
0.1U/16V_4
D D
C C
B B
Follow SKL H EDS page 131 to 45W(GT2): VCC_CORE=68A
C127
22U/6.3V_6
C140
22U/6.3V_6
C161
22U/6.3V_6
C178
22U/6.3V_6
C186
10U/6.3V_6
C198
1U/6.3V_4
C128
22U/6.3V_6
C159
22U/6.3V_6
C162
22U/6.3V_6
C179
22U/6.3V_6
C187
10U/6.3V_6
C199
1U/6.3V_4
C129
22U/6.3V_6
C141
22U/6.3V_6
C163
22U/6.3V_6
C180
22U/6.3V_6
C188
10U/6.3V_6
C200
1U/6.3V_4
C126
22U/6.3V_6
C139
22U/6.3V_6
C160
22U/6.3V_6
C177
22U/6.3V_6
C185
10U/6.3V_6
C197
1U/6.3V_4
C130
22U/6.3V_6
C149
22U/6.3V_6
C164
22U/6.3V_6
C181
22U/6.3V_6
C189
10U/6.3V_6
C193
10U/6.3V_6
C201
1U/6.3V_4
C131
22U/6.3V_6
C142
22U/6.3V_6
C165
22U/6.3V_6
C182
22U/6.3V_6
C190
10U/6.3V_6
C194
10U/6.3V_6
C202
1U/6.3V_4
C132
22U/6.3V_6
C143
22U/6.3V_6
C166
22U/6.3V_6
C183
22U/6.3V_6
C191
10U/6.3V_6
C195
10U/6.3V_6
C203
1U/6.3VS_4
C205
47U/6.3V_8
C145
22U/6.3V_6
C144
22U/6.3V_6
C167
22U/6.3V_6
C184
22U/6.3V_6
C192
10U/6.3V_6
C196
10U/6.3V_6
C204
1U/6.3V_4
C206
47U/6.3V_8
+VCCGT+VCC_CORE +VCCGT
U1H
SKYLAKE_HALO
BM36
BM37
BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38
BL36
BL37
BN36
BN37
BN38
BP37
BP38
BR37
BT37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BD35
BD36
BE31
BE32
BE37
BJ37
BJ38
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
*S
KL_H_BGA_BGA
BGA1440
8 OF 14
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
AV29
AV30
AV31
AV32
AV33
AV34
AV35
AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38
BC29
BC30
BC31
BC32
BC35
BE33
BE34
BE35
BE36
VCC_SENSE VSS_SENSE
R58 *49.9/F_4
A A
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
07 -- SKL 6/7 (POWER&GND )
07 -- SKL 6/7 (POWER&GND )
07 -- SKL 6/7 (POWER&GND )
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
1
+VCC_CORE 43,44
of
7 51Tuesday, December 01, 2015
7 51Tuesday, December 01, 2015
7 51Tuesday, December 01, 2015
1A
1A
1A
5
4
3
2
1
SKL-HProcessor (GND)
C17
C13
BT32
BT26
BT24
BT21
BT18
BT14
BT12
BT9
BT5
BR36
BR34
BR29
BR26
BR24
BR21
BR18
BR14
BR12
BR7
BP34
BP33
BP29
BP26
BP24
BP21
BP18
BP14
BP12
BP7
BN34
BN31
BN30
BN29
BN24
BN21
BN20
BN19
BN18
BN14
BN12
BN9
BN7
BN4
BN2
BM38
BM35
BM28
BM27
BM26
BM23
BM21
BM13
BM12
BM9
BM6
BM2
BL29
BK29
BK15
BK14
BJ32
BJ31
BJ25
BJ22
BH14
BH12
BH9
BH8
BH5
BH4
BH1
BG38
BG13
BG12
BF33
BF12
BE29
BE6
BD9
BC34
BC12
BB12
C9
U1L
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
*SK
SKYLAKE_HALO
BGA1440
L_H_BGA_BGA
12 OF 14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
C25
C23
C21
C19
C15
C11
C8
C5
BM29
BM25
BM18
BM11
BM8
BM7
BM5
BM3
BL38
BL35
BL13
BL6
BK25
BK22
BK13
BK6
BJ30
BJ29
BJ15
BJ12
BH11
BH10
BH7
BH6
BH3
BH2
BG37
BG14
BG6
BF34
BF6
BE30
BE5
BE4
BE3
BE2
BE1
BD38
BD37
BD12
BD11
BD10
BD8
BD7
BD6
BC33
BC14
BC13
BC6
BB30
BB29
BB6
BB5
C2
BT36
BT35
BT4
BT3
BR38
BA38
BA37
BA12
BA11
BA10
AY34
AY33
AY14
AY12
AW30
AW29
AW12
AW5
AW4
AW3
AW2
AW1
AV38
AV37
AU34
AU33
AU12
AU11
AU10
AT30
AT29
AR38
AR37
AR14
AR13
AP34
AP33
AP12
AP11
AP10
AN30
AN29
AN12
AM38
AM37
AM12
AM5
AM4
AM3
AM2
AM1
AL34
AL33
AL14
AL12
AL10
BB4
BB3
BB2
BB1
BA9
BA8
BA7
BA6
AU9
AU8
AU7
AU6
AT6
AR5
AR4
AR3
AR2
AR1
AP9
AP8
AN6
AN5
AL9
AL8
AL7
AL4
B9
U1M
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
*SK
SKYLAKE_HALO
BGA1440
L_H_BGA_BGA
13 OF 14
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
NCTFVSS
AK30
AK29
AK4
AJ38
AJ37
AJ6
AJ5
AJ4
AJ3
AJ2
AJ1
AH34
AH33
AH12
AH6
AG30
AG29
AG11
AG10
AG8
AG7
AG6
AF14
AF13
AF12
AF4
AF3
AF2
AF1
AE34
AE33
AE6
AD30
AD29
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AC38
AC37
AC12
AC6
AC5
AC4
AC3
AC2
AC1
AB34
AB33
AB6
AA30
AA29
AA12
A30
A28
A26
A24
A22
A20
A18
A16
A14
A12
A10
A9
A6
B37
B3
A34
A4
A3
08
SKL-H Processor (RESERVED, CFG)
U1K
TP8
TP12
TP14
TP9
TP17
TP10
PCH_2_CPU_TRIG15
CPU_2_PCH_TRIG_R
CPU_2_PCH_TRIG_R CPU_2_PCH_TRIG
D1
RSVD_TP
E1
RSVD_TP
E3
RSVD_TP
E2
RSVD_TP
BR1
RSVD_TP
BT2
RSVD_TP
BN35
RSVD
J24
RSVD
H24
RSVD
BN33
RSVD
BL34
RSVD
N29
RSVD
R14
RSVD
AE29
RSVD
AA14
RSVD
A36
RSVD
A37
RSVD
H23
PROC_TRIGIN
J23
PROC_TRIGOUT
F30
RSVD
E30
RSVD
B30
RSVD
C30
RSVD
G3
RSVD
J3
RSVD
BR35
RSVD
BR31
RSVD
BH30
RSVD
*SK
L_H_BGA_BGA
R59 30_4
Processor Strapping
The CFG signals have a default value of '1' if not ter
0 Enable; SET DFX ENABLED BIT IN DEBUG
1 , Disable;
CFG32,16
CFG22,16
CFG42,16
CFG52,16
CFG62,16
CFG102,16
CFG122,16
CFG132,16
CFG3
CFG2
CFG4
CFG5
CFG6
CFG10
CFG12
CFG13
SKYLAKE_HALO
BGA1440
R60 *1K_4
R61 *1K_4
R62 1K_4
R63 *1K_4
R64 *1K_4
R65 *1K_4
R66 *1K_4
R67 *1K_4
11 OF 14
minated on the board.
BM33
RSVD_TP
BL33
RSVD_TP
BJ14
RSVD_TP
BJ13
RSVD_TP
BK28
RSVD
BJ28
RSVD
BJ18
VSS
BJ16
RSVD_TP
BK16
RSVD_TP
BK24
RSVD_TP
BJ24
RSVD_TP
BK21
RSVD
BJ21
RSVD
BT17
RSVD
BR17
RSVD
BK18
VSS
BJ34
RSVD_TP
BJ33
RSVD_TP
G13
RSVD
AJ8
RSVD
BL31
RSVD
B2
NCTF
B38
NCTF
BP1
NCTF
BR2
NCTF
C1
NCTF
C38
NCTF
CPU_2_PCH_TRIG 15
TP11
TP13
TP15
TP16
TP18
TP19
TP20
TP21
TP22
TP23
U1F
SKYLAKE_HALO
BGA1440
Y38
VSS
Y37
VSS
Y14
VSS
Y13
VSS
Y11
VSS
Y10
VSS
Y9
D D
C C
B B
W34
W33
W12
U38
U37
R29
R12
N34
N33
N12
N10
M14
M13
M12
VSS
Y8
VSS
Y7
VSS
VSS
VSS
VSS
W5
VSS
W4
VSS
W3
VSS
W2
VSS
W1
VSS
V30
VSS
V29
VSS
V12
VSS
V6
VSS
VSS
VSS
U6
VSS
T34
VSS
T33
VSS
T14
VSS
T13
VSS
T12
VSS
T11
VSS
T10
VSS
T9
VSS
T8
VSS
T7
VSS
T5
VSS
T4
VSS
T3
VSS
T2
VSS
T1
VSS
R30
VSS
VSS
VSS
P38
VSS
P37
VSS
P12
VSS
P6
VSS
VSS
VSS
VSS
N11
VSS
VSS
N9
VSS
N8
VSS
N7
VSS
N6
VSS
N5
VSS
N4
VSS
N3
VSS
N2
VSS
N1
VSS
VSS
VSS
VSS
M6
VSS
L34
VSS
L33
VSS
L30
VSS
L29
VSS
K38
VSS
K11
VSS
K10
VSS
K9
VSS
K8
VSS
K7
VSS
K5
VSS
K4
VSS
K3
VSS
K2
VSS
6 OF 14
*SK
L_H_BGA_BGA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NCTFVSS
K1
J36
J33
J32
J25
J22
J18
J10
J7
J4
H35
H32
H25
H22
H18
H12
H11
G28
G26
G24
G23
G22
G20
G18
G16
G14
G12
G10
G9
G8
G6
G5
G4
F36
F31
F29
F27
F25
F23
F21
F19
F17
F15
F13
F11
F9
F8
F5
F4
F3
F2
E38
E35
E34
E9
E4
D33
D30
D28
D26
D24
D22
D20
D18
D16
D14
D12
D10
D9
D6
D3
C37
C31
C29
C27
D38
A A
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
08 -- SKL 7/7 (GND)
08 -- SKL 7/7 (GND)
08 -- SKL 7/7 (GND)
1
8 51Monday, November 30, 2015
8 51Monday, November 30, 2015
8 51Monday, November 30, 2015
1A
1A
1A
5
4
3
2
1
SPT-H_PCH
USB
SPT-H_PCH
DMI
USB 2.0
PCIe/USB 3
2 OF 12
LPC/eSPI
GPP_A5/LFRAME#/ESPI_CS0#
GPP_A6/SERIRQ/ESPI_CS1#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
SATA
6 OF 12
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14
GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OCB_4
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
GPP_F18/USB2_OCB_7
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
GPD7/RSVD
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A10/CLKOUT_LPC1
GPP_G19/SMI#
GPP_G18/NMI#
GPP_E6/DEVSLP2
GPP_E5/DEVSLP1
GPP_E4/DEVSLP0
GPP_F9/DEVSLP7
GPP_F8/DEVSLP6
GPP_F7/DEVSLP5
GPP_F6/DEVSLP4
GPP_F5/DEVSLP3
AF5
AG7
AD5
AD7
AG8
AG10
AE1
AE2
AC2
AC3
AF2
AF3
AB3
AB2
AL8
AL7
AA1
AA2
AJ8
AJ7
W2
W3
AD3
AD2
V2
V1
AJ11
AJ13
DIS only
AD43
DGPU_HOLD_RST#
AD42
GPU_EVENT#
AD39
DGPU_PWR_EN
AC44
DGPU_PWROK
Y43
USB_OC4#
Y41
USB_OC5#
W44
USB_OC6#
W43
PCH_AOCS#
AG3
USB2_COMP
AD10
AB13
AG2
BD14
AT22
AV22
AT19
BD16
BE16
BA17
SERIRQ
AW17
BOARD_ID8
AT17
BC18
BOARD_ID7
BC17
CLK_PCI_EC_R
AV19
CLK_PCI_LPC_R
M45
N43
AE45
AG43
AG42
AB39
AB36
AB43
AB42
AB41
R80 113/F_4
R405
*1K_4
GC6_FB_EN
DEVSLP0
For SSD
USBP1- 30
USBP1+ 30
USBP2- 30
USBP2+ 30
USBP3- 30
USBP3+ 30
USBP4- 26
USBP4+ 26
USBP5- 34
USBP5+ 34
USBP7- 33
USBP7+ 33
USBP8- 26
USBP8+ 26
USB2.0 Combo USB3.0 MB-1
USB2.0 Combo USB3.0 Small Board
USB2.0 Combo USB2.0 Small Board
HD / IR CAM
1015 Add USB2.0 PORT5
IR CAM
WLAN
T
ouch Screen
GFX Present
DGPU_HOLD_RST# 12,19
GPU_EVENT# 12,22
DGPU_PWR_EN 12,51
DGPU_PWROK 12,23,37,50
If OTG is not implemented on the platform,
R406
then USB2_ID and USB2_VBUSSENSE should both
*1K_4
be connected to ground.
LAD0 33,34,37
LAD1 33,34,37
LAD2 33,34,37
LAD3 33,34,37
LFRAME# 33,34,37
BOARD_ID8 13
EC_RCIN# 37
BOARD_ID7 13
SIO_EXT_SMI# 37
GC6_FB_EN 22
DEVSLP0 33
R81 8.2K_4
R82 22/F_4
R83 22/F_4
R84 *22/F_4
SERIRQ 34,37
+3V
Ra
R
EC1 18P/50V_4
EC2 18P/50V_4
EC3
c
*18P/50V_4
CLK_24M_KBC 37
CLK_24M_DEBUG 33
CLK_PCI_TPM 34
BOM : HW TPM need Ra,Rc stuff
BOM:UMA only
(near PCH)
EMI
EMI(near PCH)
DGPU_HOLD_RST#
DGPU_PWR_EN
DGPU_PWROK
SIO_EXT_SMI#
EC_RCIN#
USB_OC4#
USB_OC5#
USB_OC6#
PCH_AOCS#
R78 *100K_4
SG(Default)
Stuff
NC
Ra
Rb
GPU_EVENT#
UMA
Rb
Ra
PORT1
P
PORT3
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9-14
PORT1
PORT2
PORT3
PORT4
R68 *10K_4
R69 10K_4
R70 10K_4
R71 10K_4
R72 10K_4
R74 10K_4
R75 10K_4
R76 10K_4
R77 10K_4
RaRb
R79 10K_4
BOM:DIS only
USB 2.0 PORT
ORT2
USB2 MB
USB2 DB
USB2 DB
HD/IR CAM Option
IR CAM Option
NC
WLAN
TOUCH
NC
USB 3.0 PORT
USB3 MB
USB3 DB
USB3 DB
3D CAMERA
+3V_DEEP_SUS10,12,13,14,16,18
09
+3V
+3V_DEEP_SUS
+3V
U2B
DMI_TXN03
DMI_TXP03
DMI_RXN03
DMI_RXP03
DMI_TXN13
DMI_TXP13
DMI_RXN13
DMI_RXP13
D D
PCIE_RXN5_CARD36
PCIE_RXP5_CARD36
C C
Cardreader
WLAN
AN
L
PCIE_TXN5_CARD36
PCIE_TXP5_CARD36
PCIE_RXN6_WLAN33
PCIE_RXP6_WLAN33
PCIE_TXN6_WLAN33
PCIE_TXP6_WLAN33
PCIE_RXN7_LAN35
PCIE_RXP7_LAN35
PCIE_TXN7_LAN35
PCIE_TXP7_LAN35
DMI_TXN23
DMI_TXP23
DMI_RXN23
DMI_RXP23
DMI_TXN33
DMI_TXP33
DMI_RXN33
DMI_RXP33
R73 100/F_4
C207 0.1U/16V_4
C208 0.1U/16V_4
C209 0.1U/16V_4
C210 0.1U/16V_4
C211 0.1U/16V_4
C212 0.1U/16V_4
PCIECOMP_N
PCIECOMP_P
TP24
TP25
TP26
TP27
PCIE_TXN5_CARD_C
PCIE_TXP5_CARD_C
PCIE_TXN6_WLAN_C
PCIE_TXP6_WLAN_C
PCIE_TXN7_LAN_C
PCIE_TXP7_LAN_C
TP28
0929 Correct port from 9 to 7
B B
USB3.0 (M/B-1)
USB3.0 (Small Board)
0925 Delete one UBS3.0 Small Board
USB3.0 (3D Camera)
A A
USB30_TX1-30
USB30_TX1+30
USB30_RX1-30
USB30_RX1+30
USB30_TX2-30
USB30_TX2+30
USB30_RX2-30
USB30_RX2+30
TP29
TP30
USB30_TX4+31
USB30_TX4-31
USB30_RX4+31
USB30_RX4-31
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SP
T_PCH_H
U2F
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
B12
USB3_2_TXN/SSIC_1_TXN
A12
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP/SSIC_2_TXP
C13
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
B10
USB3_3_RXN/SSIC_2_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
SP
T_PCH_H
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet
09 -- PCH 1/7 (DMI/USB/PCIE)
09 -- PCH 1/7 (DMI/USB/PCIE)
09 -- PCH 1/7 (DMI/USB/PCIE)
1
9 51Monday, November 30, 2015
9 51Monday, November 30, 2015
9 51Monday, November 30, 2015
1A
1A
1A
of
HDA Bus(CLG)
5
4
3
2
1
DDR4
+1.2VSUS
R90
470/F_4
R109
51_4
R116
*100/F_4
10 51Monday, November 30, 2015
10 51Monday, November 30, 2015
10 51Monday, November 30, 2015
10
+3V
JTAG_TMS_PCH
JTAG_TDI_PCH
JTAG_TDO_PCH
JTAG_TCK_PCH
R117
*51_4
DSWROK_EC_R
of
1A
1A
1A
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC
R87
*1M_4
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
SMB_PCH_CLK
SMB_PCH_DAT
RF_OFF_PCH
SUSWARN#
SUSACK#
ACZ_SDOUT
RSMRST#
EC_PWROK
BIT_CLK_AUDIO
R85 33_4
R86 33_4
R88 33_4
R89 33_4
R92 2.2K_4
R94 2.2K_4
R95 2.2K_4
R96 2.2K_4
R97 2.2K_4
R98 2.2K_4
R101 10K_4
R103 *10K_4
R104 *10K_4
R110 1K_4
C215 *220P/50V_4
C216 *220P/50V_4
C214 *33P/50V_4
BIT_CLK_AUDIO28
ACZ_RST#_AUDIO28
ACZ_SDOUT_AUDIO28
ACZ_SYNC_AUDIO28
D D
+3V_DEEP_SUS
GPIO33_EC37
C C
EMI
Q1
D1
b
R337
0_4
1U/6.3V_4
4 3
1
*2N7002DW
Q4
4 3
1
2N7002KDW
+BAT_RTC+3V_RTC_2
RaR
MBCLK25,18,37
MBDATA25,18,37
R122 4.7K_4
B B
+3V
SMB_RUN_DAT16,17,18,38
R123 4.7K_4
+3V
SMB_RUN_CLK16,17,18,38
RTC Circuitry(RTC)
Main BAT -->Ra
Coin BAT -->Rb (default)
Modify 0922
+3V_RTC_0
A A
+3V_RTC_0
12
RTC Power trace width 20mils.
+3VPCU
R138
1K_4
CN2
BAT_CONN
DFHS02FS027
bat-ap-aaa-bat-054-k01-2p-smt
5
+3V_RTC_1
BAT54CW-7-F C219
Reserve for EMI
C213
*10P/50V_4
AUD_AZACPU_SDO_R3
AUD_AZACPU_SDI3
AUD_AZACPU_SCLK3
DRAMRST_CNTRL_PCH12
+3V
5
SMB_ME1_CLK
2
6
SMB_ME1_DAT
+3V
5
SMB_PCH_DAT
2
6
SMB_PCH_CLK
ACZ_SDIN028
ACZ_SDOUT12
R91 30_4
R93 30_4
+3V_DEEP_SUS
ACZ_SDOUT
EC_PWROK16,37
RSMRST#37 AC_PRESENT_EC 37
SML0ALERT#12
SML1ALERT#_R12
TP35
CPU heat pipe local thermal sensor
DDR thermal sensor
RTD2136
EC
Touch Pad
XDP
DDR3-L
Modify 0930 Change +3V_RTC to +BAT_RTC
J1
R336
*0_4
30mils
R131
20K/F_4
R135
20K/F_4
R139 *0_6
*SOLDERJUMPER-2
1 2
C217
1U/6.3V_4
C220
1U/6.3V_4
SRTC_RST#RTC_RST#
RTC_RST#
SRTC_RST#
4
ACZ_BCLK
ACZ_RST#
ACZ_SDOUT
ACZ_SYNC
AUD_AZACPU_SDO
AUD_AZACPU_SDI
AUD_AZACPU_SCLK_R
R102
*4.7K_4
RTC_RST#
SRTC_RST#
RSMRST#
DSWROK_EC_R
SML0ALERT#
SMB_PCH_CLK
SMB_PCH_DAT
DRAMRST_CNTRL_PCH
SMB_ME0_CLK
SMB_ME0_DAT
SMB_ME1_CLK
SMB_ME1_DAT
3
2
Q6
2N7002K
1
SML1ALERT#_R
RTC_RST#
R136
10K_4
U2D
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/I2S0_SCLK
AN42
GPP_D7/I2S0_RXD
AM43
GPP_D6/I2S0_TXD
AJ33
GPP_D5/I2S0_SFRM
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19/DMIC_CLK0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17/DMIC_CLK1
BC10
RTCRST#
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PW ROK
BB41
GPP_C2/SMBALERT#
AW44
GPP_C0/SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5/SML0ALERT#
AY44
GPP_C3/SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B23/SML1ALERT#/PCHHOT#
AW42
GPP_C6/SML1CLK
AW45
GPP_C7/SML1DATA
SPT
_PCH_H
RTC_RST# 16
EC_RTC_RST 37
AUDIO
System PWR_OK(CLG)
SPT-H_PCH
GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
GPP_G17/ADR_COMPLETE
GPP_A13/SUSW ARN#/SUSPW RDNACK
SMBUS
JTAG
4 OF 12
R118 0_4
EC_PWROKSYS_PWROK
For HWPG Sequence
+5VS5
+1.0V
R130
15K/F_4
+1.0V_PWRGD_G1
C218
0.1U/16V_4
3
R137
100K_4
+1.0V_PWRGD_G2
2
1 3
GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B1
GPP_B0
GPP_B11
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3#
GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW #
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
PROCPWRGD
ITP_PMODE
JTAGX
JTAG_TMS
JTAG_TDO
JTAG_TDI
JTAG_TCK
R120
10K/F_4
R128
100K_4
Q7
2N7002K
METR3904-G
BB17
AW22
AR15
AV13
BC14
BD23
AL27
AR27
N44
AN24
AY1
BC13
BC15
AV15
BC26
AW15
BD15
BA13
AN15
BD13
BB19
BD19
BD11
BB15
BB13
AT13
AW1
BD26
AM3
AT2
AR3
AR2
AP1
AP2
AN3
2
Q5
CLKRUN#
LAN_DISABLE
DDR4_DRAMRST#
GPP_B2
SYS_PWROK
PCIE_WAKE#
PCH_SLP_S0_N
RF_OFF_PCH
SUSACK#
SUSWARN#
LAN_WAKE#
AC_PRESENT_EC
SLP_SUS#_EC
DNBSWON#
SYS_RESET#
ACZ_SPKR
PROCPWRGD
ITP_PMODE
JTAGX_PCH
JTAG_TMS_PCH
JTAG_TDO_PCH
JTAG_TDI_PCH
JTAG_TCK_PCH
+3VS5
R126
*10K_4
3
1
+3V_DEEP_SUS9,12,13,14,16,18
HWPG
R133
100K_4
2
TP31
TP32
TP33
R105 0_4
R106 0_4
R107 *0_4
R113 1K_4
HWPG 2,16,37,41,42,47,48
SUSWARN#
+1.0V_DEEP_SUS
CLKRUN# 37
DDR4_DRAMRST# 17,18
SYS_PWROK 16
PCIE_WAKE# 33,35,36
SLP_A# 16
PCH_SLP_S0_N 16
SUSB# 16,37
SUSC# 16,37
SLP_S5# 16
RF_OFF_PCH 33
SUSACK#_EC 37
SUSWARN#_EC 37
SLP_SUS#_EC 37
DNBSWON# 37
SYS_RESET# 16
ACZ_SPKR 12,28
PROCPWRGD 2
JTAGX_PCH 16
JTAG_TMS_PCH 16
JTAG_TDO_PCH 16
JTAG_TDI_PCH 16
JTAG_TCK_PCH 16
DDR4_DRAMRST#
SYS_RESET#
GPP_B2
+1.0V
R111
*210/F_4
R115
*100/F_4
For DS3 Sequence
For DS3 -->Ra
Non-DS3 -->Rb
RSMRST#
R119 *0_4
DSWROK_EC37
+3VS5
+3V
RSMRST#
DSWROK_EC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
R121 0_4
Add LAN_WAKE#(check)
R124 *10K_4
R125 1K_4
R127 *10K_4
R129 8.2K/F_4
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
10 -- PCH 2/7 (HDA/SMBUS)
10 -- PCH 2/7 (HDA/SMBUS)
10 -- PCH 2/7 (HDA/SMBUS)
R99 10K_4
R100 10K_4
R108
*210/F_4
R114
*100/F_4
Rb
Ra
LAN_WAKE#
PCIE_WAKE#
AC_PRESENT_EC
CLKRUN#
R132 10K_4
R134 100K_4
1
5
HSIO MUX PORT
PCIE1-4 NC
PCIE5
D D
PCIE6
PCIE7
PCIE8
P
CIE9/SATA0A
PCIE10
PCIE11
Cardreader
Wlan
Lan
NC
SSD PCIE * 4
SSD PCIE x4 LANE
PCIE_SATA_TXP1133
PCIE_SATA_TXN1133
PCIE_SATA_RXP1133
PCIE_SATA_RXN1133
PCIE12
PCIE13
PCIE14
PCIE15
PCIE16
PCIE17
PCIE18-20
C C
The 24 MHz (50 Ohm ESR) XTAL used for Skylake-H
n
eeds to be replaced by 38.4 MHz (30 Ohm ESR) XTAL for Cannonlake-H.
1123 Change Y1 P/N from 16pF to 20pF
B B
Crystal Components with Surrounding 10 mil Wide GND Shield Trace
Break Out:4-10 mil Wide GND Shield Trace
NC
NC
HDD
C
N
NC
NC
TP41
C221 27P/50V_4
24MHZ +-20PPM
C222 27P/50V_4
TP42
Modify 1005 Change HDD SATA Port2 to port1B
SATA_TXN1B32
SATA_TXP1B32
SATA_RXN1B32
SATA_RXP1B32
HDD1 (SATA1B 6Gb/s)
PCIE_SATA_TXP1233
SSD PCIE x4 LANE
1
2
R144
1M_4
Y1
4
3
XTAL24_IN
XTAL24_OUT
+1.0V_DEEP_SUS
PCIE_SATA_TXN1233
PCIE_SATA_RXP1233
PCIE_SATA_RXN1233
GPP_A1630
CLK_DPLL_NSCCLKP2
CLK_DPLL_NSCCLKN2 CPU_PCI_BCLKN 2
CLK_CPU_BCLKP2
R146
CLK_CPU_BCLKN2
2.7K/F_4
PCIE_CLKREQ_CR#36
PCIE_CLKREQ_WLAN#33
PCIE_CLKREQ_LAN#35 CLK_VGA_N 19
PCIE_CLKREQ_SSD#33
RTC Clock 32.768KHz
C223 18P/50V_4
Y2
32.768KHZ
C224 18P/50V_4
A A
32.768KHz
BG332768453 CRYSTAL SMD 32.768KHZ(+-20PPM,12.5PF)
footprint: xtl-3_2X1_5-2_5-0_8h
5
RTC_X1
R162
10M_4
2 1
RTC_X2
TP43
TP8502
TP39
TP40
TP8504
TP8505
TP8506
TP8507
4
GPP_A16
XTAL24_OUT
XTAL24_IN
XCLK_RBIAS
RTC_X1
RTC_X2
PCIE_CLKREQ0#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ5#
PCIE_CLKREQ6#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#
4
U2C
AV2
CL_CLK
AV3
CL_DATA
AW2
CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
U43
GPP_G0/FAN_TACH_0
U42
GPP_G1/FAN_TACH_1
U41
GPP_G2/FAN_TACH_2
M44
GPP_G3/FAN_TACH_3
U36
GPP_G4/FAN_TACH_4
P44
GPP_G5/FAN_TACH_5
T45
GPP_G6/FAN_TACH_6
T44
GPP_G7/FAN_TACH_7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
AB33
GPP_F10/SCLOCK
AB35
GPP_F11/SLOAD
AA44
GPP_F13/SDATAOUT0
AA45
GPP_F12/SDATAOUT1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP
G35
PCIE13_RXN/SATA0B_RXN
E35
PCIE13_RXP/SATA0B_RXP
A35
PCIE12_TXP
B35
PCIE12_TXN
H33
PCIE12_RXP
G33
PCIE12_RXN
J45
PCIE20_TXP/SATA7_TXP
K44
PCIE20_TXN/SATA7_TXN
N38
PCIE20_RXP/SATA7_RXP
N39
PCIE20_RXN/SATA7_RXN
H44
PCIE19_TXP/SATA6_TXP
H43
PCIE19_TXN/SATA6_TXN
L39
PCIE19_RXP/SATA6_RXP
L37
PCIE19_RXN/SATA6_RXN
SP
T_PCH_H
U2G
AR17
GPP_A16/CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKREQ0#
AW24
GPP_B6/SRCCLKREQ1#
AT24
GPP_B7/SRCCLKREQ2#
BD25
GPP_B8/SRCCLKREQ3#
BB24
GPP_B9/SRCCLKREQ4#
BE25
GPP_B10/SRCCLKREQ5#
AT33
GPP_H0/SRCCLKREQ6#
AR31
GPP_H1/SRCCLKREQ7#
BD32
GPP_H2/SRCCLKREQ8#
BC32
GPP_H3/SRCCLKREQ9#
BB31
GPP_H4/SRCCLKREQ10#
BC33
GPP_H5/SRCCLKREQ11#
BA33
GPP_H6/SRCCLKREQ12#
AW33
GPP_H7/SRCCLKREQ13#
BB33
GPP_H8/SRCCLKREQ14#
BD33
GPP_H9/SRCCLKREQ15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SP
T_PCH_H
CLINK
SPT-H_PCH
FAN
SPT-H_PCH
PCIe/SATA
GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7
HOST
3 OF 12
CLKOUT_CPUPCIBCLK
CLKOUT_CPUPCIBCLK_P
7 OF 12
3
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP
PCIE9_TXN/SATA0A_TXN
PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP
PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATALED#
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
PLTRST_PROC#
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
3
THERMTRIP#
PECI
PM_SYNC
PM_DOWN
L1
L2
J1
J2
N7
N8
L7
L5
D3
F2
E5
G4
D5
E6
D8
D7
R8
R7
U5
U7
W10
W11
N3
N2
P3
P2
R3
R4
G31
H31
C31
B31
G29
E29
C32
B32
F41
E41
B39
A39
D43
E42
A41
A40
H42
H40
E45
F45
K37
G37
G45
G44
AD44
AG36
AG35
AG39
AD35
GPIO35:
AD31
SSD SATA IF => High
AD38
AC43
SSD PCIE IF => Low
AB44
W36
W35
W42
AJ3
PCH_THRMTRIP#
AL3
AJ4
PM_SYNC_R
AK2
CPU_PLTRST#
AH2
H_PM_DOWN
CK_XDP_N_R
R147 *0_4
CK_XDP_P_R
R145 *0_4
CPU_PCI_BCLKP 2
TP8514
CLK_PCIE_CRN 36
CLK_PCIE_CRP 36
CLK_PCIE_WLANN 33
CLK_PCIE_WLANP 33
CLK_PCIE_LANN 35
CLK_PCIE_LANP 35
CLK_VGA_P 19PCIE_CLKREQ_VGA#19
CLK_PCIE_SSDN 33
CLK_PCIE_SSDP 33
TP8508
TP8509
TP8510
TP8511
R140 10K_4
TP38
R141 30_4
R142 0_4
CK_XDP_N
CK_XDP_P
TP37
+3V
Card Reader
WLAN
LAN
VGA
SD
S
2
PCIE_SATA_RXN9 33
PCIE_SATA_RXP9 33
PCIE_SATA_TXN9 33
PCIE_SATA_TXP9 33
PCIE_SATA_RXN10 33
PCIE_SATA_RXP10 33
PCIE_SATA_TXN10 33
PCIE_SATA_TXP10 33
SATA_LED# 32
GPIO35 33
For SSD Det (SATA0A)
PCH_DPST_PWM 26
PCH_LVDS_BLON 26
PCH_DISP_ON 26
PM_THRMTRIP# 2,5,37
PM_SYNC 2
CPU_PLTRST#R 2
H_PM_DOWN 2
CK_XDP_N 16
CK_XDP_P 16
2
SSD PCIE x4 LANE
SSD PCIE x4 LANE
ODD (SATA2 3.0Gb/s)
HDD2 (SATA3 6Gb/s)
R143
*10K_4
BOM:DIS only
BOM:SSD only
PCH_PECI 2
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_CR#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ0#
PCIE_CLKREQ_SSD#
PCIE_CLKREQ6#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#
1
11
+3V
R8515
10K_4
GPIO35
1002 add
BOM:SSD only
+3V
R148 10K_4
R149 10K_4
R151 10K_4
R152 10K_4
R153 *10K_4
R154 10K_4
R155 *10K_4
R156 *10K_4
R157 *10K_4
R158 *10K_4
R159 *10K_4
R160 *10K_4
R161 *10K_4
R163 *10K_4
R164 *10K_4
R165 *10K_4
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
11 -- PCH 3/7 (SATA/LPC/CLK)
11 -- PCH 3/7 (SATA/LPC/CLK)
11 -- PCH 3/7 (SATA/LPC/CLK)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
of
11 51Monday, November 30, 2015
11 51Monday, November 30, 2015
11 51Monday, November 30, 2015
1A
1A
1A
5
U2A
TP44
D D
PCI_PME#
PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK
PCH_SPI_IO2
PCH_SPI_IO3
BD17
AG15
AG14
AF17
AE17
AR19
AN17
BB29
BE30
BD31
BC31
AW31
BC29
BD30
AT31
AN36
AL39
AN41
AN38
AH43
AG44
GPP_A11/PME#
RSVD
RSVD
RSVD
RSVD
TP2
TP1
SPI0_MOSI
SPI0_MISO
SPI0_CS0#
SPI0_CLK
SPI0_CS1#
SPI0_IO2
SPI0_IO3
SPI0_CS2#
GPP_D1/SPI1_CLK
GPP_D0/SPI1_CS#
GPP_D3/SPI1_MOSI
GPP_D2/SPI1_MISO
GPP_D22/SPI1_IO3
GPP_D21/SPI1_IO2
SPT
_PCH_H
SPT-H_PCH
1 OF 12
GPP_B13/PLTRST#
GPP_G16/GSXCLK
GPP_G12/GSXDOUT
GPP_G13/GSXSLOAD
GPP_G14/GSXDIN
GPP_G15/GSXSRESET#
GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
INTRUDER#
PCH SPI ROM(CLG)
TP47
TP48
TP49
TP50
TP51
TP52
C C
Place to TOP
PCH_SPI_CS0#
PCH_SPI1_CLK
C227 1U/6.3V_4
PCH_SPI_IO2
B B
REBOOT IF SAMPLED HIGH
HIGH:TOP SWAP ENABLED (CRB)
LOW: Disable "No Reboot" mode. (Default)
A A
BBS_BIT113 DRAMRST_CNTRL_PCH10
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
BIOS_WP#
HOLD#
PCH_SPI_CS0#_R37
PCH_SPI1_CLK_R37
PCH_SPI1_SI_R37
PCH_SPI1_SO_R37
R201 15/F_4
R202 15/F_4
R203 15/F_4
R205 15/F_4
+3VSPI
R211 1K_4
R212 15/F_4
Vender P/N
EON
Winbond
gaDevice
Gi
Socket
Size
AKE3EZN0Q01 (EN25QH64-104HIP)8MB
8MB
AKE3EFP0N07 (W25Q64FVSSIQ)
8MB
AKE3EGN0Q01 (GD25B64BSIGR)
DFHS08FS023
+3V +3V_DEEP_SUS
5
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_R
PCH_SPI1_SO_R
PCH_SPI_CS0#_R
PCH_SPI1_CLK_R
PCH_SPI1_SI_RPCH_SPI1_SI
PCH_SPI1_SO_RPCH_SPI1_SO
C225
22P/50V_4
BIOS_WP#
R191
4.7K_4
R195
*20K/F_4
+3VS5
+3V_DEEP_SUS
U5
1
CE#
6
SCK
5
SI
2
SO
3
WP#
W25Q64FVSSIQ
AKE3EFP0N07
11
23 Change U5 P/N from Socket to ROM
VDD
HOLD#
VSS
8
+3VSPI
7
HOLD#
4
ESPI/LPC SELECT STRAPNO
HIGH:eSPI Is selected for EC.
LOW: LPC Is selected for EC. (Default)
DRAMRST_CNTRL_PCHBBS_BIT1
4
BB27
P43
R39
R36
R42
R41
AF41
AE44
BC23
BD24
BC36
BE34
BD39
BB36
BA35
BC35
BD35
AW35
BD34
BE11
R197 *0_4
R200 0_4
R204 1K_4
R206 15/F_4
PCH_SPI_IO3
4
PLTRST#
PLTRST#(CLG)
R167
100K_4
BOM:3D CAM only
3D_FW_GPIO_R
SML4ALERT#
SMB_ME4_DAT
SMB_ME4_CLK
SML3ALERT#
SMB_ME3_DAT
SMB_ME3_CLK
SML2ALERT#
SMB_ME2_DAT
SMB_ME2_CLK
SM_INTRUDER#
R173 0_4
TP45
TP46
Ra
R179 *1M_4
Rb
R335 1M_4
support HW TPM -->Ra
support SW TPM -->Rb (default)
+BAT_RTC
+3V_RTC_2
Modify 0930 Change +3V_RTC to +BAT_RTC
C226
0.1U/16V_4
TOP SWAP OVERRIDE STRAP
HIGH:TOP SWAP ENABLED (CRB)
LOW:TOP SWAP DISABLED(DEFAULT)
ACZ_SPKR10,28
TLS CONFIDENTIALITY ENABLED
HIGH:T Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). (CRB)
LOW: Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)
R192
*4.7K_4
SML0ALERT#
R196
4.7K_4
SML0ALERT#10
3
PLTRST# 2,16,19,33,34,35,36,37
3D_FW_GPIO 31
+3V
R183
*150K/F_4
ACZ_SPKR
R185
*20K/F_4
+3V_DEEP_SUS
R207
4.7K_4
R213
*20K/F_4
3
+3V_DEEP_SUS
SMB_ME4_CLK
SMB_ME4_DAT
SMB_ME3_CLK
SMB_ME3_DAT
SMB_ME2_CLK
SMB_ME2_DAT
R169 499/F_4
R170 499/F_4
R172 499/F_4
R174 499/F_4
R175 499/F_4
R177 499/F_4
PCH Strap Pin
BOOT SELECT STRAP
HIGH:LPC
LOW: SPI. (Default)
S_GPIO13
TLS CONFIDENTIALITY ENABLED
HIGH: Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.(CRB)
LOW: security measures defined in the Flash
Descriptor. (Default)
ACZ_SDOUT10
RESERVED
This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
SML1ALERT#_R10
+3V_DEEP_SUS
S_GPIO
+3V_DEEP_SUS
ACZ_SDOUT
SML1ALERT#_R
R184
*4.7K_4
R186
*20K/F_4
R210
*1K_4
R215
1K_4
+3V_DEEP_SUS
R178
*4.7K_4
R181
*20K/F_4
2
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
+3V_DEEP_SUS
PCH_SPI1_SO
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
+3V_DEEP_SUS
PCH_SPI1_SI
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
+3V_DEEP_SUS
PCH_SPI_IO2
RESERVED
This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
2
+3V_DEEP_SUS
PCH_SPI_IO3
R166
*20K/F_4
R171
*4.7K_4
R208
*20K/F_4
R214
*4.7K_4
R187
*20K/F_4
R189
*4.7K_4
R193
*20K/F_4
R198
*100_4
1
ESPI FLASH SHARING MODE
HIGH:SLAVE ATTACEHD FLASH SHARING
LOW: 0: MASTER ATTACHED FLASH SHARING
This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.
SML2ALERT#
DFX TEST MODE QUALIFIER FOR OTHER DFX STRAP
WHEN SAMPLED LOW
PGDMON15
DFX TEST MODE
XTAL INPUT IS SINGLE ENDED IF
SAMPLED LOW ELSE DIFFERENTIAL
DGPU_PWROK9,23,37,50
PGDMON
DGPU_PWROK
RING OSCILLATOR BYPASS
DGPU_HOLD_RST#9,19
XTAL INPUT FREQUENCY[0]
GPU_EVENT#9,22
XTAL INPUT FREQUENCY[1]
DGPU_PWR_EN9,51
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
12 -- PCH 4/7 (GPIO/MISC)
12 -- PCH 4/7 (GPIO/MISC)
12 -- PCH 4/7 (GPIO/MISC)
1
12
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
DGPU_HOLD_RST#
GPU_EVENT#
DGPU_PWR_EN
12 51Monday, November 30, 2015
12 51Monday, November 30, 2015
12 51Monday, November 30, 2015
R168
*4.7K_4
R176
*20K/F_4
R180
*1K_4
R182
*1K_4
R188
*10K_4
R190
*10K_4
R194
100K_4
R199
*10K_4
R209
*10K_4
1A
1A
1A
5
4
3
2
+3V_DEEP_SUS9,10,12,14,16,18
1
13
3D CAMERA
D D
+3V_DEEP_SUS
R226
49.9K/F_4
UART2_TXD30
UART2_RXD30
C C
R227
49.9K/F_4
S_GPIO12
PCI_SERR#37
BBS_BIT112
PM_EXTTS#017,18
EXTTS#118
+3V_DEEP_SUS
SIO_EXT_SCI#37
ACCEL_INTA#34
R216 100_4 R218 10K_4
R8516 *0_4
1002 modify
R230 10K_4
TP53
TP8518
TP8515
S_GPIO
PCI_GNT3#
PCI_SERR#_R
BBS_BIT1
PM_EXTTS#0_R
SIO_EXT_SCI#
ACCEL_INTA#
UART2_TXD
UART2_RXD
U2K
AT29
GPP_B22/GSPI1_MOSI
AR29
GPP_B21/GSPI1_MISO
AV29
GPP_B20/GSPI1_CLK
BC27
GPP_B19/GSPI1_CS#
BD28
GPP_B18/GSPI0_MOSI
BD27
GPP_B17/GSPI0_MISO
AW27
GPP_B16/GSPI0_CLK
AR24
GPP_B15/GSPI0_CS#
AV44
GPP_C9/UART0_TXD
BA41
GPP_C8/UART0_RXD
AU44
GPP_C11/UART0_CTS#
AV43
GPP_C10/UART0_RTS#
AU41
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AT44
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43
GPP_C12/UART1_RXD/ISH_UART1_RXD
AN43
GPP_C23/UART2_CTS#
AN44
GPP_C22/UART2_RTS#
AR39
GPP_C21/UART2_TXD
AR45
GPP_C20/UART2_RXD
AR41
GPP_C19/I2C1_SCL
AR44
GPP_C18/I2C1_SDA
AR38
GPP_C17/I2C0_SCL
AT42
GPP_C16/I2C0_SDA
AM44
GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
AJ44
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL
SP
T_PCH_H
SPT-H_PCH
GPP_D9
GPP_D10
GPP_D11
GPP_D16/ISH_UART0_CTS#
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
GPP_D15/ISH_UART0_RTS#
11 OF 12
GPP_D12
GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1
GPP_A18/ISH_GP0
GPP_A17/ISH_GP7
Reserve EDP_HPD opposites circuit!
+3V
R243
*10K/F_4
ULT_EDP_HPD
R244
100K_4
B B
BOM: 3D CAM Un-Stuff
AL44
ACC_LED#
AL36
AL35
SPK_ID
AJ39
BT_OFF
AJ43
AL43
AK44
AK45
BC38
BB38
BD38
BE39
BC22
BOARD_ID6
BD18
BOARD_ID5
BE21
BOARD_ID4
BD22
BOARD_ID3
BD21
BOARD_ID2
BB22
BOARD_ID1
BC19
BOARD_ID0
Model
Definition
BOARD_ID[8:7]
01 3D SKU
R1 *0_4
on 3D SKU00
3D_CAM_EN3D_CAM_EN_PCH_R ACC_LED#
ACC_LED# 32
3D_CAM_EN 37,46
SPK_ID 28
BT_OFF 33
BT_OFF
SPK_ID
R8616 10K_4
1124 Add SPK_ID for Smart amp feature
PCI_SERR#
ACCEL_INTA#
+3V_DEEP_SUS
R222 *10K_4
R224 10K_4
R228 10K_4
R231 10K_4
R233 10K_4
R235 10K_4
R237 10K_4
R239 *10K_4
R241 10K_4
BOARD_ID[6:5]
ID6;ID5ID8;ID7
00 ReserveN
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
BOARD_ID7
BOARD_ID8
R223 10K_4
R225 *10K_4
R229 *10K_4
R232 *10K_4
R234 *10K_4
R236 *10K_4
R238 *10K_4
R240 10K_4
R242 *10K_4
Board ID [4:3]
BOARD_ID7 9
BOARD_ID8 9
BOARD_ID[2:1]
ID2;ID1ID4;ID3 ID0
00 Reserve 0
17"
01
17" SP10
R219 10K_4
R220 10K_4
R8550 10K_4
+3V_DEEP_SUS
+3V
BOARD_ID0
UMA15"00
1DIS
This signal has a weak internal pull-down.
0 = Port C and D is not detected.
1 = Port C and D is detected.
U2E
HDMI_HPD_CON27
A A
5
ULT_EDP_HPD26
HDMI_HPD_CON
ULT_EDP_HPD
AW4
GPP_I0/DDPB_HPD0
AY2
GPP_I1/DDPC_HPD1
AV4
GPP_I2/DDPD_HPD2
BA4
GPP_I3/DDPE_HPD3
BD7
GPP_I4/EDP_HPD
SPT_PCH_H
4
SPT-H_PCH
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
5 OF 12
GPP_F14
GPP_F23
GPP_F22
GPP_G23
GPP_G22
GPP_G21
GPP_G20
GPP_H23
3
BB3
11/03 modify for HDMI2.0
BD6
BA5
SDVO_CLK
BC4
SDVO_DATA
BE5
BE6
Y44
SKTOCC_N_R
V44
W39
L43
L44
U35
R35
BD36
SKTOCC_N_R 2
SDVO_CLK
SDVO_DATA
1/03 modify for HDMI2.0
1
2
R8557 *2.2K_4
R8558 2.2K_4
+3V
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
13 -- PCH 5/7 (GPIO)
13 -- PCH 5/7 (GPIO)
13 -- PCH 5/7 (GPIO)
1
1A
1A
1A
of
13 51Monday, November 30, 2015
13 51Monday, November 30, 2015
13 51Monday, November 30, 2015
5
4
3
2
1
14
+1.0V_DEEP_SUS
D D
+1.0V_DEEP_SUS +VCCDSW _1.0V
R246 *0_6
CHECK AUDIO POWER
+3V
C C
+V3.3DX_1.5DX_AD O
R264 0_4
+1.0V_DEEP_SUS
R259 0_6
R260 0_6
R261 0_6
R263 0_6
R265 0_6
R267 0_6
+V3.3DX_1.5DX_AD O+3VS5
R268 0_6
R269 0_6
R270 0_4
**Layout Note: +VCCPRIM_1P0 total :5.5167A**
C230
SLP_SUS_ON37,47,48
*1U/6.3V_4
+VCCCLK1
+VCCCLK3
+VCCCLK4
+VCCCLK2
+VCCCLK5
+VCCAMPHY_1P0
+VCCAMPHYPLL_1P 0
+VCCPCIE3PLL_1P0
+VCCAPLLEBB
+VCCPRIM_1.0V_AC 17
+VCCUSB2PLL _1P0
+VCCHDAP LL_1P0
+VCCDSW 3P3
+VCCDSW _1.0V
C229 1U/6.3V_4
R251 0_6
R253 0_6
R254 0_6
R255 0_6
C246 1U /6.3V_4
C235 *1U/6.3V_4
C237 1U/6.3V_4
C238 22U/6.3V_6
C243 1U/6.3V_4
C244 1U/6.3V_4
C245 1U/6.3V_4
C250 *1U/6.3V_4
45.4mA
34
23.7mA
23.7mA
32.7mA
24.8mA
24.8mA
95mA
533mA
10mA
10mA
75mA
.8mA
R271
100K_4
C253
*10P/50V_4
AA23
AA26
AA28
AC23
AC26
AC28
AE23
AE26
BA29
AC17
AN19
BA15
Y23
Y25
N17
R19
U20
V17
R17
K2
K3
U21
U23
U25
U26
V26
A43
B43
C44
C45
V28
AJ5
AL5
W15
U2H
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
DCPDSW_1P0
VCCCLK1
VCCCLK3
VCCCLK4
VCCCLK2
VCCCLK2
VCCCLK5
VCCCLK5
VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHY_1P0
VCCMPHYPLL_1P0
VCCMPHYPLL_1P0
VCCPCIE3PLL_1P0
VCCPCIE3PLL_1P0
VCCAPLLEBB_1P0
VCCPRIM_1P0
VCCUSB2PLL_1P0
VCCUSB2PLL_1P0
VCCHDAPLL_1P0
VCCHDA
VCCDSW_3P3
SPT
_PCH_H
C251
1U/6.3V_4
SPT-H_PCH
CORE
MPHY
USB
for DS3
U6
5
IN
4
IN
3
ON/OFF
IC(5P) AP2821KTR -G1
VCCGPIO
8 OF 12
VCCPRIM_1P0
VCCDSW_3P3
VCCPGPPBCH
VCCPGPPBCH
VCCPGPPEF
VCCPGPPEF
VCCPRIM_3P3
VCCPRIM_1P0
VCCRTCPRIM_3P3
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_3P3
VCCPRIM_3P3
VCCPRIM_3P3
1
OUT
2
GND
VCCPGPPA
VCCPGPPG
VCCATS
VCCRTC
DCPRTC
VCCSPI
VCCSPI
VCCSPI
VCCPGPPD
VCCPGPPD
VCCPGPPD
VCCPGPPD
+3V_DEEP_SUS+3VS5
0929 Change C231 from R245.2 to R245.1
90.8mA
AL22
BA24
BA31
BC42
BD40
AJ41
AL41
AD41
AN5
AD15
AD13
BA20
BA22
BA26
AJ20
AJ21
AJ23
AJ25
BE41
BE43
BE42
BC44
BA45
BC45
BB45
BD3
BE3
BE4
C252
0.1U/16V_4
+VCCPRIM_1.0V_AL22
403mA
+VCCDSW 3P3
87.9mA
+VCCPGPPA
272.62mA
+VCCPGPPBC H
+VCCPGPPEF
141.07mA
131.8mA
+VCCPGPPG
287.5mA
+VCCPRIM_3P3
+VCCPRIM_1.0V_AJ 20_AD15
6mA
6.
+VCCATS
2mA
+VCCRTC PRIM_3.3V
+VCCRTC
DCPRTC
**Layout Note: +VCCPRIM_1P0 total :5.5167A**
12.1mA
+VCCSPI
+VCCPGPPD
81mA
C234 *0.1U/10V_4
C236 0.1U/16V_4
C239 *0.1U/16V_4
C231 1U/6.3V_4
C228 *1U/6.3V_4
C232 *0.1U/10V_4
C233 *0.1U/10V_4
C247 *1U/6.3V_ 4
R245 0_6
R247 0_6
R248 0_6
R249 0_6
R250 0_6
R252 0_6
R256 0_6
R257 0_6
R258 0_6
R333 0_4
Rb
R334 *0_4
Ra
Main BAT -->Ra
in BAT -->Rb (default)
Co
Mo
dify 0930 Change +3V_RTC to +BAT_RTC
R262 0_6
R266 0_6
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC_2
+BAT_RTC
+1.0V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_DEEP_SUS
20mils
Modify 0922
Ch
ange PWR Rail form
+3C_RTC to +VCCRTC
C241
C240
0.1U/16V_4
1U/6.3V_4
+VCCATS
C242
1U/6.3V_4
+VCCRTC PRIM_3.3V+VCCRTC
1U/6.3V_4
C248
C249
0.1U/16V_4
B B
A A
5
4
3
2
+3V_DEEP_SUS9,10,12,13,16,18
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
14 -- PCH 6/7 (POWER)
14 -- PCH 6/7 (POWER)
14 -- PCH 6/7 (POWER)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
of
14 51Monday, Novemb er 30, 2015
14 51Monday, Novemb er 30, 2015
14 51Monday, Novemb er 30, 2015
1A
1A
1A
5
4
3
2
1
15
SPT-H_PCH
W14
W31
W32
W33
W38
U2L
C42
VSS
D10
VSS
D12
VSS
D15
VSS
D16
VSS
D17
VSS
D19
VSS
D21
VSS
D24
VSS
D25
VSS
D27
VSS
D29
VSS
D30
VSS
D31
VSS
D33
VSS
D35
VSS
D36
VSS
E13
VSS
E15
VSS
E31
VSS
E33
VSS
F44
VSS
F8
VSS
G42
VSS
G9
VSS
H17
VSS
H19
VSS
H22
VSS
H24
VSS
H27
VSS
H29
VSS
H3
VSS
H35
VSS
J10
VSS
J11
VSS
J3
VSS
J39
VSS
J5
VSS
T42
VSS
U10
VSS
U11
VSS
U14
VSS
U17
VSS
U18
VSS
U28
VSS
U29
VSS
U31
VSS
U32
VSS
U33
VSS
U38
VSS
U4
VSS
U8
VSS
V18
VSS
V20
VSS
V21
VSS
V23
VSS
V25
VSS
V29
VSS
V3
VSS
V45
VSS
VSS
VSS
VSS
VSS
VSS
W4
VSS
W8
VSS
Y17
VSS
12 OF 12
SP
T_PCH_H
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB11
AB7
AB14
AB31
AB32
AB38
AB4
AB5
AC1
AC20
AC21
AC25
AC29
AC45
AB8
AD11
AD14
AB15
AD32
AD33
AD36
AD4
AD8
AE18
AE20
AE21
AE25
AE28
AL10
AL11
AL13
AL17
AL19
AL24
AL29
AL32
AL33
AL38
AM15
AM17
AM19
AM22
AM24
AM27
AM29
AM45
AN11
AN22
AN27
AN31
AN39
AN7
AN8
AP11
AP4
AR33
AR34
AR42
AR9
AT10
AT15
AT36
AT9
AU1
AU35
AU36
AU39
AU45
C4
BD45
BD44
BE44
BD2
D45
BB1
BC1
U2J
VSS
VSS
VSS
VSS
VSS
A42
VSS
B45
VSS
B44
VSS
A4
VSS
A3
VSS
B2
VSS
A2
VSS
B1
VSS
VSS
VSS
A44
VSS
C1
RSVD
D1
RSVD
SP
U2I
SPT-H_PCH
AC18
D D
C C
B B
AN4
AN10
BE14
BE18
BE23
BE28
BE32
BE37
BE40
BE9
M35
M42
AA17
AA18
AA20
AA21
AA25
AA29
AA4
AA42
AB10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C10
VSS
C2
VSS
C28
VSS
C37
VSS
J7
VSS
K10
VSS
K27
VSS
K33
VSS
K36
VSS
K4
VSS
K42
VSS
K43
VSS
L12
VSS
L13
VSS
L15
VSS
L4
VSS
L41
VSS
L8
VSS
VSS
VSS
N10
VSS
N15
VSS
N19
VSS
N22
VSS
N24
VSS
N35
VSS
N36
VSS
N4
VSS
N41
VSS
N5
VSS
P17
VSS
P19
VSS
P22
VSS
P45
VSS
R10
VSS
R14
VSS
R22
VSS
R29
VSS
R33
VSS
R38
VSS
R5
VSS
T1
VSS
T2
VSS
T4
VSS
Y18
VSS
Y20
VSS
Y21
VSS
Y26
VSS
Y28
VSS
Y29
VSS
A18
VSS
A25
VSS
A32
VSS
A37
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SP
T_PCH_H
9 OF 12
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AR5
AR7
U15
AL4
AE29
AE4
AE42
AF18
AF20
AF21
AF23
AF25
AF26
AF28
AF29
AG11
AG13
AG31
AG32
AG33
AG38
AG4
AH1
AH17
AH18
AH20
AH21
AH23
AH25
AH26
AH28
AH29
AH45
AJ10
AJ14
AJ15
AJ17
AJ18
AJ26
AJ28
AJ29
AJ31
AJ32
AJ36
AK4
AK42
AU7
AV17
AV24
AV27
AV31
AV33
AV6
AW13
AW19
AW29
AW37
AW9
AY38
AY45
B25
B3
B37
B40
B6
BA1
BB11
BB16
BB21
BB25
BB30
BB34
BC2
BD43
T_PCH_H
SPT-H_PCH
10 OF 12
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
PREQ#
PRDY#
CPU_TRST#
PCH_TRIGOUT
PCH_TRIGIN
AR22
W13
U13
P31
N31
P27
R27
N29
P29
AN29
R24
P24
AT3
AT4
AY5
AL2
AK1
PGDMON
R272 30_4
PGDMON 12
XDP_PREQ# 2,16
XDP_PRDY# 2,16
PCH_2_CPU_TRIGPCH_2_CPU_TRIG_R
XDP_TRST# 2,16
PCH_2_CPU_TRIG 8
CPU_2_PCH_TRIG 8
A A
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
15 -- PCH 7/7 (GND)
15 -- PCH 7/7 (GND)
15 -- PCH 7/7 (GND)
1
15 51Monday, November 30, 2015
15 51Monday, November 30, 2015
15 51Monday, November 30, 2015
1A
1A
1A
5
+3VS5 10,12,14,26,33,37,41,42,46,47,48,51
+3V_DEEP_SUS 9,10,12,13,14,18
+3V 5,9,10,11,12,13,14,17,18,19,22,26,27,28,29,30,32,33,34,35,36,37,38,43,46,49
+1.0V_DEEP_SUS 10,11,14,47,48
+VCCIO 3,6,48
+1.0V 2,5,6,10,37,48
XDP_PREQ#2,15
XDP_PRDY#2,15
CFG02
R283 *0_4
CFG12
CFG22,8
CFG32,8
CFG42,8
CFG52,8
CFG62,8
CFG72
ON/OFFBTN_KBC#16
CK_XDP_P11
CK_XDP_N11
SMB_RUN_DAT10,17,18,38
SMB_RUN_CLK10,17,18,38
R279 *1K_4
C254
*0.1U/16V_4
CFG0
R276 *0_4
R277 *0_4
TP58
+3V
SUSB# 10,16,37
SLP_S5# 10
SUSC# 10,37
SLP_A# 10
RTC_RST# 10
ON/OFFBTN_KBC# 16
SYS_RESET# 10
PCH_SLP_S0_N 10
SUSB# 10,16,37
D D
C C
XDP_DBRESET_N
+3V_DEEP_SUS
APS
CN1
1
2
3
4
5
6
7
8
B B
9
10
11
12
13
14
15
16
17
18
*ACES_88511-180N
+3VS5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
R273 *1K_4
R274 *1K_4
R275 *1K_4
SYS_PWROK
4
PWR_DEBUG
XDP_DBRESET_N
SMB_RUN_DAT_XDP
SMB_RUN_CLK_XDP
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_TCK0
R280 *1K_4
C257
*0.1U/16V_4
+1.0V
HWPG2,10,37,41,42,47,48
XDP_TRST#2,15
CN3
3
OBSFN_A0
5
OBSFN_A1
9
OBSDATA_A0
11
OBSDATA_A1
15
OBSDATA_A2
17
OBSDATA_A3
27
OBSDATA_B0
29
OBSDATA_B1
33
OBSDATA_B2
35
OBSDATA_B3
41
HOOK1
45
HOOK2
40
ITPCLK/HOOK4
42
ITPCLK#/HOOK5
48
DBR#/HOOK7
51
SDA
53
SCL
52
TDO
54
TRSTN
56
TDI
58
TMS
57
TCK0
60
GND17
59
GND16
50
GND15
49
GND14
38
GND13
37
GND12
32
GND11
31
GND10
*Samtec BSH-030-01
R284 *51_4
TP59
TP60
3
VCC_OBS_CD
VCC_OBS_AB
OBSFN_B0
OBSFN_B1
OBSFN_C0
OBSFN_C1
OBSDATA_C0
OBSDATA_C1
OBSDATA_C2
OBSDATA_C3
OBSFN_D0
OBSFN_D1
OBSDATA_D0
OBSDATA_D1
OBSDATA_D2
OBSDATA_D3
PWRGOOD/HOOK0
RESET#/HOOK6
CPU XDP
+3V_DEEP_SUS
+3V
C258
*0.1U/16V_4
14
XDP_TDO
XDP_TDI
XDP_TMS
XDP_TRST#
2
1
5
4
9
10
12
13
+1.0V_DEEP_SUS
44
43
21
23
4
6
10
12
16
18
22
24
28
30
34
36
47
HOOK3
55
TCK1
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
U7
VCC
1A
1OE
2A
2OE
3A
3OE
4A
4OE
*SN74CBTLV3126RGYR
XDP_TCK1
39
SYS_PWROK
46
XDP_RST
1
2
7
8
13
14
19
20
25
26
+1.0V_DEEP_SUS
C255
*0.1U/16V_4
R278 *1K_4
C256
*0.1U/16V_4
3
1B
6
2B
8
3B
11
4B
15
DPAD
7
GND
TP56
TP57
2
XDP_BPM0 2
XDP_BPM1 2
CFG17 2
CFG16 2
CFG8 2
CFG9 2
CFG10 2,8
CFG11 2
CFG19 2
CFG18 2
CFG12 2,8
CFG13 2,8
CFG14 2
CFG15 2
EC_PWROK 10,37
SYS_PWROK 10,16
PLTRST# 2,12,16,19,33,34,35,36,37
+VCCIO
R281
150/F_4
PWR_DEBUG
R282
*10K_4
XDP_TDO_CPU 2
XDP_TDI_CPU 2
XDP_TMS_CPU 2
XDP_TRST#_CPU 2
1
16
SYS_PWROK10,16
PLTRST#2,12,16,19,33,34,35,36,37
+1.0V
A A
5
4
JTAGX_PCH10
JTAG_TMS_PCH10
JTAG_TDI_PCH10
JTAG_TDO_PCH10
JTAG_TCK_PCH10
R340 *1K_4
R347 *51_4
R345 *0_4
R342 *0_4
R344 *0_4
SYS_PWROK
XDP_RST
XDP_TDO
XDP_TCK0
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TDI
XDP_TCK0
XDP_TCK1
3
2
PROJECT : G35
PROJECT : G35
PROJECT : G35
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
16 -- XDP & APS
16 -- XDP & APS
16 -- XDP & APS
Date: Sheet of
Date: Sheet of
Date: Sheet of
16 51Monday, November 30, 2015
16 51Monday, November 30, 2015
16 51Monday, November 30, 2015
1
1A
1A
1A
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