HP N600C Schematics

A

1 1

B

C

D

E

SAPPORO M (BTW20)

2 2

LA-1691 REV0.4 Schematic Document

Intel Mobile P4 uFCBGA/uFCPGA Northwood Celeron

MCH-M(845MZ)+ICH3-M+M6-C(16MB VRAM)

2002-12-12

3 3

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

E

of

153,

1A

A

B

C

D

E

BTW20 LA-1691 BLOCK DIAGRAM

4 4

Mobile

Northwood

(uFCBGA/uFCPGA)

PSB

CRT&LVDS

Connector

TV-OUT

3 3

Connector

PAGE 19

ATI-M6-C

PAGE 18

AGP

PAGE 14,15,16,17

Mini PCI

PAGE 28

AGP Bus

Brookdale-M

MCH-M 845MZ

625 BGA

REV B1

HUB Interface

266MHz
(1.8V)

PAGE 4,5,6

400MHz

PAGE 7,8,9

48MHz (3.3V)

Thermal S ensor

ADM1032

200MHz
(2.5V)

Memory Bus

Clock Generator

ICS9508-10

PAGE 4

SO-DI M M x 2(DDR)

BANK 0,1,2,3

USB 1.1 Port *4

PAGE 33

PAGE13

PAGE 10,11,12

BlueToot h Connector

CPU VID

PAGE 5

PAGE 33

FANController

PAGE 40

DC/DC Interface

RTC Battery

PAGE 42

BATTERY

Charger

PAGE 44

Power Interface &
TEMP. sensing circuit

PAGE 46,47,48

24.576MHz
(3.3V)

C

ATA 66/100

2nd IDE

AC-LINK

PAGE 39

IDE HDD

Audio CD-DJ

AC97 CODEC

ALC 202

OZ168T

MDC

Connector

PAGE 30

PAGE 29

PAGE 34

PAGE 31

CD-ROM/DVD

Audio Hardware

EQ

RJ-11

PAGE 27

D

PAGE 30

PAGE 35

Aud i o A m p lifier

TPA0232

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

Date: Sheet

星期二 一月

07, 2003

401241

PAGE 36

E

of

253,

1A

RJ-45

PAGE 27

2 2

Slot 0/1

PAGE 25

SD Reader

Winbond

W83L518D

1 1

A

PAGE 37

LAN

RTL8100-B(L)

CARDBUS

IEEE1394

TSB43AB21

OZ6933

PAGE 26

PAGE 24

PAGE 23

Super I/O

LPC47N227

REV B

Parallel

PAGE 31

33MHz (3.3V)

PAGE 32

B

PCI BUS

ICH3-M

LPC BUS 3 3MHz (3.3V)

Embedded
Controller

NS PC87591L

PAGE 38

421 BGA

REV B1

PAGE 38

PAGE 20,21,22

BIOS & I/O PORTScan KB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

Voltage Rails

STATE

Power Plane Description

1 1

VIN
B+
+CPU_VCC
+1.2VP
+1.2VS 1.2V switched power rail for Montara core ON OFF OFF
+1.25VS 1.25V switched power rail ON OFF OFF

**

+1.8VS

**

+2.5V

+3VALW
+3V
+3VS
+5VALW
+5V

2 2

+5VS
+12VALW
RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.2V switched power rail for CPU AGTL Bus

AGP 4X ON OFF OFF+1.5VS

1.8V always power rail ON ON

2.5V power rail

2.5V switched power rail+2.5VS

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V power rail
5V switched power rail
12V always on power rail
RTC power

S1 S3 S5

N/A N/A N/A

ON O F F
ON O F F

OFF1.8V switched power rail ON OFF

ON

ON
OFF

ON
ON
ON

ON
OFF

ON
ON

ON
ON

ON

OFF

ON

ON

ON

ON

ON

N/AN/AN/A
OFF
OFF

ON*+1.8VALW

OFF
OFF
ON*ON
OFF
OFF
ON*
OFF
OFF
ON*
ON

Exter n al PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

CardBus

LAN

Mini-PCI

1394

AD20

AD17

AD18
AD16 0

2

3 PIRQB(PIRQD)

1/4

PIRQA / PIRQB(PIRQ E/PIRQF)

PIRQC/PIRQD(PIRQ G/PIRQH)
PIRQA

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7NC

Board ID

SIGNAL

100K +/- 5%Ra

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

0
1
2
3
4
5

SLP_S1# SLP_S3#

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH H IGH HIGH HIGH

LOW

LOW

HIGH

LOW

LOWLOWLOW

LOW LOW LOW LOW

Rb V min
0

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

PCB Revision

0.1 , 0.2

0.3

NO DIRECT CD PLAY

ONONON ON

ON

HIGHHIGHHIGH

HIGH

HIGH

ON

ON

ON

ON

V typ

AD_BID

ON

OFF

OFF

0 V 0 V

0.503 V

0.819 V

1.185 V 1.264 V

2.200 V

3.300 V

ON

OFF

OFF

OFF

V

AD_BID

0.538 V

0.875 V

2.341 V

3.300 V

LOW

OFF

OFF

OFF

max

6

1394

CardBus

LAN

MINIPCI

7

Topology
Mount R458 RP122
Unmount R474 RP125 R533

Trace: PIRQA#_1394
Use IRQA

Trace:PIRQA#/E#
PIRQB#/F#/D#
Use IRQA IRQB

Trace:PIRQB#/F#/D#
Use IRQB

Trace:PIRQC#/G#
PIRQD#/H#
Use IRQC IRQD

3 3

EC SM Bus1 address

Device

Smart Battery
EEPROM(24C16/02)

(24C04)

Address Address

0001 011X b
1010 000X b
1011 000Xb

EC SM Bus2 address

Device

ADM1032
OZ168
Smart Battery
Docking
DOT Board

1001 110X b
0011 0100 b
0001 011X b
0011 011X b
XXXX XXXXb

ICH3 SM Bus address

Device

Clock Generator (
ICS-950810)

4 4

Address

1101 001X

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

E

of

353,

1A

A

HA#[3..31]7

1 1

HRE Q#[0 ..4 ]7

2 2

H_ADS#7

+CPU_CORE

H_BREQ0#7

H_BPRI#7

H_BNR#7

H_LOCK#7

CLK_CPU_BCLK13
CLK_CPU_BCLK#13

H_HIT#7

H_HITM#7

H_DEFER#7

3 3

HA#[3..31]

HA#3
HA#4
HA#5
HA#6
HA#7

HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HREQ#[0..4]

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

R91 Close to U37 pinM23

R31 10K_0402_5%

**

R74 220_0402_5%

CLK_CPU_BCLK
CLK_CPU_BCLK#

AF22
AF23

K2
K4
L6
K1
L3

M6

L2
M3
M4

N1
M1

N2

N4

N5

T1

R2

P3

P4

R3

T2

U1

P6

U3

T4

V2

R6
W1

T5

U4

V3
W2

Y1

AB1

J1

K5

J4
J3

H3
G1

AC1

V5

AA3
AC3

H6

D2
G2
G4

F3

E3

E2

+CPU_CORE

A10

U37A

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
ADS#

AP#0
AP#1
BINIT#
IERR#

BR0#
BPRI#
BNR#
LOCK#

BCLK0
BCLK1

HIT#
HITM#
DEFER#

A12

A14

A16

A18

A20

AA10

AA12

AA14

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

VCC_5

VCC_6A8VCC_7

VCC_8

VSS_0H1VSS_1H4VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

A11

A13

A15

A17

H23

H26

B

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

Mobile

NorthWood

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12A3VSS_13A9VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

A19

A21

A24

A26

AA1

AA11

AA4

AA7

AA13

AA15

AA9

AA17

AA19

AA23

AA26

AB10

AB12

AB3

AB6

AB8

AB14

AB16

AB18

AB20

AB21

AB24

AC2

AC11

AC13

AC15

AC17

AC19

C

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19

C10

C12

C14

C16

C18

C20

D11

D13

D15

D17

D19

D9

E10

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56B7VCC_57B9VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65C8VCC_66

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71D7VCC_72

VCC_73

B21

D#0

B22

D#1

A23

D#2

A25

D#3

C21

D#4

D22

D#5

B24

D#6

C23

D#7

C24

D#8

B25

D#9

G22

D#10

H21

D#11

C26

D#12

D23

D#13

J21

D#14

D25

D#15

H22

D#16

E24

D#17

G23

D#18

F23

D#19

F24

D#20

E25

D#21

F26

D#22

D26

D#23

L21

D#24

G26

D#25

H24

D#26

M21

D#27

L22

D#28

J24

D#29

K23

D#30

H25

D#31

M23

D#32

N22

D#33

P21

D#34

M24

D#35

N23

D#36

M26

D#37

N26

D#38

N25

D#39

R21

D#40

P24

D#41

R25

D#42

R24

D#43

T26

D#44

T25

D#45

T22

D#46

T23

D#47

U26

D#48

U24

D#49

U23

D#50

V25

D#51

U21

D#52

V22

D#53

V24

D#54

W26

D#55

Y26

D#56

W25

D#57

Y23

D#58

Y24

D#59

Y21

D#60

AA25

D#61

AA22

D#62

AA24

D#63

VCC_74

VCC_75

VCC_76

VCC_77

VCC_78

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

AC5

AC7

AC9

AD1

AC22

AC25

AD10

AD4

AD12

AD8

AD14

AD16

AD18

AD21

AD23

VCC_79E8VCC_80

VCC_81

VCC_82

VCC_83

VCC_84

VCC_85

F9

F11

F13

F15

F17

F19

NorthWood

E12

E14

E16

E18

E20

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5HA#8
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

D

HD#[0..63]

E

HD#[0..63] 7

+CPU_CORE

Thermal Sensor
ADM1032AR

H_THERMDA5

H_THERMDC5

2200P_0402_25V7K

4 4

C534

EC_SMC229,38
EC_SMD229,38

H_THERMDA
H_THERMDC

0.1U_0402_16V4Z

U34

2

D+

3

D-

8

SCLK

7

SDATA

ADM1032AR_SOP-8

VDD1

ALERT

THERM

GND

W=15mil

C537

1
6
4
5

+3VS

R370

4.7K_0402_5%

+3VS

R369

4.7K_0402_5%

Address:1001_100X

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, I NC. NEI THER THI S SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v

Custom

401241

Date: Sheet

星期二 一月

07, 2003

E

of

453,

1A

A

B

C

D

E

+CPU_CORE

R164 200_0402_5%
R174 200_0402_5%
R169 200_0402_5%
R165 200_0402_5%

H_THERMTRIP#

Murata
LQG21F4R7N00

L3

4.7UH_80mA_0805

4.7UH_80mA_0805

L2

1 8
2 7
3 6
4 5

R68 51_0603
R66 51_0603
R56 51_0603
R62 51_0603

R177 200_0402_5%
R162 200_0402_5%
R171 200_0402_5%
R167 200_0402_5%
R181 56_0402_5%
R21 51.1_1%_0603
R48 300_0402_5%

12

+

RP6

1.5K_8P4R_0804_5%

1 1

H_PWRGD20

Place R65 near to U40 pinAB23

Place R420 near to U12 pinW20

2 2

+1.2VP

1 2
1 2

3 3

R84 R87 placed with in 0.5" of processor,
and at least 25mils away from other signals

+CPU_CORE

4 4

12

+CPU_CORE

C3
33UF_D2_16V

ITP_TMS
ITP_TCK
ITP_TRST#
ITP_TDI

ITP_PREQ#

12

ITP_PRDY#

12

ITP_BPM0

12

ITP_BPM1

12

A

H_INIT#
H_A20M#
H_SMI#
H_IGNNE#
H_STPCLK#
H_DPSLP#
H_NMI
H_INTR
H_FERR#
H_RESET#
H_PWRGD

R85
56_0402_5%

CLK_CPU_ITP13

CLK_CPU_ITP#13

H_RS#07
H_RS#17
H_RS#27

H_TRDY#7

ITP_BPM0
ITP_BPM1
ITP_PRDY#
ITP_PREQ#

ITP_TCK
ITP_TDI

ITP_TMS
ITP_TRST#

+H_VCCA
TP1
+H_VCCIOPLL

R69

H_A20M#
H_FERR#
H_IGNNE#
H_SMI#
H_PWRGD
H_STPCLK#
H_DPSLP#
H_INTR
H_NMI
H_INIT#
H_RESET#

H_THERMDA
H_THERMDC

COMP0

COMP1

1 2

1 2

51.1_1%_0603

12

C473

+

33UF_D2_16V

H_A20M#20

H_FERR#20

H_IGNNE#20

H_STPCLK#20

H_DPSLP#20

H_CPURST#7

H_DBSY#7

H_DRDY#7

H_BSEL013
H_BSEL113

H_THERMDA4

H_THERMDC4

H_VSSA

CLK_CPU_ITP

CLK_CPU_ITP#

H_SMI#20

H_INTR20

H_NMI20

H_INIT#20

51.1_1%_0603

Place pull up resistors near processor

AE11

AE13

AE15

AE17

AE19

AE22

AE24

AE26

AE7

AE9

AF1

AF10

AF12

AF14

AF16

AF18

AF20

AF6

AF8

B10

B12

B14

B16

B18

B20

B23

B26

C11

C13

C15

C17

C19

C22

C25

D10

VSS_67

VSS_68

VSS_139

K24

VSS_69

VSS_70

VSS_71

VSS_140K3VSS_141K6VSS_142L1VSS_143

Q53
3904

AF26

VSS_72

VSS_73

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85B4VSS_86B8VSS_87

VSS_88

VSS_89

VSS_90

SKTOCC#

VSS_91

Mobile

NorthWood

VSS_144

VSS_145L4VSS_146M2VSS_147

VSS_148

VSS_149M5VSS_150

VSS_151

VSS_152N3VSS_153N6VSS_154P2VSS_155

VSS_156

VSS_157P5VSS_158R1VSS_159

VSS_160

VSS_161R4VSS_162

L23

L26

M22

M25

+5V

12

R551
10K

2

3 1

Q47
3904

P22

N21

N24

+CPU_CORE

12

R552
470

2

R469 470

3 1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

T21

R23

R26

12

C

T24

H_THERMTRIP#

P25

U37B

VSS_57

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_131

VSS_132G3VSS_133G6VSS_134J2VSS_135

G24

VSS_66

VSS_136

VSS_137J5VSS_138

J22

J25

K21

F1

RS#0

G5

RS#1

F4

RS#2

AB2

RSP#

J6

TRDY#

C6

A20M#

B6

FERR#

B2

IGNNE#

B5

SMI#

AB23

PWRGOOD

Y4

STPCLK#

AD25

DPSLP#

D1

LINT0

E5

LINT1

W5

INIT#

AB25

RESET#

H5

DBSY#

H2

DRDY#

AD6

BSEL0

AD5

BSEL1

B3

THERMDA

C4

THERMDC

A2

THERMTRIP#

AC6

BPM#0

AB5

BPM#1

AC4

BPM#2

Y6

BPM#3

AA5

BPM#4

AB4

BPM#5

D4

TCK

C1

TDI

D5

TDO

F7

TMS

E6

TRST#

AD20

VCCA

A5

VCCSENSE

AE23

VCCIOPLL

AF25

NC7

AF3

NC8

AC26

ITP_CLK0

AD26

ITP_CLK1

L24

COMP0

P1

COMP1

VSS_129F8VSS_130

R67

G21

***

EC_CPUPD#38

B

VSS_92C2VSS_93

VSS_94

VSS_163

VSS_164T3VSS_165T6VSS_166U2VSS_167

VSS_95C5VSS_96C7VSS_97C9VSS_98

U22

U25

VSS_168

VSS_169U5VSS_170V1VSS_171

D12

D14

D16

D18

D20

D21

D24

E11

E13

E15

E17

E19

E23

E26

F10

F12

F14

F16

F18

F22

F25

F5

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117E4VSS_118E7VSS_119E9VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125F2VSS_126

VSS_127

VSS_128

GTLREF0
GTLREF1
GTLREF2
GTLREF3

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8
TESTHI9

TESTHI10

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

PROCHOT#

MCERR#

VSSSENSE

VID0

VID1

VID2

VID3

VSS_172

VSS_173V4VSS_174

VSS_175

VSS_176W3VSS_177W6VSS_178Y2VSS_179

VSS_180

VSS_181

V23

V26

W21

Y5

Y22

Y25

W24

VID4

AE5

AE4

AE3

AE2

AE1

NC5

NC6

AF24

AE21

1K_0402_5%

D

VCCVID

AF4

R324

Layout note :

1. Place R381 and R382 within 0.5" of processor pin F20

2. Place decoupling cap 220PF near CPU.(Within 500mils)

3. GTLREF trace width 7 mils, and keep 10mils separated
from other signals

J26

DP#0

K25

DP#1

K26

DP#2

L25

DP#3

NC1
NC2

GHI#

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

SLP#

VSSA

NC3
NC4

NorthWood

+3VS

1 8

2 7

AA21
AA6
F20
F6
A22
A7

TESTTHI0_1

AD24
AA2
AC21
AC20
AC24
AC23
AA20
AB22

TESTTHI8_10

U6
W4
Y3

GHI#

A6

H_DSTBN#0

E22

H_DSTBN#1

K22

H_DSTBN#2

R22

H_DSTBN#3

W22

H_DSTBP#0

F21

H_DSTBP#1

J23

H_DSTBP#2

P23

H_DSTBP#3

W23

L5
R5

H_DBI#0

E21

H_DBI#1

G25

H_DBI#2

P26

H_DBI#3

V21
AE25

H_PROCHOT#

C3
V6
AB26

H_VSSA

AD22
A4

AD2
AD3

+1.2VP

C24

0.1U_0402_16V4Z

1K_8P4R_0804_5%
RP118

3 6

4 5

+GTLREF

220P_0402_25V8K

H_CPUSLP#

TP2

Title

Size Docu ment Number Re v
Custom

Date: Sheet

2/3VCORE

C544

R36 56_0402_5%
R40 56_0402_5%
R351 56_0402_5%
R352 56_0402_5%
R39 56_0402_5%
R45 56_0402_5%
R350 56_0402_5%
R349 56_0402_5%
R359 56_0402_5%
R357 56_0402_5%
R49 56_0402_5%

H_DSTBN#[0..3]

H_DSTBP#[0..3]

H_DBI#[0..3]

1U_0603_10V6K

**

R546

200_0402_5%

C149

TP1 and TP2 must have test points

@0_0402_5%

CPU Voltage ID

CPU_VID0 48
CPU_VID1 48
CPU_VID2 48
CPU_VID3 48
CPU_VID4 48

Compal Electronics, inc.

SCH EMATIC, M/B LA-1691

401241

星期二 一月

07, 2003

+CPU_CORE

R378

49.9_0402_1%

R381
100_0402_1%

R79
300_0402_5%

H_DSTBN#[0..3] 7

H_DSTBP#[0..3] 7

H_ADSTB#0 7
H_ADSTB#1 7

H_DBI# [0 ..3 ] 7

+CPU_CORE

R78
56_0402_5%

H_CPUSLP# 20

+CPU_CORE

TP1

R86

E

+CPU_CORE

PM_CPUPERF# 20

TP2

R83
@0_0402_5%

553,

1A

of

A

B

C

D

E

Layout note :

Place close to CPU, Use 2~3 vias per PAD.
Place .22uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.

1 1

Please place these cap in the socket cavity area

+CPU_CORE

C70
10U_1206_6.3V6M

+CPU_CORE

C151
10U_1206_6.3V6M

Please place these cap on the socket north side

+CPU_CORE

2 2

+CPU_CORE

+CPU_CORE

C34
10U_1206_6.3V6M

C42
10U_1206_6.3V6M

C25
10U_1206_6.3V6M

C69
10U_1206_6.3V6M

C150
10U_1206_6.3V6M

C33
10U_1206_6.3V6M

C36
10U_1206_6.3V6M

C15
10U_1206_6.3V6M

C68
10U_1206_6.3V6M

C540
10U_1206_6.3V6M

C32
10U_1206_6.3V6M

C26
10U_1206_6.3V6M

C13
10U_1206_6.3V6M

C67
10U_1206_6.3V6M

C148
10U_1206_6.3V6M

C31
10U_1206_6.3V6M

C16
10U_1206_6.3V6M

C6
10U_1206_6.3V6M

C66
10U_1206_6.3V6M

C147
10U_1206_6.3V6M

C30
10U_1206_6.3V6M

C14
10U_1206_6.3V6M

0.22U_0603_16V7K_V1

0.22U_0603_16V7K_V1

Layout note :

Place close to CPU power and
ground pin as possible
(<1inch)

+CPU_CORE

12

C153

+

220UF_D2_4V_25m

+CPU_CORE

12

C155

+

220UF_D2_4V_25m

+CPU_CORE

C144

0.22U_0603_16V7K_V1

+CPU_CORE

C511

0.22U_0603_16V7K_V1

Used ESR 25m ohm cap total ESR=2.5m ohm

12

C128

+

220UF_D2_4V_25m

12

C140

+

220UF_D2_4V_25m

C122

C530

12

C103

+

220UF_D2_4V_25m

12

C106

+

220UF_D2_4V_25m

0.22U_0603_16V7K_V1

0.22U_0603_16V7K_V1

C75

C541

12

C80

+

220UF_D2_4V_25m

12

C84

+

220UF_D2_4V_25m

0.22U_0603_16V7K_V1

0.22U_0603_16V7K_V1

C74

C510

12

C53

+

220UF_D2_4V_25m

12

C54

+

220UF_D2_4V_25m

0.22U_0603_16V7K_V1

0.22U_0603_16V7K_V1

C512

C509

Please place these cap on the socket south side

3 3

4 4

+CPU_CORE

+CPU_CORE

+CPU_CORE

C208
10U_1206_6.3V6M

C183
10U_1206_6.3V6M

C173
10U_1206_6.3V6M

A

C199
10U_1206_6.3V6M

C191
10U_1206_6.3V6M

C174
10U_1206_6.3V6M

C187
10U_1206_6.3V6M

C158
10U_1206_6.3V6M

C160
10U_1206_6.3V6M

C179
10U_1206_6.3V6M

C163
10U_1206_6.3V6M

C170
10U_1206_6.3V6M

B

C178
10U_1206_6.3V6M

C175
10U_1206_6.3V6M

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

E

of

653,

1A

A

3

B

C

D

E

HD#[0..63]

+V_MCH_GTLREF

GTL Reference Vol tage

Layout note :

1. Place R_E and R_F near MCH

2. Place decoupling cap 220PF near MCH pin.(Within
500mils )

C50
.01UF

C19
.01UF

A

HA#[3..31]

HREQ#[0..4]

H_DBI#[0..3]

R37

24.9_0603_1%

+1.5VS

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

CLK_GHT
CLK_GHT#

H_DBI#0
H_DBI#1
H_DBI#2
H_DBI#3

H_SWNG0
H_SWNG1

12

R59 8.2K

R33 8.2K

R317 8.2K

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

AE17

AD15

AD13

AC13

12

R35

24.9_0603_1%

12

12

12

U33A

T4
T5
T3
U3
R3
P7
R2
P4
R6
P5
P3
N2
N7
N3

K4
M4
M3

L3

L5

K3

J2
M5

J3

L2
H4
N5
G2
M6

L7
R5

N6

U7

Y4

Y7

W5
J27

H26

V5

V4

Y5

Y3

V7

V3

W3

W2
W7
W6

U6

T7
R7
U5
U2

J8

K8

AD5
AG4
AH9

AA7

AC2

AGP_ADSTB0

AGP_ADSTB1

AGP_SBSTB

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HADSTB#0
HADSTB#1

CPURST#
HTRDY#
DEFER#
BPRI#
HLOCK#
RSTIN#
TESTIN#
DBSY#
DRDY#
HIT#
HITM#
BREQ#0
ADS#
BNR#

RS#0
RS#1
RS#2

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

BCLK
BCLK#

DBI#0
DBI#1
DBI#2
DBI#3

HSWNG0
HSWNG1

HRCOMP0
HRCOMP1

H_DSTBN#[0..3]
H_DSTBP#[0..3]

HOST

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

BROOKDALE(MCH-M)

H_DSTBN#[0..3] 5
H_DSTBP#[0..3] 5

R54 @8.2K

R34 @8.2K

R318 @8.2K

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8

HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

HVREF0
HVREF1
HVREF2
HVREF3
HVREF4

AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AD7
AC7
AC6
AC3
AC8
AE2
AG5
AG2
AE8
AF6
AH2
AF3
AG3
AE5
AH7
AH3
AF4
AG8
AG7
AG6
AF8
AH5
AC11
AC12
AE9
AC9
AE10
AD9
AG9
AC10
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16

AD4
AE6
AE11
AC15
AD3
AE7
AD11
AC16

M7
R8
Y8
AB11
AB17

12

12

12

B

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

AGP_ADSTB0#

AGP_ADSTB1#

AGP_SBSTB#

HA#[3..31]4

1 1

H_ADSTB#05
H_ADSTB#15

H_CPURST#5

H_TRDY#5

HREQ#[0 ..4 ]4

CLK_MCH_BCLK13

CLK_MCH_BCLK#13

+CPU_CORE

12

R44

12

R51

+CPU_CORE

12

R17

12

R18

H_DEFER#4

H_BREQ0#4

H_DBI#[0..3]5

H_BPRI#4
H_LOCK#4

PCIRST#
H_DBSY#5

H_DRDY#5

H_HIT#4

H_HITM#4

H_ADS#4

H_BNR#4

H_RS#05
H_RS#15
H_RS#25

12

12

2 2

,24,25,26,28,30,32,37,38

3 3

301_1%_0603

150_1%_0603

301_1%_0603

4 4

150_1%_0603

HD#[0 ..6 3 ] 4

AGP_AD[0..31]14

AGP_C/BE#[0..3]14

AGP_ST[0..2]14

+CPU_CORE

12

R42

R_E

49.9_1%_0603

12

R43

R_F

100_1%_0603

AGP_ST0
0=System memory is DDR
1=System memory is SDR

AGP_AD[0..31] HUB_PD[0..10]

AGP_ADSTB014
F_AGP_ADSTB0#14
AGP_ADSTB114
F_AGP_ADSTB1#14
AGP_SBSTB14
F_AGP_SBSTB#14

AGP_FRAME#14
AGP_DEVSEL#14
AGP_IRDY#14
AGP_TRDY#14
AGP_STOP#14
AGP_PAR14
AGP_REQ#14
AGP_GNT#14

Trace
width>=7mila

C57

C55

1UF_0603

220PF

AGP_ST0 AGP_ST1

R313 2K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

12

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

AGP_C/BE#0
AGP_C/BE#1
AGP_C/BE#2
AGP_C/BE#3

AGP_ST0
AGP_ST1
AGP_ST2

AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#
AGP_SBSTB
AGP_SBSTB#

AGP_FRAME#
AGP_DEVSEL#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
AGP_REQ#
AGP_GNT#
AGP_PIPE#

U33B

R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27

Y26
AA28
AB25
AB27
AA27
AB26

Y23
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24

V25

V23

Y25
AA23

AG25

AF24

AG26

R24

R23
AC27
AC28

AF27
AF26

Y24

W28
W27
W24
W23

W25
AG24
AH25

AF22

N22
K27

K5

L24

M23

K7

J26

A3

A7
A11
A15

12

R316 @8.2K

G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31

G_C/BE#0
G_C/BE#1
G_C/BE#2
G_C/BE#3

ST0
ST1
ST2

AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
SB_STB
SB_STB#

G_FRAME#
G_DEVSEL#
G_IRDY#
G_TRDY#
G_STOP#
G_PAR
G_REQ#
G_GNT#
PIPE#

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

AGP_FRAME#
AGP_TRDY#
AGP_PAR
AGP_STOP#

AGP_GNT#
AGP_REQ#
AGP_IRDY#
AGP_DEVSEL#

AGP_WBF#
AGP_PIPE#
AGP_RBF#

AGP_ST2

HUB

HLRCOMP

AGP

GRCOMP

BROOKDALE(MCH-M)

RP121 @8P4R_8.2K

1 8
2 7
3 6
4 5

RP120 @8P4R_8.2K

1 8
2 7
3 6
4 5

RP119 @8P4R_8.2K

1 8
2 7
3 6
4 5

12

R311 8 .2K

12

R312 8 .2K

HI_0
HI_1
HI_2
HI_3
HI_4
HI_5
HI_6
HI_7
HI_8
HI_9

HI_10

HI_STB

HI_STB#

HI_REF

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

AGPREF

66IN

RBF#

WBF#

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40

+1.5VS

D

P25
P24
N27
P23
M26
M25
L28
L27
M27
N28
M24

N25
N24

P27
P26

AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25

AA21
AD25
P22

AE22
AE23

A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J29

AGP_ST1
0=533Mhz
1=400Mhz

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

HLRCOMP

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

R20 36.5_1%_0603

CLK_MCH_66M

AGP_RBF#
AGP_WBF#

+AGP_REF

HUB_PD[0..10] 20

HUB_PSTRB 20
HUB_PSTRB# 20

1 2

R368 36.5_1%_0603

AGP_SBA[0..7]

Place this cap near MCH

+AGP_REF

12

CLK_MCH_66M 13

AGP_RBF# 14

301_1%_0603

301_1%_0603

Compal Electronics, inc.

Title

Size Docu ment Number Re v

Date: Sheet

星期二 一月

AGP_SBA[0..7] 14

12

C52
.1UF

+1.5VS

12

R346
1K_1%_0603

12

R340
1K_1%_0603

HUB Interface Reference

Layout note :

+1.8VS

1. Pla c e R_C and R_D in middle of Bus.

2. Place capacitors near MCH.

12

R428

R_C

12

R429

R_D

SCHEMATIC, M/B LA-1691

401241

07, 2003

+1.8VS

12

C504
.1UF

12

C533
@470PF_0603

12

R376
@56.2_1%_0603

12

R64
0

12

C94
.01UF

E

+VS_HUBREF

12

C97
.01UF

Place closely
ball P26

Place closely pin P22

CLK_MCH_66M

R63
@33

1 2

C102

@10PF

+VS_HUBREF

of

753,

1A

A

B

C

D

E

U33D

M8

+CPU_CORE

1 1

+2.5V

2 2

3 3

4 4

VTT_0

U8

VTT_1

AA9

VTT_2

AB8

VTT_3

AB18

VTT_4

AB20

VTT_5

AC19

VTT_6

AD18

VTT_7

AD20

VTT_8

AE19

VTT_9

AE21

VTT_10

AF18

VTT_11

AF20

VTT_12

AG19

VTT_13

AG21

VTT_14

AG23

VTT_15

AJ19

VTT_16

AJ21

VTT_17

AJ23

VTT_18

A5

VCCSM1

A9

VCCSM2

A13

VCCSM3

A17

VCCSM4

A21

VCCSM5

A25

VCCSM6

C1

VCCSM7

C29

VCCSM8

D7

VCCSM9

D11

VCCSM10

D15

VCCSM11

D19

VCCSM12

D23

VCCSM13

D25

VCCSM14

F6

VCCSM15

F10

VCCSM16

F14

VCCSM17

F18

VCCSM18

F22

VCCSM19

G1

VCCSM20

G4

VCCSM21

G29

VCCSM22

H8

VCCSM23

H10

VCCSM24

H12

VCCSM25

H14

VCCSM26

H16

VCCSM27

H18

VCCSM28

H20

VCCSM29

H22

VCCSM30

H24

VCCSM31

K22

VCCSM32

K24

VCCSM33

K26

VCCSM34

L23

VCCSM35

K6

VCCSM36

J5

VCCSM37

J7

VCCSM38

L1

VSS41

L4

VSS42

L6

VSS43

L8

VSS44

L22

VSS45

L26

VSS46

N1

VSS47

N4

VSS48

N8

VSS49

N13

VSS50

N15

VSS51

N17

VSS52

N29

VSS53

P6

VSS54

P8

VSS55

P14

VSS56

P16

VSS57

R1

VSS58

R4

VSS59

R13

VSS60

R15

VSS61

R17

VSS62

R26

VSS63

T6

VSS64

T8

VSS65

T14

VSS66

T16

VSS67

T22

VSS68

U1

VSS69

U4

VSS70

U15

VSS71

U29

VSS72

V6

VSS73

V8

VSS74

V22

VSS75

W1

VSS76

W4

VSS77

W8

VSS78

W26

VSS79

Y6

VSS80

Y22

VSS81

AA1

VSS82

BROOKDALE(MCH-M)

POWER/GND

VCC1_5_0
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
VCC1_5_5
VCC1_5_6
VCC1_5_7
VCC1_5_8

VCC1_5_9
VCC1_5_10
VCC1_5_11
VCC1_5_12
VCC1_5_13
VCC1_5_14
VCC1_5_15

VCC1_5_16
VCC1_5_17
VCC1_5_18
VCC1_5_19
VCC1_5_20
VCC1_5_21
VCC1_5_22
VCC1_5_23
VCC1_5_24
VCC1_5_25

VCC1_8_0

VCC1_8_1

VCC1_8_2

VCC1_8_3

VCC1_8_4

VCCGA1
VCCHA1

VSSGA2
VSSHA2

VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141

R22
R29
U22
U26
W22
W29
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25

N14
N16
P13
P15
P17
R14
R16
T15
U14
U16

L29
N26
L25
M22
N23

T17
T13

U17
U13

AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AB19
AB22
AC1
AC4
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10
AD12
AD14
AD16
AD19
AD22
AE1
AE4
AE18
AE20
AE29
AF5
AF7
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AG1
AG18
AG20
AG22
AH19
AH21
AH23
AJ3
AJ5
AJ7
AJ9
AJ11
AJ13
AJ15
AJ17
AJ27

VCC_MCH_PLL1
VCC_MCH_PLL0

VSS_MCH_PLL1
VSS_MCH_PLL0

+1.5VS

+1.5VS

+1.8VS

"Trace A"

"Trace A"

12

L10

4.7UH_30mA

"Trace A"

12

C96

+

33UF_D2_16V

"Trace A"

Layout note :
Trace width 5mil ; Spacing 10mil

Trace A to ball U7/T13 or U7/T7 =1.5" Max

12

L7

4.7UH_30mA

12

C95

+

33UF_D2_16V

Murata
LQG21N4R7K10

DDR_SDQ[0..63]10

DDR_SDQ[0..63]

DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63

+SDREF

12

C117
.1UF_0402_X5R

Layout note
Please closely pinJ21 and J9

U33C

G28

SDQ0

F27

SDQ1

C28

SDQ2

E28

SDQ3

H25

SDQ4

G27

SDQ5

F25

SDQ6

B28

SDQ7

E27

SDQ8

C27

SDQ9

B25

SDQ10

C25

SDQ11

B27

SDQ12

D27

SDQ13

D26

SDQ14

E25

SDQ15

D24

SDQ16

E23

SDQ17

C22

SDQ18

E21

SDQ19

C24

SDQ20

B23

SDQ21

D22

SDQ22

B21

SDQ23

C21

SDQ24

D20

SDQ25

C19

SDQ26

D18

SDQ27

C20

SDQ28

E19

SDQ29

C18

SDQ30

E17

SDQ31

E13

SDQ32

C12

SDQ33

B11

SDQ34

C10

SDQ35

B13

SDQ36

C13

SDQ37

C11

SDQ38

D10

SDQ39

E10

SDQ40

C9

SDQ41

D8

SDQ42

E8

SDQ43

E11

SDQ44

B9

SDQ45

B7

SDQ46

C7

SDQ47

C6

SDQ48

D6

SDQ49

D4

SDQ50

B3

SDQ51

E6

SDQ52

B5

SDQ53

C4

SDQ54

E5

SDQ55

C3

SDQ56

D3

SDQ57

F4

SDQ58

F3

SDQ59

B2

SDQ60

C2

SDQ61

E2

SDQ62

G5

SDQ63

C16

SDQ64/CB0

D16

SDQ65/CB1

B15

SDQ66/CB2

C14

SDQ67/CB3

B17

SDQ68/CB4

C17

SDQ69/CB5

C15

SDQ70/CB6

D14

SDQ71/CB7

J21

SDREF0

J9

SDREF1

BROOKDALE(MCH-M)

MEMORY

SMA0/CS#11
SMA1/CS#10

SMA2/CS#6
SMA3/CS#9
SMA4/CS#5
SMA5/CS#8
SMA6/CS#7
SMA7/CS#4
SMA8/CS#3
SMA9/CS#0

SMA11/CS#2
SMA12/CS#1

SMRCOMP

RCVENIN#

RCVENOUT#

SCK0

SCK#0

SCK1

SCK#1

SCK2

SCK#2

SCK3

SCK#3

SCK4

SCK#4

SCK5

SCK#5

SCK6

SCK#6

SCK7

SCK#7

SCK8

SCK#8
SCS#0

SCS#1
SCS#2
SCS#3
SCS#4
SCS#5

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

SMA10

SBS0
SBS1

SCKE0
SCKE1
SCKE2
SCKE3
SCKE4
SCKE5

SSI_ST

SRAS#

SWE#

SCAS#

NC0
NC1

E14
F15
J24
G25
G6
G7

G15
G14
E24
G24
H5
F5

K25
J25
G17
G16
H7
H6

DDR_SCS#0

E9

DDR_SCS#1

F7

DDR_SCS#2

F9

DDR_SCS#3

E7
G9
G10

DDR_SDQS0

F26

DDR_SDQS1

C26

DDR_SDQS2

C23

DDR_SDQS3

B19

DDR_SDQS4

D12

DDR_SDQS5

C8

DDR_SDQS6

C5

DDR_SDQS7

E3
E15

DDR_SMA0

E12

DDR_SMA1

F17

DDR_SMA2

E16

DDR_SMA3

G18

DDR_SMA4

G19

DDR_SMA5

E18

DDR_SMA6

F19

DDR_SMA7

G21

DDR_SMA8

G20

DDR_SMA9

F21

DDR_SMA10

F13

DDR_SMA11

E20

DDR_SMA12

G22

DDR_SBS0

G12

DDR_SBS1

G13

DDR_CKE0

G23

DDR_CKE1

E22

DDR_CKE2

H23

DDR_CKE3

F23
J23
K23

+SM_RCOMP

J28

RCVIN#

G3

RCVOUT#

H3
H27
F11

G11
G8

AD26
AD27

R75

DDR_SRAS#
DDR_SWE#
DDR_SCAS#

Layout note
Place R_J closely Ball H3<40mil,Ball H3 to G3 trace must
routing 1"

R73 30.1_1%

12

0_0402

R_J

DDR_CLK0 10
DDR_CLK0# 10
DDR_CLK1 10
DDR_CLK1# 10

DDR_CLK3 11
DDR_CLK3# 11
DDR_CLK4 11
DDR_CLK4# 11

DDR_SCS#0 10,12
DDR_SCS#1 10,12
DDR_SCS#2 11,12
DDR_SCS#3 11,12

DDR_SDQS0 10
DDR_SDQS1 10
DDR_SDQS2 10
DDR_SDQS3 10
DDR_SDQS4 10
DDR_SDQS5 10
DDR_SDQS6 10
DDR_SDQS7 10

DDR_SMA[0..12]

DDR_SBS0 10,11,12
DDR_SBS1 10,11,12

DDR_CKE0 10,12
DDR_CKE1 10,12
DDR_CKE2 11,12
DDR_CKE3 11,12

12

C120 .1UF_0402_X5R
C146 @47PF

DDR_SRAS# 10,11,12
DDR_SWE# 10,11,12
DDR_SCAS# 10,11,12

DDR_SMA[0..12] 10,11,12

+1.25VS

Layout note
Place R563 closely
pinJ28

Compal Electronics, inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Title

Size Docu ment Number Re v

Date: Sheet

SCHEMATIC, M/B LA-1691

401241

星期二 一月

07, 2003

E

1A

of

853,

5

4

3

2

1

Layout note :

Distr ib ute as cl ose as possib le
to M CH Processor Qu adrant.(b etween VTTFSB and VSS pin)

+CPU_CORE

D D

12

C45
.1UF_0402_X5R

+CPU_CORE

12

C108
.1UF_0402_X5R

+CPU_CORE

12

C9

10UF_6.3V_1206_X5R

C C

Layout note :

Distr ib ute as cl ose as possib le
to MCH Processor Quadrant.(between VCCAGP/VCCCORE
and VSS pin)

Processor system bus

12

C46
.1UF_0402_X5R

12

C51
.1UF_0402_X5R

12

C8

10UF_6.3V_1206_X5R

12

C28
.1UF_0402_X5R

12

C18
.1UF_0402_X5R

AGP/CORE

12

C27
.1UF_0402_X5R

12

C17
.1UF_0402_X5R

12

C10

10UF_6.3V_1206_X5R

12

C47
.1UF_0402_X5R

12

C20
.1UF_0402_X5R

Layout note :

Distr ib ute as cl ose as possib le
to MCH Processor Quadrant.(between VCCSM and VSS pin)

+2.5V

12

C113
.1UF_0402_X5R

+2.5V

12

C116
.1UF_0402_X5R

+2.5V

12

C145
.1UF_0402_X5R

+2.5V

12

C181

+

150UF_D2_6.3V

DDR Memory interface

12

C126
.1UF_0402_X5R

12

C131
.1UF_0402_X5R

12

C161
.1UF_0402_X5R

12

C127
.1UF_0402_X5R

12

C121
.1UF_0402_X5R

12

C129
.1UF_0402_X5R

12

C156
.1UF_0402_X5R

12

C152
.1UF_0402_X5R

12

C130
.1UF_0402_X5R

12

C119
.1UF_0402_X5R

12

C142
.1UF_0402_X5R

12

C162
.1UF_0402_X5R

12

C124

22UF_10V_1206

12

C123

22UF_10V_1206

+1.5VS

12

C101
.1UF_0402_X5R

B B

+1.5VS

12

C11

10UF_6.3V_1206_X5R

Layout note :

Distr ib ute as cl ose as possib le
to MC H P roce ssor Quadrant.(between VCCHL and VSS pin)

+1.8VS

A A

12

C546

10UF_6.3V_1206_X5R

12

C111
.1UF_0402_X5R

12

C12

10UF_6.3V_1206_X5R

Hub-Link

12

C109
.1UF_0402_X5R

5

12

C93
.1UF_0402_X5R

12

C114
.1UF_0402_X5R

12

C23

+

150UF_D2_6.3V

12

12

C78
.1UF_0402_X5R

C110
.1UF_0402_X5R

12

C49
.1UF_0402_X5R

4

12

C71
.1UF_0402_X5R

Compal Electronics, inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Doc u men t Numbe r R e v

Dat e : Sheet

SCH E MATIC, M/B LA-1691

401241

期二 一月

1

1A

of

953¬P , 07, 2003

5

4

3

2

1

+2.5V

JP22

1

VREF

3
DDR_DQ0
DDR_DQ1

DDR_DQS0

D D

DDR_CLK08

DDR_CLK0#8

C C

DDR_SCS#08,12 DDR_SCS#1 8,12

B B

SMB_DATA11,13,20,22

SMB_CLK11,13,20,22

A A

DDR_DQ6
DDR_DQ7

DDR_DQ12
DDR_DQ15

DDR_DQS1
DDR_DQ14

DDR_DQ11

DDR_DQ20
DDR_DQ16

DDR_DQS2
DDR_DQ21

DDR_DQ23
DDR_DQ28

DDR_DQ26
DDR_DQS3

DDR_DQ27
DDR_DQ29

DDR_F_SMA12
DDR_F_SMA9

DDR_F_SMA7
DDR_F_SMA3

DDR_F_SMA1
DDR_F_SMA10

DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#0 DDR_SCS#1

DDR_DQ38
DDR_DQ37

DDR_DQS4
DDR_DQ35

DDR_DQ34
DDR_DQ40

DDR_DQ46
DDR_DQS5

DDR_DQ41
DDR_DQ42

DDR_DQ53
DDR_DQ55

DDR_DQS6
DDR_DQ50

DDR_DQ54
DDR_DQ57

DDR_DQ58
DDR_DQS7

DDR_DQ59
DDR_DQ62

SMB_DATA
SMB_CLK

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

AMP1376408_STANDARD

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS
DQ14
DQ15

VDD

VDD

VSS

VSS

DQ20
DQ21

VDD

DM2
DQ22

VSS
DQ23
DQ28

VDD
DQ29

DM3

VSS
DQ30
DQ31

VDD

CB4

CB5

VSS

DM8

CB6

VDD

CB7

DU/RESET#

VSS

VSS

VDD

VDD

CKE0

DU/BA2

VSS

VDD

BA1

RAS#
CAS#

VSS
DQ36
DQ37

VDD

DM4
DQ38

VSS
DQ39
DQ44

VDD
DQ45

DM5

VSS
DQ46
DQ47

VDD
CK1#

CK1

VSS
DQ52
DQ53

VDD

DM6
DQ54

VSS
DQ55
DQ60

VDD
DQ61

DM7

VSS
DQ62
DQ63

VDD

SA0

SA1

SA2

A11

A8
A6

A4
A2
A0

S1#

DU

DU

DIMM0

+2.5V

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ4
DDR_DQ5

DDR_DQ3
DDR_DQ2

DDR_DQ9
DDR_DQ13

DDR_DQ10
DDR_DQ8

DDR_DQ17
DDR_DQ18

DDR_DQ19
DDR_DQ22

DDR_DQ25
DDR_DQ24

DDR_DQ31
DDR_DQ30

DDR_CKE0DDR_CKE1
DDR_F_SMA11

DDR_F_SMA8
DDR_F_SMA6

DDR_F_SMA4DDR_F_SMA5
DDR_F_SMA2
DDR_F_SMA0

DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#

DDR_DQ32
DDR_DQ33

DDR_DQ36
DDR_DQ39

DDR_DQ45
DDR_DQ44

DDR_DQ47
DDR_DQ43

DDR_DQ49
DDR_DQ52

DDR_DQ51
DDR_DQ48

DDR_DQ56
DDR_DQ60

DDR_DQ61
DDR_DQ63

+SDREF_R

C241

0.1U_0402_16V4Z

DDR_CKE0 8,12DDR_CKE18,12

DDR_CLK1# 8
DDR_CLK1 8

L17

1 2

MurataBLM21A601S_0805

DDR_SDQ0 DDR_DQ0
DDR_SDQ1 DDR_DQ1

DDR_SDQ6 DDR_DQ6
DDR_SDQ7 DDR_DQ7

DDR_SDQ14 DDR_DQ14
DDR_SDQ11 DDR_DQ11

DDR_SDQ16

DDR_SDQ21 DDR_DQ21

DDR_SDQ26 DDR_DQ26

DDR_SDQ29 DDR_DQ29

DDR_SDQ37

DDR_SDQ34

DDR_SDQ40 DDR_DQ40

DDR_SDQ41 DDR_DQ41
DDR_SDQ42 DDR_DQ42

DDR_SDQ53 DDR_DQ53
DDR_SDQ55 DDR_DQ55

DDR_SDQ50 DDR_DQ50
DDR_SDQ54 DDR_DQ54

DDR_SDQ58 DDR_DQ58

DDR_SDQ62

+SDREF

RP50 4P2R_10
1 4
2 3

RP49 4P2R_10
1 4
2 3

RP48 4P2R_10
1 4
2 3

RP47 4P2R_10
1 4
2 3

RP46 4P2R_10
1 4
2 3

RP45 4P2R_10
1 4
2 3

RP44 4P2R_10
1 4
2 3

RP43 4P2R_10
1 4
2 3

RP39 4P2R_10
1 4
2 3

RP38 4P2R_10
1 4
2 3

RP37 4P2R_10
1 4
2 3

RP36 4P2R_10
1 4
2 3

RP35 4P2R_10
1 4
2 3

RP34 4P2R_10
1 4
2 3

RP33 4P2R_10
1 4
2 3

RP32 4P2R_10
1 4
2 3

DDR_DQ12DDR_SDQ12
DDR_DQ15DDR_SDQ15

DDR_DQ20DDR_SDQ20
DDR_DQ16

DDR_DQ23DDR_SDQ23

DDR_DQ28DDR_SDQ28

DDR_DQ27DDR_SDQ27

DDR_DQ38DDR_SDQ38
DDR_DQ37

DDR_DQ35DDR_SDQ35
DDR_DQ34

DDR_DQ46DDR_SDQ46

DDR_DQ57DDR_SDQ57

DDR_DQ59DDR_SDQ59

DDR_SDQ4 DDR_DQ4
DDR_SDQ5 DDR_DQ5

DDR_SDQ2

DDR_SDQ13 DDR_DQ13

DDR_SDQ10 DDR_DQ10
DDR_SDQ8 DDR_DQ8

DDR_SDQ17 DDR_DQ17
DDR_SDQ18

DDR_SDQ22

DDR_SDQ25 DDR_DQ25
DDR_SDQ24

DDR_SDQ33

DDR_SDQ36 DDR_DQ36
DDR_SDQ39 DDR_DQ39

DDR_SDQ47 DDR_DQ47

DDR_SDQ56 DDR_DQ56
DDR_SDQ60 DDR_DQ60

DDR_SDQ61
DDR_SDQ63

RP27 4P2R_10
1 4
2 3

RP26 4P2R_10
1 4
2 3

RP25 4P2R_10
1 4
2 3

RP24 4P2R_10
1 4
2 3

RP23 4P2R_10
1 4
2 3

RP22 4P2R_10
1 4
2 3

RP21 4P2R_10
1 4
2 3

RP20 4P2R_10

DDR_SDQ31 DDR_DQ31

1 4

DDR_SDQ30

2 3

RP16 4P2R_10
1 4
2 3

RP15 4P2R_10
1 4
2 3

RP14 4P2R_10
1 4
2 3

RP13 4P2R_10
1 4
2 3

RP12 4P2R_10
1 4
2 3

RP11 4P2R_10
1 4
2 3

RP10 4P2R_10
1 4
2 3

RP9 4P2R_10
1 4
2 3

DDR_DQ3DDR_SDQ3
DDR_DQ2

DDR_DQ9DDR_SDQ9

DDR_DQ18

DDR_DQ19DDR_SDQ19
DDR_DQ22

DDR_DQ24

DDR_DQ30

DDR_DQ32DDR_SDQ32
DDR_DQ33

DDR_DQ45DDR_SDQ45
DDR_DQ44DDR_SDQ44

DDR_DQ43DDR_SDQ43

DDR_DQ49DDR_SDQ49
DDR_DQ52DDR_SDQ52

DDR_DQ51DDR_SDQ51
DDR_DQ48DDR_SDQ48

DDR_DQ61
DDR_DQ63DDR_DQ62

DDR_SRAS#8,11,12

DDR_SCAS#8,11,12
DDR_SWE#8,11,12

DDR_SMA10 DDR_F_SMA10
DDR_SBS1 DDR_F_SBS1

DDR_SMA8

DDR_SMA0 DDR_F_SMA0

DDR_SBS0 DDR_F_SBS0

DDR_SMA12 DDR_F_SMA12

DDR_SMA11

DDR_SCAS# DDR_F_SCAS#

DDR_SWE# DDR_F_SWE#

DDR_SMA2 DDR_F_SMA2

DDR _ S DQS[0..7]

DDR_SMA[0..12]

DDR_SDQS1 DDR_DQS1
DDR_SDQS2 DDR_DQS2
DDR_SDQS3 DDR_DQS3
DDR_SDQS4 DDR_DQS4

RP18 4P2R_10
1 4
2 3

RP31 4P2R_10
1 4
2 3

RP41 4P2R_10
1 4
2 3

RP40 4P2R_10
1 4
2 3

RP29 4P2R_10
1 4
2 3

RP28 4P2R_10
1 4
2 3

RP17 4P2R_10
1 4
2 3

RP19 4P2R_10
1 4
2 3

RP42 4P2R_10
1 4
2 3

DDR_SDQ[0..63]
DDR_DQ[0..63]
DDR_DQS[0..7]

DDR_SBS[0..1]

R151 10_0402_5%
R150 10_0402_5%
R149 10_0402_5%
R148 10_0402_5%
R147 10_0402_5%
R146 10_0402_5%
R145 10_0402_5%
R144 10_0402_5%

DDR_F_SMA9DDR_SMA9
DDR_F_SMA8

DDR_F_SMA3DDR_SMA3

DDR_F_SRAS#DDR_SRAS#

DDR_F_SMA11

DDR_F_SMA7DDR_SMA7
DDR_F_SMA6DDR_SMA6

DDR_F_SMA1DDR_SMA1

DDR_F_SMA4DDR_SMA4
DDR_F_SMA5DDR_SMA5

DDR_SDQ[0..63] 8
DDR_DQ[0..63] 11,12
DDR_DQS[0..7] 11,12
DDR_SDQS[0..7] 8
DDR_SMA[0..12] 8,11,12
DDR_SBS[0..1] 8,11,12

DDR_DQS0DDR_SDQS0

DDR_DQS5DDR_SDQS5
DDR_DQS6DDR_SDQS6
DDR_DQS7DDR_SDQS7

Bottom Side

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

1

of

10 53,

1A

5

DDR_DQ0
DDR_DQ1

DDR_DQS0
DDR_DQ6

DDR_DQ7

D D

DDR_CLK38

DDR_CLK3#8

C C

DDR_CKE38,12

DDR_SBS08,10,12
DDR_SWE#8,10,12
DDR_SCS#28,12 DDR_SCS#3 8,12

B B

SMB_DATA10,13,20,22

SMB_CLK10,13,20,22

A A

DDR_DQ12
DDR_DQ15

DDR_DQS1
DDR_DQ14

DDR_DQ11

DDR_DQ20
DDR_DQ16

DDR_DQS2
DDR_DQ21

DDR_DQ23
DDR_DQ28

DDR_DQ26
DDR_DQS3

DDR_DQ27
DDR_DQ29

DDR_CKE3

DDR_SMA12
DDR_SMA9

DDR_SMA7
DDR_SMA3

DDR_SMA1
DDR_SMA10

DDR_SBS0
DDR_SWE#
DDR_SCS#2 DDR_SCS#3

DDR_DQ38
DDR_DQ37

DDR_DQS4
DDR_DQ35

DDR_DQ34
DDR_DQ40

DDR_DQ46
DDR_DQS5

DDR_DQ41
DDR_DQ42

DDR_DQ53
DDR_DQ55

DDR_DQS6
DDR_DQ50

DDR_DQ54
DDR_DQ57

DDR_DQ58
DDR_DQS7

DDR_DQ59
DDR_DQ62

+3VS

+2.5V

4

JP24
1
3
5
7
9

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

AMP1376408_REVERSE

VREF

VSS
DQ4
DQ5
VDD
DM0
DQ6

VSS
DQ7

DQ12

VDD

DQ13

DM1

VSS

DQ14
DQ15

VDD
VDD

VSS

VSS

DQ20
DQ21

VDD
DM2

DQ22

VSS

DQ23
DQ28

VDD

DQ29

DM3

VSS

DQ30
DQ31

VDD

CB4

CB5

VSS
DM8

CB6
VDD

CB7

DU/RESET#

VSS

VSS
VDD
VDD

CKE0

DU/BA2

VSS

VDD

BA1

RAS#
CAS#

VSS

DQ36
DQ37

VDD
DM4

DQ38

VSS

DQ39
DQ44

VDD

DQ45

DM5

VSS

DQ46
DQ47

VDD

CK1#

CK1

VSS

DQ52
DQ53

VDD
DM6

DQ54

VSS

DQ55
DQ60

VDD

DQ61

DM7

VSS

DQ62
DQ63

VDD

SA0

SA1

SA2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

A11

102

A8

104
106

A6

108

A4

110

A2

112

A0

114
116
118
120
122

S1#

124

DU

126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DU

+2.5V

3

DDR_DQ4
DDR_DQ5

DDR_DQ3
DDR_DQ2

DDR_DQ9
DDR_DQ13

DDR_DQ10
DDR_DQ8

DDR_DQ17
DDR_DQ18

DDR_DQ19
DDR_DQ22

DDR_DQ25
DDR_DQ24

DDR_DQ31
DDR_DQ30

DDR_CKE2

DDR_SMA11
DDR_SMA8

DDR_SMA6
DDR_SMA4DDR_SMA5
DDR_SMA2
DDR_SMA0

DDR_SBS1
DDR_SRAS#
DDR_SCAS#

DDR_DQ32
DDR_DQ33

DDR_DQ36
DDR_DQ39

DDR_DQ45
DDR_DQ44

DDR_DQ47
DDR_DQ43

DDR_DQ49
DDR_DQ52

DDR_DQ51
DDR_DQ48

DDR_DQ56
DDR_DQ60

DDR_DQ61
DDR_DQ63

+SDREF_R

1 2

C264

MurataBLM21A601S_0805

0.1U_0402_16V4Z

DDR_CKE2 8,12

DDR_SBS1 8,10,12
DDR_SRAS# 8,10,12
DDR_SCAS# 8,10,12

DDR_CLK4# 8
DDR_CLK4 8

+3VS

2

L19

+SDREF

DDR_DQ[0..63]

DDR_SMA[0..12]

DDR_DQS[0..7]

DDR_CKE[0..3]

DDR_DQ[0..63] 10,12

DDR_SMA[0..12] 8,10,12

DDR_DQS[0..7] 10,12

DDR_CKE[0..3] 8,10,12

1

DIMM1

Bottom Side

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

1

of

11 53,

1A

A

B

C

D

E

+1.25VS

RP104 4P2R_56

DDR_DQ0

1 4

DDR_DQ1

2 3

RP81 4P2R_56

DDR_DQ2

1 4

DDR_DQ6

1 1

2 2

3 3

2 3

RP80 4P2R_56

DDR_DQ13

1 4

DDR_DQ12 DDR_DQ3

2 3

RP100 4P2R_56

DDR_DQ14

1 4

DDR_DQ11

2 3

RP99 4P2R_56

DDR_DQ20

1 4

DDR_DQ16 DDR_DQ8

2 3

RP77 4P2R_56

DDR_DQ22

1 4

DDR_DQ21

2 3

RP76 4P2R_56

DDR_DQ24 DDR_DQS2

1 4

DDR_DQ28

2 3

RP95 4P2R_56

DDR_DQ27

1 4

DDR_DQ29

2 3

RP92 4P2R_56

DDR_DQ38

1 4

DDR_DQ37

2 3

RP68 4P2R_56

DDR_DQ34

1 4

DDR_DQ36

2 3

RP67 4P2R_56

DDR_DQ46 DDR_DQ39

1 4

DDR_DQ45

2 3

RP88 4P2R_56

DDR_DQ41

1 4

DDR_DQ42

2 3

RP87 4P2R_56

DDR_DQ53

1 4

DDR_DQ55

2 3

RP64 4P2R_56

DDR_DQ54

1 4

DDR_DQ51

2 3

RP84 4P2R_56

DDR_DQ58

1 4

DDR_DQS7

2 3

RP63 4P2R_56

DDR_DQ56

1 4

DDR_DQ60

2 3

RP101 4P2R_56

DDR_DQ15

1 4

DDR_DQS1

2 3

RP96 4P2R_56

DDR_DQ26

1 4

DDR_DQS3

2 3

RP91 4P2R_56

DDR_DQS4

1 4

DDR_DQ35

2 3

RP86 4P2R_56

DDR_DQS6

1 4

DDR_DQ50

2 3

RP94 4P2R_56

DDR_SMA7

1 4

DDR_SBS0

2 3

RP60 4P2R_56

DDR_SMA12

1 4

DDR_SMA9

2 3

RP59 4P2R_56

DDR_CKE2

1 4

DDR_CKE3

2 3

RP93 4P2R_56

DDR_SWE#

1 4

DDR_SCS#0

2 3

RP83 4P2R_56

14
23

RP82 4P2R_56

14
23

RP103 4P2R_56

14
23

RP102 4P2R_56

14
23

RP79 4P2R_56

14
23

RP78 4P2R_56

14
23

RP98 4P2R_56

14
23

RP97 4P2R_56

14
23

RP75 4P2R_56

14
23

RP69 4P2R_56

14
23

RP90 4P2R_56

14
23

RP89 4P2R_56

14
23

RP66 4P2R_56

14
23

RP65 4P2R_56

14
23

RP85 4P2R_56

14
23

RP62 4P2R_56

14
23

RP51 4P2R_56

14
23

RP52 4P2R_56

14
23

RP54 4P2R_56

14
23

RP55 4P2R_56

14
23

RP70 4P2R_56

14
23

RP71 4P2R_56

14
23

RP72 4P2R_56

14
23

RP73 4P2R_56

14
23

RP74 4P2R_56

14
23

DDR_DQ59
DDR_DQ62

DDR_DQ4
DDR_DQ5

DDR_DQS0

DDR_DQ7
DDR_DQ9

DDR_DQ10

DDR_DQ17
DDR_DQ18

DDR_DQ19

DDR_DQ23
DDR_DQ25

DDR_DQ31
DDR_DQ30

DDR_DQ32
DDR_DQ33

DDR_DQ40

DDR_DQ44
DDR_DQS5

DDR_DQ47
DDR_DQ43

DDR_DQ49
DDR_DQ52

DDR_DQ48
DDR_DQ57

DDR_DQ61
DDR_DQ63

DDR_SMA2
DDR_SCS#3

DDR_CKE0
DDR_SMA4

DDR_SMA1
DDR_SCS#2

DDR_CKE1
DDR_SMA5

DDR_SCAS#
DDR_SCS#1

DDR_SBS1

DDR_SRAS#

DDR_SMA10

DDR_SMA0

DDR_SMA6
DDR_SMA3

DDR_SMA11
DDR_SMA8

DDR_DQ[0..63]

DDR_SMA[0..12]

DDR_S CS#[0..3]

DDR_CKE[0..1]

DDR_CKE[2..3]

DDR_DQS[0..7]

DDR_SWE#

DDR_SRAS#

DDR_SCAS#

DDR_SBS0
DDR_SBS1

DDR_DQ[0..63] 10,11

DDR_SMA[0..12] 8,10,11

DDR_SC S#[0..3] 8 ,1 0 ,11

DDR_CKE[0..1] 8,10

DDR_CKE[2..3] 8,11

DDR_DQS[0..7] 10,11

DDR_SWE# 8,10,11

DDR_SRAS# 8,10,11

DDR_SCAS# 8,10,11

DDR_SBS0 8,10,11
DDR_SBS1 8,10,11

Layout note :

Distribute as close as possible
to DDR-SODIMM.

+2.5V

C242

0.1U_0402_16V7K

+2.5V +2.5V

12

C266

+

150UF_D2_6.3V

C243

0.1U_0402_16V7K

12

C255

+

150UF_D2_6.3V

+

C244

0.1U_0402_16V7K

12

C267
150UF_D2_6.3V

C245

0.1U_0402_16V7K

12

C220

+

150UF_D2_6.3V

Layout note :

Place one cap close to every 2 pull up resistors termination to
+1.25V

+1.25VS

C340

0.1U_0402_16V7K

C326

0.1U_0402_16V7K

C324

0.1U_0402_16V7K

C309

0.1U_0402_16V7K

C305

0.1U_0402_16V7K

+1.25VS

+1.25VS

+1.25VS

+1.25VS

+1.25VS

C337

0.1U_0402_16V7K

C335

0.1U_0402_16V7K

C321

0.1U_0402_16V7K

C306

0.01U_0402_16V7K

C302

0.1U_0402_16V7K

C338

0.1U_0402_16V7K

C336

0.1U_0402_16V7K

C322

0.1U_0402_16V7K

C307

0.1U_0402_16V7K

C303

0.1U_0402_16V7K

C339

0.1U_0402_16V7K

C325

0.1U_0402_16V7K

C323

0.1U_0402_16V7K

C308

0.1U_0402_16V7K

C304

0.1U_0402_16V7K

C246

0.1U_0402_16V7K

C341

0.1U_0402_16V7K

C327

0.1U_0402_16V7K

C313

0.1U_0402_16V7K

C310

0.1U_0402_16V7K

C291

0.1U_0402_16V7K

C258

0.1U_0402_16V7K

C342

0.1U_0402_16V7K

C328

0.1U_0402_16V7K

C314

0.1U_0402_16V7K

C311

0.1U_0402_16V7K

C292

0.1U_0402_16V7K

C259

0.1U_0402_16V7K

C331

0.1U_0402_16V7K

C329

0.1U_0402_16V7K

C315

0.1U_0402_16V7K

C312

0.1U_0402_16V7K

C293

0.1U_0402_16V7K

C260

0.1U_0402_16V7K

C332

0.1U_0402_16V7K

C330

0.1U_0402_16V7K

C316

0.1U_0402_16V7K

C299

0.1U_0402_16V7K

C294

0.1U_0402_16V7K

C262

0.1U_0402_16V7K

C333

0.1U_0402_16V7K

C319

0.1U_0402_16V7K

C317

0.1U_0402_16V7K

C300

0.1U_0402_16V7K

C295

0.1U_0402_16V7K

C261

0.1U_0402_16V7K

C334

0.1U_0402_16V7K

C320

0.1U_0402_16V7K

C318

0.1U_0402_16V7K

C301

0.1U_0402_16V7K

C296

0.1U_0402_16V7K

C263

0.1U_0402_16V7K

4 4

A

B

C297

0.1U_0402_16V7K

C298

0.1U_0402_16V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C290

0.1U_0402_16V7K

C

C289

0.1U_0402_16V7K

C288

0.1U_0402_16V7K

C287

0.1U_0402_16V7K

D

C343

0.1U_0402_16V7K

C344

0.1U_0402_16V7K

Title

Size Docu ment Number Re v
Custom

Date: Sheet

C345

0.1U_0402_16V7K

C346

0.1U_0402_16V7K

Compal Electronics, inc.

SCH EMATIC, M/B LA-1691

401241

星期二 一月

07, 2003

12 53,

E

of

1A

A

1 1

H_BSEL05
H_BSEL15

2 2

3 3

B

SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]

0 0 0 166.67 166.67
0 0 1 100.00 100.00
0 1 0 200.00 200.00
0 1 1 133.33 133.33

R123
@1K

R124 @0_0402_5%

1 2

R127 @0_0402_5%

1 2

12

R113

1K

CLK_ICH_48M20

SDCLK_48M37

CLK_ICH_14M20
CLK_14M_SIO32

@10P_0402_25V8K

C184

R121

1K

C

+3VS+3VS

12

12

R125

1K

12

12

R129
@1K

C185

@10P_0402_25V8K

D

+3VS

Place Crystal within 500mils of U8

C227

@10P_0402_50V8K

C228

@10P_0402_50V8K
BSEL2
BSEL0
BSEL1

PM_SLP_S1#20,38
PM_STPPCI#20

PM_STPCPU#20,48

CK408_PWRGD#41

+3VS

R88 10K_0402_1%

SMB_DATA10,11,20,22
SMB_CLK10,11,20,22

1 2

R92 475_0402_1%

R105 33_0402_5%

R89 33_0402_5%

R120 33_0402_5%
R117 33_0402_5%

XTAL_IN

12

Y2

14.318MHZ

XTAL_OUT

CLK_PWRDWN#

R131 0_0402_5%

1 2

SMB_DATA
SMB_CLK

ICH_48M

SD_CLK_48M

CLK_14M

L16
CHB2012U121

1 2

L13
CHB2012U121

1 2

+3V_CLK=40mils

U8

2

XTAL_IN

3

XTAL_OUT

40

SEL2

55

SEL1

54

SEL0

25

PWR_DWN#

34

PCI_STOP#

53

CPU_STOP#

28

VTT_PWRGD#

43

MULT0

29

SDATA

30

SCLK

33

3V66_0

35

3V66_1/VCH_CLK

42

IREF

39

48MHZ_USB

38

48MHZ_DOT

56

REF

ICS950810

E

+3V_CLK

Width=40 mils

+3V_CLK

1

14

VDD_PCI8VDD_PCI

VDD_REF

GND_REF4GND_PCI9GND_PCI15GND_3V6620GND_3V6631GND_48MHZ36GND_IREF41GND_CPU

VDD_3V6619VDD_3V66

32

37

VDD_48MHZ

1

C226
22U_1206_16V4Z_V1

2

50

VDDA

VDD_CPU46VDD_CPU

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1
CPUCLKT0

CPUCLKC0

3V66_5

3V66_4
3V66_3
3V66_2

PCICLK_F2
PCICLK_F1
PCICLK_F0

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

47

VSSA

26

27
45

44
49

48
52

51
24

23
22
21

7
6
5

18
17
16
13
12
11
10

12

C223

0.1UF_0402

1

2

CLK_BCLK

CLK_BCLK#

CLK_MCH

CLK_MCH#
CLK_ITP

CLK_ITP#

AGP_66M
MCH_66M
ICH_66M

PCI_ICH

**

CLKPCI_SD
PCI_1394
PCI_LAN
PCI_PCM
PCI_MINI
PCI_SIO
PCI_LPC

F

12

C229

0.1UF_0402

+3V_VDD

C230

0.1U_0402_16V7K

R111 33_0402_5%

R112 33_0402_5%
R109 33_0402_5%

R110 33_0402_5%
R107 33_0402_5%

R108 33_0402_5%

R143 33_0402_5%
R142 33_0402_5%
R141 33_0402_5%

R154 33_0402_5%

R158 33_0402_5%
R152 33_0402_5%
R157 33_0402_5%
R156 33_0402_5%
R140 33_0402_5%
R155 33_0402_5%
R139 33_0402_5%

12

C231

0.1UF_0402

1

C238
22U_1206_16V4Z_V1

2

1 2

12

C235

0.1UF_0402

C236

@10P_0402_25V8K

G

12

1

C224

0.1U_0402_16V7K

2

R99 49.9_0402_1%
R100 49.9_0402_1%

R97 49.9_0402_1%
R98 49.9_0402_1%

R95 49.9_0402_1%

R96

12

C197

0.1UF_0402

1

2

49.9_0402_1%

C237

@10P_0402_25V8K

H

Clock Generator

12

C195

0.1UF_0402

C232

0.1U_0402_16V7K

C196

0.1UF_0402

C233

@10P_0402_25V8K

L18
CHB2012U121

1 2

CLK_CPU_BCLK 4

CLK_CPU_BCLK# 4
CLK_MCH_BCLK 7

CLK_MCH_BCLK# 7
CLK_CPU_ITP 5

CLK_CPU_ITP# 5

CLK_AGP_66M 14
CLK_MCH_66M 7
CLK_ICH_66M 20

CLK_PCI_ICH 20

CLK_PCI_SD 37
CLK_PCI_1394 23
CLK_PCI_LAN 26
CLK_PCI_CB 24
CLK_PCI_MINI 28
CLK_PCI_SIO 32
CLK_LPC_EC 38

12

C219

0.1UF_0402

+3VS

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

F

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

G

of

13 53,

H

1A

1

AGP_AD[0:31]7

A A

B B

+3VS

AGP_DEVSEL#7

R538
@20K

R32 20K

X3

4

VDD

1

ST

OSC_27MHz

12

R547

0_0402

OUT
GND

STP_AGP#20
AGP_BUSY#20

+3VS

C C

+3VS

12

R337
10K_0603

12

C503

.1UF

AGP_FRAME#7
CLK_AGP_66M13

1 2

12

FREQOUT

3
2

Divide r circuit for 1.8Vdc XTALIN from 3.3Vdc OSC out

D D

1

AGP_REQ#7

AGP_GNT#7

PIRQA#/E#20,24

AGP_PAR7

AGP_STOP#7
AGP_TRDY#7

AGP_IRDY#7

PCIRST#7,20,23,24,25,26,28,30,32,37,38

AGP_ADSTB07

F_AGP_ADSTB0#7

AGP_ADSTB17

F_AGP_ADSTB1#7

AGP_SBA[0:7]7

1 2

R338

**

AGP_RBF#7

AGP_ST07
AGP_ST17
AGP_ST27

AGP_SBSTB7

F_AGP_SBSTB#7

+AGP_REF

120_0603

2

AGP_AD[0:31]

AGP_C/BE#07
AGP_C/BE#17
AGP_C/BE#27
AGP_C/BE#37

CLK_AGP

1 2

C499 @10P

R363

12

0_0402

R336

12

0_0402

AGP_SBA[0:7]

R334

12

0_0402

(10 mil)

12

R335
150_0603

2

1 2

R30 47_1%_0603

1 2

C40 .1UF_0402

12

C501
@15PF_0603

1 2

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

1 2

AGP_RBF#
AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#

R375 1K_0603

CRMA19

LUMA19

COMPS19

R60
845_1%_0603

3

AGP_REQ#
AGP_GNT#
GINTA#
AGP_PAR

R329@10

AGP_ST0
AGP_ST1
AGP_ST2

AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

AGP_SBSTB
AGP_SBSTB#

SSIN
SSOUT

OSCLIN

1 2

R2SET

(10 mil)

3

D24
C26
D25
D26

G23
G25
G24
G26
H24
H26
H25

M26
M24
N25
M25
N26

R25
R24
R26

N23
AA25
AA24

AA23
AA26

W24
AB25

AB26

W26

N24

W25

U26

U24

U25

C25

AE6

AE7

AF25
AF26

AC6

AF16
AF15
AF14
AE14
AF13

AF6

AF7
AE16

E23
E25
E24
E26
F26

L23
L26
L24

P23
P26
P24

T23
T25

F23

J25

L25

Y24

J23
J24

J26
K24
K26
K25

F25
F24
P25

Y26
Y23
Y25

V24
V26
V23

T26
T24

V25

B26

Y3

U36A

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

REQ#
GNT#
INTA#
PAR
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
RST#
PCICLK

SERR#
STP_AGP#

AGP_BUSY#
RBF#
AD_STB0
ADSTRB0#
AD_STB1
ADSTRB1#

ST0
ST1
ST2

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

SB_STB
SB_STB#

AGPTEST
AGPREF

SSIN
SSOUT

XTALIN
XTALOUT

TESTEN
ROMCS#
C_R

Y_G
COMP_B
H2SYNC
V2SYNC

CRT2DDCCLK
CRT2DDCDATA

R2SET

4

5

6

Option Stra p Pins

Tp0

Y2

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11

GPIO / ROM

GPIO12
GPIO13

ZV_LCDDATA0
ZV_LCDDATA1
ZV_LCDDATA2
ZV_LCDDATA3
ZV_LCDDATA4
ZV_LCDDATA5
ZV_LCDDATA6
ZV_LCDDATA7
ZV_LCDDATA8

ZV_LCDDATA9
ZV_LCDDATA10
ZV_LCDDATA11
ZV_LCDDATA12
ZV_LCDDATA13
ZV_LCDDATA14
ZV_LCDDATA15
ZV_LCDDATA16
ZV_LCDDATA17
ZV_LCDDATA18
ZV_LCDDATA19
ZV_LCDDATA20
ZV_LCDDATA21
ZV_LCDDATA22
ZV_LCDDATA23

ZV PORT / EXT TMDSLVDSTMDSDAC

ZV_LCDCNTL0

ZV_LCDCNTL1

ZV_LCDCNTL2

ZV_LCDCNTL3

TXOUT_L0N
TXOUT_L0P
TXOUT_L1N
TXOUT_L1P
TXOUT_L2N
TXOUT_L2P

PCI/AGP HOST BUS INTERFACECLK

TXOUT_L3N
TXOUT_L3P

TXCLK_LN

TXCLK_LP
TXOUT_U0N
TXOUT_U0P
TXOUT_U1N
TXOUT_U1P
TXOUT_U2N
TXOUT_U2P
TXOUT_U3N
TXOUT_U3P

TXCLK_UN
TXCLK_UP

LTGIO0
LTGIO1
LTGIO2

DIGON
BLON#

TX0M

TX0P

TX1M

TX1P

TX2M

TX2P
TXCM
TXCP

DVIDDCCLK

SSCDAC2

DVIDDCDATA

HPD

R
G
B

HSYNC
VSYNC

VGADDCCLK

VGADDCDATA

MONID0
MONID1

SUS_STAT#

AUXWIN

RSET

M6-C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

Tp1

Y1

Tp2

W3

Tp3

W2

Tp4

W1

Tp5

V4

Tp6

V3

Tp7

V2

Tp8

V1

Tp9

U3

Tp10

U2

Tp11

U1

Tp12

T4

Tp13

T3
AA4

AB1
AB2
AB3
AB4
AC1
AC2
AC3
AD1
AD2
AD3
AE1
AE2
AF1
AF2
AF3

Tp16

AE3

Tp17

AF4

Tp18

AE4

Tp19

AD4

Tp20

AF5

Tp21

AE5

Tp22

AD5

Tp23

AC5
Y4

AA1
AA2
AA3

AC8
AD8
AC9
AD9
AE8
AF8
AC10
AD10
AE9
AF9
AD11
AC11
AE11
AF11
AD12
AC12
AD13
AE13
AE12
AF12

AD7
AD6
AC7

AB10
AB9

AE19
AF19
AE20
AF20
AE21
AF21
AE18
AF18

AD20
AC20

AD21

AF24
AF23
AF22
AE24
AE23

DDCSCL

AC25

DDCSDA

AC26
AD24

AD25
AE25
AC22

RSET

AE22

R41 499_1%_0402

(10 mil)

**

C513
10U_0805_6.3V

R47 100K

1 2

R399 0

1 2

R38 10K

1 2
1 2

5

+3VS

TXA0- 18
TXA0+ 18
TXA1- 18
TXA1+ 18
TXA2- 18
TXA2+ 18

TXACLK- 18
TXACLK+ 18
TXB0- 18
TXB0+ 18
TXB1- 18
TXB1+ 18
TXB2- 18
TXB2+ 18

TXBCLK- 18
TXBCLK+ 18

ENVDD 18
BLON# 18

RED 18
GREEN 18
BLUE 18

HSYNC 18
VSYNC 18

SUS_STAT#

L40
BLM21P300S_0805

12

C508

0.1U

DDC_CLK 18
DDC_DATA 18

+3VS

+SPREAD_P2

12

12

R348
10K

12

R341
@10K

R343
10K

12

R342
10K

2

U32

VDD

1

X1/CLK

SSCLK

7
6

Xout

S0
S1

SSCC

GND

SM560

3

SM560 Schematic for 50MHz - 108MHz

SUS_STAT#

R398 10K_0603

SUS_STAT# 20

Title

Size Docume nt Num ber R e v
Custom

6

Date: Sheet

7

HOST INTERFACE

C520

1 2

@22P

R356

@10

1 2

1 2

12

R347
0

4

8
5

1 2

Compal Electronics, inc.

R361 22_0402_5%

12

C527
10P_0402_16V

1 2

R371 22_0402_5%

12

R353
@10

12

C519
@22P

+3V

SCHEMATIC, M/ B LA-1691

401241

星期二 一月

2003

7

SSOUT

SSIN

12

8

C528
@10P_0402_16V

14 53, 07,

of

8

1A

1

2

3

4

5

6

7

8

MEMORY INTERFACE

NMRAS# 16
NMCAS# 16
NMWE# 16
NMCS0# 16

NMCKE 16

12

C225

@15PF_0603

VMD[0:31]
NMA[0:13]
VDQM[0:3]

A A

RP8
16P8R-10

1

A26
B25
A25
A24
B23
A23
C22
B22
C21
B21
A21
D20
C20
B20
A20
C19
B18
A18
C17
B17
A17
D16
C16
B16
B15
A15
D14
C14
B14
A14
D13
C13

U36B

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

B1

DQ32

C1

DQ33

C2

DQ34

D1

DQ35

D2

DQ36

E1

DQ37

E2

DQ38

F1

DQ39

G2

DQ40

G3

DQ41

H1

DQ42

H2

DQ43

H3

DQ44

J1

DQ45

J2

DQ46

J3

DQ47

L1

DQ48

L2

DQ49

L3

DQ50

L4

DQ51

M1

DQ52

M2

DQ53

M3

DQ54

N1

DQ55

N4

DQ56

P1

DQ57

P2

DQ58

P3

DQ59

P4

DQ60

R1

DQ61

R2

DQ62

R3

DQ63

MEMORY INTERFACE

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8

MA9
MA10
MA11
MA12
MA13

DQM#0
DQM#1
DQM#2
DQM#3
DQM#4
DQM#5
DQM#6
DQM#7

QS0

QS1

QS2

QS3

QS4

QS5

QS6

QS7
RAS#
CAS#

WE#
CS#0
CS#1

CKE

CLK0

CLK0#

CLK1

CLK1#

CLKFB

VREF

MEMVMODE

NC
NC

NC
NC

M6-C

VMD0
VMD1
VMD2
VMD3
VMD4
VMD5
VMD6
VMD7
VMD8
VMD9
VMD10
VMD11
VMD12
VMD13
VMD14
VMD15
VMD16
VMD17
VMD18
VMD19

B B

C C

VMD20
VMD21
VMD22
VMD23
VMD24
VMD25
VMD26
VMD27
VMD28
VMD29
VMD30
VMD31

B13
A13
C12
B12
A12
D11
C11
B11
A11
C10
B10
A10
D9
C9

A22
D21
A16
C15
F2
G1
N2
N3

A19
B19
D18
C18
J4
K1
K2
K3

A9
C8
D8
B9
B8
A8
A6

B6
A4

B4
A7

B7
A5

B5
B3

T2
T1

VMA0
VMA1
VMA2
VMA3
VMA4
VMA5
VMA6
VMA7
VMA8
VMA9
VMA10
VMA11
VMA12
VMA13

VDQM0
VDQM1
VDQM2
VDQM3

VDQS0

VMRAS#
VMCAS#
VMWE#
VMCS0#

VMCKE

R135 0

VMCLK0

R130 22_0603

VMCLK0#

R133 22_0603

MVREF

1 2

R82

4.7K_0603

2
3
4
5
6
7
8 9
8 9
7
6
5
4
3
2
1

RP7
16P8R-10

RP30

8P4R_0
4 5
3 6
2 7
1 8

1 2
1 2

1 2

+1.8VS

16
15
14
13
12
11
10

10
11
12
13
14
15
16

VDQS0 16

(10 mil)

12

C159
.1UF_0402

NMA0
NMA1
NMA2
NMA3
NMA4
NMA5
NMA6
NMA7
NMA8
NMA9
NMA10
NMA11
NMA12
NMA13

NMRAS#
NMCAS#
NMWE#
NMCS0#

NMCKE

12

C213

@15PF_0603

+2.5VS

12

12

NMCLK0
NMCLK0#

R80
1K_1%_0603

R81
1K_1%_0603

VMD[0:31] 16
NMA[0:13] 16
VDQM[0:3] 16

NMCLK0 16
NMCLK0# 16

D D

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

3

4

5

6

SCHEMATI C, M /B LA-1691

Size Docume nt Num ber R e v
Custom

401241

Date: Sheet

星期二 一月

2003

7

15 53, 07,

8

1A

of

1

2

3

4

5

6

7

8

DDR SDRAM
4X32Mb

A A

+2.5VS

+2.5VS

12

12

C215

C564
10UF_1206

12

C203

VDQM0
VDQM3
VDQM1
VDQM2

VDQS0

.1UF_0402

B B

VMD[0:31]15

NMA[0:13]15

VDQM[0:3]15

NMWE#15
NMCAS#15
NMRAS#15
NMCS0#15

NMCKE15
NMCLK015

NMCLK0#15

C C

VDQS015

VMD[0:31]
NMA[0:13]
VDQM[0:3]

NMWE#
NMCAS#
NMRAS#
NMCS0#

NMCKE
NMCLK0
NMCLK0#

VDQS0

+2.5VS

R132
1K_1%_0603

1 2

VREF1

R138
1K_1%_0603

1 2

(10
mil)

12

C221
.1UF_0402

C207

.1UF_0402

2200PF_0603

12

12

C164

C167

.1UF_0402

.1UF_0402

R388 33_0603

1 2

R126 33_0603

1 2

R137 33_0603

1 2

R122 33_0603

1 2

R84 33_0603

1 2

NMCLK0

NMCLK0#

12

C214

12

C165
.1UF_0402

R134
120_0603

1 2

12

C166

2200PF_0603

2200PF_0603

12

C556
.1UF_0402

12

C553
.1UF_0402

NMA0
NMA1
NMA2
NMA3
NMA4
NMA5
NMA6
NMA7
NMA8
NMA9
NMA10
NMA11
NMA13
NMA12

NDQM0
NDQM3
NDQM1
NDQM2

NDQS0
NVREF0

NMRAS#
NMCAS#
NMWE#
NMCS0#

NMCKE

2

8

14

22

VDDQ

VDDQ

VDDQ

A0
A1
A2
A3
A4
A5
A6
A7
A8(AP)
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

DQS
VREF

MCL
RFU

RAS#
CAS#
WE#
CS#

CKE
CK

CK#
NC

NC
NC
NC
NC

VSSQ

5

11

VSSQ

19

VDDQ

VSSQ

31
32
33
34
47
48
49
50
51
45
36
37
29
30

23
56
24
57

94
58

52
93

27
26
25
28

53
55

54
87

88
89
90
91

59

62

67

VDDQ

VDDQ

VSSQ

VSSQ

70

73

VDDQ

VSSQ

76

L44

CHB2012U121

79

95

15

35

65

VDD

VDD

VDD

VDDQ

VDDQ86VDDQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

NC
NC
NC
NC
NC
NC
NC

VSS

VSS

VSS

VSSQ82VSS

VSSQ92VSSQ

16

46

66

99

96

U38

VDD

97
98
100
1
3
4
6
7
60
61
63
64
68
69
71
72
9
10
12
13
17
18
20
21
74
75
77
78
80
81
83
84

38
39
40
41
42
43
44

K4D62323HA

85

DDR 4x32Mb

C169
10UF_1206

+FBVDD

12

C209
2200PF_0603

NMD0
NMD2
NMD1
NMD3
NMD5
NMD4
NMD7
NMD6
NMD31
NMD30
NMD29
NMD28
NMD27
NMD26
NMD25
NMD24
NMD10
NMD9
NMD8
NMD14
NMD13
NMD12
NMD11
NMD15
NMD23
NMD22
NMD21
NMD20
NMD19
NMD18
NMD17
NMD16

12

C168
.1UF_0402

12

C210
.1UF_0402

8 9
7
6
5
4
3
2
1
8 9
7
6
5
4
3
2
1
8 9
7
6
5
4
3
2
1
8 9
7
6
5
4
3
2
1

+FBVDD

10
11
12
13
14
15
16

10
11
12
13
14
15
16

10
11
12
13
14
15
16

10
11
12
13
14
15
16

C171
10UF_1206

RP122
16P8R-47

RP125
16P8R-47

RP124
16P8R-47

RP123
16P8R-47

VMD0
VMD2
VMD1
VMD3
VMD5
VMD4
VMD7
VMD6
VMD31
VMD30
VMD29
VMD28
VMD27
VMD26
VMD25
VMD24
VMD10
VMD9
VMD8
VMD14
VMD13
VMD12
VMD11
VMD15
VMD23
VMD22
VMD21
VMD20
VMD19
VMD18
VMD17
VMD16

D D

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

3

4

5

6

SCHEMATI C, M /B LA-1691

Size Docume nt Num ber R e v
Custom

401241

星期二 一月

Date: Sheet

2003

7

16 53, 07,

8

1A

of

1

A A

B B

C C

+VDD_DAC1.8

+VDD_DAC2.5

+VDD_PNLIO1.8

+VDD_PLL1.8

D D

+VDD_MEMPLL1.8

+VDD_PNLPLL1.8

+VDD_MCLK2.5

1

2

U36C

E5

VSS

C3

VSS

B2

VSS

A1

VSS

D4

VSS

T10

VSS

T11

VSS

T12

VSS

T13

VSS

T14

VSS

T15

VSS

T16

VSS

T17

VSS

K10

VSS

K11

VSS

K12

VSS

K13

VSS

K14

VSS

K15

VSS

K16

VSS

K17

VSS

L10

VSS

L11

VSS

L12

VSS

L13

VSS

L14

VSS

L15

VSS

L16

VSS

L17

VSS

M10

VSS

M11

VSS

M12

VSS

M13

VSS

M14

VSS

M15

VSS

M16

VSS

M17

VSS

N10

VSS

N11

VSS

N12

VSS

N13

VSS

N14

VSS

N15

VSS

N16

VSS

N17

VSS

P10

VSS

P11

VSS

P12

VSS

P13

VSS

P14

VSS

P15

VSS

P16

VSS

P17

VSS

R10

VSS

R11

VSS

R12

VSS

R13

VSS

R14

VSS

R15

VSS

R16

VSS

R17

VSS

U10

VSS

U11

VSS

U12

VSS

U13

VSS

U14

VSS

U15

VSS

U16

VSS

U17

VSS

C4

VSS

D3

VSS

E4

VSS

F5

VSS

D5

VSS

AD23

AVDD

AD22

AVSSN

AC21

AVSSQ

AD16

A2VDD

AD15

A2VDDQ

AC15

A2VSSN

AC16

A2VSSN

AE15

A2VSSQ

AC13

LVDDR

AD14

LVDDR

AB13

LVSSR

AC14

LVSSR

AC19

TXVDDR

AD19

TXVDDR

AD18

TXVSSR

AD17

TXVSSR

AC18

TXVSSR

AE26

PVDD

AD26

PVSS

A2

MPVDD

A3

MPVSS

AE17

TPVDD

AF17

TPVSS

AE10

LPVDD

AF10

LPVSS

C5

VDDRH

2

CORE & HOST & MEMORY & I/O POWER

3

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1

VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3
VDDR3

VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP
VDDP

3

M6-C

AB11
H5
K5
M5
R5
U5
W5
AB8
AB14
AB7
AB17
AB19
W22
U22
R22
M22
K22
H22
E19
E17
E15
E12
E10
E8
AB12

D10
C7
C23
D12
D17
E3
F4
B24
F3
D6
C6
D15
D19
D22
G4
E6
E7
E9
E11
E13
E14
E16
E18
E20
E21
G5
H4
J5
K4
L5
M4
N5
P5
R4
D7

T5
U4
V5
W4
Y5
AA5
AC4
AB5
AB6
AB15
AB16
AB18
AB20
AB21
AB22
AC17
AC23
AC24

E22
F22
G22
H23
J22
K23
L22
M23
N22
P22
R23
T22
U23
V22
W23
Y22
AA22
AB23
AB24
D23
C24

4

+1.8VS

C517

22UF_10V_1206

12

+2.5VS

+3VS

+1.5VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

1UF_0805

12

C133

.1UF_0402

12

C61

.1UF_0402

12

C135

.1UF_0402

C107

5

C526

22UF_10V_1206

12

C118

1000PF_0402

12

C85

.1UF_0402

12

C62

1000PF_0402

+1.5VS

12

C59

.1UF_0402

5

12

.1UF_0402

+1.8VS

12

1000PF_0402

12

C76

1000PF_0402

+3VS

12

C134

1000PF_0402

12

C48

.1UF_0402

C60

C125

12

C139

1000PF_0402

12

C132

.1UF_0402

+2.5VS

12

C89

1000PF_0402

12

C73

.1UF_0402

12

C56

.1UF_0402

+1.8VS

12

1000PF_0402

12

.01UF_0402

12

C98

.1UF_0402

12

C141
.1UF_0402

12

C64
.1UF_0402

C58

C105

6

12

C137

.1UF_0402

12

C112

.1UF_0402

12

C136

.1UF_0402

+2.5VS

6

12

C138
.1UF_0402

12

C72

.01UF_0402

7

8

POWER INTERFACE

+VDD_PLL1.8

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+1.8VS

+2.5VS

**

C115
.1UF_0402

Title

Size Docume nt Num ber R e v
Custom

Date: Sheet

L34

CHB1608U301

L43

CHB1608U301

L38

CHB1608U301

L37

CHB1608U301

**

L11

1 2

CHB1608U301

+VDD_DAC2.5

(20 mil)

C82
.1UF_0402

Compal Electronics, inc.

SCHEMATI C, M /B LA-1691

401241

星期二 一月

7

+VDD_MCLK2.5

(20 mil)

C536
.1UF_0402

2003

(20 mil)

C500

10UF_1206

+VDD_MEMPLL1.8

(20 mil)

C552

@10UF_1206

+VDD_PNLPLL1.8

(20 mil)

C505

10UF_1206

+VDD_DAC1.8

(20 mil)

C502

10UF_1206

+VDD_PNLIO1.8

(20 mil)

12

C100
.1UF_0402

12

C542
100PF

12

12

C90

C91

100PF

100PF

C43
.1UF_0402

C548
.1UF_0402

C81
.1UF_0402

C92
.1UF_0402

C104

1000PF_0402

12

C532
100PF

C529
470PF_0603

C99
470P_0402_50V7K

17 53, 07,

of

8

1A

A

1 1

3.3P_0402_50V8J

RED14

GREEN14

BLUE14

+CRT_VCC

HSYNC14

2 2

HSYNC

2 4

RED

GREEN

BLUE

R11 1K_0402_5%

135

U2 74AHCT1G125GW

C481

75_0402_1%

B

R308

3.3P_0402_50V8J

R309

75_0402_1%

C482

C483

3.3P_0402_50V8J

1 2

L29 FCM2012C-800(0805)

L28

1 2

FCM2012C-800(0805)

1 2

FCM2012C-800(0805)

R310

75_0402_1%

DAN217_SOT23

1

D1

2

3

C

+5VS

DAN217_SOT23

1

D2

2

D7

2 1

CH491D_SOT23

DAN217_SOT23

3

+R_CRT_VCC

1

D3

2

3

F1

FUSE_1A

.1UF_16V_0402_Y5V

+3VS

2.2K_0402_5%
21

C476

+CRT_VCC

R5

12

CRTR

CRTG

L27

CRTB

12
C480

8PF_0402_NPO

12
C479

8PF_0402_NPO

L30

1 2

FBM-11-160808-121

L1

1 2

FBM-11-160808-121

12
C477

12
C478

8PF_0402_NPO

12
C4

R6

2.2K_0402_5%

2.2K_0402_5%

+CRT_VCC

Q29

2N7002

D

R323

2

G

1 3

D

S

Q28

2N7002

1 3

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_7849S-15G2T-HC

+3VS

+3VS

R322
10K_0402_5%

2

G

D

S

CRT Connector

JP15

R321
10K_0402_5%

DDC_DATA

DDC_CLK

E

DDC_DATA 14

DDC_CLK 14

135

EC_ENBKL38

BLON#14

+LCDVDD

R344

VSYNC

12

13

2

22K

2

22K

A

VSYNC14

3 3

100_0603_5%

4 4

Q31

2N7002

ENVDD

ENVDD14

+5V

R366
10K_0402_5%
R367

47K_0603_5%

13

DTC124EK_SOT23

2 4

D13

RB751V

Q34

74AHCT1G125GW
U1

+3VS

DISPOFF#

21

13

2

22K

2

22K

R46

4.7K_0402_5%

Q3

2N7002

+12VALW

R384
100K_0603_5%

13

Q39
DTC124EK_SOT23

C63
1000P_0402_50V7K

R382

200K_0603_5%

2

C549

1000P_0603_50V7K

B

+3VS

13

Q35
SI2302DS-T1_SOT23

C77

.1U_0402_16V7K

+LCDVDD

C522

4.7U_1206_16V6K

C516

4.7U_1206_16V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

27PF_0402_NPO

27PF_0402_NPO

+3VS

10K_8P4R_1206_5%

C

0.1U_0603_50V4Z

RP5

220P_0402_25V8K

PID0

18

PID1

27

PID2

36

PID3

45

220P_0402_25V8K

100PF_0402_NPO

C37

C737

C739

12

12

C475

C2

100PF_0402_NPO

B+

C41
10U_1210_35V4Z

C738

220P_0402_25V8K

**

C740

220P_0402_25V8K

12
C474

100PF_0402_NPO

L5
CHB2012U170_0805

B+

PID032
PID132
PID232
PID332

D

1 2

1 2
L4
CHB2012U170_0805

DAC_BRIG38

INVT_PWM38

PID0
PID1
PID2
PID3

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

+LCDVDD

TXA0+14

TXA0-14

TXA1+14

TXA1-14

TXA2+14

TXA2-14

TXACLK+14

TXACLK-14

TXB0+14

TXB0-14

TXB1+14

TXB1-14

TXB2+14

TXB2-14

TXBCLK+14

TXBCLK-14

星期二 一月

DAC_BRIG
INVT_PWM
DISPOFF#

07, 2003

JP1

IB+

IPEX_20143-030E_30P

E

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

of

18 53,

1A

A

B

C

D

E

F

G

H

1 1

2 2

3 3

TV-OUT CONN.

LUMA14

CRMA14
COMPS14

LUMA

CRMA
COMPS

R543

75_0402_1%

75_0402_1%

R545

R544

75_0402_1%

C725
100P_0402_50V8K

C728
100P_0402_50V8K

DAN217_SOT23

2

C723 @33P_0402_50V8J

L55 CHB1608U301

1 2

C724 @33P_0402_50V8J

1 2

L56 CHB1608U301

DAN217_SOT23

1

D24

3

C727
270P_0402_25V8K

1

D26

2

C726
270P_0402_25V8K

3

+3VS

JP16

1

**

2
3
4

SUYIN_030008FR004T100XU

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

E

F

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

G

of

19 53,

H

1A

A

12

+3VS

PCI_C/BE#023,24,26,28
PCI_C/BE#123,24,26,28
PCI_C/BE#223,24,26,28
PCI_C/BE#323,24,26,28

PCI_GNT#022,23
PCI_GNT#122,28
PCI_GNT#222,24
PCI_GNT#322,26
PCI_GNT#422

PCI_REQ#022,23
PCI_REQ#122,28
PCI_REQ#222,24
PCI_REQ#322,26
PCI_REQ#422

1 2

R416 10M
R421

C573

2.4M
12PF

+VS_HUBVSWING

ECSMI#
ECSCI#
LID#

PM_SUSCLK

12

1 2

R441 @ 10K

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

R410 10M_0603

12

1 2

X4

32.768KHZ

PM_BATLOW#38

AGP_BUSY#14

ICH3-M

STP_AGP#14

PM_CPUPERF#5

PM_GMUXSEL48

PM_STPCPU#13,48

PM_RSMRST#38

EC_RIOUT#38

SYS_PWROK41

PM_DPRSLPVR48

PM_CLKRUN#22,23,24,28,32,38

J2

K1

J4
K3
H5
K4
H3

L1

L2

G2

L4
H4

M4

J3

M5

J1
F5
N2

G4

P2

G1

P1
F2
P3
F3
R1
E2
N4
D1
P4
E1
P5

K2
K5
N1
R2

A4
E3
D2
D5
B4

D3
F4
A3
R4
E4

12

C569
12PF

ICH_VGATE41

ATF_INT#38

SUS_STAT#14

PM_STPPCI#13
PM_SLP_S5#38

PM_SLP_S3#38
PM_SLP_S1#13,38

U12A

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

RTC_VBIAS
RTC_X1

RTC_X2

PBTN#22

1 2

PM_LANPWROK

V4

PM_AGPBUSY#/GPIO6

PCI

Interface

VSS0A1VSS1

A13

Y5

PM_AUXPWROK

VSS2

A16

R_K

R_L

R1700

AA5

AA2

AB3

PM_BATLOW#

VSS3

A17

V5

A20

301_1%

301_1%

W20

AA1

AA6

AA7

AB1

AC2

AB21

PM_RI#

PM_PWROK

PM_SLP_S3#

PM_RSMRST#

PM_PWRBTN#

PM_DPRSLPVR

PM_SLP_S1#/GPIO19

PM_CLKRUN#/GPIO24

PM_C3_STAT#/GPIO21

VSS4

VSS5

VSS6B8VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

A23

B10

B13

B14

B15

B18

B19

B20

CLK_ICH_14M13
CLK_ICH_48M13

+RTCVCC

HUB Reference Voltage

+1.8VS

12

R430

Place R_K and R_L
Closely ICH3

12

R434

V21

PM_SLP_S5#

PM_STPCPU#/GPIO20

VSS13

VSS14

B22

PM_SUSCLK

AB4

U5

AA4

U21

PM_SUS_CLK

PM_SUS_STAT#

PM_STPPCI#/GPIO18

GeyservillePower Management

VSS15C3VSS16C6VSS17

F19

C14

1 2

R404 15K

+VS_HUBREF

EC_SMI#38
EC_SCI#38

EC_LID_OUT#38

RTCCLK24,25

IAC_RST#31,34
IAC_SDATAI034
IAC_SDATAI131

IAC_SDATAO31,34

IAC_SYNC31,34

1 1

IAC_BITCLK31,34

R159 0

IAC_RST#

IAC_SDATAI0
IAC_SDATAI1

IAC_SDATAO
IAC_SYNC
IAC_BITCLK

R487 10K

PCI_AD [0 ..3 1 ]23,24,26,28

Place closely to ICH3

CLK_ICH14

12

R447
@10

12

C627
@15PF

CLK_ICH48

12

2 2

R457
@10

12

C649
@15PF

3 3

+RTCVCC

12

R412

1K

C584

1 2

.047UF_0603

1 2

R415 22M

+1.8VS

R444

301_1%

12

4 4

R_G

12

R451

301_1%

12

HUB Interface VSwing Voltage

1. Pla ce R_G and R_H in middle of Bus.

12

C622
.1UF

R_H

A

B

C668

@ 10PF

12

R471

@ 33

IAC_SDATAI0

IAC_SDATAI1

IAC_BITCLK

IAC_RST#

V19

Y20

U20

D11

B11

C11

B7

AC_RST#

PM_THRM#

AC_BITCLK

AC_SDATAIN0

AC_SDATAIN1

PM_GMUXSEL/GPIO23

PM_CPUPREF#/GPIO22

PM_VGATE/VRMPWRGD

AC'97

Interface

ICH3-M (1/2)

VSS

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27D9VSS28

VSS29

C15

C16

C17

C18

C19

C20

C21

C22

D13

D16

CLK_ICH14
CLK_ICH48

C567

1UF_10V_0603

B

IAC_SDATAO

IAC_SYNC

1 2

1 2

R486 33

R488 0

C7

A7

AC_SYNC

AC_SDATAOUT

VSS30

VSS31

D17

D20

12

H_PICD1
H_PICD0
CLK_ICHAPIC

ECSCI#

ECSMI#

LID#

U2

LPC_AD0V1LPC_AD1U3LPC_AD2T3LPC_AD3

LPC

Interface

Clocks EEPROM

VSS32

VSS33

VSS34

E5

J23

D21

D22

W2

U4

U1

GPIO_7V2GPIO_8

LPC_DRQ#0T2LPC_DRQ#1

CLK_48

CLK_14

F20

GPIO_12Y4GPIO_13Y2GPIO_25W3GPIO_27W4GPIO_28

LPC_FRAME#

unMUX

GPIO

LAN

Interface

LAN_JCLKC9LAN_RSTSYNC

CLK_RTCX2

CLK_RTCX1

CLK_RTEST#

CLK_VBIAS

Y7

D7

A10

AB7

AC6

AC7

RTC_VBIAS

RTC_RST#

RTC_X2

RTC_X1

R396

1K

1 2

J1

1 2

JOPEN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPC_AD0 32,37,38
LPC_AD1 32,37,38
LPC_AD2 32,37,38
LPC_AD3 32,37,38
LPC_DRQ#0 22,38
LPC_DRQ#1 22,32
LFRAME# 32,37,38

J20

Y3

J19

INT_APICD0

INT_APICCLK

LAN_RXD0C8LAN_RXD1A8LAN_RXD2A9LAN_TXD0B9LAN_TXD1

LAN_TXD2

C10

PIRQC#

PIRQB#

PIRQA#

J21

B1

B2

INT_APICD1

INT_PIRQB#C1INT_PIRQA#

Interrupt
Interface

Interface

D10

12

R461
@0

+3VS

PIRQD#

PIRQE#

INT_PIRQD#A2INT_PIRQC#

EEP_CSE9EEP_DIND8EEP_DOUTE8EEP_SHCLK

PIRQF#

PIRQG#

B5

C5

A6

INT_PIRQF#/GPIO3

INT_PIRQE#/GPIO2

L19

1 2

R432 100K

INT_PIRQG#/GPIO4

HUB_VSWING

C

CLK_ICHAPIC
H_PICD0
H_PICD1

12

R452

1K

PIRQH#

H22

A5

W19

AB14

INT_IRQ15

INT_IRQ14

INT_SERIRQ

INT_PIRQH#/GPIO5

PCI_GPIO0/REQA#

PCI_GPIO1/REQB#/REQ5#

PCI_GPIO16/GNTA#

PCI_GPIO17/GNTB#/GNT5#

PCI

Interface

SM_INTRUDER#

System

Managment

Interface

SMB_ALERT#/GPIO11

CPU_A20GATE

CPU

Interface

CPU_PWRGOOD

HubLink

Interface

HUB_CLK

HUB_PAR

HUB_PSTRB

HUB_PSTRB#

HUB_RCOMP

HUB_VREF

L20

T19

P23

K19

R19

N22

CLK_ICHHUB

HUB_ICH_RCOMP

PM_LANPWROK

1 2

C575 .1UF

R485 @10K

GNTA#

1 2

C

12

12

R445
1K

INT_IRQ14 22,30
INT_IRQ15 22,29
SIRQ 22,24,32,37,38

PCI_CLK

PCI_DEVSEL#

PCI_FRAME#

PCI_IRDY#

PCI_PAR
PCI_PERR#
PCI_LOCK#

PCI_PME#

PCI_RST#

PCI_SERR#

STOP#

PCI_TRDY#

SMLINK0

SMLINK1

SMB_CLK

SMB_DATA

CPU_A20M#

CPU_DPSLP#

CPU_FERR#

CPU_IGNNE#

CPU_INIT#
CPU_INTR

CPU_NMI

CPU_RCIN#

CPU_SLP#

CPU_SMI#

STPCLK#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

HUB_PD10

R442
0

T5
M3
F1
C4
D4
B6
B3
N3
G5
M2
M1
W1
Y1
L5
H2
H1

Y6
AC3
AB2
AC4
AB5
AC5

Y22
V23
AB22
J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23

HUB_PD0

L22

HUB_PD1

M21

HUB_PD2

M23

HUB_PD3

N20

HUB_PD4

P21

HUB_PD5

R22

HUB_PD6

R20

HUB_PD7

T23

HUB_PD8

M19

HUB_PD9

P19

HUB_PD10

N19

CLK_ICH_66M 13
HUB_PSTRB 7
HUB_PSTRB# 7

+3VS

PIRQA#
PIRQB#
PIRQC#
PIRQD#

CLK_ICHPCI

GNTA#

FERR#

+VS_HUBREF

CLK_ICHHUB

R420
10

1 2

C595

5PF

R192 0_0402_5%

1 2

RP58

**

1 8
2 7
3 6
4 5

0_8P4R_1206_5%

R458 0_0402_5%

1 2

R483 @0_0402_5%

1 2

**

CLK_PCI_ICH 13
PCI_DEVSEL# 22,23,24,26,28
PCI_FRAME# 22,23,24,26,28
PCI_REQA# 22
PCI_REQB# 22

PCI_IRDY# 22,23,24,26,28
PCI_PAR 22,23,24,26,28
PCI_PERR# 22,23,24,26,28
PCI_LOCK# 22,24
ICH_W AKE_UP# 38

PCI_SERR# 22,23,24,26,28
PCI_STOP# 22,23,24,26,28
PCI_TRDY# 22,23,24,26,28

SM_INTRUDER# 22
SMLINK0 22
SMLINK1 22
SMB_CLK 10,11,13,22
SMB_DATA 10,11,13,22
SMB_ALERT# 22

GATEA20 38
H_A20M# 5

H_IGNNE# 5
H_INIT# 5
H_INTR 5
H_NMI 5
H_PWRGD 5
KBRST# 38
H_CPUSLP# 5
H_SMI# 5
H_STPCLK# 5

HUB_PD[0..10]

+VS_HUBVSWING

12

C617
.01UF

Close to ICH3-M.

R163 0

1 2

R433 36.5_1%

12

C616
.01UF

Title

Size Docu ment Number Re v
Custom

Date: Sheet

D

PIRQA#_1394

PIRQA#/E#
PIRQB#/F#/D#
PIRQC#/G#
PIRQD#/H#

PIRQ_LAN/B#/D#

+3VS

C661
@10PF

12

R160
@10K

FERR#

**

RP129
1
2
3
4
5

10P8R_8.2K

RP127
1 8
2 7
3 6
4 5

@0_8P4R_1206_5%

PCIRST# 7,14,23,24,25,26,28,30,32,37,38

(for use if CPU unable
to support D PSLP#)

H_DPSLP# 5

+3VS

12

R182
300

2

Q45

3 1

3904

H_FERR#5

PIRQE#
PIRQF# PIRQA#
PIRQH#
PIRQG#

PIRQH#
PIRQG# PIRQC#/G#
PIRQF#
PIRQE#

1 2

R465

33

+CPU_CORE

1 2

HUB_PD[0..10] 7

Place closely to ICH3

CLK_ICHPCI

12

R418
@10

12

C601
@15PF

Compal Electronics, inc.

SCHEM A TIC , M/ B LA -1691
401241

星期二 一月

07, 2003

D

PIRQA#_1394 23

PIRQA#/E# 14,24
PIRQB#/F#/D# 24
PIRQC#/G# 28
PIRQD#/H# 28

PIRQ_LAN/B#/D# 26

+3VS

10
9

PIRQB#

8

PIRQC#

7

PIRQD#

6

PIRQD#/H#
PIRQB#/F#/D#

PIRQA#/E#

12

R443
470

2

Q44

3 1

3904

1 2

R431 470

CLK_ICHAPIC

R446
@33

1 2

C639
@10PF

of

20 53,

1A

A

B

C

D

E

+5VS +3VS

21

12

R419

1K

1 1

+1.8VALW

**

1 2

R455

0_0805

U12B

D19

USB_PP0

A19

USB_PP1

E17

USB_PP2

B17

USB_PP3

D15

USB_PP4

A15

USB_PP5

D18

USB_PN#0

A18

USB_PN#1

E16

USB_PN#2

B16

USB_PN#3

D14

USB_PN#4

A14

USB_PN#5

E12

USB_OC#0

D12

USB_OC#1

C12

USB_OC#2

B12

USB_OC#3

A12

USB_OC#4

A11

USB_OC#5

H20

USB_LEDA#0/GPIO32

G22

USB_LEDA#1/GPIO33

F21

USB_LEDA#2/GPIO34

G19

USB_LEDA#3/GPIO35

E22

USB_LEDA#4/GPIO36

E21

USB_LEDA#5/GPIO37

H21

USB_LEDG#0/GPIO38

G23

USB_LEDG#1/GPIO39

F23

USB_LEDG#2/GPIO40

G21

USB_LEDG#3/GPIO41

D23

USB_LEDG#4/GPIO42

E23

USB_LEDG#5/GPIO43

B21

USB_RBIAS

H23

SPKR

U19

VCCA

F17

VCCPSUS3/VCCPUSB0

F18

VCCPSUS4/VCCPUSB1

K14

VCCPSUS5/VCCPUSB2

E10

VCCPSUS0

V8

VCCPSUS1

V9

VCCPSUS2

USBP0+33
USBP0-33

USBP1+33
USBP1-33

USBP2+33
USBP2-33

USBP3+33
USBP3-33

2 2

USBP4+33
USBP4-33

+3V

RP105
8P4R_10K

1 8
2 7
3 6
4 5

3 3

USB_OC#2

USB_OC#5

1 2

R183 @0

12

R490

18.2_1%

Disable Timeout Feature

+3VS

1 2

R184 @1K

ICH_SPKR

USB_D_PP0
USB_D_PN0

USB_D_PP1
USB_D_PN1

USB_D_PP2
USB_D_PN2

USB_D_PP3
USB_D_PN3

USB_D_PP4
USB_D_PN4

OVCUR#033
OVCUR#133

OVCUR#333
OVCUR#233

PIDERST#30
SIDERST#30

FWH_WP#22

FWH_TBL#22

FLASH#39

ICH_SPKR36

+3VALW

+1.8VS

USB_D_PP0
USB_D_PP1
USB_D_PP2
USB_D_PP3
USB_D_PP4

USB_D_PN0
USB_D_PN1
USB_D_PN2
USB_D_PN3
USB_D_PN4

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5

ICH_ACIN

USB_RBIAS

ICH_SPKR IDE_SDD12

R495

1 2

0_0805

+V3A_ICH

+1.8VS

D31
1SS355

12

C607
.1UF

L50

1 2

CHB2012U170

E13

F14

K12

P10

VCC_SUS0

VCC_SUS1

VCC_SUS2

USB

Interface

Misc

Power

VCC_SUS3

12

V7

VCC_SUS4V6VCC_SUS5

+V5S_ICHREF

C603
1UF_10V_0603

+V1.8_ICHLAN

F15

F16

VCC_USB0/VCC_SUS6

VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8F7VCC_AUX1/VCCLAN1_8F8VCC_AUX2/VCCLAN1_8

+RTCVCC

AB6

K10

VCC_RTC

+V5S_ICHREF

W8

VCC5REF1E6VCC5REF2

+5VALW

12

R491
0

12

C673
.1UF

+3VS

VCC5REFSUS

12

C13

W5

F10

VCC5REFSUS1

VCC5REFSUS2

VCCPAUX0/VCCLAN3_3F9VCCPAUX1/VCCLAN3_3

+1.8VALW

+CPU_CORE

R448
0_0805

P14

U18

V22

C23

VCCPCPU0

VCCPCPU1

VCCPCPU2

VCCUSBBG/VCC_SUS8

12

R449
0_0805

+1.8VA_ICH

B23

N/C0E7N/C1

Power

VCCUSBPLL/VCC_SUS9

T21

C2

N/C2D6N/C3T1N/C4

ICH3-M (2/2)

VSS

A21

A22

VSS102

VSS103

VCCPPCI0F6VCCPPCI1G6VCCPPCI2H6VCCPPCI3J6VCCPPCI4

M10

U6

VCCPPCI5R6VCCPPCI6T6VCCPPCI7

+3VS +1.8VS

G18

H18

P12

V15

V16

V17

V18

VCCP0

VCCP1

VCCPIDE0

VCCPIDE1

VCCPIDE2

VCCPIDE3

VCCPIDE4

E11

K6

K18

P6

P18

V10

VCCCORE0

VCCCORE1

VCCCORE2

VCCCORE3

IDE

Interface

V14

IDE_PDCS1#
IDE_PDCS3#

VCCCORE4

VCCCORE5

VCCCORE6

IDE_SDCS1#
IDE_SDCS3#

IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_PDDACK#
IDE_SDDACK#

IDE_PDDREQ
IDE_SDDREQ

IDE_PDIOR#

IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#

IDE_PIORDY

IDE_SIORDY

IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9

AC15
AB15
AC21
AC22

AA14
AC14
AA15
AC20
AA19
AB20

W12
AB11
AA10
AC10
W11
Y9
AB9
AA9
AC9
Y10
W9
Y11
AB10
AC11
AA11
AC12

Y17
W17
AC17
AB16
W16
Y14
AA13
W15
W13
Y16
Y15
AC16
AB17
AA17
Y18
AC18

Y13
Y19
AB12
AB18
AC13
AC19
Y12
AA18
AB13
AB19

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11

IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_PDCS1# 30
IDE_PDCS3# 30
IDE_SDCS1# 29
IDE_SDCS3# 29

IDE_PDA0 30
IDE_PDA1 30
IDE_PDA2 30
IDE_SDA0 29
IDE_SDA1 29
IDE_SDA2 29
IDE_PDD[0..15] 30

IDE_SDD[0..15] 29

IDE_PDDACK# 30
IDE_SDDACK# 29
IDE_PDDREQ 30
IDE_SDDREQ 29
IDE_PDIOR# 30
IDE_SDIOR# 29
IDE_PDIOW# 30
IDE_SDIOW# 29
IDE_PDIORDY 30
IDE_SDIORDY 29

J18

M14

R18

T18

VCCPHL0

VCCPHL1

VCCPHL2

VCCPHL3

VSS35

VSS36

VSS37

VSS38

VSS39

VSS40

VSS41G3VSS42

VSS43

VSS44

VSS45J5VSS46

VSS47

VSS48

VSS49

VSS50

VSS51

VSS52L3VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65N5VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

VSS72

VSS73

VSS74

VSS75

VSS76

VSS77R3VSS78R5VSS79

VSS80

VSS81T4VSS82

VSS83

VSS84V3VSS85

VSS86

VSS87W6VSS88W7VSS89

VSS90

VSS91

VSS92

VSS93Y8VSS94

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

4 4

ACIN38,40,43

D18 RB751V

A

21

R194
100K

+3VS

12

ICH_ACIN

ICH3-M

L10

L11

L12

L13

L14

L21

F22

E14

E15

E18

E19

E20

B

K11

K13

K20

K21

K22

H19

G20

AA22

K23

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

L23

N10

M11

N11

M12

M13

M20

M22

C

P11

P13

P20

N12

N13

N14

P22

N21

N23

T20

T22

R21

R23

V20

AC23

W10

W14

W18

W22

AA3

AA8

VSS101

AB8

AC1

AC8

AA12

AA16

AA20

Title

Size Doc u men t Numbe r R e v
Custom

D

Dat e : Sheet

Compal Electronics, inc.

SCHEMATIC, M/B LA-1691
401241

期二 一月

E

of

21 53¬P , 07, 2003

1A

A

B

C

D

E

+3VS PULL-UP/BY-PASS

RP53

PCI_FRAME#20,23,24,26,28

PCI_IRDY#20,23,24,26,28

PCI_TRDY#20,23,24,26,28

PCI_STOP#20,23,24,26,28

1 1

PCI_REQA#20
PCI_REQ#020,23

PCI_REQ#120,28

PCI_GNT#120,28
PCI_GNT#220,24

PCI_GNT#020,23

+3VALW PULL-UP

2 2

1
2
3
4
5

+3VS +3VS

+3VS

10P8R_8.2K

RP128

1
2
3
4
5

10P8R_8.2K

RP56

1
2
3
4
5

10P8R_8.2K

+3VS+3VS

10
9
8
7
6

10
9
8
7
6

+3VS

10
9
8
7
6

PCI_SERR# 20,23,24,26,28
PCI_DEVSEL# 20,23,24,26,28
PCI_PERR# 20,23,24,26,28
PCI_LOCK# 20,24

PCI_REQ#2 20,24PCI_REQB#20
PCI_REQ#3 20,26
PCI_REQ#4 20
SIRQ 20,24,32,37,38

PCI_GNT#3 20,26
PCI_GNT#4 20

+3V PULL-UP/BY-PASS

+3VALW

SMLINK020
SMLINK120

SMB_ALERT#20

3 3

ON/OFF38,41

PBTN_OUT#

ON/OFF

1 2

R400 4.7K

1 2

R405 4.7K

1 2

R402 10K

1 2

R166 0

1 2

R168 @0

PBTN#

+3VALW

+1.8SV BY-PASS +V1.8S_ICHLAN BY-PASS

PBTN# 20PBTN_OUT#38

+1.8VS

+

SMB_DATA10,11,13,20

SMB_CLK10,11,13,20

12

C570
150UF_6.3V_D2

+3VS

12

+

C590
22UF_16V_1206

R403 4.7K

R401 4.7K

12

12

C605
.1UF

12

+

C577
22UF_16V_1206

FWH_WP#21
FWH_TBL#21

PM_CLKRUN#20,23,24,28,32,38

LPC_DRQ#020,38
LPC_DRQ#120,32

PCI_PAR20,23,24,26,28

1 2

1 2

12

C598
47PF

C623
.1UF

12

12

C615
.1UF

R450 @100

12

12

C628

C651

47PF

.1UF

12

C642
C589
.1UF

47PF

RP57

1 8
2 7
3 6
4 5

8P4R_10K

1 2

R173 10K

1 2

R176 10K

1 2

+3VS

12

C614
.1UF

12

12

C602
.1UF

12

12

C641
47PF

C580
.1UF

C606
.1UF

+3VS

+3VS

12

12

C585
C586
.1UF

47PF

12

12

C631
.1UF

12

C588

C587

.1UF

.1UF

INT_IRQ1420,30
INT_IRQ1520,29

12

C604
47PF

12

12

C632

C635

.1UF

.1UF

1 2

R472 8.2K

1 2

R454 8.2K

12

12

C593
47PF

+3VS

C636
.1UF

12

C638
.1UF

+RTCVCC PULL-UP

+RTCVCC

SM_INTRUDER#20

1 2

R427 100K

+V5S_ICHREF BY-PASS

+V1.8_ICHLAN

12

C625
.1UF

C613
.1UF

C644
.1UF

C645
.1UF

+V5S_ICHREF

12

+

C576

1UF_10V_0603

12

12

C578
.1UF

C643
.1UF

+CPU _C OR E BY -PAS S

+V3A_ICH

C653

C647

.1UF

.1UF

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C582
.1UF

C648
.1UF

C626

C579

.01UF

.01UF

C

+CPU_CORE

12

+

C600
1UF_10V_0603

12

C581
.1UF

D

12

C592
.1UF

+1.8VA_ICH BY-PASS+V3A_ICH BY-PASS

+1.8VA_ICH

12

+

C658

22UF_16V_1206

Compal Electronics, inc.

Title

Size Doc u men t Numbe r R e v
Custom

Dat e : Sheet

SCHEMATIC, M/B LA-1691

401241

期二 一月

12

C659
.1UF

E

12

12

C667
.1UF

C646
.1UF

1A

of

22 53¬P , 07, 2003

A

B

C

D

E

+3V

R440 10K_0402_5%

1 2

+3V

1 1

IDSEL:PCI_AD16

2 2

PCI_AD16

3 3

PCI_AD [0 ..3 1 ]20,24,26,28

1394_IDSEL

1 2

R477 100_0402_5%

PCI_C/BE#320,24,26,28
PCI_C/BE#220,24,26,28
PCI_C/BE#120,24,26,28
PCI_C/BE#020,24,26,28

CLK_PCI_139413

PCI_FRAME#20,22,24,26,28

PCI_TRDY#20,22,24,26,28

PCI_DEVSEL#20,22,24,26,28

PCI_PERR#20,22,24,26,28

PIRQA#_139420

PCI_SERR#20,22,24,26,28

PM_CLKRUN#20,22,24,28,32,38

PCI_GNT#020,22
PCI_REQ#020,22

PCI_IRDY#20,22,24,26,28

PCI_STOP#20,22,24,26,28

1394_PME#24,26,28,38

PCI_PAR20,22,24,26,28
PCIRST#7,14,20,24,25,26,28,30,32,37,38

PCI_A D[0..31]

CBRST#24,25,28

R436

220_0402_5%

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8

PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

CLK_PCI_1394

PCI_GNT#0
PCI_REQ#0
1394_IDSEL

PCI_FRAME#

PCI_IRDY#
PCI_TRDY#

PCI_DEVSEL#

PCI_STOP#
PCI_PERR#
PCI_PIRQA#
1394_PME#
PCI_SERR#
PCI_PAR

PCIRST#

1 2

R435
220_0402_5%

1 2

U44

TSB43AB21

84

PCI_AD0

82

PCI_AD1

81

PCI_AD2

80

PCI_AD3

79

PCI_AD4

77

PCI_AD5

76

PCI_AD6

74

PCI_AD7

71

PCI_AD8

70

PCI_AD9

69

PCI_AD10

67

PCI_AD11

66

PCI_AD12

65

PCI_AD13

63

PCI_AD14

61

PCI_AD15

46

PCI_AD16

45

PCI_AD17

43

PCI_AD18

42

PCI_AD19

41

PCI_AD20

40

PCI_AD21

38

PCI_AD22

37

PCI_AD23

32

PCI_AD24

31

PCI_AD25

29

PCI_AD26

28

PCI_AD27

26

PCI_AD28

25

PCI_AD29

24

PCI_AD30

22

PCI_AD31

34

PCI_C/BE3

47

PCI_C/BE2

60

PCI_C/BE1

73

PCI_C/BE0

16

PCI_CLK

18

PCI_GNT

19

PCI_REQ

36

PCI_IDSEL

49

PCI_FRAME

50

PCI_IRDY

52

PCI_TRDY

53

PCI_DEVSEL

54

PCI_STOP

56

PCI_PERR

13

PCI_INTA/CINT

21

PCI_PME/CSTSCHG

57

PCI_SERR

58

PCI_PAR

12

PCI_CLKRUN

85

PCI_RST

14

G_RST

89

GPIO3

90

GPIO2

VDDP20VDDP35VDDP48VDDP62VDDP

TSB43AB21
/(TSB4 3AB22)

PCI BUS INTERFACE

PLLGND18REG_EN9AGND

AGND

AGND

AGND

AGND

AGND

109

110

111

117

126

127

128

78

87

CYCLEIN

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

AGND

DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND

86

96

CNA

TEST1710TEST16

CYCLEOUT/CARDBUS

NC/(TPBIAS1)

NC/(TPA1+)
NC/(TPB1+)

103

11

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

PLLVDD

NC/(TPA1-)
NC/(TPB1-)

FILTER0
FILTER1

TPBIAS0

TPA0+

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

SDA
SCL
PC0

PC1
PC2

TPA0-

RP61
1 8
2 7
3 6
4 5

4.7K_8P4R_1206_5%

15
27
39
51
59
72
88
100
7
1
2
107
108
120

R456 1K_0402_5%

106

C680 @0.1U_0402_16V4Z

125
124
123

R492 @1K_0402_5%

122

R489 @1K_0402_5%

121
118

R0

R207 6.34K_0603_1%

119

R1

6

X0

5

X1

C354 0.1U_0402_16V4Z

3
4
92

1 2

R438 220_0402_5%

91

1 2

R439 220_0402_5%
99
98
97

TPBIAS0

116
115
114
113
112

94
95

101
102
104
105

+3V

+1394_PLLVDD

+3V

0.01U_0402_25V4Z

1 2

1 2
1 2

C687

24.576MHz

0.01U_0402_25V4Z

0.01U_0402_25V4Z

L52 0_0805_5%

1 2

C696

4.7U_0805_10V4Z

C697

Y5

15P_0402_50V8J

C698
15P_0402_50V8J

+3V

0.1U_0402_16V4Z

R470 56.2_0603_1%
R466 56.2_0603_1%

Place these components close to U48 pin112 to pin116

+3V

C637

0.01U_0402_25V4Z

+3V

C689

0.1U_0402_16V4Z

+3V

C640

0.1U_0402_16V4Z

TPB0­TPB0+
TPA0­TPA0+

TPA0+

TPA0­TPB0+
TPB0-

R460 56.2_0603_1%

R462 56.2_0603_1%

C685

0.01U_0402_25V4Z

C674

0.1U_0402_16V4Z

C633

0.1U_0402_16V4Z

JP25

1

1

2

2

3

3

4

4

FOX_UV31413-4R1

C666

0.33U_0603_16V4Z

R459 5.11K_0603_1%

C684

0.01U_0402_25V4Z

C670

0.1U_0402_16V4Z

C621

0.1U_0402_16V4Z

C654 220P_0402_50V8K

C657

C620

C688

C672

0.1U_0402_16V4Z

CLK_PCI_1394

12

R499

@22_0402_5%

C695

@10P_0402_50V8K

4 4

A

C694

@0.1U_0402_16V4Z

B

C608
@0.1U_0402_16V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

E

of

23 53,

1A

5

CardBus Controller
OZ6933B (uBGA)

C205

0.1U_0402_16V4Z

D D

+3VS

C222

4.7U_0805_10V4Z

+3VS

0.1U_0402_16V4Z

C206

0.1U_0402_16V4Z

C C

C172

0.1U_0402_16V4Z

C202

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C204

IDSEL:PCI_AD20

+3VS

R118
10K_0402_5%

B B

1 2

CLK_PCI_CB

R103
@33_0402_5%

1 2

C192
@10P_0402_50V8K

C194

PCI_C/BE#320,23,26,28
PCI_C/BE#220,23,26,28
PCI_C/BE#120,23,26,28
PCI_C/BE#020,23,26,28

CLK_PCI_CB13

PCI_DEVSEL#20,22,23,26,28

PCI_FRAME#20,22,23,26,28

PCI_IRDY#20,22,23,26,28

PCI_TRDY#20,22,23,26,28

PCI_STOP#20,22,23,26,28

PCI_PERR#20,22,23,26,28
PCI_SERR#20,22,23,26,28

PCI_REQ#220,22
PCI_GNT#220,22

PIRQA#/E#14,20

PIRQB#/F#/D#20

PCI_LOCK#20,22

PCM_PME#23,26,28,38

PM_CLKRUN#20,22,23,28,32,38

PCM_SPK#36

PCI_AD[0..3 1 ]20,23,26,28

C218

0.1U_0402_16V4Z

C211

0.1U_0402_16V4Z

PCI_AD20

PCI_PAR20,22,23,26,28

PCIRST#7,14,20,23,25,26,28,30,32,37,38

RING#38

SIRQ20,22,32,37,38

PCI_A D[0..31]
PCI_AD31

PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

R116 100_0402_5%

1 2

CLK_PCI_CB

OZ6933B

U39

E1

AD31

E2

AD30

F3

AD29

F1

AD28

G5

AD27

H6

AD26

G3

AD25

G2

AD24

H2

AD23

H1

AD22

J1

AD21

J2

AD20

J3

AD19

J6

AD18

K1

AD17

K2

AD16

M5

AD15

N2

AD14

N1

AD13

N3

AD12

N6

AD11

P1

AD10

P3

AD9

N5

AD8

P6

AD7

R2

AD6

R3

AD5

T1

AD4

W4

AD3

R6

AD2

U5

AD1

P7

AD0

G1

C/BE3#

K3

C/BE2#

M3

C/BE1#

R1

C/BE0#

H5

IDSEL

E3

PCI_CLK

L3

DEVSEL#

K6

FRAME#

L1

IRDY#

L2

TRDY#

L5

STOP#

M2

PAR

L6

PERR#

M1

SERR#

G6

PCI_REQ#

F5

PCI_GNT#

B5

IRQ9/INTA#

F6

IRQ4/INTB#

V5

LOCK#

D1

RST#

B14

IRQ12/PME#

A4

IRQ14/CLKRUN#

V9

IRQ15/RING_OUT

K19

SPKR_OUT#

J19

LED_OUT/SKT_ACTIVITY

E8

SKTB_ACTV

C5

IRQ5/SERIRQ

E6

IRQ7/SIN#/B_VPP_PGM

4

+3V +3VS

+3VS

R10

J18

B10

P5

L15

PCI_VCCF2PCI_VCCJ5PCI_VCCM6PCI_VCC

AUX_VCC

2

CARDBUS CONTROLLER

CORE_VCC

CORE_VCC

CORE_VCC

MICROO

OZ6933 209PIN CSP

PCI

GNDH3GNDK5GNDP2GNDW5GND

GND

NCE5IRQ3/VCC3#

GND

V15

K18NCB15

E11

3

S1_IOWR#
S1_IORD#
S1_OE#

S1_CE2#
S1_A[0..25]
S1_D[0..15]

S1_A6

S1_A1

S1_D10

S1_A0

S1_D1

S1_D8

S1_D9

S1_D0

L18

M19

M18

M15

N18

GRST#

M17

N17

P18

A_A0/CAD26

A_D9/CAD30

A_D1/CAD29

A_D8/CAD28

A_D0/CAD27

A_D10/CAD31

S1_A7

S1_A4

S1_A2

S1_A5

S1_A3

R19

N14

R17

T19

A_A1/CAD25

A_A2/CAD24

A_A3/CAD23

A_A4/CAD22

S1_A9

S1_A25

S1_A17

S1_A24

U15

W15

U11

P10

R14

P14

W11

U10

A_A5/CAD21

A_A6/CAD20

A_A7/CAD18

A_A9/CAD14

A_A25/CAD19

A_A24/CAD17

A_A17/CAD16

A_IOWR/CAD15

S1_D13

S1_D12

S1_D11

S1_D15

S1_A10

S1_A11

S1_D7

V10

P9

W9

R9

U9

U8

A_A10/CAD9

A_D15/CAD8

A_A11/CAD12

A_OE#/CAD11

A_CE2#/CAD10

A_IORD#/CAD13

A_D7/CAD7

R8

S1_D6

W7

A_D13/CAD6

A_D6/CAD5

V7

S1_D5

U7

A_D12/CAD4

A_D5/CAD3

W6

S1_D4

A_D11/CAD2

S1_D3

U6

A_D4/CAD1P8A_D3/CAD0

Slot
A

Slot B

SCLK/A_VCC_5#

SDATA/B_VCC_3#

SLATCH/B_VCC_5#

IRQ9/A_VPP_VCC

IRQ10/B_VPP_VCC

B_D10/CAD31B6B_D9/CAD30A6B_D1/CAD29B7B_D8/CAD28C7B_D0/CAD27A7B_A0/CAD26B8B_A1/CAD25A8B_A2/CAD24E9B_A3/CAD23B9B_A4/CAD22

F19

K14

K15

K17

P19

W12

S2_D10

S2_D9

S2_D1

S2_D8

S2_D0

SLATCH 25
SLDATA 25
RTCCLK 20,25

B_A5/CAD21

B_A6/CAD20

B_A25/CAD19

B_A7/CAD18

B_A24/CAD17

B_A17/CAD16

B_IOWR#/CAD15

B_A9/CAD14

B_IORD#/CAD13

B_A11/CAD12

B_OE#/CAD11

B_CE2#/CAD10

B_A10/CAD9

B_D15/CAD8

B_D7/CAD7

B_D13/CAD6

B_D6/CAD5

B_D12/CAD4

B_D5/CAD3

B_D11/CAD2

B_D4/CAD1

B_D3/CAD0

J14

F10

F11

F15

F14

F18

E10

B11

A11

E14

C11

D19

S2_A0

S2_A1

S2_A2

S2_A3

S2_A4

S2_A5

S2_A6

S2_A7

S2_A25

S2_A17

S2_A24

F17

E17

E19

G15

G18

S2_A9

S2_D15

S2_A11

S2_D7

S2_A10

H15

H14

H17

S2_D13

S2_D12

S2_D6

S2_CE2#
S2_OE#
S2_IORD#
S2_IOWR#

S2_A[0..25]
S2_D[0..15]

J17

H18

H19

S2_D11

S2_D3

S2_D5

S2_D4

CBRST# 23,25,28
S1_IOWR# 25
S1_IORD# 25
S1_OE# 25
S1_CE2# 25
S1_A[0..25] 25
S1_D[0..15] 25

A_SOCKET_VCC
A_SOCKET_VCC

A_REG#/CCBE3#

A_A12/CCBE2#

A_A8/CCBE1#

A_CE1#/CCBE0#

A_A16/CCLK

A_A23/CFRAME#

A_A15/CIRDY#

A_A22/CTRDY#

A_A21/CDEVSEL#

A_A20/CSTOP#

A_A13/CPAR

A_A14/CPERR

A_WAIT#/CSERR#

A_INPACK#/CREQ#

A_WE#/CGNT#

A_RDY_IRQ#/CINT#

A_A19/CBLOCK#

A_WP/CCLKRUN#

A_RST/CRESET#

A_D2/RFU
A_D14/RFU
A_A18/RFU

A_VS1/CVS1

A_VS2/CVS2
A_CD1#/CCD1#
A_CD2#/CCD2#

A_BVD2/CAUDIO

A_BVD1/CSTSCHG
B_BVD1/CSTSCHG

B_BVD2/CAUDIO

B_CD2#/CCD2#
B_CD1#/CCD1#

B_VS2/CVS2

B_VS1/CVS1

B_A18/RFU
B_D14/RFU

B_D2/RFU

B_RESET/CRESET#

B_WP/CCLKRUN#

B_A19/CBLOCK#

B_RDY_IRQ#/CINT#

B_WE#/CGNT#

B_INPACK#/CREQ#

B_WAIT#/CSERR#

B_A14/CPERR#

B_A13/CPAR

B_A20/CSTOP#

B_A21/CDEVSEL#

B_A22/CTRDY#

B_A15/CIRDY#

B_A23/CFRAME#

B_A16/CCLK

B_CE1#/CCBE0#

B_A8/CCBE1#

B_A12/CCBE2#

B_REG#/CCBE3#

B_SKT_VCC
B_SKT_VCC
B_SKT_VCC

S2_CE2# 25
S2_OE# 25
S2_IORD# 25
S2_IOWR# 25

S2_A[0..25] 25
S2_D[0..15] 25

R7
R13

N15
V14
V11
W8

V13
U14
P13
W14
U13
W13
R11
V12
R18
P17
R12
P12
U12
L17
P15
L19
V8
P11
W10
W16
V6
L14
M14
N19

F8
C8
C6
J15
A10
E18
C14
G17
F7
C10
A5
A14
F12
E13
C9
A9
A15
C15
C13
B13
A13
C12
B12
E12

G14
A16
A12
F9

G19
F13
E7

2

0.1U_0402_16V4Z
C212

S1_A12
S1_A8

S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A13
S1_A14

S1_A19

S1_D2
S1_D14
S1_A18

S2_A18
S2_D14
S2_D2

S2_A19

S2_A14
S2_A13
S2_A20
S2_A21
S2_A22
S2_A15
S2_A23

1 2

R91

S2_A8
S2_A12

+S2_VCC

C189

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C216

0.1U_0402_16V4Z

S1_REG# 25

S1_CE1# 25

1 2

R136

S1_WAIT# 25
S1_INPACK# 25

S1_WE# 25

S1_RDY# 25

S1_WP 25
S1_RST 25

S1_VS1 25
S1_VS2 25

S1_CD1# 25
S1_CD2# 25
S1_BVD2 25
S1_BVD1 25

S2_BVD1 25
S2_BVD2 25
S2_CD2# 25

S2_CD1# 25
S2_VS2 25
S2_VS1 25

S2_RST 25
S2_WP 25

S2_RDY# 25
S2_WE# 25

S2_INPACK# 25

S2_WAIT# 25

33_0402_5%

S2_CE1# 25

S2_REG# 25

C193

+S1_VCC

C217

0.1U_0402_16V4Z

S1_A16

33_0402_5%

S2_A16

C190

0.1U_0402_16V4Z

1

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

1

of

24 53,

1A

PCMCIA POWER CTRL.

+5VALW

+12VALW

+3VALW

C361
1U_0805_25V4Z
C286

0.1U_0402_16V4Z
C348

0.1U_0402_16V4Z
C282

0.1U_0402_16V4Z
C404

0.1U_0402_16V4Z

S1_A[0..25]24
S1_D[0..15]24
S2_A[0..25]24

S2_D[0..15]24

+S2_VPP

+S1_VPP

10U_1206_16V4Z

C406

0.1U_0402_16V4Z
C405

0.1U_0402_16V4Z

C370

0.01U_0402_25V4Z

C372

0.01U_0402_25V4Z

56P_0402_50V8J

C403

S1_A[0..25]
S1_D[0..15]
S2_A[0..25]
S2_D[0..15]

W=30mils

W=30mils

C376

0.1U_0402_16V4Z

SLDATA24
SLATCH24

RTCCLK20,24

C380

C371
1U_0805_25V4Z

C364
1U_0805_25V4Z

+S1_VCC

C387
1000P_0402_50V7K

U13

25

VCC_5V

7

12V

24

12V

1

5V

2

5V

30

5V

15

3.3V

16

3.3V

17

3.3V

3

DATA

5

LATCH

4

CLOCK

13

APWR_GOOD#

19

BPWR_GOOD#

18

OC#

TPS2206AI/TPS2216/OZ2206/G574

AVPP
AVCC
AVCC
AVCC

BVPP
BVCC
BVCC
BVCC

RESET

RESET#

NC
NC
NC
NC

GND

PCIRST#7,14,20,23,24,26,28,30,32,37,38 CBRST# 23,24,28

CARDBUS

SOCKET

+S1_VPP

+S1_VPP

W=40mils

+S1_VCC

8
9
10
11

23
20
21
22

6
14

26
27
28
29

12

+S2_VPP

W=40mils

CBRST#

C395

4.7U_0805_10V4Z

+S2_VPP
+S2_VCC

C393

4.7U_0805_10V4Z

9 8

U14C

10

74LVC125

+3V POWER

CBRST#

R250
10K_0402_5%

+3V

PCMRST# 38

S1_WP24

S1_CD2#24

S1_BVD124
S1_BVD224

S1_REG#24

S1_INPACK#24

S1_WAIT#24

S1_RST24

S1_VS224

+S1_VPP
+S1_VCC +S2_VCC
S1_RDY#24

S1_WE#24

S1_IOWR#24

S1_IORD#24

S1_VS124
S1_OE#24

S1_CE2#24

S1_CE1#24

S1_CD1#24

S1_WP
S1_CD2#
S1_D2
S1_D10
S1_D1
S1_D9

S1_D0
S1_D8
S1_A0
S1_BVD1
S1_A1
S1_BVD2
S1_A2

S1_REG#
S1_A3
S1_INPACK#
S1_A4
S1_WAIT#
S1_A5
S1_RST

S1_A6
S1_VS2
S1_A7
S1_A25
S1_A12
S1_A24
S1_A15

S1_A23
S1_A16
S1_A22

S1_A21
S1_RDY#
S1_A20

S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13
S1_A17
S1_A8

S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_VS1
S1_OE#
S1_CE2#

S1_A10
S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12

S1_D5
S1_D11
S1_D4
S1_CD1#
S1_D3

A1
A2
A3
A4
A5
A6
A7
A8

A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75

JP21

a68
a34
a67
a33
a66
a32
a65
a31
GND
a64
a30
a63
a29
a62
a28
a61
GND
a27
a60
a26
a59
a25
a58
a24
GND
a57
a23
a56
a22
a55
a21
a54
GND
a20
a53
a19
a52/a18
none
a51/a17
a16
a50
a15
GND
a49
a14
a48
a13
a47
a12
a46
GND
a11
a45
a10
a44
a9
a43
a8
GND
a42
a7
a41
a6
a40
a5
a39
GND
a4
a38
a3
a37
a2
a36
a1
a35

PCMC150PIN

GND

GND

GND

GND

b52/b18

none

b51/b17

GND

GND

GND

GND

B1

b68

B2

b34
b67
b33
b66
b32
b65
b31

b64
b30
b63
b29
b62
b28
b61

b27
b60
b26
b59
b25
b58
b24

b57
b23
b56
b22
b55
b21
b54

b20
b53
b19

b16
b50
b15

b49
b14
b48
b13
b47
b12
b46

b11
b45
b10
b44

b9

b43

b8

b42

b7

b41

b6

b40

b5

b39

b4

b38

b3

b37

b2

b36

b1

b35

S2_WP

B3

S2_CD2#

B4

S2_D2

B5

S2_D10

B6

S2_D1

B7

S2_D9

B8
B9

S2_D0

B10

S2_D8

B11

S2_A0

B12

S2_BVD1

B13

S2_A1

B14

S2_BVD2

B15

S2_A2

B16
B17

S2_REG#

B18

S2_A3

B19

S2_INPACK#

B20

S2_A4

B21

S2_WAIT#

B22

S2_A5

B23

S2_RST

B24
B25

S2_A6

B26

S2_VS2

B27

S2_A7

B28

S2_A25

B29

S2_A12

B30

S2_A24

B31

S2_A15

B32
B33

S2_A23

B34

S2_A16

B35

S2_A22

B36
B37
B38
B39

S2_A21

B40

S2_RDY#

B41

S2_A20

B42
B43

S2_WE#

B44

S2_A19

B45

S2_A14

B46

S2_A18

B47

S2_A13

B48

S2_A17

B49

S2_A8

B50
B51

S2_IOWR#

B52

S2_A9

B53

S2_IORD#

B54

S2_A11

B55

S2_VS1

B56

S2_OE#

B57

S2_CE2#

B58
B59

S2_A10

B60

S2_D15

B61

S2_CE1#

B62

S2_D14

B63

S2_D7

B64

S2_D13

B65

S2_D6

B66
B67

S2_D12

B68

S2_D5

B69

S2_D11

B70

S2_D4

B71

S2_CD1#

B72

S2_D3

B73
B74
B75

S2_WP 24
S2_CD2# 24

S2_BVD1 24
S2_BVD2 24

S2_REG# 24
S2_INPACK# 24
S2_WAIT# 24
S2_RST 24

S2_VS2 24

+S2_VPP

S2_RDY# 24

S2_WE# 24

S2_IOWR# 24
S2_IORD# 24
S2_VS1 24

S2_OE# 24
S2_CE2# 24

S2_CE1# 24

S2_CD1# 24

56P_0402_50V8J

C374
C400
10U_1206_16V4Z

0.1U_0402_16V4Z

+S2_VCC

C379

C384
1000P_0402_50V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

of

25 53,

1A

5

PCI_AD [0 ..3 1 ]20,23,24,28

D D

PCI_C/BE#020,23,24,28
PCI_C/BE#120,23,24,28
PCI_C/BE#220,23,24,28

C C

CLK_PCI_LAN13

B B

CLK_PCI_LAN

1 2

@22_0402_5%

PCI_C/BE#320,23,24,28

PCI_AD17 LAN_IDSEL

1 2

R383 100_0402_5%

PCI_PAR20,22,23,24,28

PCI_FRAME#20,22,23,24,28

PCI_IRDY#20,22,23,24,28

PCI_TRDY#20,22,23,24,28

PCI_DEVSEL#20,22,23,24,28

PCI_STOP#20,22,23,24,28

PCI_PERR#20,22,23,24,28
PCI_SERR#20,22,23,24,28

PCI_REQ#320,22

PCI_GNT#320,22

PIRQ_LAN/B#/D#20

LAN_PME#23,24,28,38

PCIRST#7,14,20,23,24,25,28,30,32,37,38

R71

C143

@10P_0402_50V8K

PCI_A D[0..31]

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

+3V

1

2

U4

45

AD0

44

AD1

42

AD2

41

AD3

38

AD4

37

AD5

36

AD6

33

AD7

30

AD8

29

AD9

28

AD10

27

AD11

26

AD12

25

AD13

24

AD14

23

AD15

10

AD16

9

AD17

8

AD18

5

AD19

4

AD20

3

AD21

1

AD22

100

AD23

95

AD24

94

AD25

93

AD26

92

AD27

91

AD28

89

AD29

87

AD30

86

AD31

32

C/BE#0

21

C/BE#1

11

C/BE#2

98

C/BE#3

99

IDSEL

20

PAR

12

FRAME#

13

IRDY#

14

TRDY#

15

DEVSEL#

17

STOP#

18

PERR#

19

SERR#

85

REQ#

84

GNT#

81

INTA#

57

PME#

82

RST#

83

CLK

6

VDD

22

VDD

34

VDD

Power

39

VDD

90

VDD

97

VDD

RTL8100BL_LQFP100

Note : Please inform the PCI_GNT, PCI_REQ, PIRQ(INT) and I DSEL number with BIOS team

Layout Recommend :

1. LAN_RD+, LAN_RD- should be equal length as possible

2. LAN_TD+, LAN_TD- should be equal length as possible

4

51

VDD25

96

VDD25

AVDD25

AVDD
AVDD
AVDD

Power

EEDO

EEDI
EESK
EECS

LED0
LED1
LED2

TXD+

TXD-

RXIN+

RXIN-

LAN I/F

PCI I/F

LWAKE

ISOLATE#

RTSET

RTT3

VCTRL

GND

GND

GND

GND

GND

GND

GND

GND

GND

AUX

NC
NC
NC
NC
NC
NC
NC
NC
NC

X1

X2

58
59
70
75

46
47
48
49

50
80

79
77

72
71

68
67

61

60
64
74
65
63
55
7

35
40
52
53
54
69
76
78

2
16
31
43
56
62
66
73
88

+2.5V_LAN_VDD

+3V_LAN_VDD
+3V_LAN_VDD
+3V_LAN_VDD

0.1U_0402_10V6K

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

VCTRL

+2.5VLAN

2

C83

0.1U_0402_10V6K

1

T=20mil

2

C523

1

R55

1 2

LAN_TD+
LAN_TD-

LAN_RD+
LAN_RD-

LAN_X1

LAN_X2
1 2
1 2
1 2

5.6K_0402_5%

220P_0402_25V8K

ACTIVITY#
LINK10_100#

R53 1K_0402_5%
R58 15K_0402_5%

R372 5.6K_0603_1%

T=20mil

2

C87

0.1U_0402_10V6K

1

4

DO

3

DI

2

SK

1

CS

U35

+3V

ACTIVITY# 27
LINK10_100# 27

LAN_RD+ 27
LAN_RD- 27

**

C741

2

1

9346

GND

VCC

+3VS

C551

0.1U_0402_10V6K

T=20mil
T=20mil

2

1

5
6

NC

7

NC

8

49.9_0603_1%

3

C524

0.1U_0402_10V6K

2

C539

0.1U_0402_10V6K

1

+3V

12

R373

Place as close to
U4(LAN Chip)

R379 0_0805_5%
L42 4.7UH

2

C86

0.1U_0402_10V6K

1

12

R374

49.9_0603_1%

1

C531

0.1U_0402_10V6K

2

12
12

LAN_TD+ 27
LAN_TD- 27

+2.5VLAN
+3V

2

1.Q40 pin2 close to U4 pin55

2.C497 and C88 close to Q40 pin1

+3V

Note : Imax for VDD25 = 40mA

2.5V should be ready before

31

VCTRL

C521

22U_1206_10V4Z

2

Q36
2SA1036K_SOT23

1

2

+3V is ready

+2.5VLAN

2

C515

0.1U_0402_10V6K

1

2.5VLAN power generated by VCTRL.

+3V

2

C550

0.1U_0402_10V6K

1

+3V

2

C154

0.1U_0402_10V6K

1

2

C543

0.1U_0402_10V6K

1

2

C547

0.1U_0402_10V6K

1

Y1

LAN_X1 LAN_X2

25MHZ_20P_1BX25000CK1A

1

C65
27P_0402_50V8J

2

1

2

2

C157

0.1U_0402_10V6K

1

2

C538

0.1U_0402_10V6K

1

C44
27P_0402_50V8J

1

3. The Maximum trace length between LAN chip(U4) and
Magnetic(U30) is 12cm(4.7")

4. The distance between Connector(JP17) and Magnetic(U34) should
be as short as possible

5. The Magnetic(U34) have differnt pin out if you select others
parts(like H0022), and it is needed to check the high limit with ME team

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

1

of

26 53,

1A

5

4

3

2

1

Keep O u t 40mil

D D

LAN_RD+26
LAN_RD-26

12

R355

49.9_0603_1%

12

R354

49.9_0603_1%

1

C525

0.1U_0402_10V6K

2

Place as close to Magnetic ( U3)

C C

Layout Note
H0013 pls close to
conn.

LAN_TD+26
LAN_TD-26

LAN_RD+
LAN_RD-

LAN_TD+

LAN_TD-

1

C514

0.1U_0402_10V6K

2

U30

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT
TD+7TX+

8

TD-

Pulse H0013

RX+

RX-

CT
NC
NC
CT

TX-

16
15
14
13
12
11
10
9

R25

75_0402_5%

+Amber_LED

RJ45_RX+
RJ45_RX-

RJ45_TX+
RJ45_TX-

12

12

R26
75_0402_5%

RJ45_GND

RJ45_RX-

RJ45_RX+
RJ45_TX­RJ45_TX+

+Green_LED

75_0402_5%

T=10mil

T=10mil

R28

R27
75_0402_5%

1 2

1 2

JP17

12

Amber LED+

11

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

10

Green LED-

9

Green LED+

AMP RJ45/RJ11 with LED

SHLD4
SHLD3

SHLD2
SHLD1

16
15

14
13

LAYOUT NOTICE: This area do not
connect to power plan include Vcc and

+3V

31

Q37

E

47K

ACTIVITY#26

B B

ACTIVITY#

B

2

10K

C

DTA114YKA_SOT23

R377

1 2

300_0402_5%

GND in any layer

+Amber_LED

RJ45_GND

C38

1 2

1000P_1206_2KV7K

LANGND

1

C21

@0.1U_0402_10V6K

2

Termination plane should be copled
to chassis ground and also depends
on safety concern

**

1

C5
@4.7U_0805_10V4Z

2

+3V

31

E

Q38

47K

LINK10_100#26

A A

5

LINK10_100#

B

2

10K

C

DTA114YKA_SOT23

R380

1 2

300_0402_5%

+Green_LED

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

1

of

27 53,

1A

12

C554

@1000PF

12

C583
@.1UF

+5VS_MINIPCI

12

C629
@.1UF

C265
@10UF_16V_1206

+3VS_MINIPCI

1 2

+3V

@CHB1608B121_0603

@0.1U_0402_16V4Z

12

WL_OFF#38
KILL_SW#33,38,40

L14

C559

CLK_PCI_MINI

R386
@33_0402_5%

C558
@10P_0402_50V8K

+3V

5

1
2

3

W=40mils

CLK_PCI_MINI13

C555

@0.1U_0402_16V4Z

PM_CLKRUN#20,22,23,24,32,38

C176 @0.1U_0402_16V4Z

U5

4

@TC7SH08FU_SSOP5

LAN RES ERVED

D14
@RB751V

PIRQD#/H#20

PCI_REQ#120,22

PCI_C/BE#320,23,24,26

PCI_C/BE#220,23,24,26

PCI_IRDY#20,22,23,24,26

PCI_SERR#20,22,23,24,26

PCI_C/BE#120,23,24,26

+5VS_MINIPCI

1 2

L12 @0_0603_5%

0603

+5VS_MINIPCI

MINI_PCI SOCKET

TIP RING

21

PIRQD#/H#

PCI_AD31
PCI_AD29

PCI_AD27
PCI_AD25

PCI_AD23
PCI_AD21

PCI_AD19
PCI_AD17

PCI_AD14
PCI_AD12

PCI_AD10
PCI_AD8

PCI_AD7
PCI_AD5
PCI_AD3

W=30mils

PCI_AD1

W=30mils W=20mils

JP20

112

KEY KEY

334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100

101

101

103

103

105

105

107

107

109

109

111

111

113

113

115

115

117

117

119

119

121

121

123

123

@Mini-PCI SLOT

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

116

118

118

120

120

122

122

124

124

LAN RESERVED

W=30mils

PIRQC#/G#

W=40mils

MINI_RST#

PCI_AD30
PCI_AD28

PCI_AD26
PCI_AD24

MINI_IDSEL

PCI_AD22
PCI_AD20

PCI_AD18
PCI_AD16

PCI_AD15
PCI_AD13
PCI_AD11

PCI_AD9

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

C630
@0.1U_0402_16V4Z

+3V+5VS

PIRQC#/G# 20

+3V

PCI_GNT#1 20,22
WLANPME# 23,24,26,38

1 2

@100_0402_5%

R128

PCI_PAR 20,22,23,24,26

PCI_FRAME# 20,22,23,24,26
PCI_TRDY# 20,22,23,24,26
PCI_STOP# 20,22,23,24,26

PCI_DEVSEL# 20,22,23,24,26PCI_PERR#20,22,23,24,26

PCI_C/BE#0 20,23,24,26

MINI_RST#

+5VS_MINIPCI

PCI_AD18

1 2

@0_0402_5%

R93

1 2

@0_0402_5%

R102

W=40mils

IDSEL : PCI_AD18

PCIRST#

@0.1U_0402_16V4Z

PCIRST# 7,14,20,23,24,25,26,30,32,37,38
CBRST# 23,24,25

+3VS_MINIPCI

L15

1 2

@CHB1608B121_0603

C560

C557

@0.1U_0402_16V4Z

+3V

+3VS_MINIPCI

12

C565
@.1UF

C234
@10UF_16V_1206

PCI_A D[0..31]

PCI_AD[0..31] 20,23,24,26

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

of

28 53,

1A

8MHZ_16PF_7D08000014

OSC1 OSC2

R247

1M_0402_5%

C385
10P_0402_50V8K

C369 10U_1206_16V4Z
R230 10K_0402_5%

+5VCD

+5VALW

C386

10U_1206_16V4Z

+5VALW

X1

D20

1N4148_SOT23

EC_SMD24,38

EC_SMC24,38

C391
1U_0805_25V4Z

R236

21

2N7002

+5VCD

+5VALW

1 2

C359

1U_0805_25V4Z

SUSP#34,38,39,42,47

IDE_SDA021
IDE_SDA121
IDE_SDA221

IDE_SDCS1#21
IDE_SDCS3#21

IDE_SDIOR#21

IDE_SDIOW#21

IDE_SDIORDY21

C392
10P_0402_50V8K

D

1 3

2

D

S

1 3

Q20

G

2

240K_0402_5%

R222 10K_0402_5%

SUSP# CDPLAY

Q15

DTC124EK_SOT23

IDE_SDDREQ21

IDE_SDDACK#21

Q19

S

2N7002

G

R232
100K_0402_5%

U18

1

S

D

2

S

D

3

S

D

G4D

SI4425DY-T1_SO8

22K

2

22K

INT_IRQ1520,22

SIDE_RST#30

8
7
6
5

13

R231
100K_0402_5%

+5VCD

IDE_SDIORDY

C375
10U_1206_16V4Z

13

22K

22K

DTC124EK_SOT23

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_SDA0
IDE_SDA1
IDE_SDA2

IDE_SDCS1#
IDE_SDCS3#

IDE_SDIOR#
IDE_SDIOW#

INT_IRQ15
IDE_SDDREQ
IDE_SDDACK#

SIDE_RST#

DM_ON

DM_ON

OSC1
OSC2

2

Q13

76

HDD0

78

HDD1

81

HDD2

83

HDD3

86

HDD4

90

HDD5

95

HDD6

97

HDD7

2

HDD8

4

HDD9

8

HDD10

11

HDD11

15

HDD12

18

HDD13

20

HDD14

22

HDD15

68

HDA0

70

HDA1

66

HDA2

63

HCS0

61

HCS1

99

HDIOR#

6

HDIOW#

72

HIOCS16#

93

HIORDY

74

HINTRQ

12

HDMARQ

88

HDMACK#

24

HRESET#

59

HDASPN

48

HSYNC

53

HBIT_CLK

55

HDATA_OUT

50

HDATA_IN

46

HACRSTN

28

PAV_EN

36

PLAY/PAUSE

35

FFORWARD

34

REWIND

37

STOP/EJECT

29

PCSYSTEM_OFF

25

INTN

30

RESET#

26

SDATA

27

SCLK

31

OSCI

32

OSCO

C382

0.1U_0402_16V4Z

CD_PLAY 38

+5VOZ

58

VDD9VDD44VDD

GND16GND33GND65GND85GND

92

CDD0
CDD1
CDD2
CDD3
CDD4
CDD5
CDD6
CDD7
CDD8

CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15

CDA0

CDA1

CDA2

CCS0

CCS1

CDIOR#
CDIOW#

CIOCS16#

CIORDY

CHINTRQ
CDMARQ

CHDMACK#

CRESET#

CDASPN

SSYNC

SBIT_CLK

SDATA_OUT

SDATA_IN
SACRSTN

PWR_CTL

ISCDROM

GPIO[1]/VOL_UP
GPIO[0]/VOL_DN

MODE0
MODE1

PAVMODE

CSN

INCN

UDN

CDD[0..15]30

IDE_SDD[0..15]21

U15
OZ168T-A1_TQFP100

CDD0

77

CDD1

79

CDD2

82

CDD3

84

CDD4

87

CDD5

91

CDD6

96

CDD7

98

CDD8

1

CDD9

3

CDD10

7

CDD11

10

CDD12

14

CDD13

17

CDD14

19

CDD15

21

CD_SBA0

69

CD_SBA1

71

CD_SBA2

67

CD_SCS1#

64

CD_SCS3#

62

CD_SIOR#

100

CD_SIOW#

5

CIOCS16#

73

CD_SIORDY

94

CD_IRQ

75

CD_DREQ

13

CD_DACK#

89

CD_RSTDRV#

23

CDASPN

60
47

52
54
49
45

51

80

1 2

R267

GPIO_1

39

GPIO_0

40

R277 @1K_0402_5%

56

1 2

MODE1

57

R258 10K_0402_5%

38
41

42
43

SUSP#

CDD[0..15]

IDE_SDD[0..15]

R280

12

@10K_0402_5%
R279

12

10K_0402_5%

2

G

ISCDROM

@0_0402_5%

+5VCD

R273
100K_0402_5%

13

D

S

CD_SBA0 30
CD_SBA1 30
CD_SBA2 30

CD_SCS1# 30
CD_SCS3# 30

CD_SIOR# 30
CD_SIOW# 30

CD_SIORDY 30

CD_IRQ 30
CD_DREQ 30
CD_DACK# 30

CD_RSTDRV# 30

+5VCD

DM_ON
Q22
2N7002

+5VOZ

C417

0.1U_0402_16V4Z

+3VALW

12

R556
@1K_0402_5%

2

R557

12

0_0402_5%

DM_ON

DIRECT CD

DM_ONHL SYSTEM ON

DM_ON 34

0.1U_0402_16V4Z
C414

0.1U_0402_16V4Z

+3VALW

***

12

R554
@1K_0402_5%

Q54

@2SC2411K-CQ_SOT23

3 1

DM_ON

2

G

C362

C363

0.1U_0402_16V4Z

MEDIA_DETECT 38

DVD_DETECT 38

+5VCD

R287
100K_0402_5%

DM_ON#

13

D

Q25
2N7002

S

CHB1608G301_0603

1 2

L23

1 2

L22
CHB1608G301_0603

SIDE_RST# CD_RSTDRV#
IDE_SDD15 CDD15
IDE_SDD14 CDD14
IDE_SDD13 CDD13

IDE_SDIOW# CD_SIOW#
IDE_SDD9 CDD9
IDE_SDD8 CDD8
IDE_SDIOR# CD_SIOR#

IDE_SDD0
CD_SBA1

IDE_SDCS1#
IDE_SDA0

DM_ON# 34

+5VCD

RP106

18
27
36
45

@0_8P4R_1206_5%

RP108

18
27
36
45

@0_8P4R_1206_5%

RP111

18
27
36
45

@0_8P4R_1206_5%

RP110

18
27
36
45

@0_8P4R_1206_5%

RP112

18
27
36
45

@0_8P4R_1206_5%

CD_SIORDY
CD_IRQ

CIOCS16#

CDD7
CD_DREQ

IDE_SDCS3#CD_SCS3#

CD_DACK#IDE_SDDACK#

CDD4IDE_SDD4
CDD3IDE_SDD3
CDD2IDE_SDD2

CDD1IDE_SDD1

CDD0
CD_IRQINT_IRQ15
IDE_SDA1

CD_SCS1#
CD_SBA2IDE_SDA2
CD_SBA0

1 2

R249 4.7K_0402_5%

1 2

R275 4.7K_0402_5%

1 2

R274 47K_0402_5%
R244 10K_0402_5%

1 2

R233 5.6K_0402_5%

**

10K_8P4R_1206_5%

10K_8P4R_1206_5%

+5VCD

+5VCD

RP107

18

CD_DREQIDE_SDDREQ

27
36

45
@0_8P4R_1206_5%
RP109

18

27

36

45
@0_8P4R_1206_5%

+5VCD

RP115

18

27

36

45

RP113

18

27

36

45

CDD7IDE_SDD7
CDD6IDE_SDD6

CDD5IDE_SDD5

IDE_SDD12 CDD12
IDE_SDD11 CDD11

IDE_SDD10 CDD10

IDE_SDIORDY CD_SIORDY

ISCDROM
CDASPN

MODE1

GPIO_0
GPIO_1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED F RO M T HE CUSTO DY OF THE COM PETENT DIVISI ON OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

of

29 53,

1A

IDE Module CONN.

IDE_PDD[0..15]21

IDE_PDDREQ21

IDE_PDIOW#21

IDE_PDIOR#21
IDE_PDIORDY21
IDE_PDDACK#21

INT_IRQ1420,22
IDE_PDA121
IDE_PDA021
IDE_PDCS1#21 IDE_PDCS3# 21
PHDD_LED#38

+5VS

IDE_PDD[0..15]

PIDE_RST#
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

INT_IRQ14

1 2

R302 100K

IDE_PDDREQ

IDE_PIORDY

CD-ROM Module CONN.

+5VS

SUYIN_200138FR044G242ZL_44P

JP12

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

PCSEL

R306 470

1 2

R307 @0

+5VS

1 2

IDE_PDA2 21

R304 @10K

1 2

R305 @5.6K

1 2

R303 4.7K_0402_5%

+3VS

+5VS

1 2

12

C470

C467
10UF_16V_1206

1000PF

Place component's closely IDE CONN.

IDE_PDD7

IDE_PDDREQ

12

C468

1UF_25V_0805

IDE_PIORDY

12

C469

.1UF

+5VS

C472

0.1U_0402_16V4Z

U28

PCIRST#7,14,20,23,24,25,26,28,32,37,38

PIDERST#21

PCIRST#

5

1
2

3

PIDE_RST#

4

TC7SH08FU_SSOP5

1 2

CDD8
CDD9
CDD10
CDD11
CDD12
CDD13
CDD14
CDD15
CD_DREQ

1 2

R286 100K

1 2

C449 0.1UF

C436

@10PF

CD_DREQ 29
CD_SIOR# 29

CD_DACK# 29

+5VCD
CD_SBA2 29
CD_SCS3# 29

+5VCD

+5VCD

CD_AGND

IDE_SIORDY

SHDD_LED#

+5VCD

R276
470

CDD[0..15]

SIDE_CD_RST#

CDD7
CDD6
CDD5
CDD4
CDD3
CDD2
CDD1
CDD0

1 2

JP26

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

CD-ROM CONN.

CDD[0..15]29

INT_CD_L34 INT_CD_R 34

+5VCD

12

C452

@10PF

CD_SIOW#29

CD_SIORDY29

CD_IRQ29

CD_SBA129
CD_SBA029

CD_SCS1#29

SHDD_LED#38

1 2

R285 100K

CD_AGND34

CD_RSTDRV#29

SHDD_LED#

0.1U_0402_16V4Z

SIDERST#21

+5VS+5VCD

W=80mils

R262 @0_1206_5%

1 2

W=80mils

R288 @0_1206_5%

1 2

+5VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12
C428

1000PF

W=80mils

12
C437

C419

1UF_25V_0805

10UF_16V_1206

Place component's closely CD -ROM CONN.

12
C439

.1UF

W=80mils

W=80mils

+5VS

C416

U20

PCIRST#

Title

Size Docu ment Number Re v
Custom

Date: Sheet

5

1
2

3

SIDE_RST#

4

TC7SH08FU_SSOP5

SIDE_RST# 29

Compal Electronics, inc.

SCH EMATIC, M/B LA-1691

401241

星期二 一月

07, 2003

30 53,

of

1A

MDC Connector

JP18

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30

AMP 3-1565120-0 30P H:9MM

+3V

R362 0_0402_5%

+3VS

IAC_SDATAO20,34

IAC_RST#20,34

L39 CHB1608B121_0603

1 2

+3V_MDC
+3VS_MDC

+5VS_MDC

+3VS_MDC_R

1 2

L8 CHB1608B121_0603

R65

R57 0_0402_5%
R52 22_0402_5%

12

10K_0402_5%

MD_SPK 34

+3VS

IAC_SYNC 20,34

R61
10K_0402_5%

220P_0402_25V8K

IAC_SDATAI1 20

C742

+5VS

**

Parallel Port

LPTSTB#32

FDD_DET32

LPTSTB#

LPTAFD#32
LPTERR#32

LPTACK#32
LPTBUSY32

LPTPE32

LPTSLCT32

2 1

+5VS

RB420D_SOT23

R2 47_0402_5%

1 2

AFD#/3M#

FD0

R3 33_0402_5%
LPTERR#
FD1
LPTINIT#
FD2
LPTSLCTIN#
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

R4

12

@11K_0402_5%

12

R8
@22K_0402_5%

D23

1 2

1 2

+5V_PRN

R1

2.2K_0402_5%

R7
47_0402_5%

220P_0402_50V8K

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

C1

R50

JP13
SUYIN_7843S-25G2T-01

1 2

22_0402_5%

IAC_BITCLK 20,34

+5V_PRN

109876

12345

+5V_PRN

109876

12345

LPTACK#
LPTBUSY
LPTPE

RP1

2.7K_10P8R_1206_5%

+5V_PRN

AFD#/3M#
LPTERR#
LPTINIT#

LPTSLCTIN#

FD7
FD6
FD5
FD4

RP2

2.7K_10P8R_1206_5%

+5V_PRN

FD0
FD1
FD2
FD3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

LPTSLCTIN#
LPTINIT#
LPTERR#
AFD#/3M#LPTSLCT

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

FD0
FD1
FD2
FD3

FD4
FD5
FD6
FD7

CP2

18
27
36

CP1
1 8
2 7
3 6
4 5

CP3
1 8
2 7
3 6
4 5

CP4

45

18
27
36
45

220P_1206_8P4C_50V8_V1

220P_1206_8P4C_50V8_V1

220P_1206_8P4C_50V8_V1

220P_1206_8P4C_50V8_V1

LPTINIT#

33_0402_5%

LPTSLCTIN#

33_0402_5%

FD0
FD1

FD7
FD6

of

31 53,

68_8P4R_1206_5%

68_8P4R_1206_5%

星期二 一月

1 2

R10

1 2

R9

LPD[0 ..7 ]

RP4
1 8
2 7
3 6
4 5

RP3
1 8
2 7
3 6
4 5

07, 2003

INIT#32

SLCTIN#32

LPD[0..7]32

LPD0
LPD1
LPD2 FD2
LPD3 FD3

LPD7
LPD6
LPD5 FD5
LPD4 FD4

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

1A

A

B

C

D

E

SUPER I / O S MsC FDC47N227

1 1

LPC_AD[0..3]20,37,38

LFRAME#20,37,38

LPC_DRQ#120,22

PCIRST#7,14,20,23,24,25,26,28,30,37,38

PM_CLKRUN#20,22,23,24,28,38

CLK_PCI_SIO13
CLK_14M_SIO13

PID[ 0..3]18

2 2

PCLK_SIO14.3M_SIO

R519
10_0402_5%

3 3

C710
15P_0402_50V8J

R514
33_0402_5%

1 2

C707

1

22P_0402_25V8K

2

BT_DET#33

FDD_DET31

R503
R502

+3VS

LPC_AD[0..3]

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

R504 10K_0402_5%

+3VS

R300 10K_0402_5%

SIRQ20,22,24,37,38

PCLK_SIO

14.3M_SIO

PID[ 0 ..3]

+3VS

12

10K_0402_5%

12

10K_0402_5%

C708

4.7U_0805_10V4Z

1 2

R498 100K_0402_5%

C690

0.1U_0402_16V4Z

+3VS

12
12

PID0
PID1
PID2
PID3

C691

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R515
10K_0402_5%

C706

U50

20

LAD0

21

LAD1

22

LAD2

23

LAD3

24

LFRAME#

25

LDRQ#

26

PCIRST#

27

LPCPD#

50

GPIO12/IO_SMI#

17

IO_PME#

30

SIRQ

28

CLKRUN#

29

PCICLK

19

CLK14

48

GPIO10

54

GPIO15

55

GPIO16

56

GPIO17

57

GPIO20

58

GPIO21

59

GPIO22

6

GPIO24

32

GPIO30

33

GPIO31

34

GPIO32

35

GPIO33

36

GPIO34

37

GPIO35

38

GPIO36

39

GPIO37

40

GPIO40

41

GPIO41

42

GPIO42

43

GPIO43

44

GPIO44

45

GPIO45

46

GPIO46

47

GPIO47

51

GPIO13/IRQIN1

52

GPIO14/IRQIN2

64

GPIO23/FDC_PP

18

VTR

53

VCC

65

VCC

93

VCC

7

VSS

31

VSS

60

VSS

76

VSS

LPC47N227 TQFP100 SUPER I/O

PD0/INDEX#

PD1/TRK0

PD2/WRTPRT#

PD3/RDATA#

PD4/DSKCHG#

PD6/MTR0#

BUSY/MTR1#

PE/WDATA#

SLCT/WGATE#

ERROR#/HDSEL#

ACK#/DS1#

INIT#/DIR#

AUTOFD#/DRVDEN0#

STROBE#/DS0#

SLCTIN#/STEP#

DTR2#
CTS2#
RTS2#

DSR2#

TXD2

RXD2

DCD2#

RI2#

DTR1#
CTS1#
RTS1#

DSR1#

TXD1

RXD1

DCD1#

RI1#

IRMODE/IRRX3

IRRX2

IRTX2

RDATA#
WDATA#
WGATE#

HDSEL#

DIR#

STEP#

DS0#

INDEX#
DSKCHG#
WRTPRT#

TRK0#

MTR0#

DRVDEN0
DRVDEN1

GPIO11/SYSOPT

LPD[0 ..7 ]

LPD0

68

LPD1

69

LPD2

70

LPD3

71

LPD4

72

LPD5

73

PD5
PD7

LPD6

74

LPD7

75

LPTBUSY

79

LPTPE

78

LPTSLCT

77

LPTERR#

81

LPTACK#

80
66
82
83
67

100

CTS#2

99
98

DSR#2

97
96
95

DCD#2

94

RI#2

92

DTR#1

89

CTS#1

88

RTS#1

87

DSR#1

86

TXD1

85

RXD1

84

DCD#1

91

RI#1

90
63

IRRX2

61
62

16
10
11
12
8
9
5
13
4
15
14
3
1

2
49

R500 1K_0402_5%

RDATA#
WDATA#
WGATE#

HDSEL#

FDDIR#

STEP#

DRV0#

INDEX#

DSKCHG#

TRACK0#

MTR0#

LPD[0..7] 31

LPTBUSY 31
LPTPE 31
LPTSLCT 31
LPTERR# 31
LPTACK# 31
INIT# 31
LPTAFD# 31
LPTSTB# 31
SLCTIN# 31

1 2

R513 1K_0402_5%

1 2

R511 1K_0402_5%

1 2
1 2

R501 10K_0402_5%

WP#

+3VS

R505
@10K_0402_5%

1 2

1 2

R507 1K_0402_5%

Base I/O Address
*

DCD#1
RI#1
CTS#1
DSR#1

0 = 02Eh
1 = 04Eh

RP130
1 8
2 7
3 6
4 5

4.7K_8P4R_1206_5%

+5V

CTS#2
DSR#2
DCD#2
RI#2

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

RP131
1 8
2 7
3 6
4 5

4.7K_8P4R_1206_5%

JP28

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

+3VS+3VS

MTR0#
DRV0#

+5VS

STEP#
WGATE#

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

6
7
8
9

10

RP116

10P8R_1K

5
4
3
2
1

D

DSKCHG#
FDDIR#
WDATA#
HDSEL#

+5VS

INDEX#
TRACK0#
WP#
RDATA#

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

RP117

1 8
2 7
3 6
4 5

1K_8P4R_1206_5%

07, 2003

+5VS

E

1A

of

32 53,

+5V

**

+

+5V

12

C29

+

150U_D2_6.3VM

12

C188

150U_D2_6.3VM

C39

C201

0.1U_0402_16V4Z

0.1U_0402_16V4Z

**

R541
1K

1 2
1 2

1K
R542

BlueTooth Interface

+5VS +3VS

R339
100K_0402_5%

1 2

13

22K

RF_OFF#38

2

KILL_SW#28,38,40

BT_RST#38

22K

Q33

DTC124EK_SOT23

C518

0.1U_0402_16V4Z

R539
1K

1 2
1 2

1K
R540

C507

0.1U_0402_16V4Z

+3VS

1
2

1
2
3
4

2

U31

5

4

3

@TC7SH08FU_SSOP5

U7

1

GND

2

IN

3

EN1#

4

EN2#

TPS2042-ADR

U3

GND
IN
EN1#
EN2#

TPS2042-ADR

Q32
SI2301DS-T1_SOT23

1 3

C88
10U_1206_16V4Z

OC1#
OUT1
OUT2

OC2#

100K_0402_5%

8

OC1#

7

OUT1

6

OUT2

5

OC2#

R23

100K_0402_5%

C506

0.1U_0402_16V4Z

+BT_VCC

BTRST#

+USB_VCCA

8
7
6
5

R106

12

12

12

R22
100K_0402_5%

USBP4+21

USBP4-21

+USB_VCCD

12

R104
100K_0402_5%

12

R29
100K_0402_5%

12

R119
100K_0402_5%

+3V+USB_VCCC+USB_VCCB

12

R14
100K_0402_5%

USBP4+

R360 0_0603_5%

USBP4-

R358 0_0603_5%

+3V

12

R90
100K_0402_5%

R114 47_0402_5%

1 2

R94 47_0402_5%

1 2

**

C744

220P_0402_25V8K

R24 47_0402_5%

1 2

R19 47_0402_5%

1 2

0.1U_0402_16V4Z

Module ID Indication f or polarity of reset

Reset input High Active --> Low ,
Reset input Low Active --> Open

BT_DET#32

BT_WAKE_UP38

BT_DETACH38

USB4+
USB4-

***

12

C745
47PF

C743

12

C746
47PF

**

220P_0402_25V8K

C35

Module ID

BTRST#
BT_WAKE_UP

+BT_VCC

(MAX=200MA)

C79

0.1U_0402_16V4Z

OVCUR#0

OVCUR#1

C200

0.1U_0402_16V4Z

OVCUR#2

OVCUR#3

C22

0.1U_0402_16V4Z

Bluetooth Connector

C182

0.1U_0402_16V4Z

OVCUR#2 21

OVCUR#3 21

JP2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

ACES_87151-2005

(Top Contact)

OVCUR#0 21

OVCUR#1 21

Keep 20 mils minimum spacing

USBP3-21
USBP3+21

USBP2-21
USBP2+21

USBP0-21

USBP0+21

USBP1-21

USBP1+21

+USB_VCCC

**

L57

FBM-160808-121T

1 2

L58

1 2

FBM-160808-121T

1 2

FBM-160808-121T

1 2

FBM-160808-121T

FBM-160808-121T

FBM-160808-121T

12

C494

+

150U_D2_6.3VM

L59

L60

+USB_VCCB

12

+

**

FBM-160808-121T

FBM-160808-121T

L63
1 2
1 2

L64

USB_CGND

1 2

C730 47PF

C493

150U_D2_6.3VM

USB_BGND

+USB_VCCA

L61
1 2
1 2

L62

+USB_VCCD

12

C486

0.1U_0402_16V4Z

C72947PF

1 2

12

12

C731
47PF

C485

0.1U_0402_16V4Z

12

C545

+

150U_D2_6.3VM

USB_AGND

12

C733
47PF

12

C450

+

150U_D2_6.3VM

USB_AGND

12

C735

C736

47PF

47PF

C732
47PF

12

C535

0.1U_0402_16V4Z

C734
47PF

C456

0.1U_0402_16V4Z

USB
CONNECTOR

JP14

SUYIN_2553A-08G5T-A

1
2
3
4
5
6
7
8

USB
CONNECTOR

JP19

1
2
3
4

SUYIN_2569A-04G3T-A

USB
CONNECTOR

JP27

1
2
3
4

SUYIN_2569A-04G3T-A

R345 0_0402_5%

**

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

of

33 53,

1A

5

AC97 Codec

12

R478 6.8K_0402_5%

12

R481 6.8K_0402_5%

LINE_IN_L36 SUSP#29,38,39,42,47

LINE_IN_R36

D D

0.1U_0402_16V4Z

C C

MD_SPK31

B B

12
12

R480 6.8K_0402_5%

C373

R216 6.8K_0402_5%
R476 6.8K_0402_5%

CDROM_L

R215 20K_0402_5%

CDROM_R

R474 20K_0402_5%

C281 @0.01U_0402_25V4Z

12

R218 10K_0402_5%

***

12

R220 10K_0402_5%

C280

0.01U_0402_25V4Z

***

C368
10U_1206_16V4Z

R260
@0_0402_5%

1 2

LINEIN_L

C350 1U_0603_10V6KR479 6.8K_0402_5%

LINEIN_R

C349 1U_0603_10V6K

C356 0.1U_0402_16V4Z
C285 0.1U_0402_16V4Z
C355 0.1U_0402_16V4Z

CD_L_R

CD_R_R

CD_GNA

MONO_IN36

IAC_RST#20,31

IAC_SYNC20,31

IAC_SDATAO20,31

C284 0.1U_0402_16V4Z

C351 1U_0603_10V6K
C676 1U_0603_10V6K
C278 1U_0603_10V6K
C277 1U_0603_10V6K
C352 0.1U_0402_16V4Z
C358 1U_0603_10V6K

12
12

12
12

MIC36

R237 100_0402_5%

EAPD36

+VDDA

LINEIN_L
LINEIN_R

C_MICMIC

C_MD_SPK

12

DGND

4

L53

1 2

CHB2012U170_0805

14

AUX_L

15

AUX_R

16

VIDEO_L

17

VIDEO_R

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

NC

46

XTLSEL

47

EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC202_E_LQFP48

+AVDD_AC97

38

AVDD125AVDD2

U19

LINE_OUT_L

LINE_OUT_R

MONO_OUT
TRUE_LOUT_L
TRUE_LOUT_R

SDATA_IN

XTL_OUT

VREFOUT

DVDD11DVDD2

BIT_CLK

XTL_IN

AFILT1
AFILT2

VREF
VRDA

VRAD

DCVOL

VAUX
GPIO0
GPIO1

AVSS1
AVSS2

9

NC

4.7U_0805_10V4Z

C401

0.1U_0402_16V4Z

LINEL

35

LINER

36
37
39
41

R243 22_0402_5%

1 2

6

R239 22_0402_5%

1 2

8
2

3

C381 1000P_0402_50V7K

29
30
28
27
32

31
33
34
43
44

40

AGND

26
42

AGND

3

+5VALW

C427

C408 1000P_0402_50V7K

@1000P_0402_50V7K

C445

0.1U_0402_16V4Z

C411

10U_1206_16V4Z

C399 1000P_0402_50V7K
C396 1000P_0402_50V7K
C702 4.7U_0805_10V4Z
C705 4.7U_0805_10V4Z

***

C378 @22P_0402_25V8K

R251

@1M_0402_5%

1 2

C388 1000P_0402_50V7K

1

C397

2

Without Direct Play:
Unmount U45, C612, C613, R442, R443, R444, R445
Mount R477, R478

+3VS

1 2

1 2

@10K_0402_5%

R240

1 2

R208 0_0402_5%

C703

1U_0603_10V6K

12

R509

@1K_0402_5%

EQ_LEFT
EQ_RIGHT

1

C389
22P_0402_50V8J

2

+AUD_VREF

C390

@0.01U_0402_25V4Z

Adjustable Output

U25

4

VIN

2

DELAY
ERROR7CNOISE

8

ON/OFF#

SI9182DH-AD_MSOP8

EQ_LEFT 35,36
EQ_RIGHT 35,36

IAC_BITCLK 20,31

IAC_SDATAI0 20

Y3

24.576MHz

C704

1U_0603_10V6K

2

5

VOUT

6

SENSE

1
3

GND

INT_CD_L30

INT_CD_R30

1

C402
22P_0402_50V8J

2

C377

0.1U_0402_16V4Z

C448

0.1U_0402_16V4Z

R535 1M_0402_5%

+5VCD

R528 1M_0402_5%

+5VCD

C699

4.7U_0805_10V4Z

R270

69.8K_0603_1%

1 2

R271
24K _0402_1%

1 2

C447

1U_0603_10V6K

C446 1U_0603_10V6K

DM_ON#29

12

12

***

12

12

R533

***

1M_0402_5%

DM_ON29

1

+VDDA

+VDDA

C441

4.7U_0805_10V4Z

R284

12

@0_0402_5%

R_INT_CD_L

R283

12

@0_0402_5%

R_INT_CD_R

DM_ON#

R_INT_CD_L EQ_LEFT

R532
1M_0402_5%

R_INT_CD_R EQ_RIGHT

DM_ON

+5VCD

147

1 2

13

+5VCD

147

11 10

12

+5VCD

DIRECT PLAY PATH

147

4 3

U26C

5

74HCT4066

+5VCD

147

8 9

U26D

6

74HCT4066

POWER ON PATH

U26A
74HCT4066

U26B
74HCT4066

CDROM_L

CDROM_R

A A

CD_GNA

CD_AGND30

12

R210

20K_0402_5%

R202
0_0402_5%

12

12

R209

6.8K_0402_5%

5

L21

1 2

0_0805_5%

L51

1 2

0_0805_5%

L24

1 2

0_0805_5%

DGND AG ND

0.1U_0402_16V4Z

4

C272

+AUD_VREF

C273

4.7U_0805_10V4Z

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

1

of

34 53,

1A

5

+5VCD+5VCD

C424

4.7U_0805_10V4Z

EQ_LEFT

D D

C460

0.018U_0603_16V7K

***

1 2

R291 19.6K_0603_1%
C443

0.018U_0603_16V7K

+2.5VOP_REF

AUDIO LEFT CHANNEL

0.1U_0402_16V4Z

EQ_L_IN1#

EQ_L_IN1

12

R521

63.4K_0603_1%

***

@3300P_0402_50V7K

C435

U49A

411

V+

2

-

3

+

V-

C714

+2.5VOP_REF +2.5VOP_REF

EQ_L_OUT1

1

LMV824MTX_TSSOP14

1 2

R529

@5.62K_0603_1%

EQ_L_IN2

12

R525
100K_0603_1%

4

1 2

R281 4.32K_0603_1%

C451 @0.056U_0402_16V4Z

+5VCD

U49B

411

V+

6

-

7

5

+

V-

LMV824MTX_TSSOP14

EQ_L_OUT2

C454

2700P_0805_50V7K

3

EQ_L_IN5

C458 1000P_0402_50V7K

1 2

R527 2.87K_0603_1%

EQ_L_IN3 EQ_L_IN4

12

R524
162K_0603_1%

9

10

+5VCD

-

+

411

V+

V-

U49C

EQ_L_OUT3 EQ_L_OUT4

8

LMV824MTX_TSSOP14

C442

1200P_0603_50V7K

+2.5VOP_REF

2

C283

0.1U_0402_16V4Z

C279
1800P_0402_50V7K

1 2

R517 1.05K_0603_1%

12

R520
162K_0603_1%

1

+5VCD

C274 100P_0402_50V8K

1 2

R199 2.26K_0603_1%

U11A

411

V+

2

-

1

3

+

V-

LMV824MTX_TSSOP14

+5VCD

U49D

411

V+

13

-

14

12

+

V-

LMV824MTX_TSSOP14

AMP_LEFT

OUTPUT TO AMPLIFIER
LEFT CHANNEL

AMP_LEFT 36

BY-PASS EQ CIRCUIT

100K_0603_1%

100K_0603_1%

+2.5VOP_REF

R205

R217

C683

+5VCD

12

12

+5VCD +5VCD

U11C

411

V+

9

-

8

10

+

V-

LMV824MTX_TSSOP14

C677 1000P_0402_50V7K

1 2

R484 2.87K_0603_1%

EQ_R_IN3 EQ_R_IN4

12

R496
162K_0603_1%

9

10

+5VCD

-

+

411

V+

V-

+2.5VOP_REF

U43C

EQ_R_OUT3

8

LMV824MTX_TSSOP14

EQ_R_IN5

C664

1200P_0603_50V7K

+2.5VOP_REF

U11D

411

V+

13

-

14

12

+

V-

LMV824MTX_TSSOP14

C357
1800P_0402_50V7K

1 2

R200 1.05K_0603_1%

12

R475
162K_0603_1%

C353 100P_0402_50V8K

1 2

411

V+

-

+

V-

411

V+

-

+

V-

R497 2.26K_0603_1%

U11B

7

LMV824MTX_TSSOP14

U43D

EQ_R_OUT4

14

LMV824MTX_TSSOP14

AMP_RIGHT

AMP_RIGHT 36

OUTPUT TO AMPLIFIER
RIGHT CHANNEL

+5VCD

6
5

+5VCD

13
12

EQ_LEFT
EQ_RIGHT

U43A

1

LMV824MTX_TSSOP14

1 2

R494 @5.62K_0603_1%

12

EQ_R_OUT1

EQ_R_IN2

R482
100K_0603_1%

R204 @0_0402_5%
R223 @0_0402_5%

EQ_R_IN1#

12

R221

63.4K_0603_1%

***

@3300P_0402_50V7K

EQ_LEFT34,36

EQ_RIGHT34,36

C671

+5VCD

411

V+

2

-

3

+

V-

C675

+2.5VOP_REF

C C

+5VCD

4.7U_0805_10V4Z

C679

C692

4.7U_0805_10V4Z

EQ_RIGHT

B B

C655

0.018U_0603_16V7K

R463 19.6K_0603_1%
C665

0.018U_0603_16V7K

+2.5VOP_REF

***

1 2

0.1U_0402_16V4Z

EQ_R_IN1

AUDIO RIGHT CHANNEL

AMP_LEFT

12

AMP_RIGHT

12

C276

0.1U_0402_16V4Z

1 2

R464 4.32K_0603_1%

C681 @0.056U_0402_16V4Z

+5VCD

U43B

411

V+

6

-

EQ_R_OUT2

7

5

+

V-

LMV824MTX_TSSOP14

2700P_0805_50V7K

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

1

of

35 53,

1A

A

B

C

D

E

Audio AMP

+5VCD

W=40Mil

C656

R558 0_0603

0_0603

R559

0.1U_0402_16V4Z

+5VS_AMP

4 4

HIGH

NBA_PLUG

R437 @100K_0402_5%

1 2

AMP_LEFT35
AMP_RIGHT35

C268 0.47U_0603_16V4Z
C271 0.47U_0603_16V4Z

PIN 6,20 ACTIVE

LOW PIN 5,23 ACTIVE

NBA_PLUG

VOL_AMP
INTSPK_L1
INTSPK_R1

1 2

1 2

***

EQ_LEFT34,35

EQ_RIGHT34,35

3 3

NBA_PLUG

2 2

System Sound

1 1

C611 0.47U_0603_16V4Z
C660 0.47U_0603_16V4Z

R506

100K_0402_5%

2

G

BEEP#38

U14D
74LVC125

R161

@1.2K_0402_5%

+5VCD

1 2

2

G

2N7002

13

D

Q49

S

13

12 11

+3V POWER

A

R203
@1.2K_0402_5%

1 2

1 2

VOL_AMP

2

R508 6.2K_0402_5%

13

D

2N7002
Q50

S

**

+3VS

12

R314
100K_0402_5%

1 2

8.2K_0402_5%

R315

0.22U_0603_16V4Z

PCM_SPK#24

ICH_SPKR21

C618

1

3

12

3.3K_0402_5%

C484

C662

0.047U_0402_16V4Z

0.1U_0402_16V4Z

1 2

R512 4.3K_0402_5%

4

5

VR1

3

10K

R510

1 2

+3VS

C498

0.1U_0402_16V4Z

147

U29C

65

74LVC14

+3VS POWER

+3VS

147

U29D

74LVC14

+3VS POWER

C663

4.7U_0805_10V4Z

U42

7
18
19

2

3

4
21

5
23

6
20

17

PVDD

SHUTDOWN#
PVDD
VDD

PC-ENABLE
VOLUME
LOUT+
ROUT+
LLINEIN
RLINEIN
LHPIN
RHPIN

CLK

TPA0232

+5VCD

SE/BTL#

PC-BEEP

BYPASS

LOUT-

ROUT-

GND
GND
GND
GND

22
15
14
11
9
16
10

LIN

8

RIN

1
12
13
24

***

NOTE:

1.EQ: R512=4.3K , R510=3.3K
Modify R558,R559 TO "0 Ohm"
UNMOUNT R161,R203

2.NO EQ: R512=3.9K, R510=4.7K, R508=2K
Modify R558,R559 TO "1u_0603 10V6k"
MOUNT R161,R203

560_0402_5%

1 2

560_0402_5%

1 2

560_0402_5%

1 2

10K_0402_5%

B

R523

R522

R518

R516

12

89

C712

1U_0603_10V6K

C711

1U_0603_10V6K

C709

1U_0603_10V6K

+5VCD

12

SHUTDOWN#

13

D

S

NBA_PLUG

C650 0.1U_0402_16V4Z

INTSPK_L2
INTSPK_R2

C610

C619

0.47U_0603_16V4Z

0.47U_0603_16V4Z

+VDDA

12

R534
10K_0402_5%

12

R536
10K_0402_5%

Q51

2

2SC2411K-CQ_SOT23

3 1

D21
RB751V

2 1

R185
100K_0402_5%

Q11
2N7002

2

G

C609

0.47U_0603_16V4Z

C715
10U_1206_16V4Z

1U_0603_10V6K

1 2

INTSPK_R1

R186 @0_0402_5%

R187 0_0402_5%

R467

1 2

100K_0402_5%

EAPD 34

EC_EAPD 38

+5VCD

INTSPK_R2

INTSPK_L1

INTSPK_L2

Speaker Connector

MONO_IN 34

JP8

1
2
3
4

ACES_85204-0400

INTSPK_L1
INTSPK_L2
INTSPK_R1
INTSPK_R2

C713

MONO_IN

R530

2.4K_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

1 2

R189 @33

1 2

R188 @33

1 2

R193 @33

1 2

R191 @33

MIC34

LINE_IN_R34
LINE_IN_L34

150U_D2_6.3VM

INTSPK_R1

INTSPK_L1

150U_D2_6.3VM

Q6 @DTC314TK

1 3

2

Q7 @DTC314TK

10K

1 3

MIC

FBM-11-160808-700T_0603

C652

+

INTSPK_R1-2

1 2

+

INTSPK_L1-2

1 2

C634

D

1 3

2

Q9 @DTC314TK

10K

1 3

2

10K

L46

1 2

L47

1 2

FBM-11-160808-700T_0603

1 2

L48

FBM-11-160808-700T_0603

L49

1 2

FBM-11-160808-700T_0603

1 2

L20

FBM-11-160808-700T_0603

Q43

2

Q8 @DTC314TK

10K

MIC-1

220P_0402_50V8K

330P_0402_50V7K

INTSPK_R1-3
INTSPK_L1-3

330P_0402_50V7K

Title

Size Docu ment Number Re v
Custom

Date: Sheet

32

@2SB1188

1

1 2

R179 @2.2K

R407

@2.2K_0402_5%

LINE_IN_R-1
LINE_IN_L-1

C591

NBA_PLUG

C269

12

12

+AUD_VREF

C568

C251

R426
@4.7K

C594
@4.7UF_10V_0805

R397

12

12

2.2K_0402_5%

C571
330P_0402_50V7K

C624
330P_0402_50V7K

Compal Electronics, inc.

SCH EMATIC, M/B LA-1691

401241

星期二 一月

07, 2003

D17

3

12

R175

2

@2.2K

@DAN217

12

@10UF_16V_1206

JP3

5
4
3

6
2
1

FOXCONN JA6033L-1S1

LINE IN JACK

JP5

5
4
3

6
2
1

FOXCONN JA6033L-1S1

HEADPHONE
OUT JACK

JP7

5
4
3

6
2
1

FOXCONN JA6033L-1S1

E

MICROPHONE
IN JACK

1

+5VS

1A

of

36 53,

5

4

3

SD Card Reader SD Power Switch

+3VS

2

1

D D

+3VS

C597

0.1U_0402_16V4Z

SD_CLK SDPWCTL#

R425 10_0402_5%

+3VS

C C

LPC_AD320,32,38
LPC_AD220,32,38
LPC_AD120,32,38
LPC_AD020,32,38

1 2

SIRQ20,22,24,32,38

C599
10U_1206_16V4Z

SD1
SD2

SD3
SD4

SD5
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_SD13
LFRAME#20,32,38

PCIRST#7,14,20,23,24,25,26,28,30,32,38

SDLED
SDPWCTL#

U41

37

SDCLK

38

SD1

39

SD2

40

VDD3V

41

SD3

42

SD4

43

SD5

44

LAD3

45

LAD2

46

LAD1

47

LAD0

48

SERIRQ

W83L518D_LQFP48

PCLK_SD

R413

1M_0402_5%

35

36

SDLED

SDPWCTL#

PCICLK

2

1

34

33

SCC4

SCC8

LFRAME#3RESERVED

4

31

32

MSLED

PME#5lESET#

**

30

29

VSS

MSCLK

MSPWCTL#

VSS6SCBC88SCBC4

7

R408
1M_0402_5%

1 2

1 2

R411 @4.7K_0402_5%

1 2

R409 @4.7K_0402_5%

1 2

25

28

MS4

MS326MS227MS1

R406 @4.7K_0402_5%

24

MS5

SD_XIN

23

XIN

SD_XOUT

22

XOUT

21

SCRST#

20

SCIO

19

SCCLK

18

SCPSNT

17

SCPWCTL#

16

SCLED

15

VDD

2E/4E#

14

ADD_SEL

MMC_DET#

SCBCLK11SCBIO10SCBRST#

SCBPSNT

9

12

MMC_DET#

13

2E/4E#

+3VS

1 2

R389 0_0402_5%

1 2

R392 4.7K_0402_5%

+5VS

12

12

1 2

R391
@10K_0402_5%

R394
10K_0402_5%

+3VS

+5VS

HIGH
LOW

SDCLK_48M 13

2E
4E

10K_0402_5%

SDPWR

SD SOCKET

+3VS+3VS +SD3_VCC

12

2

R395

G

13

D

S

Q41
2N7002

U40

3

VIN

4

VIN/CE

2

GND

RT9701CB_SOT23-5

VOUT
VOUT

1
5

C572

4.7U_0805_10V4Z

SD LED

D16

2 1

R417

10K_0402_5%

1 2

R423

1K_0402_5%

1 2

+SD3_VCC

HP HSMG-C170 GRN 0603

13

D

2

G

S

Q42
2N7002

4.7K_8P4R_1206_5%

SD4
SD3

SD_CLK

SD2
SD1

SD5

2

RP126

+SD3_VCC

+3VS

12

R422

4.7K_0402_5%

1 8

2 7

R393
1M_0402_5%

(4.7K_0402->499_1%_0402)

3 6

4 5

JP4

Wr_Pt11Wr_Pt_Vss

8

SD4

7

SD3

6

Vss2

5

SDCLK

4

Vdd

3

Vss1

2

SD2

1

SD1

9

SD5

SD_SOCKET

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

07, 2003

MMC_DET#

VSS

10
12

13

1

+3VS

12

R178
10K_0402_5%

MMC_DET#

of

37 53,

1A

R101

B B

A A

SD_CLK

12

R424
@33_0402_5%

C596
@10P_0402_50V8K

PCLK_SD

12

R414
@33_0402_5%

C574
@10P_0402_50V8K

SDCLK_48M

12

R390
@33_0402_5%

C566
@10P_0402_50V8K

SD_XIN

C561

@10P_0402_50V8K

5

Y4

1 2

@48MHZ

R387

1 2

@1M_0402_1%

SD_XOUT

C563
@10P_0402_50V8K

EMI Clip PAD for SD

PAD1

1

PAD-2.5X3

4

PAD2

PAD-2.5X3

***

1

L45
@2.2UH_10%

C562
@4.7U_1206_16V6K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+SD3_VCC

3

160_0402_5%

SDLED

5

0.1U_0402_16V4Z

C366

0.1U_0402_16V4Z

+51AVCC

D D

C C

WLANPME#23,24,26,28

ICH_W AKE_UP#20

ECAGND

B B

+5VALW

0.1U_0402_16V4Z

C383

C457

0.1U_0402_16V4Z

L25

1 2

CHB1608U800_0603

C463

0.1U_0402_16V4Z
ECAGND

PCM_PME#23,24,26,28
1394_PME#23,24,26,28

LAN_PME#23,24,26,28

C464 0.01U_0402_25V4Z

+3VALW

RP114
1 8
2 7
3 6
4 5

10K_8P4R_1206_5%

1 2

4.7K_0402_5%

R252

1 2

4.7K_0402_5%

R248

R269

47K_0402_5%

VR_ON

1 2

C407

1000P_0402_50V7K

+3VALW

CLK_LPC_EC13

R548 @0_0402_5%

BATT_TEMP

MODE#
FRD#
SELIO#
FSEL#

EC_SMC2
EC_SMD2

C465

@22P_0402_25V8K

12

+3VALW

C413
1000P_0402_50V7K

C365

+3VALW

R235 4.7K_0402_5%

+3VALW

R245
10K_0402_5%

1 2

EC_PME#

***

LPC_AD[0..3]20,32,37

12

R234
@33_0402_5%

1

2

+3VS

R226 0_0402_5%

LPC_DRQ#020,22

LFRAME#20,32,37

EC_RST#

12

+RTCVCC

***

PM_SLP_S1#13,20

***

+3VALW

R299
100K_0402_5%

Ra

A A

1 2

Rb

1 2

Analog Board ID definition,
Please see page 3.

R301

8.2K_0402_5%

***

AD_BID0

C462

0.1U_0402_16V4Z

5

CRY1

32.768KHZ_12.5PF_CM155

SIRQ20,22,24,32,37

LPC_AD[0..3]

EC_SCI#20

GATEA2020
KBRST#20

EC_PLAYBTN#40
EC_STOPBTN#40
EC_REVBTN#40
EC_FRDBTN#40
TV_OUT_EN#41

C415

0.1U_0402_16V4Z

SHDD_LED#30
PHDD_LED#30

HDD_LED#40

DVD_DETECT29

TP_CLK40

TP_DATA40

LID_SW#40

EC_SMI#20
EC_EAPD36
WL_OFF#28

EC_RIOUT#20

EC_CPUPD#5

SYSON42,47
SUSP#29,34,39,42,47

VR_ON48

PCMRST#25
PM_RSMRST#20
WLAMP_OFF#40

BUTTON1#41
EC_ENBKL18

FSEL#39

R266

1 2

20M_0603_5%

X2

C429
10P_0402_50V8K

4

C367

0.1U_0402_16V4Z

R227 @0_0402_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

EC_RST#

EC_SCI#

KSI0
KSI1
KSI2
KSI3
KSI4

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

TP_CLK
TP_DATA

EC_SMI#

12

R553 0_0402_5%

SYSON
SUSP#
VR_ON

ENBKL
FSEL#

CRY2

R263
120K_0402_5%

1 2

C422
12P_0402_50V8J

4

KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

CRY1
CRY2

+51VDD

U16

7

SERIRQ

8

LDRQ

9

LFRAME

15

LAD0

14

LAD1

13

LAD2

10

LAD3

18

LCLK

19

LREST

22

SMI

23

PWUREQ

31

IOPD3/ECSCI

5

GA20/IOPB5

6

KBRST/IOPB6

71

KBSIN0

72

KBSIN1

73

KBSIN2

74

KBSIN3

77

KBSIN4

78

KBSIN5

79

KBSIN6

80

KBSIN7

49

KBSOUT0

50

KBSOUT1

51

KBSOUT2

52

KBSOUT3

53

KBSOUT4

56

KBSOUT5

57

KBSOUT6

58

KBSOUT7

59

KBSOUT8

60

KBSOUT9

61

KBSOUT10

64

KBSOUT11

65

KBSOUT12

66

KBSOUT13

67

KBSOUT14

68

KBSOUT15

105

TINT

106

TCK

107

TDO

108

TDI

109

TMS

110

PSCLK1/IOPF0

111

PSDAT1/IOPF1

114

PSCLK2/IOPF2

115

PSDAT2/IOPF3

116

PSCLK3/IOPF4

117

PSDAT3/IOPF5

118

PSCLK4/IOPF6

119

PSDAT4/IOPF7

158

32KX1/32KCLKOUT

160

32KX2

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS

75

IOPJ6/PLI

76

IOPJ7/BRKL_RSTO

148

IOPM0/D8

149

IOPM1/D9

155

IOPM2/D10

156

IOPM3/D11

3

IOPM4/D12

4

IOPM5/D13

27

IOPM6/D14

28

IOPM7/D15

173

SEL0

174

SEL1

47

CLK

PC87591VPC
False

16

VDD

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND117GND235GND346GND4

3

KBA[0..18]
ADB[0..7]

BATT_TEMPA 44
BATT_OVP 45
ALI/MH# 44,45

MODE# 40
MEDIA_DETECT 29
INTERNET# 41

DAC_BRIG 18
IREF 45

EN_DFAN 40
INVT_PWM 18

BEEP# 36
ACOFF 45

PM_BATLOW# 20
EC_ON 41
EC_LID_OUT# 20
BT_DETACH 33

EC_UTXD/KSO17 40,41

KILL_SW# 28,33,40
EC_SMC1 39,44
EC_SMD1 39,44
PCIRST# 7,14,20,23,24,25,26,28,30,32,37

PBTN_OUT# 22
EC_SMC2 4,29
EC_SMD2 4,29
FAN_SPEED 40

ATF_INT# 20
CD_PLAY 29
RF_OFF# 33

ACIN 21,40,43
RING# 24
PM_SLP_S3# 20

ON/OFF 22,41
PM_SLP_S5# 20
BT_WAKE_UP 33
PM_CLKRUN# 20,22,23,24,28,32

KBA5 39

FRD# 39
FWR# 39

SELIO# 39
BT_RST# 33

FSTCHG 45

AD0
AD1
AD2
AD3

DA0
DA1
DA2
DA3

98

1 2

81
82
83
84
87
88
89
90
93
94

99
100
101
102

32
33
36
37
38
39
40
43

153
154
162
163
164
165

168
169
170
171
172
175
176
1

26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

143
142
135
134
130
129
121
120

113
112
104
103
48

L26

KBA[0..18]39

ADB[0..7]39

BATT_TEMP

BATT_TEMPB
VBATTA
VBATTB

MODE#

AD_BID0

INVT_PWM

EC_URXD/KSO16
EC_UTXD/KSO17

EC_USCLK
EC_SMC1
EC_SMD1

EC_SMC2
EC_SMD2

EC_PME#
ATF_INT#

ACIN
RING#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#

SELIO#

NUM_LED#
CAPS_LED#
ARROW_LED#

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18

KBA19

+51AVCC+3VALW

123

136

157

166

VCC134VCC245VCC3

VCC4

VCC5

VCC6

AD Input

DA output

PWM
or PORTA

PORTC

PORTD-1

PORTE

PORTH

GND5

GND6

GND7

96

122

159

167

137

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+RTCVCC

95

AVCC

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

PORTB

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

IOPB4/SDA1

IOPB7/RING/PFAIL

IOPC1/SCL2

IOPC2/SDA2
IOPC4/TB1/EXWINT22
IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

PORTI

IOPK5/A13/BE0
IOPK6/A14/BE1

IOPK7/A15/CBRD

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

ECAGND

3

161

VBAT

IOPE0/AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

IOPB3/SCL1

IOPC0

IOPC3/TA1
IOPC5/TA2

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO
IOPD4

IOPD5
IOPD6
IOPD7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1

CHB1608U800_0603

2

BADDR1(KBA3) BADDR0(KBA2)

0
0

*

11

*

2

1

For EC Tools

JP11

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

@96212-1011S

KEYBOARD CONN.

JP10

34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

6278-34P-KBCON

NUM_LED#
ARROW_LED#
CAPS_LED#

KSO15
KSO14
KSO10
KSO11
KSO8
KSO9
KSO13
KSI7
KSO3
KSO7
KSO12
KSI4
KSI6
KSI5
KSO6
KSO5
KSI3
KSI0
KSO0
KSO1
KSI1
KSI2

9

KSO2

8

KSO4

7
6
5
4
3
2
1

1 2

R256

1 2

R255

45

CP10

36

8P4C-100P

27
18
45

CP9

36

8P4C-100P

27
18
45

CP8

36

8P4C-100P

27
18
45

CP7

36

8P4C-100P

27
18
45

CP6

36

8P4C-100P

27
18
45

CP5

36

8P4C-100P

27
18

1 2

R257 300_0402_5%

300_0402_5%

+3VS

I/O Address

Index
0
1
01

2E 2F

4E

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

Data

Reserved

ENV0 (KBA0) TRIS (KBA4)

IRE
OBD 0
DEV 0
PROG

SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use

Title

Size Docu ment Number Re v
Custom

Date: Sheet

ENV1 (KBA1)
0
1

1

0
1

1

KBA1

1 2

R295 1K_0402_5%

KBA2

1 2

R296 @1K_0402_5%

KBA3

1 2

R297 1K_0402_5%

KBA5

1 2

R298 1K_0402_5%

TP_CLK

1 2

R293

TP_DATA

1 2

R294

+3VALW

4.7K_0402_5%

4.7K_0402_5%

Compal Electronics, inc.

SCH EMATIC, M/B LA-1691

401241

星期二 一月

07, 2003

1

EC_TINT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

EC_URXD/KSO16
EC_UTXD/KSO17
EC_USCLK

300_0402_5%

+3VS

4F

0
0
0
0

+5VS

38 53,

+3VALW

+3VS

1A

of

+5VALW

C410

0.1U_0402_16V4Z

3

11

1

20

D0
D14Q1

VCC
D27Q2
D38Q3
D413Q4
D514Q5
D617Q6
D718Q7

CLK
CLR

Q0

GND

10

U22

2
5
6
9
12
15
16
19

74HCT273PW_TSSOP20

CDON_LED# 40
MP3_LED# 40
E-MAIL_LED# 40
PWR_LED# 40
PWR_SUP_LED# 40
BATT_LOW_LED# 40
BATT_CHGI_LED# 40

CD_FDD_LED# 40

100K_0402_5%

3

1 2

+3VALW

R259

R278

20K_0402_5%

+3VALW

C409

0.1U_0402_16V4Z

KBA2

SELIO#38

147

1
2

U21A
SN74LVC32APWLE_TSSOP14

+5VALW

1 2

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

AA
LARST#SELIO#

C440

1U_0805_25V4Z

System BIOS SMBus EEPROM

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

C426

0.1U_0402_16V4Z

+3VALW

FWE#

ADB7
ADB5
ADB3

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

EC_SMC138,44
EC_SMD138,44

4.7K_0402_5%

FWE#

11

C421

KBA[0..18]38

ADB[0..7]38

U21D

+3VALW

SN74LVC32APWLE_TSSOP14

0.1U_0402_16V4Z

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

+3VALW

147

12
13

KBA[0..18]
ADB[0 ..7 ]

+3VALW

R272
100K_0402_5%

2N7002

1 2

U47

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

SST39VF040_TSOP

Q23

1 3

D

U48

KBA18

1

NC

KBA16

2

A16

KBA15 KBA17

3

G

S

OE#

A10

CE#
DQ7
DQ6
DQ5
DQ4
DQ3

VSS
DQ2
DQ1
DQ0

A0
A1
A2
A3

SUSP# 29,34,38,42,47

FLASH# 21
FWR# 38

FRD#

32

KBA10

31

FSEL#

30

ADB7

29

ADB6

28

ADB5

27

ADB4

26

ADB3

25
24

ADB2

23

ADB1

22

ADB0

21

KBA0

20

KBA1

19

KBA2

18

KBA3

17

FRD# 38
FSEL# 38

+3VALW

2

A15

KBA12 KBA14

4

A12

KBA7 KBA13

5

A7

KBA6 KBA8

6

A6

KBA5 KBA9

7

A5

KBA4 KBA11

8

A4

KBA3 FRD#

9

A3

KBA2 KBA10

10

A2

KBA1 FSEL#

11

A1

KBA0

12

A0

ADB0 ADB6

13

DQ0

ADB1

14

DQ1

ADB2 ADB4

15

DQ2

16

VSS

@29F040/SST39VF040_PLCC

U51

KBA11

1

A11

KBA9

2

A9

KBA8

3

A8

KBA13

4

A13

KBA14

5

A14

KBA17

6

A17

FWE#

7

WE#

8

VCC

KBA18

9

A18

KBA16

10

A16

KBA15

11

A15

KBA12

12

A12

KBA7

13

A7

KBA6

14

A6

KBA5

15

A5

KBA4

16

A4

@29F040_TSOP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

VCC

WE*

DQ7
DQ6
DQ5
DQ4
DQ3

OE#
CE#

DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

A17
A14
A13

A8

A9
A11
OE*
A10
CE*

A10

A0

A1

A2

A3

GND

+5VALW

R242
100K_0402_5%

1 2

1

A0

2

A1

3

A2

4

R238
100K_0402_5%

1 2

39 53,

+5VALW +5VALW

R254

1 2

Title

Size Docu ment Number Re v
Custom

Date: Sheet

+5VALW

C398

0.1U_0402_16V4Z

R253

4.7K_0402_5%

1 2

8
7
6
5

U17

VCC
WC
SCL
SDA

NM24C16

Compal Electronics, inc.

SCH EMATIC, M/B LA-1691

401241

星期二 一月

07, 2003

1A

of

5

4

3

2

1

D D

SW BOARD

R219
10K_0402_5%

1 2

(Top contact)

MODE#38
51ON#41,43

EC_UTXD/KSO1738,41

EC_REVBTN#38

EC_FRDBTN#38
EC_PLAYBTN#38
EC_STOPBTN#38

PWR_LED#39

PWR_SUP_LED#39

BATT_LOW_LED#39
BATT_CHGI_LED#39

CD_FDD_LED#39

CDON_LED#39

MP3_LED#39

E-MAIL_LED#39

+5VALW
+5VALW

ACIN21,38,43

51ON#

EC_UTXD/KSO17

EC_REVBTN#
EC_FRDBTN#
EC_PLAYBTN#
EC_STOPBTN#

JP9

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

ACES 85201-2602

Touch Pad Connector

TP_CLK

TP_CLK38

TP_DATA38

+5VS

C252
1U_0603_10V6K

+5VS
+5VS

R195 0_0603_5%

TP_DATA

R196 0_0603_5%

R197 0_0603_5%
R198 0_0603_5%

C299 Close to JP7

1 2
1 2

1 2
1 2

JP6

1
2
3
4
5
6

ACES 85201-0602_6P

+5VALW

C347
1U_0603_10V6K

+3VS

+5VALW

R212

1K_0402_5%

HDD_LED#38

C C

1 2
2

3 1

Q16

3904

Kill SWITCH

D30

SFI0603-240E-560MP_0603

3

SW6
DS-1200-02

2 1

11223

WIRELESS ACTIVE AMB LED

HP HSMG-C170 AMB 0805

WLAMP_OFF#38

WLAMP_OFF#

DTC114YKA_SOT23

+3VALW

R385
100K_0402_5%

1 2

120_0402_5%

R87

2

Q40

+3VALW

D15

10K

47K

KILL_SW# 28,33,38

12

21

13

B B

FAN CONN

+12VALW

C686

0.1U_0402_16V4Z

84

3

+

1

2

-

U45A
LM358AMX

1 2

8.2K_0402_5%

R214

FAN_SPEED38

5

R213

10K_0402_5%

EN_DFAN1

12

EN_DFAN38

A A

FAN CONTROL TYPE
PWM
RPM

FMMT619_SOT23

R211

1 2

100_0402_5%

0.1U_0402_16V4Z

+3VS

R473
10K_0402_5%

1 2

Poped R758, R759 & others de-poped
De-poped R758, R759 & Others poped

C275

Q17

2

B

+5VALW

1

C

E

3

2 1

D32

1SS355

2 1

+FAN1

D19

1N4148_SOT23

4

12

J2
JOPEN

10U_1206_16V4Z

JP23

1
2
3

53398-0310-FAN 3Pin

C678

RTC BATT

BATT1

-

LID_SW#

LID_SW#38

SFI0603-240E-560MP_0603

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

R15

100K_0402_5%

LID_SW#

D11

+3VALW

12

SW1

1

ESE24MV1T_6P

6

3
4

2

2
5

21

RTCBATT

+RTCBATT

3

07, 2003

1

C466

0.1U_0402_16V4Z

D22
HSM126S

2

+CHGRTC

of

40 53,

1

+

+RTCBATT

12

+RTCVCC

C471

0.1U_0402_16V4Z

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

星期二 一月

1A

A

B

C

D

E

Power Good Circuit

1 1

VGATE48

2 2

+3V

12

R225
10K

1 2

R224 100K

+3V

U14A

1

147

74LVC125

2 3

+3V

U14B

4

74LVC125

5 6

+3V

C360
100PF

1 2

1 2

R241 20K

1UF_0805_X7R

2

C394

1 2

R228 0

+3VS

1 2

3 1

R453

1 2

10K

Q46
3904

+3VS

147

U29B

74LVC14

+3V

12

R229
10K

+3VS

43

ICH_VGATE 20

CK408_PWRGD# 13

147

U29A

21

74LVC14

SYS_PWROK 20

+3VALW

147

4
5

U21B
SN74LVC32APWLE_TSSOP14

+3VALW

147

9

10

U21C
SN74LVC32APWLE_TSSOP14

H_S315D110

H_S315D110

+3VS

147

U29E

+3VS

1011

74LVC14

+12VALW

147

U29F

1213

74LVC14

84

5

+

7

6

-

U45B
LM358AMX

6

8

H_S315D110

H_C228D165

H_C197D197N

CF5
SMD40M80

1

CF10
SMD40M80

1

CF3
SMD40M80

1

CF26
SMD40M80

1

H14

1

H17

1

H18

1

H10

1

H13

1

CF8
SMD40M80

1

CF2
SMD40M80

1

CF7
SMD40M80

1

CF24
SMD40M80

1

H5

H_S315D181

1

H16

H_S315D110

1

H15

H_C228D165

1

H6

H_C276D142

1

H12

H_S315D110

1

CF9
SMD40M80

1

CF1
SMD40M80

1

CF12
SMD40M80

1

CF22
SMD40M80

1

H_S315D110

H_S315D110

H3

H_C228D165

1

H7

H_C276D142

1

CF6
SMD40M80

1

CF4
SMD40M80

1

CF17
SMD40M80

1

CF21
SMD40M80

1

H11

1

H20

1

H_C228D165

H_O268X228D205X165

FD2
FIDUCAL

FD6
FIDUCAL

CF16
SMD40M80

CF18
SMD40M80

H19

H_S315D110

1

H8

H_S315D110

1

H4

1

H21

1

1

1

1

1

H_C228D165

H_S315D110

H_S315D110

H9

1

FD1
FIDUCAL

1

FD4
FIDUCAL

1

CF11
SMD40M80

1

CF15
SMD40M80

1

H1

1

H2

1

FD3
FIDUCAL

1

FD5
FIDUCAL

1

CF25
SMD40M80

1

CF13
SMD40M80

1

CF19
SMD40M80

1

CF20
SMD40M80

1

CF23
SMD40M80

1

CF14
SMD40M80

1

3 3

Power Button

3

2

+3VALW

D5

SW2

1
2

HCH SMT1-05

4 4

PSOT24C_SOT23
3
4

+3VALW

EC_ON

EC_ON38

D

S

A

R13

4.7K_0402_5%
R16

1 2

1 2

33K_0402_5%

DTC124EK_SOT23

13

2

G

Q2
2N7002

D6

3

DAN202U

2

Q1

R12
100K_0402_5%

1 2

1
2

C

22K

B

22K

51ON#

13

E

ON/OFF 22,38
51ON# 40,43

1000P_0402_50V7K

C7

12

2 1

D12

RLZ20A

B

NDS352P_SOT23

S

Q30

D

SW3

1
2

HCH SMT1-05

2

1 3

3
4

51ON#

12

R325
0_0603_5%

G

21

2

D4
PSOT24C_SOT23

Internet Button

+3VALW

D8

1N4148_SOT23

D9

1 2

21

1N4148_SOT23

3

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R320
100K_0402_5%

INTERNET# 38

C

SW4

1
2

HCH SMT1-05

21

D29

1N4148_SOT23
3
4

D28

1N4148_SOT23

3

2

D27
PSOT24C_SOT23

User Button &
E-MAIL SW

21

+3VALW

R319
100K_0402_5%

1 2

BUTTON1# 38

D

TV-OUT BUTTON

SW5

1

星期二 一月

2

HCH SMT1-05

07, 2003

EC_UTXD/KSO1738,40

Compal Electronics, inc.

Title

SCH EMATIC, M/B LA-1691

Size Docu ment Number Re v
Custom

401241

Date: Sheet

3
4

21

D10
SFI0603-240E-560MP_0603

E

TV_OUT_EN# 38

of

41 53,

1A

A

B

C

D

E

+1.5VALW To +1.5V Transfer

+1.5V+1.5VALW

U24

1

8

S

D

2

7

S

D

3

6

S

D

5

D

1 1

12

@SI4800
C418
@4.7UF_10V_0805

ON_GATE

4

G

12

C420

@1UF_10V_0603

12

@4.7UF_10V_0805

C430

12

C444
@4.7UF_10V_0805

+3VALW To +3V Transfer +3VALW To +3VS Transfer

+3VALW

C718

C717

C716

2 2

100PF

1 2

100PF

100PF

1 2

1 2

4.7UF_10V_0805

C247

12

U9

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

D

SI4800

ON_GATE

12

C240

4.7UF_10V_0805

12

C239
1UF_25V_0805

+3VALW+3VALW +3V

12

C250

4.7UF_10V_0805

+1.5VALW To +1.5VS Transfer

+1.5VS+1.5VALW

U46

1

8

S

D

2

7

S

D

3

6

S

D

5

D

12

SI4800

C701

4.7UF_10V_0805

U10

8

D

7

D

6

D

5

D

SI4800

+5VS_GATE

+5VS_GATE

4

G

1

S

2

S

3

S

4

G

@1UF_10V_0603

C254

12

12

C682
1UF_10V_0603

12

C248
10UF_16V_1206

12

C693

4.7UF_10V_0805

12

C256
10UF_16V_1206

12

C700

4.7UF_10V_0805

12

C249
10UF_16V_1206

+3VS

12

C257
10UF_ 16V_1206

+1.5V & +1.5VS Discharge

+1.5V +1.5VS

R282
@470

13

SYSON# SUSP

D

2

Q24

G

@2N7002

S

+3V & +3VS Discharge

+3V +3VS

R201
470

13

SYSON#

D

2

Q12

G

2N7002

S

SUSP

12

R493
1K

13

D

2

Q48

G

2N7002

S

12

R180
1K

13

D

2

Q5

G

2N7002

S

+5VALW To +5V Transfer +5V & +5VS Discharge+5VALW To +5VS Transfer

C425

4.7UF_10V_0805

+5VALW

12

+12VALW

U23

8

D

7

D

6

D

5

D

SI4800

R261 100K

12

R265

1

S

2

S

3

S

4

G

12

1M

U27

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

12

C453

4.7UF_10V_0805

3 3

+12VALW

D

SI4800

1 2

R289 100K

12

R290
1M

12

C459

4.7UF_10V_0805

ON_GATE + 5VS_GATE

12

C455

.01UF

12

C461
1UF_25V_0805

Q27

13

D

SYSON#

2

G

S

2N7002

12

**

.1UF

C423

+5VS+5V+5VALW

12

C431

4.7UF_10V_0805

**

SUSP

2

G

+1.8VS

12

R537
1K

13

D

Q52
2N7002

S

12

12

C438

C433

.1UF

4.7UF_25V_1206

Q18

13

D

2N7002

SUSP

2

G

S

12

C432

4.7UF_25V_1206

12

C434

4.7UF_25V_1206

R292
470

13

SYSON# SUSP

D

2

Q26

G

2N7002

S

+5VS+5V

12

R268
1K

13

D

2

Q21

G

2N7002

S

003

SUSP#

+3VALW+3VALW

12

R190

4.7K

SUSP

13

D

2

G

S

E

Q10
2N7002_SOT23

42 53, 07, 2

SUSP 47

1A

of

SUSP

+2.5VS

12

R115
1K

13

D

2

Q4

G

2N7002

S

SYSON38,47

D

+2.5V To +2.5VS Transfer

U6

8

D

7

D

6

D

5

C177

4.7UF_10V_0805

D

SI4800

+5VS_GATE +5VS_GATE

12

4 4

+2.5VS+2.5V

1

S

2

S

3

S

4

G

12

C198
1UF_10V_0603

A

12

C186

4.7UF_10V_0805

12

C180

4.7UF_10V_0805

+1.8VALW

B

+1.8VALW To +1.8VS Transfer

**

+1.8VS

U52

1

8

S

D

2

7

S

D

3

6

S

D

4

5

G

C722

4.7UF_10V_0805

D

SI4800

12

12

C719
1UF_10V_0603

12

C720

4.7UF_10V_0805

12

C721

4.7UF_10V_0805

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

12

R206
10K

SYSON#

13

D

Q14

2

2N7002_SOT23

G

S

SUSP#29,34,38,39,47

Compa l E l ectronics, inc.

Title

SCHE MATIC, M/ B LA-1691

Size Docu m ent Nu m ber Rev
Custom

401241

星期二 一月

Date: Sheet

A

PF1

PCN1

1

4

1 1

2 2

3 3

3

2

SINGA_2DC-S726B201

BATT+

CHGRTCP

51ON#40,41

+CHGRTC

+2.5VP +2.5V

PR22

200_0603_5%

PJP1

1 2

PAD-OPEN 3x3m

7A 24V UL/CSA FAST 1206

1

23

PD3
RB751V

2 1

PZD2

RLZ3.6B

100K_0603_5%

+RTCVREF

3.3V

1

PC13
10U_1206_10V4Z

2

12

PD1

EC10QS04

1

2

S-81233SG (SOT-89)

3

3

N1

PC7

.22U_1206_25V7K

PU2

1

1

12

PR12

PR14
22K_0603_5%

(6A,240mils ,Via NO.= 12)

1

PC1

1000P_0603_50V7K
2

PQ1

TP0610T

2

2

1

2

1N4148

2

PR18
200_0805_5%

PC12
1U_0805_25V4Z

PL1

HCB4532K-800T90_9A

1 2

1

PC2

100P_0603_50V8J

2

VIN

21

PD2

PR10

33_1206_5%

13

1

PC8
.1U_0805_25V7K

2

N2

2 1

1

1000P_0603_50V7K
2

VS

PZD4
RLZ16B_LL34

+1.25VSP

PC3

(3A,120mils ,Via NO.= 6)

PJP4

+1.5VALWP

+12VALWP

+5VALWP

+3VALWP

4 4

2 1

PAD-OPEN 3x3m

PJP5

2 1

PAD-OPEN 2x2m
PJP6

1 2

PAD-OPEN 3x3m
PJP7

1 2

PAD-OPEN 3x3m

+1.5VALW

+12VALW

+5VALW

+3VALW

(3A,120mils ,Via NO.= 6)

(120mA,20mils ,Via NO.= 1)

(5A,200mils ,Via NO.= 10)

(5A,200mils ,Via NO.= 10)

+1.2VPP

(300mA,40mils ,Via NO.= 2)

+1.8VSP

(3A,120mils ,Via NO.= 6)

B

VIN

1

100P_0603_50V8J

2

MAINPWON44,46

PJP2

1 2

PAD-OPEN 3x3m

PJP3

2 1

PAD-OPEN 2x2m

PJP8

2 1

PAD-OPEN 3x3m

C

5

+

6

-

VS

PR2
10K_0603_5%

12

PZD1
RLZ4.3B

PR16
1M_0603_1%

1

PC11

.1U_0603_16V7K
2

+RTCVREF

3.3V

PR7
10K_0603_5%

10K_0603_5%

PR20

D

PQ2
2N7002

S

1K_0603_5%

PACIN

PR21
215K_0603_1%

13

2

G

PR4

ACIN 21,38,40

PACIN 45,46

Vin Detector

High 1 8 . 764 17.901 17. 063
Low 1 7 . 745 16.903 16. 038

B+

PR17
499K_0603_1%

PR19
499K_0603_1%

13

1

PC9
1000P_0603_50V7K

2

PR23
47K_0603_5%

VIN

PR3

84.5K_0603_1%

PR5

20K_0603_1%

PC4

1

PC5

1000P_0603_50V7K
2

VIN

PD5

1

ACON45

+1.25VS

2

RB715F_SOT323

22K_0603_5%

1

.1U_0603_50V4Z

2

PD4
1N4148

PC6

12

PON

2 1

PR15
10K_0603_5%

PZD3
RLZ6.2C_LL34

PR6

VS

3

Precharge detector

10K_0603_5%

PR1
1M_0603_1%

VS

PU1A

84

LM393M

3

+

1

2

-

PR8

+RTCVREF

3.3V

PR9
1K_1206_5%

N3

PR11
1K_1206_5%

PR13
1K_1206_5%

6.0V

1

PC10

2

1000P_0603_50V7K

7

PU1B
LM393M

15.34 15.90 16.48

D

PACIN

13.13 13.71 14.20

100K

2

+1.2VP

PQ3

DTC115EK

100K

+5VALWP

**

+1.8VALW

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEM A T IC, M/B LA-1691

Size Document Nu mber Re v

Custom

Date: Sheet

星期二 一月

401241 1A

07, 2003

D

of

43 53,

A

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 90(91) degree C
Recovery at 50 degree C

1 1

PCN2

10

GND

11

GND

SUYIN-20085A-09G1

2 2

3 3

BATT+
BATT+

SMD

SMC
GND­GND-

1
2

B/I
TS

TS

5

EC_SMDA

6

EC_SMCA

7
8
9

+5VALWP

100_0603_5%

PD9

@BAS40-04

PR28

3

PR29

100_0603_5%

1

2

BLI/NIMH#

3

ID

BB/I

4

2

PR25
1K_0603_5%

PR36
1K_0603_5%

1

3

PR31
1K_0603_5%

1

PD10

@BAS40-04

PR34

25.5K_0603_1%

1 2

3

2

PR26
47K_0603_5%

1

PD8
@BAS40-04

PF2

12A 65V U L /CSA fast

3

PD6
@BAS40-04

2

+3VALWP

VMB

+3VALWP

HCB4532K-800T90_9A

1 2

1

PC15
1000P_0603_50V7K

2

ALI/MH# 38,45

BATT_TEMPA 38

EC_SMD1 38,39
EC_SMC1 38,39

PL2

BATT+

10K_TSM1A103(F4D3R)_0603_1%

1

PC16
.01U_0603_50V7K

2

PC17

.22U_0805_16V7K_V2

PH2 near main Battery CONN :

BAT. thermal protection at 85(86) degree C
Recovery at 60(61) degree C

.22U_0805_16V7K_V2

VL VS

PH1

1

2

1

PC19

2

PR41

2.55K_0603_1%

***

1

PC14
.1U_0603_50V4Z

2

PR30

16.9K_0603_1%

TM_REF1

PR32

2.8K_0603_1%

1

PC18

1000P_0603_50V7K

2

PH2
10K_TSM1A103(F4D3R)_0603_1%

PR39
10K_0603_1%

TM_REF2

1

PC20

1000P_0603_50V7K

2

84

3

+

2

-

PR33

100K_0603_1%

PR35
100K_0603_1%

5

+

6

-

PR42
100K_0603_1%

PR27
47K_0603_1%

1

PU3A
LM393M

VL

PR38
47K_0603_1%

7

PU3B
LM393M

PR40

100K_0603_1%

VL

PR24
47K_0603_1%

VLVL

PR37
47K_0603_1%

MAINPWON 43,46

13

PQ4

PD7

1SS355

PD11

1SS355

VL

100K

12

2

100K

12

DTC115EK

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEM A T IC, M/B LA-1691

Size Document Nu mber Re v
Custom

Date: Sheet

星期二 一月

401241 1A

07, 2003

D

of

44 53,

A

B

C

D

1 2

4700P_0603_50V7K

PC30

1 2

1000P_0603_50V7K

PC33

Iadp=0~3.5A

PR43

.015_2512_1%

PR50
10K_0603_5%

PC27

4.7K_0603_5%

1K_0603_5%

PR59
10K_0603_5%

PR54

PR55

10

11

12

1

2

3

4

5

6

7

8

9

PU4
MB3887

-INC2

OUTC2

+INE2

-INE2

FB2

VREF

FB1

-INE1

+INE1

OUTC1

OUTD

-INC1

FBM-L11-453215-900LMAT_1812

1 2

24

+INC2

23

GND

22

CS

21

VCC(o)

20

OUT

PC28

19

1 2

VH

.1U_0603_50V4Z

18

VCC

17

RT

68K_0603_5%

16

-INE3

15

FB3

47K_0603_5%

14

CTL

13

+INC1

PR56

PL3

CS

PR60

1

PC21

4.7U_1210_25V6K
2

PR49
0_0603_5%

PC24

1 2

1 2

.1U_0805_25V7K

PC31

1 2

.1U_0805_25V7K

PC32

1 2

1500P_0603_50V7K

1

4.7U_1210_25V6K
2

.022U_0603_25V7K

PC25

1 2

PC22

FSTCHG 38

PD13
1SS355

PR62
100K_0603_5%

1

PC23

4.7U_1210_25V6K
2

N18

PD14

RB051L-40

B++

36

241

PQ8
SI4835DY

578

LXCHRG

PL4

22UH_SPC-1205P-220A

1 2

12

12

PD15
@RB051L-40

4

PR46

2

PQ9
DTC115EK

8
7

5

PQ7

SI4835DY

47K_0603_5%

PR47

ACOFF#

1
2
3 6

10K_0603_5%

13

100K

100K

CC=0.5~2.52A
CV=16.84V(10 CELLS NI-MH)

PR58

.02_2512_1%

PC34

1

4.7U_1210_25V6K
2

4.7U_1210_25V6K

ACOFF 38

PC35

1

2

VIN

PC36

1

4.7U_1210_25V6K

2

BATT+

PQ5

SI4835DY

PR44
10K_0603_5%

8
7

5

ACOFF#

PACIN

10K_0603_5%

ACON

PD12

1SS355

1 2

PR51

VIN

1 1

PACIN43,46

ACON43

P2

PQ6

1
2
36

4

2

G

SI4835DY

1
2
3 6

4

PR45
200K_0603_1%

PR48
150K_0603_1%

13

D

PQ10
2N7002

S

.1U_0603_16V7K

8
7

5

1

PR53

2.8K_0603_1%

PC26

2

IREF=1.31*Icharge
IREF=0.73~3.3V

2 2

IREF38

PR57
226K_0603_1%

100K_0603_1%

P3 B+

PR52

10.5K_0603_1%

1

PC29
.1U_0603_16V7K

2

PR61

1

.1U_0603_16V7K
2

PR65
@143K_0603_1%

PR66
@100K_0603_1%

4.2V

VL

ALI/MH# 38,44

PR64
143K_0603_1%

+SDREF

PR70
0_0603_5%

PC40

10U_1206_10V4Z

VS

+2.5V

1

PC38

.1U_0603_50V4Z

2

PU5A

84

LM358A

3

+

1

1

2

2

-

PR68
100K_0603_0.5%

PR71

100K_0603_0.5%

1

PC39

.1U_0603_16V7K

2

PR63

47.5K_0603_1%

D

S

13

PQ11

G

@2N7002

VMB

3 3

OVP voltage : NI-MH

10P : 18V--> BATT_OVP= 2.0V

(BAT_OVP=0.1111 *VMB)

PU5B
LM358A

BATT_OVP38

12

PC41

@0.1UF_16V

4 4

PR72

2.2K_0603_5%

5

+

7

6

-

12

105K_0603_0.5%

PR67

340K_1%

PR69
499K_0603_1%

PR73

PC37

@.1U_0603_16V7K

1

PC42
.01U_0603_50V7K

2

1

2

2
13

100K

2

100K

PQ12
@DTC115EK

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEM A T IC, M/B LA-1691

Size Document Nu mber Re v
Custom

Date: Sheet

星期二 一月

401241 1A

07, 2003

D

45 53,

of

A

1 1

BST31

PC45

B+++

PL5

HCB4532K-800T90_9A

1 2

B+

1

1

PC46

4.7U_1210_25V6K

2 2

2

+3VALWP

2

PL6

SPC-1205P-100

PC47

@4.7U_1210_25V6K

12

PR78
.012_2512_1%

1

PC54
47P_0603_50V8J

2

PR77
1M_0603_1%

SI4814DY

1
2
3
4

D1
D1

S1/D2

G2

S1/D2
S1/D2

S2

PQ13

1 2

.1U_0805_25V7K

PDH31

PDL3

PR75
0_0603_5%

PLX3

PDH3

8

G1

7
6
5

CSH3

PON

PR85
47K_0603_5%

1

PC64
.047U_0603_16V7K

2

PR81
10K_0603_5%

1

2

1

12

12

+

PC56

3 3

+

PC57

150UF_D_6.3V_KO

150UF_D_6.3V_KO

PD19

EP10QY03

2 1

PR82

3.57K_0603_1%

PR84
10K_0603_1%

PACIN43,45

1

PC58

100P_0603_50V8J
2

+3.3V Ipeak = 6.66A ~ 10A

2

PD18
1SS355

1

PC52
.1U_0805_25V7K

2

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

PC60
680P_0603_50V8J

PR87

47K_0603_1%

PC65
.047U_0603_16V7K

B

VS

VL

1 2

22

V+

MAX1632

2

21

VL

PU6

GND

8

VL

MAINPWON 43,44

3

1

1

PC51

4.7U_1206_16V4Z

2

12OUT

VDD

BST5

DH5

LX5

DL5

PGND

CSH5

CSL5

FB5

SEQ

REF

SYNC

RST#

DAP202U
PD17

4
5
18
16
17
19
20
14
13
12
15
9
6
11

BST51

+12VALWP

1

2

PC53

4.7U_1206_16V4Z

1

2

1 2

.1U_0805_25V7K

2.5VREF

PC59

4.7U_1206_16V4Z

PC48

PDH5

PLX5

C

PC49

4.7U_1210_25V6K

10.5K_0603_1%
PR83

1

2

PR76
0_0603_5%

PR86
10K_0603_1%

N4

B+++

1

2

PDL5

1

2

2

1

PC50
@4.7U_1210_25V6K

PDH51

PC63
100P_0603_50V8J

***

PC43

1 2

12

1 4

SDT-1205P-100

1

PC55
47P_0603_50V8J

2

PR79
2M_0603_5%

12

+

PC61

150UF_D_6.3V_KO

4.7U_1210_25VFZ

PD16
EC11FS2

3 2

PT1

12

+

PC62

CSH5

150UF_D_6.3V_KO

PC44
470P_0805_100V7K

PR74
22_1206_5%

PQ14

1

G1

D1

2

D1

S1/D2

3

G2

S1/D2

4

S1/D2

S2

SI4814DY

FLYBACKSNB

8
7
6
5

+5V Ipeak = 6.66A ~ 10A

PR80
.012_2512_1%

PD20
EP10QY03

2 1

D

+5VALWP

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEM A T IC, M/B LA-1691

Size Document Nu mber Re v

Custom

Date: Sheet

星期二 一月

401241 1A

07, 2003

D

of

46 53,

A

+5VALWP

PR89
0_1206_5%

2.5VIN

PD21

PC69

2200P_0603_50V7K

RB751V

1 2

1K_0603_5%

1

PC70

2

31

2

HMBT2222A

PR93

PQ16

13

2

1 1

1

10U_1210_16V4Z

2

PQ17
2SA1036K

S

4 5

3

PR92
10K_0603_5%

PU8A
LM393M

1

D

G

PQ15
SI3445DV

VS

84

+

-

6
2

1

3
2

12

1

PC72
.1U_0603_50V4Z

2

LX2.5

PD22
RB051L-40

1

PC75
1000P_0603_50V7K

2

PQ18

DTC115EK

PL7

SPC-1205P-4R7A

13

100K

2

100K

12

200K_0603_1%

13

2 2

100K

100K

+2.5V +-5%

PR91
100_0603_5%

PR94

PR97
100K_0603_5%

PQ20

DTC115EK

SYSON

2

B

2.5VREF

+2.5VP

C

D

+2.5VP

PR88
0_1206_5%

PR90
10_0603_5%

13

1

PC66
.1U_0805_25V7K

2

PC78

1000P_0603_50V7K

PC67

1 2

LX1.25

1

PC73

4.7U_1206_16V4Z

2

+2.5VP

1

PC77
.1U_0805_25V7K

2

.1U_0805_25V7K

PC76

1 2

1000P_0603_50V7K

PL8

5UH_SPC-06704

PR95

100K_0603_5%

PR98
1K_0603_5%

+1.25VSP

12

12

+

PC74

220UF_D_4V_FP

1

VCC1

2

PVDD1

PU7

3

VL1

CM8500

4

PGND1

5

AGND1

6

SD

7

VIN/2

1

8

AGSEN

2

VCC2

PVDD2

PGND2

AGND2

VCCQ

AGND

16

15

14

VL2

13

12

11

VFB

10

9

12

+

PC68

220UF_D_4V_FP

1.25VIN

1

PC71

4.7U_1206_16V4Z

2

VL

+2.5VP

SUSP#29,34,38,39,42

PR96
100K_0603_5%

100K

2

100K

PQ19

DTC115EK

Layout : "Compensation network close to FB pin"

+3VALWP

+3VALWP

PR151
10K_0603_5%

7

PQ40
SI3445DV

D

S

4 5

G

3

PU13A

LM393M

1

PU13B

LM393M

5

+

6

-

PL13
6
2

1

5UH_SPC-06704

1 2

12

PD30
RB051L-40

VS

1

PC113
.1U_0603_50V4Z

2

84

3

+

2

-

1

PC114

.01U_0603_50V7K

2

PR150

PC111

2.5VREF

0_1206_5%

1

2

PQ42

2SA1036K

SYSON 38,42

PD31
RB751V

PR152

1 2

1K_0603_5%

1

PC112
4700P_0603_50V7K

2

31

2

PQ41

HMBT2222A

2

13

PR99
0_1206_5%

1.5VIN

PD23
RB751V

1

PC80

4.7U_1206_16V4Z

3 3

1 2

2

1K_0603_5%

1

2

31

PQ23
2SA1036K

PQ22

HMBT2222A

PR101

2

PC81
2200P_0603_50V7K

2

13

PQ21
SI3445DV

S

4 5

3

PR100
10K_0603_5%

PU8B
LM393M

7

300K_0603_0.5%

D

6
2

1

G

5

+

6

-

PR104

5UH_SPC-06704

LX1.5

1 2

12

PD24
RB051L-40

1000P_0603_50V7K

PL9

1

PC82

2

PQ24

@DTC115EK

4 4

+1.5V+-5%

PR102
100_0603_5%

13

100K

100K

@DTC115EK

+1.5VALWP

12

+

+5VALWP

2

PQ25

PC79

150UF_D_6.3V_KO

13

PR103
200K_0603_1%

PR105
@100K_0603_5%

100K

2

100K

10U_1206_10V4Z

PR106

@0_0603_5%

PR154

511K_0603_1%

PQ43

@DTC115EK

+1.8V +-5%

+1.8VSP

12

+

PC110
150UF_D_6.3V_KO

13

100K

100K

PR153

200K_0603_0.5%

2.5VREF

2

SUSP 42

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

SCHEM A TIC , M/ B LA -1691

Size Document Nu mber Re v

Custom

Date: Sheet

星期二 一月

401241 1A

07, 2003

D

of

47 53,

A

1 1

CPU_VID45
CPU_VID35

CPU_VID25
CPU_VID15
CPU_VID05

+3VALWP

PR124
150K_0402_1%

PR126

180K_0402_1%

2 2

VGATE41

CPU_ON

PC92

1UF_0805_25V

+2VREF

*

PR137

48.7K_0402_1%

PC97

.1U_0402_16V4Z

PR143
200_0402

1 2

PR145
200_0402

3 3

1 2

1 2

PR146
200_0402

1 2

PR148
200_0402

PR140
20K_0402_1%

PC98
4700P_0402_25V7K

PC103
4700PF_0402_25V

B

PR115 100K_0402
PR117 100K_0402
PR118 100K_0402
PR120 100K_0402
PR121 0_0402

PR123 120K_0402

PC91

47PF_0402_50V

PC93
1UF_0805_25V

100K_0402_1%

53.6K_0402_1%

L_30
L_31

PR113 0_0402

+2VREF

*

PR131

*

PR134

L_29

L_32

L_26

B+

FBM-L18-453215-900LMA 90T_1812

CPUVDD

PC95
1000PF_50V

1

ILIM

2

TRIG

3

CM+

4

CM-

5

CS-

6

CS+

7

COMP

8

GND

PU10 MAX1718

21
22
23
24
25
14

3
2

17

6
20
11
12

L_25

PU11 MAX1887

12
12
12
12
12

12

PR139
1K_0402_1%

C

PL10

1 2

D4
D3
D2
D1
D0
VGATE

VCC
TIME
SDN/SKIP

POS
VDD

NEG

CC

ZMODE

OVP

SUS
REF
ILIM
GND15TON

L_18

PR135

33K_0402_1%

PC96
470P_0402_50V7K

LIMIT

V+

BST

LX

DH

VDD

DL

PGND

4.7UF_1210_25V

PR111
0_0402

27

LX

28

DH

26

BST

16

DL

1

V+

9
4

FB

13
5
19
18
8

S1

7

S0

10

16
15
14
13
12
11
10
9

PC84

L_19

CPUVDD

20_0805

L_27

CPU_B+

CPUVCC

CPUFB

POS

L_28

PC99

0.1UF_50V

+5VALWP

PR112

L_20

12

L_23

2 1

PC105

1UF_0805_25V

<1ST>

PC85

4.7UF_1210_25V

21

PD25
1SS355

1 2

PR116 2.2_1%

1 2

L_22

0.1UF_50V

PC90

4.7UF_1206_16V

PC94
1000PF_50V

PR132
0_0402

PR136

@0_0402

PD29
1SS355

D

*

PC87 0.1UF_50V

PC88

PR147

2.2_1%

1 2

PC86
@4.7UF_1210_25V

PM_DPRSLPVR

*

L_LG

IR7811A

L_21

IR7811A

PQ26

VTT1LX

PQ28

SI4362DY

PQ34

L_24

VTT2LX

PQ38

SI4362DY

E

CPU_B+

CPU_B+

PQ27

IR7811A

578

3 6

241

PQ29

SI4362DY

578

3 6

241

PM_DPRSLPVR 20

CPU_B+

578

PQ35

IR7811A

3 6

241

PQ39

SI4362DY

578

3 6

241

578

3 6

578

3 6

578

3 6

578

3 6

F

PC83

0.1UF

1 2

PR108
0_0402_5%

241

PR119
68_0805

12

241

1 2

241

12

241

PC89
220PF_50V

PR128
100_0402

PR144
68_0805

PC104
220PF_50V

PL11

SSC-1206-0R5

PD26

EC31QS04

2 1

SSC-1206-0R5

PD28
EC31QS04

2 1

CM+

PL12

CS+

1

MAX4322EUK-T_SOT23-5

PR110
1K_0603_1%

PR122

2.8K_0402_1%

PR127

49.9K_0402_1%

PQ32

13

D

2N7002

2

G

S

PQ33
2N7002

PR141

0.002_2512_1%
12

PU9

+5VALWP

5

+

-

2

12

12

PR129
68K_0402_1%

+5VALWP

PR133
100K_0402

13

D

S

+CPU_CORE

PC100

4.7UF_1210_25V

G

3
4

+CPU_CORE

PR114

0.002_2512_1%

2

G

PR138

100K_0402

+CPU_CORE

PR107
499_0603_1%

PR109
1K_0603_1%

PQ31

13

D

2N7002

S

PM_STPCPU#13,20

CPU_B+

12
12

2 1

2

G

PC101

4.7UF_1210_25V

CM+

+CPU_CORE

+CPU_CORE

PD27
EC31QS04

+5VALWP

PR125
100K

PQ30

13

D

2N7002

S

D

S

@4.7UF_1210_25V

G

2

13

PC102

**

PQ37
2N7002

G

H

PQ44

13

D

2N7002

S

CPU_VID1

PR130
100K_0402

PM_GMUXSEL20

13

D

S

2

PR142

100K_0402

+3VALWP

2

G

PQ36
2N7002

G

2

PM_DPRSL PVR

PR155

10K_0603

+3VALWP

4.7UF_1206_16V

CPU_ON

4 4

PM

GMUXSEL

STPCPU#
1
1
0

BM D-S
Deeper

A

0
X

1
0

0
0

B

DPRSLPVRBMVCORE'

1.30V

0

01

1.20V

0

1.0V

1

Offset

4.62%0

2.0%

4.62%

C

VCORE

0%

1.30V

1.239VPM D-S

1.176V

1.144V

0%

1.0V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

VR_ON38

E

VR_ON

12

PC106

PC107 1000PF_50V

PR149

0

F

1.2VDD
PU12

4

VIN

2

DELAY
ERROR7CNOISE

8

ON/OFF#

SI91822DH-12-T1

VOUT

SENSE

GND

5
6
1
3

+1.2VPP

PC109

1000PF_50V

12

PC108

4.7UF_1206_16V

+1.2VPP

Compal Electronics, inc.

Title

SCHEM A T IC, M/B LA-1691

Size Docu ment Number Re v
Custom

Date: Sheet

星期二 一月

G

401241 1A

07, 2003

48 53,

H

of

5

Rev 0.2

4

3

2

1

Page Page

4

D D

5
5
5

5
10,11
10,11
10,11

C C

10,11
10,11
10,11
10,11
10,11

11
11

B B

13
14
14
14
17

Location From To Location Fr om To

Modify R31
ADD R551 10KX
ADD R552 X 470 Ohm
ADD Q53 X NPN
ADD R546 X 200 Ohm
DEL LPC_AD0 X
DEL LPC_AD1 X
DEL
DEL
DEL
DEL
DEL KBA5 X
DEL PCIRST# X
DEL R172 33 Ohm X
DEL C253 10PF X
DEL R153 33 Ohm X
ADD R538 X 20K
ADD R547 X 0 Ohm

Modify R41 499_0603 499_04 02

DEL L6,L9

56 Ohm 10K

LPC_AD2
LPC_AD3
LFRAME# X
PCLK_80H X

CHB1608U301

17
18
19
19
19
19
19

X
X

19
19
19
19
19
19
19
20
20
21
21
21

X

21

Modify C99 470P_0603 470P_0402

ADD C737,C738

C739,C740
Modify JP16 7 PIN 4 PIN

DEL D25 DAN217 X

DEL C487,C488

C489

ADD C726,C727 X 270P_0402

DEL C490,C491

C492

ADD C723,C724 X 33P_0402

DEL L31,L32,L33

ADD L55,L56 X

DEL C495,C496

C497

ADD C725,C728 X 100P_04 02
DEL R326,R327

R328

ADD R543,R544

R545
CHANGE RP127 RP58

CHANGE R483 R458
DEL
DEL
DEL
DEL

X 220P_0402

270P_0402 X

33P_0402 X

CHB1608U301

CHB1608U301

100P_0402 X

75 Ohm X

X 75 Ohm

USB_EN_0
USB_EN_1
USB_EN_2
USB_EN_3

X

X
X
X
X

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Size Do cum e nt Nu m b e r R ev
Custom

Date : Sheet

SCHEMAT IC , M /B LA -1691

星期二 一月

07, 2003

2

401241 1A

of

49 53,

1

5

4

3

2

1

Rev 0.2

Location From To Location Fr om ToPage Page

26

D D

27
29
29
31
33
33
33

C C

33
33
33

ADD C741 220P
DEL C5
ADD R233
ADD R244
ADD C742 X 220P

ADD C743,C744 X 220P
ADD R539,R540

R541,R542

DEL
DEL
DEL
DEL

DEL L35,L36

33

L41,L54

X

4.7U
X
X

X1K

USB_EN_0
USB_EN_1
USB_EN_2
USB_EN_3

JTSO402-03_4P

X

5.6K
10K

X
X
X
X
X

33
35
35
35
35
35
35
35
35
35
35
36

DEL R364,R365

33

R330,R331
R332,R333

R531,R526

0 Ohm X

36
36

ADD L57,L58

33

B B

33

33
33

L59,L60
L61,L62

L63,L64

ADD C729,C730

C731,C732
C733,C734

C735,C736

Modify U3,U7

DEL U31

X

FBM-160808

-121T

X47P

TPS2052 TPS2042-ADR

TC7SH08FU

X

36
37
38
38
38
38

ADD R345 0 Ohm X
Modify R291,R463 8.45K 54.9K
Modify R281,R464 2.32K 4.32K

DEL C451,C681 0 . 1 U X
DEL R529,R494 1.82K X

DEL C714,C675 3900P X
Modify C458,C677 3900P 1000P
Modify R527,R484 1.47K 2.87K
Modify C454,C683 1500P 2700P
Modify R524,R496 113K 162K
Modify R517,R200 1.13K 1 .05K

Modify R512

3.9K 4 .3K
Modify R508 27K 6 .2K
Modify R510 3K 3.3K

Modify Q49,Q50

CHANGE 1 AND 3 PIN
DEL SD_PME# X
DEL SD_PME#
DEL R246

0 Ohm X

X

ADD R548 X 0 Ohm
ADD X

EC_CPUPD#

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Size Do cum e nt Nu m b e r R ev

Date : Sheet

SCHEMAT IC , M /B LA -1691

Custom

星期二 一月

07, 2003

2

401241 1A

of

50 53,

1

5

4

3

2

1

Rev 0.2

Location From To Location Fr om ToPage Page

40

D D

40
41
42
42
42
42
42

C C

42
43
48
48

Modify JP23 Change 4PIN to 3PIN
DEL FAN_PWM X

Modify D4,D5,D27 SFI0603 POST24C

ADD U52 X SI4800

ADD C720,C721

C722

ADD C719 X
ADD Q52
ADD R537
Modify C423 .1u

X 4.7U

1U

2N7002X

1K

.01u
Modify PJP8 +1.8VS +1.8VA LW
ADD PQ44 2N7002

X

ADD PR155 X 10K

B B

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Size Do cum e nt Nu m b e r R ev
Custom

Date : Sheet

SCHEMAT IC , M /B LA -1691

401241 1A

星期二 一月

07, 2003

2

of

51 53,

1

5

4

3

2

1

Rev 0.3

Location From To Location Fr om ToPage Page

5

D D

5
5
33
33
34
34
34

C C

35
35
29
29
37
38
38

B B

38
38
36
36
36

ADD R551 X 10K

ADD R469,R552 X 470 Ohm
Modify R358

R360

ADD C745,C746
Modify R218 2.4K 10K

ADD C280

Modify R532,R533

R528,R535

Modify R291,R463 5 4.9K 19.6K
Modify R521,R221 1 4 3K 63.4K

ADD R557 X 0 Ohm

ADD DVD_DETECT
ADD PAD1,PAD2 X 2.5*3
Modify R301 0 Ohm 8.2K

ADD R553 X 0 Ohm

ADD DVD_DETECT

ADD PM_SLP_S1#
DEL C612,C270
ADD R558,R559
DEL R161,R203

XADD Q47,Q53 3904

0402 0603

X 47pf

X 0.01U

10K 1M

1U_0603 X

X 0 Ohm

X1.2K

44
44
46

Rev 0.4

31
34
34
47

CHANGE PR32 3K 2.8K
CHANGE PR41 3.24K 2 .32K
CHANGE PC43 2.2U 4 .7U

MD_MICDEL X

DEL C412 X1u_0805

MD_MICDEL X

DEL PQ43 DTC115EK X

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Size Do cum e nt Nu m b e r R ev

Date : Sheet

SCHEMAT IC , M /B LA -1691

Custom

星期二 一月

07, 2003

2

401241 1A

of

52 53,

1

5

4

3

2

1

Rev 1.0

Location From To Location Fr om ToPage Page

14

D D

14
28
28
28

28

DEL R538
ADD R547 X 0 Ohm
DEL JP20 PCI SLOT X
DEL U5 TC7SH08FU X
DEL D14

DEL C176,C583,C629

C559,C555,C560
C557,C565,C630

20K X

RB751V X

0.1u_0402 X

NOTE:

1.EQ: R512=4.3K , R510=3.3K
Modify R558,R559 TO "0 Ohm"
UNMOUNT R161,R203

2.NO EQ: R512=3.9K, R510=4.7K, R508=2K
Modify R558,R559 TO "1u_0603 10V6k"
MOUNT R161,R203

28

C C

28
28
28
28
28
28
42

B B

42
42
42
42
42

DEL C234,C265 10u_12 06 X

DEL C558 10P_0402 X
DEL C554 1000P_0402 X
DEL R93 0_0402 X
DEL R128 100_0402 X
DEL R386 33_0402 X
DEL U24 SI4800 X

DEL C418,C430

C444

DEL C420 1u_0603 X
DEL Q24 2N7002 X
DEL R282 470 Ohm X

Modify PR41 2.32K 2 .55K

CHB1608B121

4.7u_0805 X

XDEL L12,L14,L15

A A

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF
R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

3

Size Do cum e nt Nu m b e r R ev
Custom

Date : Sheet

SCHEMAT IC , M /B LA -1691

401241 1A

星期二 一月

07, 2003

2

of

53 53,

1