HP HDX9000 Schematics

http://hobi-elektronika.net

ORION

VCC_PEG_BUILD

DATE CHANGE NO.

REV

2007.12.03

DRAWER
DESIGN
CHECK
RESPONSIBLE

SIZE =
FILE NAME : XXXX-XXXXXX-XX

P/N SHEET OF

EE DATE

3

XXXXXXXXXXXX

DATE

POWER

VER :

INVENTEC

TITLE

ORION

DOC. NUMBER

CODE

SIZE

A3

CS

REV

165

X01Model_No

http://hobi-elektronika.net

TABLE OF CONTENTS

PAGE

5- DC& BATTERY CHARGER
6- BATTERY CONN

7- SYSTEM POWER(3V/5V)

8- SYSTEM POWER(+V1.8/+V1.25S)
9- SYSTEM POWER(+V1.5S/+VCCP)

10- CPU POWER(VCC_CORE)
11- DDR TERMINATION VOLTAGE

12- POWER(SLEEP)
13- POWER(SEQUENCE)
14- CLOCK_GENERATOR
15- MEROM-1
16- MEROM-2
17- MEROM-3

18- MEROM-4
19- THERMAL&FAN CONTROLLER

20- CRESTKINE-1
21- CRESTLINE-2
22- CRESTLINE-3

23- CRESTLINE-4
24- CRESTLINE-5
25- CRESTLINE-6
26- DDR2-DIMM0
27- DDR2-DIMM1

28- DDR2-DAMPING

PAGE
29- MXM CONN

30- CRT& HDMI CONN

31- LCD CONN

32- ICH8-1

33- ICH8-2
34- ICH8-3
35- ICH8-4

36- ICH8-5
37- KBC

38- CIR CONTROLLER
39- SPI BIOS

40- KEYBOARD CONN.
41- FINGER PRINTER BOARD
42- HDA CODEC

43- AUDIO JACK SENSE

44- SUBWOOFER
45- HP,MIC&7.1 JACK

46- SPEAKER CONN

47- ESATA/SATA CONN
48- ODD CONN

49- USB CONN
50- 5 IN 1/1394 CONTROLLER

PAGE
51- 5 in 1/1394 CONN

52- EXPRESSCARD CONN
53- WLAN/SPARE MINI-CARD
54- LAN INTERFACE
55- TRANSFORMER&RJ45 CONN
56- DOCKING CONN
57- SCREW
58- TV TUNER CONN

59- WABCAM CONN
60- BLUETOOTH CONN

61- PWR&LID SWITCH & LEDS

62- LED/SWITCH CONN

63- DAUGHTER BOARDS

64- SWITCH BOARD (R)

65- SWITCH BOARD (L)

CHANGE by

JM FENG

12-Feb-2007

INVENTEC

TITLE

ORION

DOC. NUMBER

CODE

SIZE

A3

Model_No X01

CS

SHEET

REV

OF

652

HDMI

P30

TMDS

XDP

http://hobi-elektronika.net

P18

Merom

P15-P18

Thermal Sensor

P19

DC/DC System power

BATTERY

System Charger

P5-P13

LCM

Dual Backlight

P31

CRT

P30

USB_0/1/2/5 USB Ports
USB_3 Webcam

USB_4 Expresscard
USB_6 Fingerprint

USB_7 Bluetooth
USB_8 TV TUNER

USB_9 Docking

Keyboard

Touch PAD

Dual CAP Buttons&LEDs

LVDS

RGB

P49

P59

P52

P41

P60

P58

P56

P40

P62

MXM-HE CONN

M76/M78

Fix ODD

USB

SATA_0 HDD1

SATA_1 HDD2

KBC

Contrller

ITE

IT8512E

BIOS

SPI Flash 1MB

MX25L8005

P29

P47

P37

P48

P39

16X PCIE

IDE

SATA_0_1

LPC

Crestline

1299 PCBGA

ICH8-M

676 BGA

ITE

ITE8305E

CIR

PM

P38

P38

FSB

DMI

P20-P25

P32-P36

Dual Channel DDR2 Interface

PCI

PCIE_1_2_3

PCIE_4

PCIE_6

PCIE_5

Audio Code

HDAL

SigmaTel
STAC9271

TPA3005D2

TLV2464&

TPA3007D1

DDR2

Dual SODIMM

Ricoh

R5C833

P50-P51

P26-P28

1394
5 in 1

PCIE_1 Expresscard
PCIE_2 Minicard WLAN

PCIE_3 SPARE MINI-CARD

PCIE_4 E-SATA

NC

PCIE_5 NIC

MAVERALL 1G 88E8055

P42

P46

P44

CHANGE by

P54-P55

Dual Omni Mic

Ext Mic In

Four 7.1 Lineout

Dual Headphones

Four Satellites

40mm Woofer

JM FENG

P47

P52
P53

P53

ICS9LPR355BGLFT

Clock generator

RJ45

P45

P45

P46

P44

10-Nov-2006

P14

INVENTEC

TITLE

ORION

Block Diagram

CODE

SIZE

A3

DOC. NUMBER

Model_No X01

CS

SHEET

REV

OF

653

http://hobi-elektronika.net

Adapter

Selector

ADP_ID

(BQ24721)

+VBATR

Charger

+VBDC

Main Battery

CHGCTRL_3
ADP_PRES

I_ADP
BATT_IN
BATT_CLK
BATT_DATA

ADP_PRES

KBC_PW_ON

SLP_S3#_5R

SLP_S5#_3R

SLP_S3#_3R

5/3.3V

(TPS51120)

IO POWER

(TPS51124)

+V5A

+V3A

+V5AL

+V3AL

SLP_S3#

+V1.8

+V1.25S

V1.8_PG

V1.25S_PG

SLP_S3#

(G2998F11U)

SLP_S3#

LR

LR

(G9338)

+V1.8S

SLP_S3#

+VCCP

+V0.9S

VCCP_PG

M_VREF

LR

(APL5913)

+V5S

+V3S

+V1.5S

V1.5S_PG

PWR_GOOD_3

PM_DPRSLPVR

PSI#

IMVP VI

(ADP3207)

+VCC_CORE

VR_PWRGD_CK505

CHANGE by

JM FENG 1-Nov-2006

INVENTEC

TITLE

ORION

DOC. NUMBER

CODESIZE

A3

Model_No X01

CS

SHEET

REV

OF

654

1

2

R636

OPEN

1

2

1

R635

OPEN

2

OPEN

BATT_CLK

BATT_DATA

C669

OPEN12

C685

68uF_25v

+VBATR

5-,7-,8-,10-,29-,31-,44-,46-,56-

2

D510

3

1

BAT54S

ADP_PRES

6-,37-

6-,37-

1

S

2
3

FDS4435BZ

1

S

2
3
4

FDS4435BZ

7-,37-,63-

Q526

8

D

7
6
54

G

Q527

D

G

1

2

1

2

R595

12

10_5%

R594

12

10_5%

8
7
6
5

R603

324K_1%

R599

24.3K_1%

+VADP

C690

10pF_50v

1

1

2

2

R591

2

1

0_5%

C627

1
2

2.2uF_25v

C637

1
2

OPEN

2

1

2

7-,12-,13-,15-,33-,34-,35-,52-,53-,54-,56-,60-,61-,62-

CHGCTRL_3

0.1uF_25v

1

R590

47K_5%

R588

100K_5%

37-

C689

1uF_10v

L11

NFM60R30T222

12

3

4

L514

NFM60R30T222

12

3

4

1
2

C638

1
2

0.1uF_25v

CHARGE_GND CHARGE_GND

+V5AL

1

2

1

C624

2

1

2

1

2

CHARGE_GND

http://hobi-elektronika.net

+VADPTR

+VADPTR

C687

1
2

10pF_50v

R621

12

10mOHM-1%-2W

C639

12

0.1uF_25v

Kevin sense

7-,12-,37-,38-,45-,62-

R596

8.06K_1%

6-

R597

22.6K_1%

37-

BATT_IN

R598

39.2K_1%

+V3A

R606

1

2

10K_5%

5A

C688

0.1uF_25v

BATT_TS

1
2

C646

1
2

0.1uF_25v

U509

12

VCC

3

ACN

4

ACP

6

BYPASS#

5

ACDET

11

VREF5

10

AGND

15

TS

1

CHGEN#

14

SCL

13

SDA

25

ALARM#

17

IOUT

TI_BQ24721_QFN_32P

1
2

CHARGE_GND

C999

1uF_25v

C635

0.1uF_10v

1
2

ACDRV#

SYS

BATDRV#

PVCC

HIDRV

PH

BTST

REGN

LODRV

PGND
SYNP
SYNN

SRP
SRN
BAT

EAO

EAI

FBO

ISYNSET

TML

R592

12

0_5%

37-

C648

4.7uF_25v

2

23

24

32

30

29

31

28

27
26
22
21
20
19
18

7

8
9

16
33

CHARGE_GND

I_ADP

1

R666

1K_1%

2

1

R665

13.7K_1%

2

1
2

0.01uF_50v

D508

R605

2

1

4.7_5%

13

BAT54_30V_0.2A

1

R601

100K_5%

2

C670

PAD506

37-

C649

1

R593

200K_5%

2

POWER_PAD_3P

ADP_ID

1

S

2
3
4

FDS4435BZ

1

S

2
3
4

FDS4435BZ

0.1uF_25v

12

1uF_6.3v

C650

1

2

1
2

Q529

G

Q528

8

D

7
6
5

8

D

7
6
5

G

R589

18K_5%

C623

100pF_50v

5

G

4

G

4

C634

1
21256pF_50v

76

8

D

S

123

8

765

D

S

123

1

2

1
2

1

C657

2

0.1uF_25v

Q524

FDS8884

L512

1

SIL104R_100_R

Q525

FDS6690AS

R600

10K_5%

C626

1500pF_50v

CHANGE by

2

1

C656

1

C658

2

2

1uF_25v

C628

1
2

10uF_25v_K_X5R

1
2

CHARGE_GND

JM FENG

22uF_25v

R604

12

0.01_1%_1W

Kevin sense

C640

12

0.1uF_25v

C647

0.1uF_25v

+VBATR

5-,7-,8-,10-,29-,31-,44-,46-,56-

C642

1
2

0.1uF_25v

CHARGE_GND

5-Jan-2007

C264

1
2

0.01uF_50v

C641

1
2

CHARGE_GND

1

S

2
3
4

FDS4435BZ

1

S

2
3
4

FDS4435BZ

1
2

C629

4.7uF_25v

0.1uF_25v

INVENTEC

TITLE

ORION

DC &BATTERY CHARGER

CODE

SIZE

A3

CS

SHEET

+VBDC

6-

Q522

8

D

7
6
5

G

Q521

8

D

7
6
5

G

C630

1
2

4.7uF_25v

DOC. NUMBER

OF

565

REV

X01Model_No

BATT_DATA

BATT_CLK

BATT_TS

5-,37-

5-,37-

http://hobi-elektronika.net

+V3AL

6-,7-,13-,32-,37-,39-,61-,62-

1

R511

10K_5%

2

5-

1

R510

10K_5%

2

R5072

100_1%

12

R5073

12

100_1%

C514

1
2

OPEN

+V3AL+V3AL

3

1

D5010

6-,7-,13-,32-,37-,39-,61-,62-

2

3

1

D5011

CHENMKO_BAV99

2

6-,7-,13-,32-,37-,39-,61-,62-

CHENMKO_BAV99

+VBDC

R512

12

1K_1%

5-

1
2

C515

0.1uF_25v

CN501

1

1

2

2

3

3

4

4

5

5

6

G1

6

G

7

G2

7

G

8

8

SYN_200275MR008G10DZL_8P

CHANGE by

JM FENG

5-Jan-2007

INVENTEC

TITLE

ORION

BATTERY CONN

SIZE

A3

CODE

CS

SHEET

DOC. NUMBER

665

REV

X01Model_No

OF

http://hobi-elektronika.net

5-,7-,12-,37-,38-,45-,62-

ADP_PRES

KBC_PW_ON

5-,37-,63-

37-

5-,12-,13-,15-,33-,34-,35-,52-,53-,54-,56-,60-,61-,62-

+V3A

POWERPAD_2_0610

+VBATR

5-,8-,10-,29-,31-,44-,46-,56-

PAD501

POWERPAD_4A

+V5AL

5

U15

1

4

2

TC7SET32FU

3

R178

12

OPEN

6A_200mil

PAD500

1uF_10v

C605

3
4

C604

1
2

For power test

23.7K_1%

C245 OPEN

SLF7055T_4R7N5R1

1

330uF_4v

R141

L505

12

12

12

1
2

+VBATP

C607

4.7uF_25v

9.76K_1%

7-

1
2

R167

C603

4.7uF_25v

12

51120GND

C227

12

0.1uF_16v

5

S1_D2

6
7

4

S2

FDS6900AS

Q518

+VBATP

7-

2VREF

7-,13-

1000pF_50v

1

C254

2

51120GND

R168

12

0_5%

51120GND

6

7

GND

VFB2

COMP2

VREG3

V5FILT

CS2

19

18

1

R140

14.7K_1%

2

1
2

5

20

VREF2

VREG5

1

4

3

2

VO1

VFB1

COMP1

33
32

SKIPSEL

31

TONSEL

30

PGOOD1

29

EN1

28

VBST1

27

DRVH1

26

LL1

25

DRVL1

PGND1

VIN

CS1

24

21

22

23

TI_TPS51120_QFN_32P

R165

1

10K_1%

2

1

R166

C250

10_5%

0.1uF_16v

2

C243

1
2

1uF_6.3v

8

R136

12

OPEN

R137

12

4.7_5%

1

2

R138

OPEN

1

D1

2
8

G1

3

G2

+V5AL

9

EN5

10

EN3

11

PGOOD2

12

EN2

13

VBST2

14

DRVH2

15

LL2

16

DRVL2

U13

5-,7-,12-,37-,38-,45-,62-

1
2

C251

10uF_6.3v

VO2

PGND2

17

R169

12

7.32K_1%

51120GND

1
2

R179

12

0_5%

C252

4.7uF_25v

33-,37-

12

30K_1%

RSMRST#

R177

12

4.7_5%

+V3AL

6-,13-,32-,37-,39-,61-,62-

1

C244

2

R170

C253
12

OPEN

R181

2

0_5%

R180

0_5%

C263

10uF_6.3v

12

12-,29-

1

FDS8884

2VREF

7-,13-

12

0.1uF_16v

SLP_S3#_5R

Q520

G

4

G

41S23

+VBATP

C608

1
2

4.7uF_25v

Q523

FDS6690AS

7-

C609

1
2

4.7uF_25v

L508

1

SLF10155T_4R7N6R2

220uF_6.3v_OSCON

2

1

C611

2

8

765

D

1S23

765

8

D

8-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

6A_200mil

MAX5V

PAD502

POWERPAD_2_0610

C610

1
2

1uF_10v

+V5A

JM FENG 21-Jun-2007

INVENTEC

TITLE

ORION

SYSTEM POWER(3V/5V)

CODE

SIZE

A3

DOC. NUMBER

Model_No X01

CS

SHEET

REV

OFCHANGE by

657

http://hobi-elektronika.net

9-,14-,20-,24-,35-

+V1.25S

PAD1

3
4

POWERPAD_4A

330uF_2v_15mR_Panasonic

SLF10155T_2R0N8R4

1

C241

2

+VBATR

5-,7-,8-,10-,29-,31-,44-,46-,56-

C284

1
2

4.7uF_25v

L510

12

1
2

C283

4.7uF_25v

V1.25S_PG

9-,11-,12-,13-,33-,37-,42-,54-

SLP_S3#_3R

8

D

Q9

SI4800DY

S

D

Q13

FDS6676AS

S

123

R143

12

20.5K_1%

C246

12

OPEN

765

G

123

4

765

8

G

4

R172

12

30.1K_1%

13-

R174

12

0_5%

0.1uF_16v

C257

12

12

TI_TPS51124RGER_QFN_24P

33-,37-,49-

1

R176

0_5%

2

12

0.1uF_16v

12

43.2K_1%

C247

OPEN

13-

+V5A

C266

1
2

4.7uF_6.3v

R148

12

V1.8_PG

SLP_S5#_3R

+VBATR

5-,7-,8-,10-,29-,31-,44-,46-,56-

C286

4.7uF_25v

765

8

D

G

S

Q10

4

123

FDS8884

8765

D

Q14

G

FDS6676AS

1
2

C285

1
2

4.7uF_25v

L511

12

SLF10155T_2R0N8R4

330uF_2v_9mR_Panasonic

9-,11-,12-,20-,23-,24-,26-,27-

PAD2

POWERPAD_2_0610

1

C267

2

+V1.8

41S23

R147

12

30.1K_1%

51124GND

R144

2

1

OPEN

5

6

VO2

R139

0_5%

PGOOD2

EN2

VBST2

DRVH2

LL2

DRVL2

PGND2

13

VFB2

TRIP2

14

1

R145

8.87K_1%

2

7

8

9

4.7_5%R173

10

11

12

12

4

TONSEL

V5FILT

15

3

GND

V5IN

16

51124GND

51124GND

U14

2

1

VO1

VFB1

25

GND

24

PGOOD1

23

EN1

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

PGND1

TRIP1

18

17

7-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

1

1

R146

10K_1%

2

2

R175

12

4.7_5%

R198

12

10_5%

C265

1uF_6.3v

C258

JM FENG 16-Feb-2007

INVENTEC

TITLE

ORION

SYSTEM POWER(+V1.8/+V1.25S)

SIZE CODE REVDOC. NUMBER

A3

Model_No X01

CS

SHEETCHANGE by

OF

658

7-,8-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

+V5A

+V1.8

http://hobi-elektronika.net

8-,11-,12-,20-,23-,24-,26-,27-

+VCCP

SLP_S3#_3R

8-,9-,11-,12-,13-,33-,37-,42-,54-

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

R5056

12

0_5%

R5057

2

1

0_5%_OPEN

C268

1
2

1uF_6.3v

U16

6

VCNTL

7

POK

VIN

VOUT
VOUT

82

EN

FB

VIN

GND

9

1

ANPEC_APL5913_KAC_TRL_SOP_8P

13-

1
2

5

3
4

V1.5S_PG

C269

22uF_6.3v

C287

1
2

22uF_6.3v

39pF_50v

1
2

C296

C297

1uF_6.3v

1
2

+V1.5S

12-,17-,24-,33-,35-,52-,53-,56-,58-

1

R220

27.4K_1%

2

1

R222

30K_1%

2

12-,13-,19-,29-,30-,33-,35-,42-,47-,48-,51-,52-,56-,58-,59-

+V5S

C589

1
2

0.1uF_10v

VCCP_PG

+V1.25S

13-

8-,14-,20-,24-,35-

Q516

8
7
6

C594

1
2

54

4.7uF_6.3v

1

R576

0_5%

2

FDS6690AS

U507

1

VCC

2

GND

3

PGD

GMT_G9338_ADJTBUf_SOT23_6P

1

R577

OPEN

2

S

D

G

R584

12

120K_5%

DRV

ADJ

EN

1
2
3

1

R579

OPEN

2

C598

0.022uF_16v

1

R578

0_5%

2

6

5

4

8-,9-,11-,12-,13-,33-,37-,42-,54-

R585

0_5%

1
2

1

2

1
2

C590

OPEN

SLP_S3#_3R

1

R582

113_1%

2

1

R581

100_1%

2

+VCCP

1

2

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

C595

220uF_2.5v_R35

CHANGE by

JM FENG

16-May-2007

INVENTEC

TITLE

ORION

SYSTEM POWER(+V1.5S/+VCCP)

SIZE DOC. NUMBER

CODE

A3

Model_No X01

CS

SHEET

OF

REV

659

PSI#

H_DPRSTP#

PWR_GOOD_3

VR_PWRGD_CK505

CLK_PWRGD

CPU_SINGNAL_GROUND

PM_DPRSLPVR

C77

1
2

18pF_50v

R54

12

261K_1%

C540

1

1000pF_50v

2

CPU_SINGNAL_GROUND

VR_PWRGD_CK505

16-

16-,20-,32-

H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

10-,13-,29-

10-,14-,33-

14-,33-

C95

R540

12

28K_1%

C94

330pF_50v

0.012uF_16v

12

220pF_25v

1

1.65K_1%

2

17-

17-

10-,14-,33-

12

R41

12

R42

17-

TP1007

17-

17-

TP1008

17­17­17-

TP1009

17-

R40

0_5%

12

CPU_SINGNAL_GROUND

R48

12

0_5%_OPEN

C96

12

470pF_50v

R67

12

20-,33-

499_1%

C76

12

1000pF_50v

CPU_SINGNAL_GROUND

1

R53

2

VCCSENSE
VSSSENSE

5-,7-,8-,10-,29-,31-,44-,46-,56-

+V3S

1

R38

1K_5%

2

0_5%
0_5%

TP1010

TP1011

TP1012

TP1013

0.0047uF_50v

12

C69

1

EN

2

PWRGD

3

PGDELAY

4

CLKEN

5

FBRYN

6

FB

7

COMP

8

SS

9

STSET

10

DPRSLP

C103

1

*

2

63.4K_1%

3ph=63.4K

R68

**

150K_1%

3ph=150K

CPU_SINGNAL_GROUND

+VBATR

12

1K_5%

1000pF_50v

12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

R5009

2

1

D3

21

1N4148

12

R35

665K_1%

0.1uF_10v

1
2

CPU_SINGNAL_GROUND

32

31

PSI

VCC

30

TTSENSE

29

VRTT

28

DCM

27

OD

26

PWM1

25

PWM2

24

PWM3

23

SW1

22

SW2

21

SW3

GND

CSCOMP

20

19

CPU_SINGNAL_GROUND

C106

C105

1

1000pF_50v

2

1500pF_50v

C57

C78

1uF_10v

3ph=0ohm

1
2

R49

10_5%

R55

0_5%

1

R541

*

OPEN

3ph=OPEN

2

R60

R59
R73

0_5%

NTC of 220K

1
2

2

12
12
12

12

220K_5%

12

73.2K_1%

12

140K_1%

12

105K_1%

12

105K_1%

*

12

105K_1%

38

40

41

TML

VID0

VID139VID2

U3

ADI_ADP3207_LFCSP_40P

ILIMIT

VRPM

RRPM

11

12

13

1

R69

2

1

2

37

VID336VID4

RAMPADJ

RT

15

14

16

1

R71

324K_1%

2

1

R70

150K_1%

2

3ph=150K

34

VID535VID6

LLSET

17

1K_5%

33

DPRSTP

CSREF

CSSUM

18

http://hobi-elektronika.net

2

1

C54

0.1uF_16v

5

U2

4

3

TI_SN74LVC1G17DCKR_SC70_5P

+V5A

PWR_GOOD_3

7-,8-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

12

C541

1

1uF_10v

2

12

0_5%
0_5%

*

R562

R551

R72

0_5%

R39

R547

R546

R552

R550

C551

C104

1

1

2

1000pF_50v

2

CPU_SINGNAL_GROUND

20-,33-

1

2

SB_3S_VRMPWRGD

4.7uF_6.3v

10-,13-,29-

R74

12

0_5%

+V5A

7-,8-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

C588

1
2

4.7uF_6.3v

D507

BAT54C_30V_0.2A

U10

1

IN

2

SD

3

DRVLSD

4

CROWBAR

5

VCC

ADI_ADP3419_RM_MSOP_10P

3ph install

+V5A

7-,8-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

C114

BAT54C_30V_0.2A

ADI_ADP3419_RM_MSOP_10P

C585

4.7uF_6.3v

BAT54C_30V_0.2A

ADI_ADP3419_RM_MSOP_10P

1

1
2

U5

1
2
3
4
5

IN
SD
DRVLSD
CROWBAR
VCC

+V5A

3

2

D504

10

BST

9

DRVH

8

SW

7

GND

6

DRVL

7-,8-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

1

1
2

2

D505

U8

1
2
3
4
5

IN
SD
DRVLSD
CROWBAR
VCC

DRVH

GND

DRVL

BST

SW

1

3

R574

4.7_5%

2

1

C587

1
2

0.22uF_10v

2

10

BST

9

DRVH

8

SW

7

GND

6

DRVL

3

10
9
8
7
6

R83

1

4.7_5%

2

+VBATR

1

C115

2

0.22uF_10v

1

R563

1

C581

4.7_5%

0.22uF_10v

2

2

10uF_25v_K_X5R

C183

1
2

5-,7-,8-,10-,29-,31-,44-,46-,56-

1

C592

100uF_25v

2

10uF_25v_K_X5R

C128

1
2

C188

C206

1

1

2

2

0.01uF_50v

Q513

FDS6676AS

C149

1
2

0.01uF_50v

Q509

FDS6676AS

10uF_25v_K_X5R

C169

C168

1

1

2

2

FDS6676AS

4

G

6

8

7

5

D

G

G

S

123

4

CHANGE by

C166

1
2

G

4S12

1
2

0.01uF_50v

Q511

56789

3

21

S

8

765

D

1S23

4

8765

D

3

C207

6

87

5

D

G

41S23

Q8

SI7686DP_T1_E3

1

Q514

2

FDS6676AS

LAYOUT NOTES: C1779 C502 C503 PIN2 CONNECT TO Q14 , Q18 GND

9

5678

Q4

G

SI7686DP_T1_E3

C1780 C532 C531 PIN2 CONNECT TO Q16 , Q20 GND

+VCC_CORE

4321

L502

12

8

765

D

G

S

23

41

FDS6676AS

Q510

ETQP4LR36WFC_PANASONIC

1

R90

20_5%

2

1

C167

1000pF_50v

2

56789

Q5

G

SI7686DP_T1_E3

4321

L503

12

8765

D

G

Q512

23

4S1

FDS6676AS

L504

ETQP4LR36WFC_PANASONIC

1

R115

20_5%

2

C208

1000pF_50v

12

ETQP4LR36WFC_PANASONIC

1

R96

20_5%

2

C171

1

1000pF_50v

2

INVENTEC

TITLE

ORION

CPU POWER(VCC_CORE)

CODE

SIZE

A3

CS

23-Mar-2007JM FENG

SHEET

17-

DOC. NUMBER

10 65

REV

X01Model_No

OF

http://hobi-elektronika.net

SLP_S3#_3R

8-,9-,12-,13-,33-,37-,42-,54-

+V1.8

8-,9-,12-,20-,23-,24-,26-,27-

C203

1
2

4.7uF_6.3v

1

R117

0_5%

2

GMT_G2998F11U_SOP_8P

C205

1

0.1uF_10v

2

NOTE: DDR2 REGULATOR

U12

1

2

3

20-,26-,27-

GND

EN

VTTS

VREF

VTT_IN

VDDQ

TML-PAD

VTT

VCC

M_VREF

+V5A

7-,8-,9-,10-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

+V0.9S

28-

8

7

6

54
9

1
2

C204

1uF_6.3v

1
2

C212

10uF_6.3v

1
2

C223

10uF_6.3v

JM FENG 27-Oct-2006

INVENTEC

TITLE

ORION

DDR TERMINATION VOLTAGE

SIZE

A3

Model_No X01

CS

SHEETCHANGE by

OF

REVCODE DOC. NUMBER

6511

SLP_S3#_3R

8-,9-,11-,13-,33-,37-,42-,54-

1

R351

10K_5%

2

+V5AL

5-,7-,12-,37-,38-,45-,62-

5

2

3

5-,7-,13-,15-,33-,34-,35-,52-,53-,54-,56-,60-,61-,62-

+V3A

Q17

4

S

AO6409

C5028

12

4700pF_25v

1

R342

300K_5%

2

SSM3K7002F

U20

4

TC7SET04F

http://hobi-elektronika.net

+V5A

10-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

+V3S

1

D

2
5
63

G

C339

1

R345

47_5%

1
2

10uF_6.3v

2

Q18

3

D

1

G

S

2

7-,8-,9-,10-,11-,13-,30-,31-,35-,37-,42-,45-,49-,62-

+V5S

9-,13-,19-,29-,30-,33-,35-,42-,47-,48-,51-,52-,56-,58-,59-

Q531

8

1
2

5

D

S

3
6
74

G

FDR840P

Q532

1

4

D

S

2
5
6

3

G

AO6409_OPEN

C5029

1000pF_50v

1

R681

300K_5%

2

SSM3K7002F

12

R682

470_5%

Q530
1

1
2

1

2

3

D

G

S

2

C706

10uF_6.3v

Q12

G

1

SSM3K7002F

+V5AL

5-,7-,12-,37-,38-,45-,62-

1

R218

100K_5%

2

3

D

S

2

C242

0.01uF_16v

1
2

+V1.8

8-,9-,11-,20-,23-,24-,26-,27-

Q519

6

D

5
2

13

G

FDC637AN

Q517

6

D

5
2

1

G

FDC637AN

1

R149

270K_5%

2

R586

470_5%

Q515

G

1

SSM3K7002F

+V1.8S

29-,47-

4

S

4

S

3

C601

1

1
2

10uF_6.3v

2

3

D

S

2

+V1.5S

9-,17-,24-,33-,35-,52-,53-,56-,58-

1

R219

470_5%

2

Q11

3

D

G

1

S

2

SSM3K7002F

7-,29-

31-,37-

SLP_S3#_5R

SLP_S3_5R

CHANGE by

JM FENG 16-May-2007

INVENTEC

TITLE

ORION

POWER(SLEEP)

SIZE

A3

DOC. NUMBER

Model_No X01

CS

SHEET

REVCODE

OF

6512

R82

12

V1.5S_PG

V1.8_PG

VCCP_PG

+V3S

+V5S

8-

9-

8-

9-

R64

12

1K_5%

12

68.1K_1%

12

102K_1%

10K_5%

R86

12

10K_5%

R87

12

10K_5%

R81

12

1K_5%

CHENKO_LL4148_2PD10

1

2

R65

R66

1

R80

49.9K_1%

2

V1.25S_PG

SLP_S3#_3R

8-,9-,11-,12-,33-,37-,42-,54-

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

9-,12-,19-,29-,30-,33-,35-,42-,47-,48-,51-,52-,56-,58-,59-

+V3A_KBC

R78

12

20K_5%

1
2

1000pF_50v

R85

12

13-

100K_5%

7-,8-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

C119

C118

1
2

0.1uF_10v

http://hobi-elektronika.net

2VREF

7-

R77

12

1M_5%

+V5A

U6-A

8

3

+

1

OUT

2

-

ON_LM393DR2G_SOP_8P

4

+V3S

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

1

R79

10K_5%

2

10-,13-,29-

PWR_GOOD_3

5-,7-,12-,15-,33-,34-,35-,52-,53-,54-,56-,60-,61-,62-

+V3A

C185

1uF_10v

PWR_GOOD_3

+V3AL

6-,7-,32-,37-,39-,61-,62-

1

R112

100K_1%

2

12

10-,13-,29-

CHENKO_LL4148_2PD9

21

R62

12

140K_1%

1

C107

0.1uF_16v

1

2

R63

OPEN

R75

+V3A_KBC

37-

7-,8-,9-,10-,11-,12-,13-,30-,31-,35-,37-,42-,45-,49-,62-

20K_5%

12

13-

VCC1_POR#_3

R76

12

1M_5%

+V5A

U6-B

8

5

+

7

OUT

6

-

ON_LM393DR2G_SOP_8P

1

4

22

C117

0.1uF_16v

JM FENG 25-Oct-2006

1

R84

10K_5%

2

37-

PWR_GOOD_KBC

INVENTEC

TITLE

ORION

POWER(SEQUENCE)

SIZE

A3

DOC. NUMBERCODE

Model_No X01

CS

SHEETCHANGE by OF

13

REV

65

+V1.25S

Byte6:bit7=0,disable CR#_E;1,enable CR#_E

CR#_E

SRC6

Byte6:bit6=0,disable CR#_F;1,enable CR#_F

CR#_F

SRC8

Byte6:bit5=0,disable CR#_G;1,enable CR#_G

CR#_G

SRC9

Byte6:bit4=0,disable CR#_H;1,enable CR#_H

CR#_H

SRC10

CLKREQ_R_MCH#

VR_PWRGD_CK505

FSB

FSC

0

1
1

0

16-,20-

R254

16-,20-

R252

14-

R253

CLK_PWRGD

FSB CLOCK
FREQUENCY

12
12

12

R653

10K_5%

20-

10-,33-

10-,33-

667
800

+V3S

CPU_BSEL1
CPU_BSEL2

CLK_3S_REF1

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

FSA

1
0

8-,9-,20-,24-,35-

1

L10

BLM11A121S

2

C318

1
2

4.7uF_6.3v

10K_5%

0_5%

10K_5%

1

2

R228

12

0_5%

R229

12

0_5%_OPEN

HOST CLOCK
FREQUENCY

166
200

+VCCP

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

1

R227

10K_5%

2

CLKREQ_R_SATA#

CLK_R3S_CIRPCI

CLK_R3S_CBPCI

ICH_3S_SMCLK

ICH_3S_SMDATA

http://hobi-elektronika.net

Layout note: All decoupling 0.1uF disperse closed to pin

1

0.01uF_16v

2

C677

1

2

C306

33pF_50v

C667

C668

1

0.01uF_16v

2

CPU_BSEL0

CLK_R3S_ICH48

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

33-

38­50-

C672

OPEN

19-,26-,27-,29-,33-,52-,53­19-,26-,27-,29-,33-,52-,53-

X502

14.31818MHZ

12

1

30PPM

2

0.01uF_16v

+V3S

1
2

1
2

2

R659

10K_5%

1

C321

1
2

C320

1
2

0.01uF_16v

16-,20-

33-

1
2

R276

12

R267
R263

R285

OPEN

C307

33pF_50v

C679

1

0.01uF_16v

2

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

R288

2.2K_5%

12
12

C324

R323

33_5%

33pF_50v

10K_5%

R268

12

475_1%

475_1%

12

12.1_1%

1

2

12.1_1%

C678

1

0.01uF_16v

2

+VCCP

1

2

CLKREQ_SATA#

CLK_3S_CIRPCI
CLK_3S_CBPCI

1

R322

OPEN

CLK_3S_ICH48

2

1

R310

OPEN

2

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

+V3S

1

L9

BLM11A121S

2

Layout note: All decoupling 0.1uF disperse closed to pin

C313

1
2

4.7uF_6.3v

U18

26

VDDSRC_IO

45

VDDSRC_IO

36

VDDSRC_IO

12

VDD96_IO

39

VDDSRC

61

VDDREF

20

VDDPLL3_IO

49

VDDCPU_IO

9

VDD48

2

VDDPCI

55

VDDCPU

16

VDD

10

SUB_48MHZ_FSLA

57

FSLB_TEST_MODE

62

REF0_FSLC_TEST_SEL

1

PCI0_CR#_A

3

PCI1_CR#_B

4

PCI2_TME

5

PCI3

56

CK_PWRGD_PD#

64

SCLK

63

SDTAT

60

X1

59

X2

8

GNDPCI

11

GND48

15

GND

19

GND

23

GNDSRC

29

GNDSRC

42

GNDSRC

58

GNDREF

52

GNDCPU

ICS_ICS9LPRS501HGLFT_TSSOP_64P

C675

C666

1

1

2

0.01uF_16v

0.01uF_16v

2

CPU_STOP#

CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8

SRCT11_CR#_H
SRCC11_CR#_G

SRCT7_CR#_F

SRCC7_CR#_E

PCI4_27_Select

PCI_F5_ITP_EN

SRCT3_CR#_C

SRCC3_CR#_D

SRCT2_SATAT
SRCC2_SATAC

27MHz_NonSS_SRCT1_SE1

27MHz_SS_SRCC1_SE2

SRCC0_DOTT_96
SRCT0_DOTC_96

PCI_STOP#

CPUT1_F

CPUC1_F

CPUT0
CPUC0

SRCT10
SRCC10

SRCT9
SRCC9

SRCT6
SRCC6

SRCT4
SRCC4

1
2

0.01uF_16v

NC

C676

48

38
37

51
50

54
53

47
46

33
32

34
35

30
31

44
43

41
40

6
7

27
28

24
25

21
22

17
18

13
14

C317

1

0.01uF_16v

2

CLK_MCHBCLK
CLK_MCHBCLK#

CLK_CPUBCLK
CLK_CPUBCLK#

CLK_XDP

CLK_XDP#

CLK_PCIE_CARD
CLK_PCIE_CARD#
CLK_PCIE_MINI2
CLK_PCIE_MINI2#

CLK_PEG_REF
CLK_PEG_REF#

CLK_3S_ICHPCI

CLK_PEG_MCH

CLK_PEG_MCH#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_SATA1
CLK_SATA1#

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_ESATA
CLK_PCIE_ESATA#

CLK_3S_KBPCI

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

+V3S+V3S

R256

R269

10K_5%

R232

R230

R234

R622

2

R623

R235

R255

12

R277

12

R259
R258

12

12

R299

12

R300

R236

12

R23712
R238

12

R297

12

R298

12

R295
R296

12

R293

12

R294

12

R291

12

R292

R289

12

R290

1

2

10K_5%

1

2

R619

1

10K_5%

2

33-

PCISTOP#_3

33-

CPUSTOP#_3

21-

CLK_R_MCHBCLK

21-

CLK_R_MCHBCLK#

15-

CLK_R_CPUBCLK

15-

CLK_R_CPUBCLK#
CLK_R_XDP

53-

CLK_R_PCIE_DL

53-

CLK_R_PCIE_DL#

CLK_R_XDP#

52-

CLKREQ_ECARD#

53-

CLKREQ_MINI2#

52-

CLK_R_PCIE_CARD

52-

CLK_R_PCIE_CARD#

53-

CLK_R_PCIE_MINI2

53-

CLK_R_PCIE_MINI2#

53-

CLKREQ_R_DL#

29-

CLK_R_PEG_REF

29-

CLK_R_PEG_REF#

53-

CLK_R3S_MINICARD

37-

CLK_R3S_KBPCI

34-

CLK_R3S_ICHPCI

20-

CLK_R_PEG_MCH

20-

CLK_R_PEG_MCH#

33-

CLK_R_PCIE_ICH

33-

CLK_R_PCIE_ICH#

32-

CLK_R_SATA1

32-

CLK_R_SATA1#

54-

CLK_R_PCIE_LAN

54-

CLK_R_PCIE_LAN#

47-

CLK_R_PCIE_ESATA

47-

CLK_R_PCIE_ESATA#

33_5%
33_5% 12
33_5%

R239

1

1

R240

10K_5%

10K_5%

2

2

0_5%

12

0_5% R233

12

12

0_5%

12

0_5% R231

12

OPEN

0_5%

12

0_5% 1

12

OPEN

12

475_1%

475_1%

0_5%
0_5%

0_5%
0_5%

475_1%

0_5%
0_5%

0_5%
0_5%

0_5%
0_5% 12

0_5%
0_5%

0_5%
0_5%

0_5% 12
0_5%

12

2

1

R286
R667

2

1

R287

*CLKERQ# pin controis SRC Table

CR#_C

Byte5:bit6 =0(PWD)

SCR0

Byte5; bit7=0,disable CR#_A;1,enable CR#_A

Byte5:bit2 =0(PWD)

SCR0

Byte5; bit3=0,disable CR#_C;1,enable CR#_C

Byte5:bit6 =1

Byte5:bit2 =1

Please place close to CLKGEN within 500mils

SCR2

SCR2

CR#_BCR#_A

CR#_D

Byte5:bit4 =0(PWD)

SCR1

Byte5:bit4 =1

SCR4

Byte5; bit5=0,disable CR#_A;1,enable CR#_B

Byte5:bit0 =0(PWD)

SCR1

Byte5:bit0 =1

SCR4

Byte5; bit1=0,disable CR#_D;1,enable CR#_D

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

CLK_3S_REF1

ITP_EN=0

SRC8/SRC8#
ITP_EN=1
ITP/ITP#

14-

R247

R249
R248

12
12
12

1

12

10K_5%

33_5%
33_5%
33_5%

OPEN

LAYOUT NOTES : THE R9148, R9146, R9147 CLOSED TO U9030

CHANGE by

JM FENG 26-Mar-2007

R321

R320

C323

C322

C691

1

1

1

2

2

2

OPEN

OPEN

OPEN

+V3S+V3S

R308

12

2

OPEN

R309

12

10K_5%

CLK_R3S_KBC14

38-

CLK_R3S_CIR14

33-

C662

OPEN

C660

1

2

OPEN

CLK_R3S_ICH14

C661

1

1

2

2

OPEN

27_Selet=0

LCD_SST 100MHZ

27_Selet=1

27MHZ non-spread clock

INVENTEC

TITLE

ORION

CLOCK_GENERATOR

DOC. NUMBER

CODE

SIZE

A3

Model_No X01

CS

SHEET

REV

OF

6514

http://hobi-elektronika.net

H_A#(35:3)

21-

H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)

H_REQ#(4:0) H_RS#(0:2)

H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)

21-

H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)

H_ADSTB#0

H_ADSTB#1

H_A20M#
H_FERR#

H_IGNNE#

H_STPCLK#

H_INTR

H_NMI

H_SMI#

21-

21-

32­32­32-

32­32­32­32-

CN504-1

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

ADDR GROUP 0

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD01

N5

RSVD02

T2

RSVD03

V3

RSVD04

B2

RSVD05

C3

RSVD06

D2

RSVD07

D22

RSVD08

D3

RSVD09

F6

RSVD010

CONTROL

ADDR GROUP 1

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA
THERMDC

THERMTRIP#

ICH

H CLK

RESERVED

FOX_PZ4782K_274M_41_478P

GMCH

CPU

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

LOCK#

RESET#

RS0#
RS1#
RS2#

TRDY#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TRST#

DBR#

BCLK0
BCLK1

INIT#

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6

HIT#

E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5

TCK

AA6

TDI

AB3

TDO

AB5

TMS

AB6
C20

D21
A24
B25

C7

A22
A21

ICH8

D5009

1

3

CHENMKO_BAT54_3P

12

R94

+VCCP

29-,37-

ADP_PRES_GPU

75_5%

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

+VCCP

10mils/10mils

21-

H_ADS#

21-

H_BNR#

21-

H_BPRI#

21-

H_DEFER#

21-

H_DRDY#

21-

H_DBSY#

21-

H_BREQ#

32-

H_INIT#

21-

H_LOCK#

21-

H_CPURST#

21-

H_TRDY#

21-

H_HIT#

21-

H_HITM#

H_BPM0_XDP#
H_BPM1_XDP#
H_BPM2_XDP#
H_BPM3_XDP#
H_BPM4_PRDY#

15-

H_BPM5_PREQ#

15-

H_TCK

15-

H_TMS
H_TRST#

33-

XDP_DBRESET#

19-

H_THERMDA

19-

THERM_MINUS

20-,32-

PM_THRMTRIP#

14-

CLK_R_CPUBCLK

14-

CLK_R_CPUBCLK#

+VCCP

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

+VCCP

1

R93

56_5%

2

CLOSED TO CPU

21-

H_RS#(0)
H_RS#(1)
H_RS#(2)

R118

12

54.9_1%

+V3A

R119

12

5-,7-,12-,13-,33-,34-,35-,52-,53-,54-,56-,60-,61-,62-

1K_5%

R535

1

54.9_1%

R28

1

54.9_1%

R30

12

54.9_1%

R31

12

54.9_1%

15-

2

2

15-

15-

15-

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

R121

12

0_5%_OPEN

51 OHM +/- 1% PULL-UP

TO +VCCP IF ITP IS IMPLEMENTED

+VCCP

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

15-

H_TDO

1

R29

51_5%

2

H_BPM5_PREQ#

TDI_FLEX

H_TMS

H_TCK

+VCCP

TDI_FLEX

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

PM_THRMTRIP# should be T at CPU

INVENTEC

TITLE

ORION

MEROM-1

CODE

SIZE

CHANGE by SHEET OF

JM FENG

23-Apr-2007

A3

CS

DOC. NUMBER

15 65

REV

X01Model_No

http://hobi-elektronika.net

H_D#(63:0)

H_DSTBN#0

H_DSTBP#0

H_DINV#0

H_D#(63:0)

+VCCP

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

1

R569

1K_1%

2

1

R570

2K_1%

2

16-,21-

21­21­21-

16-,21-

Layout note:zo=55 ohm

0.5" max for GTLREF

H_DSTBN#1
H_DSTBP#1

H_DINV#1

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

CN504-2

OPEN

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

DATA GRP 0

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

DATA GRP 1

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

MISC

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

FOX_PZ4782K_274M_41_478P

H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)

H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)

21­21­21-

14-,20­14-,20­14-,20-

C584

1
2

1

1

R95

R566

OPEN

OPEN

2

2

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#

DATA GRP 2DATA GRP 3

D41#
D42#
D43#
D44#
D45#
D46#

D47#
DSTBN2#
DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63#
DSTBN3#
DSTBP3#

DINV3#

COMP0
COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)

H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)

21-

H_DSTBN#3

21-

H_DSTBP#3

21-

27.4_1%R567

27.4_1%R532

54.9_1%

32­21-

21­10-

H_DINV#3

H_DPSLP#

H_DPWR#

H_CPUSLP#
PSI#

1

2

R34

OPEN

1

2

R33

OPEN

10-,20-,32-

12
12

R568 54.9_1%

12
12

R531

H_DPRSTP#

CLOSED TO CPU

+VCCP

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

Please series resister R171=1K on H_PWRGD_XDP

16-,21-

16-,21-

21­21­21-

H_D#(63:0)

H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#(63:0)

R110

12

OPEN

32-

H_PWRGD

H_PWRGD_XDP

without stub

CHANGE by

INVENTEC

TITLE

ORION

MEROM-2

DOC. NUMBER REV

CODE

SIZE

A3

CS

SHEET

25-Oct-2006JM FENG

16 65

X01Model_No

OF

http://hobi-elektronika.net

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)

PLACE THESE INSIDE SOCKET

CAVITY ON L1 (NORTH SIDE

PRIMARY)

PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
SECONDARY)

SOUTH SIDE SECONDARY

NORTH SIDE SECONDARY

C88

1
2

1
2

1
2

1
2

1
2

1
2

1

2

1

10uF_6.3v

C142

10uF_6.3v

C559

10uF_6.3v

C563

10uF_6.3v

C90

10uF_6.3v

C549

10uF_6.3v

C577

330uF_2v_6mR

C555

1
2

1
2

1
2

1
2

1
2

1
2

2

330uF_2v_6mR_OPEN

C112

10uF_6.3v

C545

10uF_6.3v

C568

10uF_6.3v

C92

10uF_6.3v

C148

10uF_6.3v

C557

10uF_6.3v

1

C539

2

330uF_2v_6mR

1

C566

330uF_2v_6mR

2

1
2

1
2

1
2

1
2

C127

1
2

10uF_6.3v

C562

1
2

10uF_6.3v

1

2

330uF_2v_6mR_OPEN

C125

10uF_6.3v

C101

10uF_6.3v

C558

10uF_6.3v

C93

10uF_6.3v

C102

1
2

10uF_6.3v

C556

1
2

10uF_6.3v

C538

330uF_2v_6mR

1

C544

2

1

2

1
2

1
2

1
2

1
2

1
2

C147

10uF_6.3v

C536

10uF_6.3v

C535

10uF_6.3v

C546

10uF_6.3v

C113

10uF_6.3v

C89

10uF_6.3v

1
2

1
2

1
2

1
2

1
2

1
2

C143

10uF_6.3v

C537

10uF_6.3v

C572

10uF_6.3v

C91

10uF_6.3v

C550

10uF_6.3v

C567

10uF_6.3v

+VCC_CORE

10-,17-

CN504-3

A7

VCC001

A9

VCC002

A10

VCC003

A12

VCC004

A13

VCC005

A15

VCC006

A17

VCC007

A18

VCC008

A20

VCC009

B7

VCC010

B9

VCC011

B10

VCC012

B12

VCC013

B14

VCC014

B15

VCC015

B17

VCC016

B18

VCC017

B20

VCC018

C9

VCC019

C10

VCC020

C12

VCC021

C13

VCC022

C15

VCC023

C17

VCC024

C18

VCC025

D9

VCC026

D10

VCC027

D12

VCC028

D14

VCC029

D15

VCC030

D17

VCC031

D18

VCC032

E7

VCC033

E9

VCC034

E10

VCC035

E12

VCC036

E13

VCC037

E15

VCC038

E17

VCC039

E18

VCC040

E20

VCC041

F7

VCC042

F9

VCC043

F10

VCC044

F12

VCC045

F14

VCC046

F15

VCC047

F17

VCC048

F18

VCC049

F20

VCC050

AA7

VCC051

AA9

VCC052

AA10

VCC053

AA12

VCC054

AA13

VCC055

AA15

VCC056

AA17

VCC057

AA18

VCC058

AA20

VCC059

AB9

VCC060

AC10

VCC061

AB10

VCC062

AB12

VCC063

AB14

VCC064

AB15

VCC065

AB17

VCC066

AB18

VCC067

FOX_PZ4782K_274M_41_478P

VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099

VCC0100

VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16

VCCA01
VCCA02

VCCSENSE

VSSSENSE

+VCC_CORE

10-,17-

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6

VID0

AF5

VID1

AE5

VID2

AF4

VID3

AE3

VID4

AF3

VID5

AE2

VID6

AF7

AE7

+VCCP

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

1

C126

2

220uF_2v_15mR_Panasonic

+V1.5S

9-,12-,24-,33-,35-,52-,53-,56-,58-

10-

H_VID0

10-

H_VID1

10-

H_VID2

10-

H_VID3

10-

H_VID4

10-

H_VID5

10-

H_VID6

LAYOUT NOTE:
ROUTE VCCSENSE AND VSSSENSE TRACE AT

24.7 OHM WITH 50 MIL SPACEING
PLACE PU AND PD WITHIN I INCH OF CPU

+VCC_CORE

R537

100_1%

R534

100_1%

10-,17-

1

2

1

2

10-

10-

+VCCP

9-,14-,15-,16-,17-,21-,23-,24-,32-,35-

1
2

0.01uF_16v

VCCSENSE

VSSSENSE

C73

0.1uF_16v

C583

C74

1
2

0.1uF_16v

1

1
2

2

LAYOUT NOTE:

PLACE C240 NEAR PIN B26

CHANGE by

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)

C146

1

1

2

2

0.1uF_16v

0.1uF_16v

C582

10uF_6.3v

27-Dec-2006JM FENG

C144

C75

1
2

0.1uF_16v

INVENTEC

TITLE

ORION

MEROM-3

SIZE

CODE

A3

CS

SHEET

C145

1
2

0.1uF_16v

DOC. NUMBER

17 65

REV

X01Model_No

OF

CN504-4

A4

VSS001

A8

VSS002

A11

VSS003

A14

VSS004

A16

VSS005

A19

VSS006

A23

VSS007

AF2

VSS008

B6

VSS009

B8

VSS010

B11

VSS011

B13

VSS012

B16

VSS013

B19

VSS014

B21

VSS015

B24

VSS016

C5

VSS017

C8

VSS018

C11

VSS019

C14

VSS020

C16

VSS021

C19

VSS022

C2

VSS023

C22

VSS024

C25

VSS025

D1

VSS026

D4

VSS027

D8

VSS028

D11

VSS029

D13

VSS030

D16

VSS031

D19

VSS032

D23

VSS033

D26

VSS034

E3

VSS035

E6

VSS036

E8

VSS037

E11

VSS038

E14

VSS039

E16

VSS040

E19

VSS041

E21

VSS042

E24

VSS043

F5

VSS044

F8

VSS045

F11

VSS046

F13

VSS047

F16

VSS048

F19

VSS049

F2

VSS050

F22

VSS051

F25

VSS052

G4

VSS053

G1

VSS054

G23

VSS055

G26

VSS056

H3

VSS057

H6

VSS058

H21

VSS059

H24

VSS060

J2

VSS061

J5

VSS062

J22

VSS063

J25

VSS064

K1

VSS065

K4

VSS066

K23

VSS067

K26

VSS068

L3

VSS069

L6

VSS070

L21

VSS071

L24

VSS072

M2

VSS073

M5

VSS074

M22

VSS075

M25

VSS076

N1

VSS077

N4

VSS078

N23

VSS079

N26

VSS080

P3

VSS081

FOX_PZ4782K_274M_41_478P

VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

http://hobi-elektronika.net

CHANGE by

JM FENG 9-Feb-2007

INVENTEC

TITLE

ORION

MEROM-4

SIZE

A3

DOC. NUMBER

CODE

Model_No X01

CS

SHEET

REV

OF

6518

+V5S

9-,12-,13-,19-,29-,30-,33-,35-,42-,47-,48-,51-,52-,56-,58-,59-

2

S

1
2

C79

4.7uF_6.3v

G

1

Q506

3

D

AO3409

http://hobi-elektronika.net

1

C560

2

0.01uF_16v

CPU FAN

CN12

1

1

2

G

G1

2

3

G

G2

3

ENTERY_3802_B03S_01E_3P

+V5S

1
2

9-,12-,13-,19-,29-,30-,33-,35-,42-,47-,48-,51-,52-,56-,58-,59-

Q504

3

2

S

D

C526

4.7uF_6.3v

G

1

AO3409

1

C525

2

0.01uF_16v

GPU FAN

CN502

1

VCC

2

GND

G

3

REFENCE

G

MLX_53398_0371_3P

G1
G2

PWM_3S_CPU_FAN#

THERM_3S_WARN#

9-,12-,13-,19-,29-,30-,33-,35-,42-,47-,48-,51-,52-,56-,58-,59-

+V5S

U504

5

37-

1

4

2

19-

3

TC7SET08F

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

R548

12

10K_5%

C580

2200pF_50v

H_THERMDA

THERM_MINUS

THERM_3S_WARN#

15­15­19-

12

PWM_3S_GPU_FAN#

+V3S

+V3S

2

1

R565

2.2K_5%

12

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

1

C579

0.1uF_16v

2

R5075

0_5%

12

U506
1
2
3
4

R5074

GMT_G781_1P8f_MSOP_8P

0_5%

VDD
D+
D­THERM#

SCLK

SDATA

ALERT#

GND

LAYOUT NOTES: PUT THE THERMAL SENSOR CLOSE TO CPU

9-,12-,13-,19-,29-,30-,33-,35-,42-,47-,48-,51-,52-,56-,58-,59-

+V5S

R5030

1

2

0_5%_OPEN

U503

5

1

37-

4

2

TC7SET08F

3

R530

12

10K_5%

This resistor is needed to place close to PM_THRMTRIP#

14-,26-,27-,29-,33-,52-,53-

8
7
6
5

14-,26-,27-,29-,33-,52-,53-

33-,34-

ICH_3S_SMCLK
ICH_3S_SMDATA

THERM_SCI#

INVENTEC

TITLE

ORION

THERMAL&FAN CONTROLLER

SIZE

CHANGE by OF

JM FENG

16-May-2007

A3

CODE

CS

SHEET

DOC. NUMBER

19 65

REV

X01Model_No

BL49

NC14

BK1

BL3

BL2

BJ1

C51

B50

A50

A5

E1

NC10

NC7

NC8

NC9

NC11

NC12

NC13

NC5

NC6

BK2

A49

NC15

NC16

ITL_CRESTLINE_FCBGA_1299P

NC

BL50

NC4

BK51

BK50

NC2

NC3

R109

PM_DPRSLPVR

PM_THRMTRIP#

10-,33-

15-,32-

BJ51

G36

N20

NC1

DPRSLPVR

THRMTRIP#

PM

PM_EXTTS#0

PM_EXTTS#1

PLT_RST#

27-

34-,37-

100_5%

1

PM_PWROK

2

20-,33-,37-

AW49

AV20

L36

J36

PM_EXT_TS#_0

PM_EXT_TS#_1

PWROK

RSTIN#

MCH_CFG(9)

MCH_CFG(8)

MCH_CFG(7)

G23

C20

J20

CFG_6

CFG_7

CFG_8

CFG_9

MCH_CFG(20:3)

MCH_CFG(5)

MCH_CFG(4)

MCH_CFG(6)

MCH_CFG(3)

N23

C21

C23

F23

CFG_3

CFG_4

CFG_5

CPU_BSEL2

CPU_BSEL1

CPU_BSEL0

14-,16-

14-,16-

14-,16-

20-

12

R520

R521

12

1

1K_5%

2

1K_5%

N24

N27

P27

CFG_2

CFG_0

CFG_1

R522

1K_5%

C34

RSVD44

RSVD45

B34

B36

RSVD42

RSVD43

B37

A35

RSVD40

RSVD41

C44

B44

RSVD39

D47

RSVD37

RSVD38

C48

RSVD36

BK20

RSVD35

AW20

BH39

RSVD34

MA_A(14)

MB_A(14)

27-,28-

26-,28-

BD24

BE24

BJ29

RSVD32

RSVD33

RSVD31

BC23

RSVD29

RSVD30

BG23

BF23

RSVD27

RSVD28

RSVD

BJ18

RSVD26

R515

10K_5%

26-

1

2

H_DPRSTP#

2

BM_BUSY#

33-

10-,16-,32-

MCH_CFG(20)

G41

L35

L39

CFG_19

CFG_20

PM_BM_BUSY#

PM_DPRSTP#

http://hobi-elektronika.net

1

10K_5%

R516

MCH_CFG(18)

MCH_CFG(16)

MCH_CFG(19)

MCH_CFG(17)

MCH_CFG(15)

M20

M24

K23

N33

L32

CFG_15

CFG_16

CFG_17

CFG_18

+V3S

MCH_CFG(11)

MCH_CFG(12)

MCH_CFG(13)

MCH_CFG(14)

E23

E20

L23

J23

CFG_11

CFG_12

CFG_13

CFG_14

MCH_CFG(10)

R24

CFG_10

CFG

11=NORMAL OPERATION

BK22

BH20

BK18

BF19

RSVD23

RSVD24

RSVD25

RSVD22

MCH_CFG(13:12)

XOR/ALLZ

01=XOR MODE ENABLE

10=ALL-Z MODE ENABLE

00=PARTIAL CLOCK

GATING DISABLE

BJ20

H10

B51

RSVD20

RSVD21

D20

RSVD14

AM37

RSVD12

RSVD13

Lane

AL36

RSVD11

PCIE Graphics

MCH_CFG(9)

(CPU Strap)

HIGH=Moblie CPU

LOW=Reverse Lane

HIGH=Normal operation

AM36

AM12

AR37

AR12

AR13

AN13

J12

RSVD10

RSVD4

RSVD5

RSVD6

RSVD7

RSVD8

RSVD9

MCH_CFG(7)

LOW=RSVD

N35

R35

P36

P37

RSVD3

RSVD1

RSVD2

HIGH=DMIx4

U505-2

MCH_CFG(5)

LOW=DMIx2

2

OPEN

MCH_CFG(5)

MCH_CFG(7)

MCH_CFG(9)

20-

20-

1

R37

MCH_CFG(16)

20-

20-

MISC

TEST_2

2

2

TEST_1

A37

R32

20K_5%

0_5%

SDVO_CTRL_DATA

SDVO_CTRL_CLK

ICH_SYNC#

CLK_REQ#

G39

G40

H35

K36

33-

14-

MCH_ICH_SYNC#

CLKREQ_R_MCH#

1

R51

1

R514

1

2

C574

0.1uF_16v

1

2

R558

392_1%

CL_VREF

AM50

2

CL_RST#

AN49

CL_RST#0

0_5%

ME

CL_PWROK

CL_DATA

CL_CLK

AM49

AK50

AT43

33-

33-

33-

CL_CLK0

CL_DATA0

12

R561

20-,33-,37-

PM_PWROK

8-,9-,14-,24-,35-

1

R557

1K_1%

GRAPHICS VID

DFGT_VR_EN

GFX_VID_1

GFX_VID_2

GFX_VID_3

GFX_VID_0

E36

C38

B39

E35

A39

TP1000

TP999

TP996

TP997

TP998

12

R560

OPEN

10-,33-

SB_3S_VRMPWRGD

+V1.25S

DMI_TXP_1

DMI_TXP_2

DMI_TXP_3

AM39

AM43

DMI_RXP(2)

DMI_RXP(3)

MCH_CFG(11)

PSB 4X CLK

ENABLE

HIGH=RESERVED

LOW=CALISTOGA

DMI

DMI_TXN_0

DMI_TXN_1

DMI_TXN_2

DMI_TXN_3

DMI_TXP_0

AJ46

AJ41

AM40

AM44

AJ47

AJ42

DMI_RXP(0)

DMI_RXP(1)

DMI_RXN(0)

DMI_RXN(1)

DMI_RXN(2)

DMI_RXN(3)

33-

DMI_RXP(3:0)

(FSB Dynamic

MCH_CFG(16)

ODT)

HIGH=Dynamic ODT

LOW=Dynamic ODT

Enable

Disable

DMI_RXN_3

DMI_RXP_2

DMI_RXP_3

DMI_RXP_0

DMI_RXP_1

AM47

AJ39

AN41

AN45

DMI_TXP(0)

DMI_TXP(1)

DMI_TXP(2)

DMI_TXP(3)

33-

33-

DMI_TXP(3:0)

DMI_RXN(3:0)

DMI_RXN_0

DMI_RXN_1

DMI_RXN_2

AN47

AJ38

AN42

AN46

DMI_TXN(0)

DMI_TXN(1)

DMI_TXN(2)

DMI_TXN(3)

CLK

DPLL_REF_SSCLK#

DPLL_REF_SSCLK

DPLLREF_CLK#

PEG_CLK#

PEG_CLK

C42

K44

K45

H48

H47

14-

14-

CLK_R_PEG_MCH#

CLK_R_PEG_MCH

33-

DMI_TXN(3:0)

2

0.1uF_16v

DPLL_REF_CLK

SM_VREF_1

AW4

B42

1

C573

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF_0

BK31

BL31

AR49

20-

20-

SM_RCOMP_VOH

SM_RCOMP_VOL

11-,26-,27-

M_VREF

SM_RCOMP#

SM_RCOMP

SM_ODT_1

SM_ODT_2

SM_ODT_3

BK14

BJ15

BJ14

BE16

BL15

27-,28-

27-,28-

26-,28-

R107

M_ODT1

M_ODT2

M_ODT3

12

12

20_1%R108

20_1%

+V1.8

8-,9-,11-,12-,20-,23-,24-,26-,27-

SM_ODT_0

SM_CS#_3

BH18

26-,28-

M_CS3#

M_ODT0

SM_CS#_2

BG16

BE13

27-,28-

27-,28-

M_CS2#

2

2

0.01uF_16v

2

2.2uF_6.3v

DDR MUXING

SM_CKE_0

SM_CKE_1

SM_CKE_3

SM_CKE_4

SM_CS#_0

SM_CS#_1

BG20

BK16

BE29

AY32

BD39

BG37

27-,28-

26-,28-

26-,28-

26-,28-

27-,28-

26-,28-

M_CS0#

M_CS1#

M_CKE0

M_CKE1

M_CKE2

M_CKE3

2

1

R104

1

C179

1

C178

20-

SM_RCOMP_VOL

3K_1%

1K_1%

SM_CK#_0

SM_CK#_1

SM_CK#_3

SM_CK#_4

SM_CK_4

AV23

AW30

BA23

AW25

AW23

26-

27-

27-

26-

27-

M_CLK_DDR4

M_CLK_DDR3#

M_CLK_DDR4#

M_CLK_DDR0#

M_CLK_DDR1#

1

2

R105

1K_1%

MCH_CFG(20)

SM_CK_0

SM_CK_1

SM_CK_3

AV29

BB23

BA25

26-

27-

26-

M_CLK_DDR3

M_CLK_DDR0

M_CLK_DDR1

+V1.8

1

R106

1

2

0.01uF_16v

C187

1

2

C186

2.2uF_6.3v

MCH_CFG(19)

1

2

OPEN

R46

1

2

OPEN

R36

1

2

OPEN

R52

8-,9-,11-,12-,20-,23-,24-,26-,27-

10-,12-,13-,14-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,35-,37-,38-,41-,42-,44-,45-,47-,48-,50-,51-,52-,53-,58-,59-,61-

20-

SM_RCOMP_VOH

CHANGE by

JM FENG

7-Feb-2007

SIZE

A3

CODE

CRESTLINE-1

CS

SHEET

DOC. NUMBER

20 65

OF

REV

X01Model_No

ITL_CRESTLINE_FCBGA_1299P

PEG_TX_15

AH43

21-

TITLE

INVENTEC

ORION

PEG_TXP15

C32

E33

CRT_HSYNC

CRT_TVO_IREF

CRT_VSYNC

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

AC50

AD43

AG39

AE50

21-

21-

21-

21-

PEG_TXP14

PEG_TXP11

PEG_TXP12

PEG_TXP13

G35

K33

F33

CRT_DDC_CLK

CRT_DDC_DATA

PEG_TX_10

PEG_TX_7

PEG_TX_8

PEG_TX_9

Y47

Y39

AC38

AD47

21-

21-

21-

21-

PEG_TXP7

PEG_TXP8

PEG_TXP9

PEG_TXP10

E29

F29

CRT_GREEN#

CRT_RED

CRT_RED#

VGA

PEG_TX_6

PEG_TX_3

PEG_TX_4

PEG_TX_5

W42

R51

U43

21-

21-

21-

PEG_TXP6

PEG_TXP3

PEG_TXP4

PEG_TXP5

G32

K29

J29

CRT_BLUE

CRT_BLUE#

CRT_GREEN

PEG_TX_1

PEG_TX_2

PEG_TX_0

T46

N50

T38

21-

21-

21-

PEG_TXP2

PEG_TXP0

PEG_TXP1

H32

PEG_TX#_14

PEG_TX#_15

AH44

M45

21-

21-

PEG_TXN14

PEG_TXN15

P33

TV_DCONSEL1

PEG_TX#_11

PEG_TX#_12

PEG_TX#_13

AC49

AC42

AH39

AE49

21-

21-

21-

21-

PEG_TXN11

PEG_TXN12

PEG_TXN13

M35

TV_DCONSEL0

L27

J27

TVB_RTN

TVC_RTN

F27

TVA_RTN

G27

K27

TVB_DAC

TVC_DAC

E27

TVA_DAC

TV

PCI-EXPRESS GRAPHICS

PEG_TX#_10

PEG_TX#_9

AC46

21-

PEG_TXN9

PEG_TXN10

PEG_TX#_6

PEG_TX#_7

PEG_TX#_8

W46

W38

AD39

21-

21-

21-

PEG_TXN7

PEG_TXN6

PEG_TXN8

PEG_TX#_3

PEG_TX#_4

PEG_TX#_5

R50

T42

Y43

21-

21-

21-

PEG_TXN3

PEG_TXN4

PEG_TXN5

PEG_TX#_2

PEG_TX#_0

PEG_TX#_1

U47

N51

U39

21-

21-

21-

PEG_TXN0

PEG_TXN1

PEG_TXN2

N45

21-

A45

A47

E44

LVDSB_DATA_1

LVDSB_DATA_2

LVDSB_DATA_0

PEG_RX_10

PEG_RX_11

PEG_RX_12

PEG_RX_13

PEG_RX_14

PEG_RX_15

AC41

AH47

AG49

AH45

AG42

29-

29-

29-

29-

29-

PEG_C_RXP11

PEG_C_RXP12

PEG_C_RXP13

PEG_C_RXP14

PEG_C_RXP15

PEG_C_RXP10

G44

B47

B45

LVDSB_DATA#_0

LVDSB_DATA#_1

LVDSB_DATA#_2

PEG_RX_6

PEG_RX_7

PEG_RX_8

PEG_RX_9

W45

W41

AB50

Y48

AC45

29-

29-

29-

29-

29-

PEG_C_RXP6

PEG_C_RXP7

PEG_C_RXP8

PEG_C_RXP9

G50

E50

F48

LVDSA_DATA_0

LVDSA_DATA_1

LVDSA_DATA_2

PEG_RX_4

PEG_RX_5

PEG_RX_1

PEG_RX_2

PEG_RX_3

L50

U44

T49

T41

M47

29-

29-

29-

29-

29-

PEG_C_RXP3

PEG_C_RXP4

PEG_C_RXP5

PEG_C_RXP2

PEG_C_RXP1

G51

E51

F49

LVDSA_DATA#_2

LVDSA_DATA#_0

LVDSA_DATA#_1

PEG_RX#_14

PEG_RX#_15

PEG_RX#_13

PEG_RX_0

AG41

J50

AH49

AG45

29-

29-

29-

29-

PEG_C_RXP0

PEG_C_RXN15

PEG_C_RXN13

PEG_C_RXN14

N40

D44

C45

D46

E42

LVDS_VREFH

LVDS_VREFL

LVDSB_CLK

LVDSB_CLK#

LVDSA_CLK

LVDSA_CLK#

LVDS

PEG_RX#_10

PEG_RX#_11

PEG_RX#_12

PEG_RX#_7

PEG_RX#_8

PEG_RX#_9

AB51

W49

AD44

AD40

AG46

29-

29-

29-

29-

29-

PEG_C_RXN7

PEG_C_RXN8

PEG_C_RXN9

PEG_C_RXN10

PEG_C_RXN11

PEG_C_RXN12

N41

K40

L41

L43

LVDS_IBG

LVDS_VBG

L_VDD_EN

PEG_RX#_3

PEG_RX#_4

PEG_RX#_5

PEG_RX#_6

T45

T50

U40

Y44

Y40

29-

29-

29-

29-

29-

PEG_C_RXN3

PEG_C_RXN4

PEG_C_RXN5

PEG_C_RXN6

H39

C37

D35

E39

E40

L_BKLT_EN

L_CTRL_CLK

L_CTRL_DATA

L_DDC_CLK

L_DDC_DATA

PEG_COMPO

PEG_RX#_2

PEG_RX#_0

PEG_RX#_1

N47

M43

J51

L51

29-

29-

29-

24.9_1%

PEG_C_RXN2

PEG_C_RXN0

PEG_C_RXN1

J40

U505-3

L_BKLT_CTRL

PEG_COMPI

N43

12

R57

+VCC_PEG

24-

20-

20-

1

2

OPEN

R518

1

2

OPEN

R517

MODE

(PCIE BACKWARD

MCH_CFG(20)

INTERPOERABILITY

HIGH=SDVO AND PCIE X1 ARE

OPERATING SIMULTANEOUSLY

VIA THE PEG PORT

(DMI LANE

MCH_CFG(19)

REVERSAL)

HIGH=LANES REVERSED

LOW=ONLY SDVO OR PCIE X1 IS

OPERATIONAL

LOW=NORMAL

+V3S

MCH_CFG(18)

VCC SELECT

LOW=1.05V

HIGH=1.5V