HP DV7t Schematics

A

1 1

2 2

B

C

D

E

Compal confidential

Schematics Document

Mobile Penryn uFCPGA with Intel
Cantiga_PM+ICH9-M core logic

3 3

LA-4082P Vader Discrete (NB9P-GS,NB9M-GE)

2007-12-26 Rev 0.4

4 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-4082P Vader Discrete

E

0.2

of

158Wednesday, December 26, 2007

A

B

C

D

E

Compal confidential

1 1

2 2

Realtek 8111C
(GLAN)

P31 P32,35

RJ45/11 CONN

3 3

P31

ACCELEROMETER-1

ACCELEROMETER-2

RTC CKT.LED

P41

Capsense switch Conn

4 4

VRAM DDR2
256/512MB

128 bits

Discrete

Nvidia NB9P-GE
Nvidia NB9M-GE

LVDS Panel
Interface

CRT

Support V1.3

HDMI

Mini-Card*3

WLAN & Robson &TV

USB2.0*2
PCIE*3

P39

P39

P27

P41

P22,23,24,25

P18,19,20,21

P16

P44

New Card

USB2.0*1
PCIE*1

P17

PCI-E BUS*5 & USB2.0 *3

Montevina Consumer Discrete

Dual-Core Thermal Sensor
EMC1402
Quad-Core Thermal Sensor
EMC1403

Fan conn

Discrete

Flash Memory Card /
1394 Controller

P32

JM380
CardReader/1394

1394 port

Discrete only

P33

5 in1 Slot

Touch Pad CONN.

P4

P4

DMI X4

P33

P33

Mobile Penryn

uFCPGA-478 CPU

P4, 5, 6

H_A#(3..35)
H_D#(0..63)

FSB

667/800/1066 MHz 1.05V

Intel Cantiga MCH

FCBGA 1329

P7, 8, 9, 10, 11, 12

Intel ICH9-M

mBGA-676

P26,27,28,29

LPC BUS

ENE

KB926

Int.KBD

P41

SPI ROM
25LF080A

SPI

P39

C-Link

USB2.0 X1

P40

DDR2 667MHz 1.8V

Dual Channel

Azalia
SATA Master-1
SATA Master-2
SATA Slave
SATA Slave

P40

CK505

72QFN

Clock Generator
SLG8SP553V

USB2.0*7

P15

DDR2 SO-DIMM X2

BANK 0, 1, 2, 3

P13, 14

USB conn x3

BT Conn

USB Camera

Audio CKT

Codec_IDT9271B7

MDC

SATA HDD Connector

SATA 2nd HDD
Option Connector

SATA ODD Connector

e-SATA Combo Connector

USB2.0*1 & SATA*1

P17

P38

P38

P34

P35

P30

P30

P30

P38

Touch Screen Conn

P38

FPR Conn

P42

AMP & Audio Jack

MIC & SPKR
TPA6020

P36

Sub-woofer & EQ

P37

Dock

USB2.0*1
RGB
RJ45
SPDIF
CIR

MIC*1
LINE-OUT*1
SPDIF

P42

K/B backlight Conn

P41

DC/DC Int erface CKT.

P43

A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

Block Diagram

LA-4082P Vader Discrete

E

0.2

of

258Wednesday, December 26, 2007

A

Voltage Rails

State

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

1 1

O MEANS ON X MEANS OFF

power
plane

+5VS
+3VS
+1.5VS
+0.9V

+B

O
O
O
O
O

X

+5VALW

+3VALW

O
O
O
O

X
XX X

+1.8V

O

XX
X

+VCCP
+CPU_CORE

+VGA_CORE
+2.5VS
+1.8VS
+1.2VS
+0.9VGA

OO
OO

X

X

SMBus Control Table

SOURCE

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
SMB_CK_CLK1
SMB_CK_DAT1
DDC2_CLK
DDC2_DATA

KB926

KB926

ICH9

NB9M

USB
assignment:

USB-0 Right side
USB-1 Right side
USB-2 Left side(with ESATA)
USB-3 Dock
USB-4 Camera
USB-5 WLAN
USB-6 Bluetooth
USB-7 Finger Printer
USB-8 MiniCard(WWAN/TV)
USB-9 Express

card

USB-10 X
USB-11 X

INVERTER BATT

SERIAL
EEPROM

X VV
X
X
X

X

X

X

X

X

X

PCIe
assignment:

PCIe-1 TV tuner/WWAN/Robeson
PCIe-2 X
PCIe-3 WLAN
PCIe-4 New Card
PCIe-5 Card

reader

PCIe-6 GLAN (Marvell)

Thermal
Sensor

X

V

X
X

SODIMM CLK CHIP

X
X

X
X

MINI
CARD

X

X

VVV

X

X

X

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build
DEBUG@ : me ans just reserve
for debug.

LCD

X
X
X

V

Sensor
board

V

X
X
X

EC SM Bus1 address

Device

Smart Battery

24C16

CAP BOARD -- Cypress

CAP BOARD -- ST

HEX HEX

Address Address

0001 011X

16H

1010 000X

A0H
38H
b0H

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0
DDR SO-DIMM 1
CLOCK GENERATOR (EXT.)

HEX

A0

D2

EC SM Bus2 address

Device

CPU EMC1402

VGA

ADDRESS

1 0 1 0 0 0 0 0
1 0 1 0 0 1 0 0A4
1 1 0 1 0 0 1 0

4CH
4DH

1001 1000b
1001 1010b

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-4082P Vader Discrete

of

358Wednesday, December 26, 2007

0.2

5

4

3

2

1

R730

ITP-XDP Connector

CONN@

JP42

1

QC@

C2113

+3VS

1

2

0.1U_0402_16V4Z

FAN_PWM40

Deciphered Date

GND0

3

OBSFN_A0

5

OBSFN_A1

7

GND2

9

OBSDATA_A0

11

OBSDATA_A1

13

GND4

15

OBSDATA_A2

17

OBSDATA_A3

19

GND6

21

OBSFN_B0

23

OBSFN_B1

25

GND8

27

OBSDATA_B0

29

OBSDATA_B1

31

GND10

33

OBSDATA_B2

35

OBSDATA_B3

37

GND12

39

PWRGOOD/HOOK0

41

HOOK1

43

VCC_OBS_AB

45

HOOK2

47

HOOK3

49

GND14

51

SDA

53

SCL

55

TCK1

57

TCK0

59

GND16

SAMTE_BSH-030-01-L-D-A

QC@

QC@

C1

C2

1 2

+3VS

ITPCLK/HOOK4

ITPCLK#/HOOK5

RESET#/HOOK6

C2114

1 2

2200P_0402_50V7K

C2115

1 2

2200P_0402_50V7K

2200P_0402_50V7K

R10

1 2

10K_0402_5%

RB751V_SOD323

3

2

OBSDATA_C0
OBSDATA_C1

OBSDATA_C2
OBSDATA_C3

OBSDATA_D0
OBSDATA_D1

OBSDATA_D2
OBSDATA_D3

VCC_OBS_CD

DBR#/HOOK7

H_THERMDA2
H_THERMDC2

G

D D

H_A#[3..16]7

H_ADSTB#07

H_REQ#07
H_REQ#17
H_REQ#27
H_REQ#37
H_REQ#47

C C

B B

A A

H_A#[17..35]7

H_ADSTB#17

H_A20M#27

H_FERR#27

H_IGNNE#27
H_STPCLK#27

H_INTR27
H_NMI27
H_SMI#27

R2088 0_0402_5%QC@

H_THERMDA2

1 2

H_THERMDC2

1 2

R2089 0_0402_5%QC@

1 2

+VCCP

51_0402_1%
R53

QC@

H_THERMDA2, H_THERMDC2 routing
together, Trace width / Spacing = 10 / 10
mils

+VCCP

12

+H_GTLREF2

12

R44

QC@

2K_0402_5%

XDP_BPM2#1
XDP_BPM2#0
H_THERMDA2_R
H_THERMDC2_R
XDP_BPM2#2

+H_GTLREF2

1 2

R54 0_0402_5%

QC@

QC@

R43
1K_0402_5%

13

D

S

BSS138_SOT23~D

QC@

Q4

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

H_REQ#0

H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

H_A20M#
H_FERR#
H_IGNNE#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

+3VS

12

2

G

JCPUA

J4

ADDR GROUP_0

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

ADDR GROUP_1

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]/BPM_2#[1]

N5

RSVD[02]/BPM_2#[0]

T2

RSVD[03]/THRMDA_2

V3

RSVD[04]/THRMDC_2

B2

RSVD[05]/BPM_2#[2]

D2

RSVD[06]

D22

RSVD[07]/GTLREF_2

D3

RSVD[08]/TDO_M

F6

RSVD[09]/TDI_M

DC_RESERVED/QC

Penryn

1025 For Support Dual core and Quad core

CPU
Dual core (DC)
Quad core (QC)

QC@

R45
100K_0402_5%

QC@

10K_0402_5%

C

Q3

1 2

2

B

E

3 1

MMBT3904_NL_SOT23-3

QC@

ADS#
BNR#
BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TCK

TDI
TDO
TMS

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA
THERMDC

ICH

THERMTRIP#

H CLK

BCLK[0]
BCLK[1]

GTLREF_C

GND 0V

Floating 2/3Vtt

+VCCP

R51
10K_0402_5%

QC@

1 2

R49

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

GTLREF2 6

H_ADS#
H_BNR#
H_BPRI#

H_DEFER#
H_DRDY#
H_DBSY#

H_BR0#
H_IERR#

H_INIT#
H_LOCK#
H_RESET#

H_RS#0
H_RS#1
H_RS#2
H_TRDY#

H_HIT#
H_HITM#

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

H_PROCHOT#
H_THERMDA_R

H_THERMDC_R
H_THERMTRIP#

CLK_CPU_BCLK
CLK_CPU_BCLK#

GTLREF2

H_ADS# 7
H_BNR# 7

H_BPRI# 7

H_DEFER# 7
H_DRDY# 7
H_DBSY# 7

H_BR0# 7

H_INIT# 27
H_LOCK# 7
H_RESET# 7

H_RS#0 7

H_RS#1 7

H_RS#2 7

H_TRDY# 7

H_HIT# 7
H_HITM# 7

10/08 follow Intel suggestion to change value

R7 49.9_0402_1%
R8 0_0402_5%

R9 0_0402_5%

H_THERMTRIP# 7,27,40

CLK_CPU_BCLK 15
CLK_CPU_BCLK# 15

4

1025 For Support Dual core and Quad core

T1

Place TP with a
GND 0.1" away

Delete H_PROCHOT# off-page due to
VR doesn't have it's input pin @08/31

XDP_DBRESET# 28

1 2
1 2

1 2

H_THERMDA, H_THERMDC routing
together, Trace width / Spacing = 10 / 10
mils

H_PROCHOT# OCP#

H_IERR#

+VCCP

+VCCP

12

@

R12
56_0402_5%

B

2

E

3 1

C

Q2

@

MMBT3904_NL_SOT23-3

+VCCP

12

R1
56_0402_5%

H_THERMDA
H_THERMDC

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

XDP_BPM2#36
H_PWRGOOD5,27 CLK_CPU_XDP 15

OCP# 28

Removed at
5/30.(Follow
Chimay)

R738

C851 0.1U_0402_16V4Z

Issued Date

3

XDP_BPM#5
XDP_BPM#4

XDP_BPM#3
XDP_BPM#2

XDP_BPM#1
XDP_BPM#0

XDP_BPM2#0
XDP_BPM2#1

XDP_BPM2#2
XDP_BPM2#3

1K_0402_5%

H_PWRGOOD_R

1 2

XDP_HOOK1

12

XDP_TCK

+3VS

1

2

0.1U_0402_16V4Z

PWM Fan Control circuit

2006/02/13 2006/03/10

Compal Secret Data

GND1
OBSFN_C0
OBSFN_C1

GND3

GND5

GND7
OBSFN_D0
OBSFN_D1

GND9

GND11

GND13

GND15

TD0

TRST#

TDI

TMS

GND17

H_THERMDA
H_THERMDC

H_THERMDA
H_THERMDC
THERM#

+5VS

D1

2 1

6

2

1

S

4 5

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

D

Q1

SI3456BDV-T1-E3_TSOP6

XDP_DBRESET#_R

XDP_TDI
XDP_TMS
XDP_TDO
XDP_BPM#5
XDP_HOOK1
XDP_TRST#
XDP_TCK

CLK_CPU_XDP
CLK_CPU_XDP#

H_RESET#_R

XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_PRE

Place R191 within 200ps (~1")
to CPU

QC@

U78

1

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1403-1-AIZL-TR_MSOP10
U55

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

SMCLK

SMDATA

ALERT#

THERM#

SMCLK

SMDATA

ALERT#

Address:100_1100

1

C3

4.7U_0805_10V4Z

2

+FAN

Title

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

@

1 2

Change value in 5/02

R731 54.9_0402_1%

1 2

R732 54.9_0402_1%

1 2

R733 54.9_0402_1%

1 2

R734 54.9_0402_1%

1 2

R735 54.9_0402_1%@

1 2

R792 54.9_0402_1%

1 2

R737 54.9_0402_1%

1 2

This shall place near CPU

CLK_CPU_XDP# 15

+VCCP+VCCP

R739 1K_0402_1%

1 2

R740 0_0402_1%

1 2

0_0402_5%

R741

1 2

SMB_EC_CK2

10

SMB_EC_DA2

9
8

THERM#

7
6

GND

SMB_EC_CK2

8

SMB_EC_DA2

7
6
5

GND

1

C4

0.1U_0402_16V4Z

2

12

D2

@

RLZ5.1B_LL34

Compal Electronics, Inc.

Penryn(1/3)-AGTL+/ITP-XDP

1

+3VS

1K_0402_5%

+VCCP

H_RESET#
XDP_DBRESET#XDP_DBRESET#_R

SMB_EC_CK2 20,40
SMB_EC_DA2 20,40

CONN@

JP2

1

1

2

2

3

GND

4

GND

ACES_88231-02001

458Wednesday, December 26, 2007

0.2

of

5

4

3

2

1

H_D#[0..15]7

D D

H_DSTBN#07
H_DSTBP#07
H_DINV#07
H_D#[16..31]7

C C

* Route the T E S T 3 and TEST5 signals through
a ground referenced Zo = 55-ohm trace that
ends in a via th at is near a GND via and is
accessible through an oscilloscope
connection.

B B

CPU_BSEL CPU_BSEL2 CPU_BSEL1

R15 1K_0402_5%@
R16 1K_0402_5%@

166

H_DSTBN#17
H_DSTBP#17
H_DINV#17

1 2
1 2

CPU_BSEL015
CPU_BSEL115
CPU_BSEL215

T2
T3
T4
T5
T6

01

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

+V_CPU_GTLREF

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

AD26

AF26

E22
F24
E26

G22

F23

G25

E25
E23
K24

G24

J24
J23
H22
F26
K22
H23

J26
H26
H25

N22

K25

P26

R23

L23
M24

L22
M23

P25

P23

P22

T24
R24

L25

T25
N25

L26
M26
N24

C23
D25
C24

AF1

A26

C3
B22
B23

C21

JCPUB

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF

MISC

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]

Penryn

CPU_BSEL0

1

DATA GRP 0

DATA GRP 1

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#

DATA GRP 2DATA GRP 3

D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

COMP0
COMP1
COMP2
COMP3

H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#

Resistor placed within 0.5"
of CPU pin.Trace should be
at least 25 mils away from
any other toggling signal.
COMP[0,2] trace width is 18
mils. COMP[1,3] trace width
is 4 mils.

H_D#[32..47] 7

H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7
H_D#[48..63] 7

H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7

H_DPRSTP# 7,27,51

H_DPSLP# 27
H_DPWR# 7
H_PWRGOOD 4,27

H_CPUSLP# 7
H_PSI# 51

R17

54.9_0402_1%

12

R18

27.4_0402_1%

12

+VCC_CORE +VCC_CORE

R20

R19

27.4_0402_1%

54.9_0402_1%

12

12

R52 0_0402_5%DC@

1 2

AA10
AA12
AA13
AA15
AA17
AA18
AA20

AC10
AB10
AB12
AB14
AB15
AB17
AB18

A7

A9
A10
A12
A13
A15
A17
A18
A20

B7

B9
B10
B12
B14
B15
B17
B18
B20

C9

C10
C12
C13
C15
C17
C18

D9

D10
D12
D14
D15
D17
D18

E7

E9

E10
E12
E13
E15
E17
E18
E20

F7

F9

F10
F12
F14
F15
F17
F18
F20
AA7
AA9

AB9

JCPUC

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]/BR1#
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

Penryn

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VCCSENSE

VSSSENSE

1025 For Support Dual core and Quad core

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

.

+VCCPA
+VCCPB

VCCSENSE

VSSSENSE

R13

1 2
1 2

R14

0_0402_5%
0_0402_5%

CPU_VID0 51
CPU_VID1 51
CPU_VID2 51
CPU_VID3 51
CPU_VID4 51
CPU_VID5 51
CPU_VID6 51

VCCSENSE 51

VSSSENSE 51

+VCCP

1

+

C5
330U_D2E_2.5VM_R7

2

1

C6

2

10U_0805_6.3V6M

1

C7

2

0.01U_0402_16V7K

Near pin B26

+1.5VS

Length match within 25 mils.

200

266

10

0000

+V_CPU_GTLREF

+VCCP

12

R21
1K_0402_1%

12

R23
2K_0402_1%

The trace width/space/other
is 20/7/25.

+VCC_CORE

R22 100_0402_1%

1 2

R24 100_0402_1%

1 2

VCCSENSE

VSSSENSE

Close to CPU pin within

A A

Close to CPU pin
AD26 within

500mils.

500mils.

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Penryn(2/3)-AGTL+/ITP-XDP

LA-4082P Vader Discrete

1

0.2

of

558Wednesday, December 26, 2007

5

D D

DC@

R2055

1 2

1 2

0_0402_5%

0_0402_5%

GTLREF2

C C

DC@

R2033

B B

JCPUD

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]/RSVD_0

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]/GTLREF_C

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]

P3

VSS[081]

Penryn

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]

RSVD_1/VSS[111]

VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]

RSVD_2/VSS[129]

VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]

BPM_2#[3]/VSS[147]

VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

DC@

R2056

DC@

R2057

XDP_BPM2#3

4

1 2

1 2

DC@

0_0402_5%

0_0402_5%

R2054

1 2

0_0402_5%

3

+VCC_CORE

1

2

+VCC_CORE

1

2

+VCC_CORE

1

2

+VCC_CORE

1

2

C8
10U_0805_6.3V6M

C16
10U_0805_6.3V6M

C24
10U_0805_6.3V6M

C32
10U_0805_6.3V6M

Place these
capacitors on L8
(North
side,Secondary
Layer)

Place these
capacitors on L8
(North
side,Secondary
Layer)

Place these
capacitors on L8
(North
side,Secondary
Layer)

Place these
capacitors on L8
(North
side,Secondary
Layer)

Mid Frequence Decoupling

Near CPU CORE regulator

+VCC_CORE

330U_D2E_2.5VM_R7

+VCCP

1

2

C40

C45

0.1U_0402_10V6K

1

C9
10U_0805_6.3V6M

2

1

C17
10U_0805_6.3V6M

2

1

C25
10U_0805_6.3V6M

2

1

C33
10U_0805_6.3V6M

2

1

C10
10U_0805_6.3V6M

2

1

C18
10U_0805_6.3V6M

2

1

C26
10U_0805_6.3V6M

2

1

C34
10U_0805_6.3V6M

2

ESR <= 1.5m ohm
Capacitor >
1980uF

330U_D2E_2.5VM_R7

1

1

+

+

C42

@

C41

2

2

330U_D2E_2.5VM_R7

Inside CPU center cavity in 2 rows

1

C46

0.1U_0402_10V6K

2

1

2

1

+

C43

2

330U_D2E_2.5VM_R7

C47

0.1U_0402_10V6K

1

+

2

1

2

1

2

1

2

1

2

1

2

C48

0.1U_0402_10V6K

2

C11
10U_0805_6.3V6M

C19
10U_0805_6.3V6M

C27
10U_0805_6.3V6M

C35
10U_0805_6.3V6M

5

1

C49

0.1U_0402_10V6K

2

5

1

C12
10U_0805_6.3V6M

2

5

1

C20
10U_0805_6.3V6M

2

5

1

C28
10U_0805_6.3V6M

2

5

1

C36
10U_0805_6.3V6M

2

1

2

1

2

1

2

C50

0.1U_0402_10V6K

1

C13
10U_0805_6.3V6M

2

1

C21
10U_0805_6.3V6M

2

C29
10U_0805_6.3V6M

C37
10U_0805_6.3V6M

1

1

C14
10U_0805_6.3V6M

2

1

C22
10U_0805_6.3V6M

2

1

C30
10U_0805_6.3V6M

2

1

C38
10U_0805_6.3V6M

2

1

C15
10U_0805_6.3V6M

2

1

C23
10U_0805_6.3V6M

2

1

C31
10U_0805_6.3V6M

2

1

C39
10U_0805_6.3V6M

2

1025 For Support Dual core and Quad core

A A

GTLREF2
XDP_BPM2#3

5

GTLREF2 4
XDP_BPM2#3 4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Penryn(3/3)-AGTL+/ITP-XDP

LA-4082P Vader Discrete

1

0.2

of

658Wednesday, December 26, 2007

5

H_D#[0..63]5

D D

C C

H_RESET#4

H_CPUSLP#5

B B

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

+H_SWNG
H_RCOMP

H_RESET#
H_CPUSLP#

+H_VREF

layout note:
Route H_SCOMP and H_SCOMP# with trace width,

spacing and impedance (55 ohm) same as FSB data
traces

Layout Note:
H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

+VCCP

12

R39

1K_0402_1%

A A

12

2K_0402_1%

+H_VREF +H_SWNG

1

R46

C58

2

0.1U_0402_16V4Z

U57A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES_FCBGA1329

H_RCOMP

12

R47

24.9_0402_1%

+VCCP

12

221_0603_1%

12

100_0402_1%

H_ADSTB#_0
H_ADSTB#_1

H_DEFER#

HPLL_CLK

HPLL_CLK#

H_DPWR#

HOST

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

R40

1

R48

C59

2

0.1U_0402_16V4Z

Near B3 pinwithin 100 mils from NB

5

4

H_A#3

A14

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#
H_DBSY#

H_DRDY#

H_HIT#
H_HITM#

H_LOCK#
H_TRDY#

H_RS#_0
H_RS#_1
H_RS#_2

H_A#4

C15

H_A#5

F16

H_A#6

H13

H_A#7

C18

H_A#8

M16

H_A#9

J13

H_A#10

P16

H_A#11

R16

H_A#12

N17

H_A#13

M13

H_A#14

E17

H_A#15

P17

H_A#16

F17

H_A#17

G20

H_A#18

B19

H_A#19

J16

H_A#20

E20

H_A#21

H16

H_A#22

J20

H_A#23

L17

H_A#24

A17

H_A#25

B17

H_A#26

L16

H_A#27

C21

H_A#28

J17

H_A#29

H20

H_A#30

B18

H_A#31

K17

H_A#32

B20

H_A#33

F21

H_A#34

K21

H_A#35

L20

H_ADS#

H12

H_ADSTB#0

B16

H_ADSTB#1

G17

H_BNR#

A9

H_BPRI#

F11

H_BR0#

G12

H_DEFER#

E9

H_DBSY#

B10

CLK_MCH_BCLK

AH7

CLK_MCH_BCLK#

AH6

H_DPWR#

J11

H_DRDY#

F9

H_HIT#

H9

H_HITM#

E12

H_LOCK#

H11

H_TRDY#

C9

H_DINV#0

J8

H_DINV#1

L3

H_DINV#2

Y13

H_DINV#3

Y1

H_DSTBN#0

L10

H_DSTBN#1

M7

H_DSTBN#2

AA5

H_DSTBN#3

AE6

H_DSTBP#0

L9

H_DSTBP#1

M8

H_DSTBP#2

AA6

H_DSTBP#3

AE5

H_REQ#0

B15

H_REQ#1

K13

H_REQ#2

F13

H_REQ#3

B13

H_REQ#4

B14

H_RS#0

B6

H_RS#1

F12

H_RS#2

C8

Layout Note: V_DDR_MCH_REF trace
width and spacing is 20/20.

+V_DDR_MCH_REF generated by DC-DC

+V_DDR_MCH_REF13,14

4

H_A#[3..35] 4

SMRCOMP_VOH

80% of 1.8V VCC_SM

20% of 1.8V VCC_SM

SMRCOMP_VOL

H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0# 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 15
CLK_MCH_BCLK# 15
H_DPWR# 5
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4

H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5

H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5

H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5

H_REQ#0 4
H_REQ#1 4
H_REQ#2 4
H_REQ#3 4
H_REQ#4 4

H_RS#0 4
H_RS#1 4
H_RS#2 4

PLT_RST#18,26,31,32,33,35

H_THERMTRIP#4,27,40

DPRSLPVR28,51

+V_DDR_MCH_REF

1

2

0.1U_0402_16V4Z

3

T7
T8
T9

+1.8V

1

1

C52

0.01U_0402_25V7K

2

1

C54

2

0.01U_0402_25V7K

PM_EXTTS#0

PM_EXTTS#1

CLKREQ#_7

R943
R35

+1.8V

12

R38
1K_0402_1%

12

R41
1K_0402_1%

12

R25
1K_0402_1%

12

R26

3.01K_0402_1%

12

R27
1K_0402_1%

R32 10K_0402_5%

1 2

R33 10K_0402_5%

1 2

R34 10K_0402_5%

1 2

MCH_CLKSEL015
MCH_CLKSEL115
MCH_CLKSEL215

CFG59
CFG69
CFG79
CFG89

CFG99
CFG109
CFG119
CFG129
CFG139
CFG149
CFG159
CFG169
CFG179
CFG189
CFG199
CFG209

PM_BMBUSY#28

H_DPRSTP#5,27,51
PM_EXTTS#013
PM_EXTTS#114
PM_PWROK28,40

1 2

100_0402_5%

1 2

0_0402_5%

C51

2.2U_0603_6.3V4Z

2

1

C53

2

2.2U_0603_6.3V4Z

C57

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
T20

T21
T22
T23

T24

T26
T27
T28
T29

+3VS

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_PWROK

THERMTRIP#
DPRSLPVR

@

1

C55

2

0.1U_0402_16V4Z

2006/02/13 2006/03/10

U57B

M36

RESERVED

N36

RESERVED

R33

RESERVED

T33

RESERVED

AH9

RESERVED

AH10

RESERVED

AH12

RESERVED

AH13

RESERVED

K12

RESERVED

AL34

RESERVED

AK34

RESERVED

AN35

RESERVED

AM35

RESERVED

T24

RESERVED

B31

RESERVED

B2

RESERVED

M1

RESERVED

AY21

RESERVED

BG23

RESERVED

BF23

RESERVED

BH18

RESERVED

BF18

RESERVED

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC

BF48

NC

BD48

NC

BC48

NC

BH47

NC

BG47

NC

BE47

NC

BH46

NC

BF46

NC

BG45

NC

BH44

NC

BH43

NC

BH6

NC

BH5

NC

BG4

NC

BH3

NC

BF3

NC

BH2

NC

BG2

NC

BE2

NC

BG1

NC

BF1

NC

BD1

NC

BC1

NC

F1

NC

A47

NC

CANTIGA ES_FCBGA1329

Compal Secret Data

Deciphered Date

RSVD

CFG

PM

NC

2

M_CLK_DDR0

AP24

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

DMI

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

MISC

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

M_CLK_DDR1

AT21

M_CLK_DDR2

AV24

M_CLK_DDR3

AU20

M_CLK_DDR#0

AR24

M_CLK_DDR#1

AR21

M_CLK_DDR#2

AU24

M_CLK_DDR#3

AV20

DDR_CKE0_DIMMA

BC28

DDR_CKE1_DIMMA

AY28

DDR_CKE2_DIMMB

AY36

DDR_CKE3_DIMMB

BB36

DDR_CS0_DIMMA#

BA17

DDR_CS1_DIMMA#

AY16

DDR_CS2_DIMMB#

AV16

DDR_CS3_DIMMB#

AR13

M_ODT0

BD17

M_ODT1

AY17

M_ODT2

BF15

M_ODT3

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

SMRCOMP_VOH

BF28

SMRCOMP_VOL

BH28

+V_DDR_MCH_REF

AV42

SM_PWROK

AR36

SM_REXT

BF17

TP_SM_DRAMRST#

BC36
B38

A38
E41
F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_TXN0

AE41

DMI_TXN1

AE37

DMI_TXN2

AE47

DMI_TXN3

AH39

DMI_TXP0

AE40

DMI_TXP1

AE38

DMI_TXP2

AE48

DMI_TXP3

AH40

DMI_RXN0

AE35

DMI_RXN1

AE43

DMI_RXN2

AE46

DMI_RXN3

AH42

DMI_RXP0

AD35

DMI_RXP1

AE44

DMI_RXP2

AF46

DMI_RXP3

AH43

B33
B32
G33
F33
E33

C34

CL_CLK0

AH37

CL_DATA0

AH36

M_PWROK

AN36

CL_RST#

AJ35

+CL_VREF

AH34

0621 add CLK and DAT for DVI

N28
M28
G36
E36

CLKREQ#_7

K36

MCH_ICH_SYNC#

H36

TSATN#

B12

B28
B30
B29
C29
A28

56_0402_5%

1 2

R42

0830 Add pull-up and pull-down resistor.

Title

Size Document Number Rev

Custom

LA-4082P Vader Discrete

2

Date: Sheet

1

M_CLK_DDR0 13
M_CLK_DDR1 13
M_CLK_DDR2 14
M_CLK_DDR3 14

M_CLK_DDR#0 13
M_CLK_DDR#1 13
M_CLK_DDR#2 14
M_CLK_DDR#3 14

DDR_CKE0_DIMMA 13
DDR_CKE1_DIMMA 13
DDR_CKE2_DIMMB 14
DDR_CKE3_DIMMB 14

DDR_CS0_DIMMA# 13
DDR_CS1_DIMMA# 13
DDR_CS2_DIMMB# 14
DDR_CS3_DIMMB# 14

M_ODT0 13
M_ODT1 13
M_ODT2 14
M_ODT3 14

R28 80.6_0402_1%

1 2

R29 80.6_0402_1%

1 2

Follow Design Guide
For Cantiga: 80.6ohm

1009 Follow Design Guide

R30 0_0402_5%

1 2

R31 499_0402_1%

1 2

T30 PAD

1015 Follow Design Guide

CLK_MCH_3GPLL 15
CLK_MCH_3GPLL# 15

DMI_TXN0 28
DMI_TXN1 28
DMI_TXN2 28
DMI_TXN3 28

DMI_TXP0 28
DMI_TXP1 28
DMI_TXP2 28
DMI_TXP3 28

DMI_RXN0 28
DMI_RXN1 28
DMI_RXN2 28
DMI_RXN3 28

DMI_RXP0 28
DMI_RXP1 28
DMI_RXP2 28
DMI_RXP3 28

T31
T32
T33
T34
T35

T36

T37
T38

0906 delete

CL_CLK0 28
CL_DATA0 28
M_PWROK 28,40
CL_RST# 28

0.1U_0402_16V4Z

CLKREQ#_7 15
MCH_ICH_SYNC# 28

+VCCP

+VCCP

1

C56

2

*R37*Follow Intel
feedback

Delete Off-page
@1028

Compal Electronics, Inc.

Cantiga(1/6)-AGTL/DMI/DDR

1

+1.8V

12

R36
1K_0402_1%

12

R37
499_0402_1%

758Wednesday, December 26, 2007

0.2

of

5

D D

DDR_A_D[0..63]13

C C

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

U57D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA ES_FCBGA1329

DDR SYSTEM MEMORY A

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

4

DDR_A_BS0

BD21
BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_BS1
DDR_A_BS2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_BS0 13
DDR_A_BS1 13
DDR_A_BS2 13

DDR_A_RAS# 13
DDR_A_CAS# 13
DDR_A_WE# 13

DDR_A_DM[0..7] 13

DDR_A_DQS[0..7] 13

DDR_A_DQS#[0..7] 13

DDR_A_MA[0..14] 13

3

DDR_B_D[0..63]14

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40

DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

U57E

AK47
AH46
AP47
AP46
AJ46
AJ48

AM48

AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11

BG8
BH12
BF11

BF8

BG7

BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1

AH1
AM2
AM3

AH3

AJ3

CANTIGA ES_FCBGA1329

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

2

DDR_B_BS0

BC16

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

DDR SYSTEM MEMORY B

BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_BS1
DDR_B_BS2

DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3DDR_B_D41
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

1

DDR_B_BS0 14
DDR_B_BS1 14
DDR_B_BS2 14

DDR_B_RAS# 14
DDR_B_CAS# 14
DDR_B_WE# 14

DDR_B_DM[0..7] 14

DDR_B_DQS[0..7] 14

DDR_B_DQS#[0..7] 14

DDR_B_MA[0..14] 14

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(2/6)-DDR2 A/B CH

LA-4082P Vader Discrete

1

0.2

of

858Wednesday, December 26, 2007

5

4

3

2

1

U57C

PEGCOMP tr ace width
and spacing is 20/25 mils.

PEG_RXN0 18
PEG_RXN1 18
PEG_RXN2 18
PEG_RXN3 18
PEG_RXN4 18
PEG_RXN5 18
PEG_RXN6 18
PEG_RXN7 18
PEG_RXN8 18
PEG_RXN9 18
PEG_RXN10 18
PEG_RXN11 18
PEG_RXN12 18
PEG_RXN13 18
PEG_RXN14 18
PEG_RXN15 18

PEG_RXP0 18
PEG_RXP1 18
PEG_RXP2 18
PEG_RXP3 18
PEG_RXP4 18
PEG_RXP5 18
PEG_RXP6 18
PEG_RXP7 18
PEG_RXP8 18
PEG_RXP9 18
PEG_RXP10 18
PEG_RXP11 18
PEG_RXP12 18
PEG_RXP13 18
PEG_RXP14 18
PEG_RXP15 18

PEG_M_TXN0 18
PEG_M_TXN1 18
PEG_M_TXN2 18
PEG_M_TXN3 18
PEG_M_TXN4 18
PEG_M_TXN5 18
PEG_M_TXN6 18
PEG_M_TXN7 18
PEG_M_TXN8 18
PEG_M_TXN9 18
PEG_M_TXN10 18
PEG_M_TXN11 18
PEG_M_TXN12 18
PEG_M_TXN13 18
PEG_M_TXN14 18
PEG_M_TXN15 18

PEG_M_TXP0 18
PEG_M_TXP1 18
PEG_M_TXP2 18
PEG_M_TXP3 18
PEG_M_TXP4 18
PEG_M_TXP5 18
PEG_M_TXP6 18
PEG_M_TXP7 18
PEG_M_TXP8 18
PEG_M_TXP9 18
PEG_M_TXP10 18
PEG_M_TXP11 18
PEG_M_TXP12 18
PEG_M_TXP13 18
PEG_M_TXP14 18
PEG_M_TXP15 18

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

D D

C C

B B

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA ES_FCBGA1329

LVDS

TV VGA

PEG_COMPI

PEG_COMPO

PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13

PCI-EXPRESS GRAPHICS

PEG_TX#_14
PEG_TX#_15

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

T37
T36

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

R50

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

1 2

C1289 0.1U_0402_16V4Z
C1290 0.1U_0402_16V4Z
C1291 0.1U_0402_16V4Z
C1292 0.1U_0402_16V4Z
C1293 0.1U_0402_16V4Z
C1294 0.1U_0402_16V4Z
C1295 0.1U_0402_16V4Z
C1296 0.1U_0402_16V4Z
C1297 0.1U_0402_16V4Z
C1298 0.1U_0402_16V4Z
C1299 0.1U_0402_16V4Z
C1300 0.1U_0402_16V4Z
C1301 0.1U_0402_16V4Z
C1302 0.1U_0402_16V4Z
C1303 0.1U_0402_16V4Z
C1304 0.1U_0402_16V4Z

C1305 0.1U_0402_16V4Z
C1306 0.1U_0402_16V4Z
C1307 0.1U_0402_16V4Z
C1308 0.1U_0402_16V4Z
C1309 0.1U_0402_16V4Z
C1310 0.1U_0402_16V4Z
C1311 0.1U_0402_16V4Z
C1312 0.1U_0402_16V4Z
C1313 0.1U_0402_16V4Z
C1314 0.1U_0402_16V4Z
C1315 0.1U_0402_16V4Z
C1316 0.1U_0402_16V4Z
C1317 0.1U_0402_16V4Z
C1318 0.1U_0402_16V4Z
C1319 0.1U_0402_16V4Z
C1320 0.1U_0402_16V4Z

49.9_0402_1%

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

+VCC_PEG

CFG[2:0] FSB Freq select

CFG[4:3] Reserved

CFG5 (DMI select)

CFG6

CFG6

CFG7 (Intel Management
Engine Crypto strap)

CFG8

CFG9
(PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11
CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

+3VS

R59

4.02K_0402_1%

CFG57

CFG5

@

R63

2.21K_0402_1%

12

12

000 = FSB 1066MHz
010 = FSB 800MHz
011 = FSB 667MHz
Others = Reserved

0 = DMI x 2
1 = DMI x 4
0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable
0 =(TLS)chip e r s u i t e with no confidentiality

Selected By CPU

*

*

1 =(TLS)chip e r s uite with confidentiality

Reserved

0 = Reverse Lane,15->0, 14->1
1 = Normal Operation,Lane Number in order

0 = Enable
1 = Disable
Reserved
00 = Reserved

01 = XOR Mode Enabled
10 = All Z Mode Enabled

*

ReservedCFG[15:14]

(Default)11 = Normal Operation

*

*

0 = Disabled
1 = Enabled

*

ReservedCFG[18:17]

0 = Normal Operation

(Lane number in Order)

*

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.

*

1 = PCIE/SDVO a r e o p e r a t ing simu.

R65

R68

R71

R74

R77

1 2

2.21K_0402_1%

1 2

2.21K_0402_1%@

1 2

2.21K_0402_1%@

1 2

2.21K_0402_1%@

1 2

2.21K_0402_1%

CFG77

CFG97

CFG107

CFG117

CFG127

*

Strap Pin Table

+3VS

R64

CFG197

CFG207

CFG167

CFG67

CFG87 CFG187

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

2

1 2

4.02K_0402_1%@

R67

1 2

4.02K_0402_1%@

R70

1 2

4.02K_0402_1%

R73

1 2

2.21K_0402_1%@

R76

1 2

2.21K_0402_1%@

Title

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

CFG137

CFG147

CFG157

CFG177

Compal Electronics, Inc.

Cantiga(3/6)-VGA/LVDS/TV

R66

1 2

2.21K_0402_1%

R69

1 2

2.21K_0402_1%@

R72

1 2

2.21K_0402_1%@

R75

1 2

2.21K_0402_1%@

R78

1 2

2.21K_0402_1%@

0.2

of

958Wednesday, December 26, 2007

1

5

4

3

2

1

U57H

73mA

B27

VCCA_CRT_DAC

A26

VCCA_CRT_DAC

2.68mA

A25

VCCA_DAC_BG

B25

D D

+1.05VS_HPLL
+1.05VS_MPLL

R87

@

1 2

+3VS

0_0603_5%

R88

1 2

+1.5VS

0_0603_5%

+VCCP

R91

R94

1 2

0_0805_5%

1 2

0_0603_5%

1U_0603_10V4Z

C C

10/08 add this power rail

B B

1

C122

0.1U_0402_16V4Z

2

+1.05VS_A_SM

10U_0805_10V4Z

+1.05VS_A_SM_CK

1

C135

2

10U_0805_10V4Z

+1.5VS_PEG_BG

1

C128

2

1U_0603_10V4Z

1

C136

2

4.7U_0805_10V4Z

1

C129

2

1

C137

2

+1.05VS_HPLL
+1.05VS_PEGPLL

+1.05VS_PEGPLL

1

C130

2

1U_0603_10V4Z

1

C138

2

0.1U_0402_16V4Z

R2090 0_0402_5%

1 2

+1.5VS_TVDAC

+1.5VS_QDAC

1212 Montevina DG

+1.5VS_QDAC

0.01U_0402_16V7K

C2116

1

2

C2117

0.1U_0402_16V4Z

1

2

R2093

1 2

100_0603_1%

+1.5VS

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

13.2mA

J48

VCCA_LVDS

J47

VSSA_LVDS

414uA

AD48

VCCA_PEG_BG

50mA

AA48

VCCA_PEG_PLL

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

VCCA_SM

AN17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCCA_SM

AP28

VCCA_SM_CK

AN28

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VCCA_SM_CK_NCTF

AL23

VCCA_SM_CK_NCTF

B24

VCCA_TV_DAC

A24

VCCA_TV_DAC

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS

L37

VCCD_LVDS

60.31mA

CANTIGA ES_FCBGA1329

64.8mA

64.8mA
24mA

139.2mA

720mA

26mA

26mA

TVA 24.15mA
TVB 39.48mA
TVX 24.15mA

50mA

58.67mA

48.363mA

157.2mA
50mA

CRTPLLA PEGA SMTV

A LVDSHDA

POWER

A CK

105.3mA

1732mA

D TV/CRT

LVDS

852mA

AXF

SM CK

118.8mA

VCC_TX_LVDS

HV

PEG

DMI

456mA

VTT

321.35mA

VCC_AXF
VCC_AXF
VCC_AXF

124mA

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

VCC_HV
VCC_HV
VCC_HV

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

VTTLF
VTTLF
VTTLF

VTTLF

+VCCP

U13

VTT

T13

VTT

U12

VTT

T12

VTT

U11

VTT

T11

VTT

U10

VTT

T10

VTT

U9

VTT

T9

VTT

U8

VTT

T8

VTT

U7

VTT

T7

VTT

U6

VTT

T6

VTT

U5

VTT

T5

VTT

V3

VTT

U3

VTT

V2

VTT

U2

VTT

T2

VTT

V1

VTT

U1

VTT

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

C143

0.47U_0603_10V7K

+V1.05VS_AXF

+1.8V_SM_CK

+VCC_PEG

+1.05VS_DMI

0.47U_0603_10V7K

C144

1

2

1

C107

+

2

1

C113

2

1

2

4.7U_0805_10V4Z

220U_6.3V_M

C110

1

2

2.2U_0805_16V4Z

4.7U_0805_10V4Z

0.47U_0603_10V7K

0.47U_0603_10V7K

C145

C114

+3VS_HV

1

2

1

2

C139

0.1U_0402_16V4Z

1

2

1

C115

2

+1.05VS_HPLL

0.1U_0402_16V4Z

+1.05VS_MPLL

0.1U_0402_16V4Z

+1.05VS_PEGPLL

0.1U_0402_16V4Z

C123

C133

C140

1

2

1

2

1

2

1

C124
10U_0805_10V4Z

2

1

C134
10U_0805_10V4Z

2

L7

1 2

BLM18PG121SN1D_0603

1

C141

2

10U_0805_10V4Z

R89

1 2

MBK2012121YZF_0805

R93

1 2

MBK2012121YZF_0805

D3

2 1

+VCCP

CH751H-40PT_SOD323-2

+3VS

10U_0805_10V4Z

+VCCP

0.1U_0402_16V4Z

+VCCP

+VCCP

+VCCP_D

+V1.05VS_AXF

1

2

1U_0603_10V4Z

10U_0805_10V4Z

1

C117

2

0.1U_0402_16V4Z

1

C125
10U_0805_10V4Z

2

1

1

2

2

R95

1 2

0_0603_5%

1

C142

0.1U_0402_16V4Z

2

1

C109

2

1

C118

2

R90

1 2

0_0805_5%

R92

1 2

C132
10U_0805_10V4Z

+VCCP

+3VS_HV

C108

10U_0805_10V4Z

+1.8V_SM_CK

@

1

C116

2

+1.5VS_TVDAC +1.5VS

1

C126

2

+VCC_PEG

+

C131

220U_6.3V_M

+1.05VS_DMI

R96

1 2

10_0402_5%

R97

1 2

0_0402_5%

R82

1 2

0_0603_5%

R85

1 2

0_0805_5%

0_0805_5%

+VCCP

+1.8V

+VCCP

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(4/6)-PWR

LA-4082P Vader Discrete

1

0.2

of

10 58Wednesday, December 26, 2007

5

+VCCP

D D

0.1U_0402_16V4Z

0.22U_0402_10V4Z

220U_6.3V_M

C162

C C

B B

0.22U_0402_10V4Z

10U_0805_10V4Z

1

C163

C164

1

+

2

1

2

2

C166

C165

1

1

2

2

U57F

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC

CANTIGA ES_FCBGA1329

4

Extnal Graphic: 1210.34mA
integrated Graphic: 1930.4mA

VCC CORE

AM32

VCC_NCTF

AL32

VCC_NCTF

AK32

VCC_NCTF

AJ32

VCC_NCTF

AH32

VCC_NCTF

AG32

VCC_NCTF

AE32

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

POWER

VCC NCTF

+VCCP

+1.8V

3

C158

330U_4V_M

10U_0805_10V4Z

1

1

+

2

2

0317 change value

C159

2

U57G

3000mA

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

0.01U_0402_16V7K

10U_0805_10V4Z

C161

C160

1

1

2

2

T43PAD
T44PAD

BF32
BD32
BC32
BB32
BA32
AY32

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21
AG21
AE21
AC21
AA21

AH20
AF20
AE20
AC20
AB20
AA20

AM15

AL15
AE15

AJ15
AH15
AG15
AF15
AB15
AA15

AN14

AM14

AJ14
AH14

Y26

Y24

Y21

T17
T16

Y15
V15

U15

U14

T14

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC

6326.84mA

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

VCC_AXG_SENSE
VSS_AXG_SENSE

VCC SMVCC GFX

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

POWER

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC GFX NCTF

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC SM LF

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

1

2

1

C178 0.1U_0402_16V4Z

C177 0.1U_0402_16V4Z

1

1

2

2

C174 0.47U_0402_6.3V6K

C172 0.22U_0603_10V7K

1

2

C175 1U_0603_10V4Z

C173 0.22U_0603_10V7K

1

2

C176 1U_0603_10V4Z

1

1

2

2

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

CANTIGA ES_FCBGA1329

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(5/6)-PWR/GND

LA-4082P Vader Discrete

1

0.2

of

11 58Wednesday, December 26, 2007

5

4

3

2

1

U57I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

D D

C C

B B

A A

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA ES_FCBGA1329

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

U57J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

AC15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

M10

VSS

BF9

VSS

BC9

VSS

AN9

VSS

AM9

VSS

AD9

VSS

G9

VSS

B9

VSS

BH8

VSS

BB8

VSS

AV8

VSS

AT8

VSS

CANTIGA ES_FCBGA1329

VSS

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

VSS NCTF

VSS_NCTF
VSS_NCTF

VSS SCB

NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1

NC

D2

NC

C3

NC

B4

NC

A5

NC

A6

NC

A43

NC

A44

NC

B45

NC

C46

NC

D47

NC

B47

NC

A46

NC

F48

NC

E48

NC

C48

NC

B48

NC

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(6/6)-PWR/GND

LA-4082P Vader Discrete

1

0.2

of

12 58Wednesday, December 26, 2007

5

DDR_A_DQS#[0..7]8
DDR_A_D[0..63]8
DDR_A_DM[0..7]8
DDR_A_DQS[0..7]8
DDR_A_MA[0..14]8

D D

C C

B B

A A

Layout Note:
Place near
JP3

+1.8V

2.2U_0805_16V4Z

2.2U_0805_16V4Z

Layout Note:
Place one cap close to every
2 pullup
resistors terminated to +0.9VS

+0.9V

0.1U_0402_16V4Z

DDR_A_MA8
DDR_A_MA5

DDR_A_MA1
DDR_A_MA3

DDR_A_RAS#
DDR_CS0_DIMMA#

DDR_A_BS0
DDR_A_MA10

DDR_A_CAS#
DDR_A_WE#

DDR_CS1_DIMMA#
M_ODT1

DDR_A_MA11

1

2

1

2

C182

C191

1

2

0.1U_0402_16V4Z

1

2

C192

R108 56_0402_5%

5

C183

0.1U_0402_16V4Z

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

2 3
1 4

1 2

1

2

RP156_0404_4P2R_5%

RP356_0404_4P2R_5%

RP556_0404_4P2R_5%

RP756_0404_4P2R_5%

RP956_0404_4P2R_5%

RP1156_0404_4P2R_5%

2.2U_0805_16V4Z

C193

2.2U_0805_16V4Z

C184

1

2

0.1U_0402_16V4Z

1

2

C194

+0.9V

C186

1

2

0.1U_0402_16V4Z

1

1

2

2

C197

C196

DDR_A_BS2

14

DDR_CKE0_DIMMA

23

DDR_A_MA7

14

DDR_A_MA6

23

DDR_A_MA9

14

DDR_A_MA12

23

DDR_A_MA4

14

DDR_A_MA2

23

DDR_A_MA0

14

DDR_A_BS1

23

M_ODT0

14

DDR_A_MA13

23

DDR_CKE1_DIMMA

14

DDR_A_MA14

23

0.1U_0402_16V4Z
C187

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C198

2.2U_0805_16V4Z

C185

1

2

510

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C195

RP2 56_0404_4P2R_5%

RP4 56_0404_4P2R_5%

RP6 56_0404_4P2R_5%

RP8 56_0404_4P2R_5%

RP10 56_0404_4P2R_5%

RP12 56_0404_4P2R_5%

RP13 56_0404_4P2R_5%

4

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C188

1

2

0.1U_0402_16V4Z

1

2

C199

1

2

C200

0.1U_0402_16V4Z

C189

C190

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C201

C202

Layout Note:
Place these resistor
closely JP3,all
trace length Max=1.5"

1

+

C181
330U_D2_2.5VM_R15

2

1113 Change type for layout

0.1U_0402_16V4Z

1

2

C203

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+1.8V

DDR_A_D4
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D14

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D9 DDR_A_D11
DDR_A_D15 DDR_A_D10

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA7

DDR_A_BS28

DDR_A_BS08

DDR_A_WE#8

DDR_A_CAS#8
DDR_CS1_DIMMA#7

M_ODT17

CLK_SMBDATA14,15
CLK_SMBCLK14,15

+3VS

3

DDR_CKE0_DIMMA

DDR_A_BS2
DDR_A_MA12

DDR_A_MA9 DDR_A_MA7
DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS0
DDR_A_WE#

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1
DDR_A_D37

DDR_A_D36
DDR_A_DQS#4

DDR_A_DQS4
DDR_A_D35

DDR_A_D32
DDR_A_D40

DDR_A_D44
DDR_A_DM5
DDR_A_D41

DDR_A_D46
DDR_A_D49

DDR_A_D48

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D61 DDR_A_D57

DDR_A_D60
DDR_A_DM7
DDR_A_D59

DDR_A_D58
CLK_SMBDATA

CLK_SMBCLK

1

2

2.2U_0603_6.3V4Z

2006/02/13 2006/03/10

C204

C205

Compal Secret Data

1

2

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99

101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201

0.1U_0402_16V4Z

Deciphered Date

+V_DDR_MCH_REF

JDIMM1

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
G1

FOX_AS0A426-N4RN-7F~D

SO-DIMM A

CONN@

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1

RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

SA1

2

+1.8V

2

DDR_A_D6

4

DDR_A_D0

6
8

DDR_A_DM0

10
12

DDR_A_D5

14

DDR_A_D7

16
18

DDR_A_D13

20

DDR_A_D12

22
24

DDR_A_DM1

26
28

M_CLK_DDR0

30

M_CLK_DDR#0

32
34
36
38
40

42

DDR_A_D20

44

DDR_A_D21

46
48
50

NC

A11

A7
A6

A4
A2
A0

S0#

NC

G2

2

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202

DDR_A_DM2
DDR_A_D23

DDR_A_D22
DDR_A_D28DDR_A_D29

DDR_A_D25DDR_A_D24
DDR_A_DQS#3

DDR_A_DQS3
DDR_A_D31

DDR_A_D30
DDR_CKE1_DIMMA

DDR_A_MA14
DDR_A_MA11
DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

DDR_A_BS1
DDR_A_RAS#
DDR_CS0_DIMMA#

M_ODT0
DDR_A_MA13

DDR_A_D39
DDR_A_D38

DDR_A_DM4
DDR_A_D34

DDR_A_D33
DDR_A_D45

DDR_A_D43
DDR_A_DQS#5

DDR_A_DQS5
DDR_A_D47

DDR_A_D42
DDR_A_D52

DDR_A_D53
M_CLK_DDR1

M_CLK_DDR#1
DDR_A_DM6
DDR_A_D51DDR_A_D54

DDR_A_D55

DDR_A_D56
DDR_A_DQS#7

DDR_A_DQS7
DDR_A_D62

DDR_A_D63

12

R107

R106

10K_0402_5%

10K_0402_5%

12

2.2U_0805_16V4Z
C179

1

2

M_CLK_DDR0 7
M_CLK_DDR#0 7

PM_EXTTS#0 7

DDR_CKE1_DIMMA 7

DDR_A_BS1 8
DDR_A_RAS# 8
DDR_CS0_DIMMA# 7

M_ODT0 7

M_CLK_DDR1 7
M_CLK_DDR#1 7

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

DDRII-SODIMM SLOT1

LA-4082P Vader Discrete

1

C180

1

+V_DDR_MCH_REF 7,14

of

13 58Wednesday, December 26, 2007

0.2

0.1U_0402_16V4Z

1

2

5

DDR_B_DQS#[0..7]8
DDR_B_D[0..63]8
DDR_B_DM[0..7]8
DDR_B_DQS[0..7]8
DDR_B_MA[0..14]8

D D

C C

B B

A A

Layout Note:
Place near
JP10

+1.8V

2.2U_0805_16V4Z

2.2U_0805_16V4Z
C208

1

2

Layout Note:
Place one cap close to every
2 pullup
resistors terminated to +0.9VS

+0.9V

0.1U_0402_16V4Z

1

2

C217

DDR_B_MA1
DDR_B_MA3

DDR_B_BS0
DDR_B_MA10

DDR_B_MA0
DDR_B_BS1

DDR_B_RAS#
DDR_CS2_DIMMB#

DDR_B_CAS#
DDR_B_WE#

DDR_CS3_DIMMB# M_ODT2
M_ODT3

DDR_CKE3_DIMMB

C209

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C218

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

2 3
1 4

1 2

R111 56_0402_5%

5

1

2

RP1456_0404_4P2R_5%

RP1656_0404_4P2R_5%

RP1856_0404_4P2R_5%

RP2056_0404_4P2R_5%

RP2256_0404_4P2R_5%

RP2456_0404_4P2R_5%

2.2U_0805_16V4Z

C219

C210

1

2

0.1U_0402_16V4Z

1

2

C220

+0.9V

5

2.2U_0805_16V4Z

2.2U_0805_16V4Z

0.1U_0402_16V4Z

C212

C211

1

1

2

2

330U_4V_M

510

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C221

C222

RP15 56_0404_4P2R_5%

14
23

RP17 56_0404_4P2R_5%

14
23

RP19 56_0404_4P2R_5%

14
23

RP21 56_0404_4P2R_5%

14
23

RP23 56_0404_4P2R_5%

14
23

RP25 56_0404_4P2R_5%

14
23

RP26 56_0404_4P2R_5%

14
23

0.1U_0402_16V4Z

1

+

C244

2

0.1U_0402_16V4Z

1

1

2

2

C224

C223

DDR_B_MA9
DDR_B_MA12

DDR_B_MA14
DDR_B_MA11

DDR_B_MA5
DDR_B_MA8

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2

DDR_B_MA13

DDR_B_BS2
DDR_CKE2_DIMMB

0.1U_0402_16V4Z

C213

1

2

0.1U_0402_16V4Z

1

2

C225

4

0.1U_0402_16V4Z

C214

C215

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C227

C226

Layout Note:
Place these resistor
closely JP3,all
trace length Max=1.5"

4

3

+1.8V

+V_DDR_MCH_REF

JDIMM2

1

VREF

3

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

0.1U_0402_16V4Z

Deciphered Date

5
7
9

VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD

SO-DIMM B

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

0.1U_0402_16V4Z
C216

1

2

DDR_CKE2_DIMMB7

DDR_B_BS28

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C229

C228

DDR_B_BS08
DDR_B_WE#8

DDR_B_CAS#8

DDR_CS3_DIMMB#7

M_ODT37

CLK_SMBDATA13,15
CLK_SMBCLK13,15

+3VS

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR_B_D20
DDR_B_DQS#2

DDR_B_DQS2
DDR_B_D18

DDR_B_D19
DDR_B_D28

DDR_B_DM3

DDR_B_D30
DDR_B_D31

DDR_CKE2_DIMMB

DDR_B_BS2
DDR_B_MA12

DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3
DDR_B_D32

DDR_B_D33
DDR_B_DQS#4

DDR_B_DQS4
DDR_B_D34

DDR_B_D35
DDR_B_D40

DDR_B_D41
DDR_B_DM5
DDR_B_D42

DDR_B_D43
DDR_B_D48

DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D51
DDR_B_D50

DDR_B_D56
DDR_B_D61 DDR_B_D57

DDR_B_DM7
DDR_B_D59

DDR_B_D58
CLK_SMBDATA

CLK_SMBCLK

1

C230

2

2.2U_0603_6.3V4Z

2006/02/13 2006/03/10

1

C231

2

Compal Secret Data

2

CONN@

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

NC
DM2
VSS

DQ22
DQ23

VSS

DQ28
DQ29

VSS

DQS3#

DQS3

VSS

DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

A11

A7

A6
VDD

A4

A2

A0
VDD

BA1

RAS#

S0#

VDD

ODT0

NC/A13

VDD

NC
VSS

DQ36
DQ37

VSS
DM4
VSS

DQ38
DQ39

VSS

DQ44
DQ45

VSS

DQS5#

DQS5

VSS

DQ46
DQ47

VSS

DQ52
DQ53

VSS
CK1

CK1#

VSS
DM6
VSS

DQ54
DQ55

VSS

DQ60
DQ61

VSS

DQS7#

DQS7

VSS

DQ62
DQ63

VSS

SA0
SA1

G1

FOX_AS0A426-N8RN-7F

201G2202

2

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

+1.8V

DDR_B_D5
DDR_B_D4

DDR_B_DM0
DDR_B_D6

DDR_B_D7
DDR_B_D12

DDR_B_D13
DDR_B_DM1
M_CLK_DDR2

M_CLK_DDR#2
DDR_B_D14

DDR_B_D15

DDR_B_D21DDR_B_D17
DDR_B_D16

DDR_B_DM2
DDR_B_D22

DDR_B_D23
DDR_B_D26

DDR_B_D24DDR_B_D25
DDR_B_DQS#3

DDR_B_DQS3
DDR_B_D29

DDR_B_D27
DDR_CKE3_DIMMB

DDR_B_MA14
DDR_B_MA11

DDR_B_MA7
DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS1
DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4
DDR_B_D39

DDR_B_D38
DDR_B_D44

DDR_B_D45
DDR_B_DQS#5

DDR_B_DQS5
DDR_B_D46

DDR_B_D47
DDR_B_D52

DDR_B_D53
M_CLK_DDR3

M_CLK_DDR#3
DDR_B_DM6
DDR_B_D54

DDR_B_D55
DDR_B_D60

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

1

+V_DDR_MCH_REF 7,13

0.1U_0402_16V4Z

2.2U_0805_16V4Z

1

1

C207

C206

2

2

M_CLK_DDR2 7
M_CLK_DDR#2 7

PM_EXTTS#1 7

DDR_CKE3_DIMMB 7

0612 add

DDR_B_BS1 8
DDR_B_RAS# 8
DDR_CS2_DIMMB# 7

M_ODT2 7

M_CLK_DDR3 7
M_CLK_DDR#3 7

R109

1 2

10K_0402_5%

12

10K_0402_5%

R110

Title

Size Document Number Rev

Custom

Date: Sheet

+3VS

Compal Electronics, Inc.

DDRII-SODIMM SLOT2

LA-4082P Vader Discrete

1

0.2

of

14 58Wednesday, December 26, 2007

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

MHz

33.30

14.318 96.0 48.0

DOT_96
MHz

FSC FSB REF

CLKSEL2

01000 133 33.31 14.318 96.0 48.0

01001 200 33.30 14.318 96.0 48.0

D D

01001 166 33.31 14.318 96.0 48.0

11000 333 33.30 14.318 96.0 48.0

11000 100 33.31 14.318 96.0 48.0

11001 400 33.30 14.318 96.0 48.0

111

12

CLRP1

R121

FSA

1 2

2.2K_0402_5%
R124

CPU_BSEL05

C C

CPU_BSEL15

B B

CPU_BSEL25

ITP_EN

PCI_CLK3

A A

1 2

0_0402_5%

FSB

R151

1 2

0_0402_5%

R170

FSC

1 2

10K_0402_5%
R174

1 2

0_0402_5%

0 = SRC8/SRC8#
1 = ITP/ITP#
0 = Enable DOT96 & SRC1(UMA)
1 = Enable SRC0 & 27MHz(DIS)

+3VS +3VS

12

@

R176
10K_0402_5%

12

R179
10K_0402_5%

NO SHORT PADS

1 2

R122
1K_0402_5%

12

@

R130
1K_0402_5%

+VCCP

@

R142
1K_0402_5%

1 2

1 2

R148
1K_0402_5%

12

@

R154

0_0402_5%

+VCCP

12

@

R169
1K_0402_5%

1 2

R171
1K_0402_5%

12

@

R175
0_0402_5%

ITP_EN PCI_CLK3

5

Reserved

R118

1 2

56_0402_5%

MCH_CLKSEL0 7

MCH_CLKSEL1 7

1025 Add R127 to meet Intel CLK design

MCH_CLKSEL2 7

12

R178
10K_0402_5%

12

@

R181
10K_0402_5%

+VCCP

CLK_DEBUG_PORT139
CLK_DEBUG_PORT032
CLK_PCI_EC40

CLK_PCI_ICH26

VGA (Discrete)

CLK_ENABLE#51

CK_PWRGD28

CLK_14M_ICH28

CLK_SMBDATA13,14
CLK_SMBCLK13,14

VGATE28,51

USB
MHz

4

Routing the t race at least 10mil

18P_0402_50V8J

CLKREQ#_77

NB
CPU

R119 0_0402_5%@

1 2

R120 0_0402_5%@

1 2

R123 0_0402_5%

1 2

R140 33_0402_1%

1 2

@

R127 33_0402_1%

1 2

R126 33_0402_1%

1 2

R131 33_0402_1%

1 2

R133 33_0402_1%

1 2

CLK_48M_ICH28

CLK_PCIE_VGA18
CLK_PCIE_VGA#18

SB, MINI PCI

4

R112

1 2

+3VS

0_0805_5%

03/02 change

CLK_XTAL_OUT
CLK_XTAL_IN

Y1

14.31818MHZ_16P

12

2

C251

2

C252

1

18P_0402_50V8J

1

Vendor suggests 22pF

R863 475_0402_1%

1 2

CLK_MCH_BCLK7
CLK_CPU_BCLK#4
CLK_CPU_BCLK4

R_CKPWRGD
FSB

CLK_XTAL_OUT
CLK_XTAL_IN

FSC
CLK_SMBDATA

CLK_SMBCLK

PCI2_TME
27_SEL
PCI_CLK3
ITP_EN

R136 33_0402_1%

1 2

CLK_PCIE_VGA
CLK_PCIE_VGA#

ICH_SMBDATA28,32,35,39

ICH_SMBCLK28,32,35,39

R2006 0_0402_5%
R2007 0_0402_5%

3

3

+3VS_CK505

+3VS_CK505

CLK_VGA
CLK_VGA#

3

72

VDD_CPU

1

C235

0.1U_0402_16V4Z

2

+VCCP

70

67

66

69

71

68

CPU_0

CPU_1

CPU_0#

CPU_1#

VSS_CPU

VDD_CPU_IO

VDD_4819USB_0/FS_A20USB_1/CLKREQ_A#21VSS_4822VDD_IO23SRC_0/DOT_96

24

+3VS

R158

2.2K_0402_5%

2006/02/13 2006/03/10

1

C234
10U_0805_10V4Z

2

R_CLKREQ#_7
CLK_MCH_BCLK#
CLK_MCH_BCLK
CLK_CPU_BCLK#
CLK_CPU_BCLK

U51

+3VS_CK505

1

CKPWRGD/PD#

2

FS_B/TEST_MODE

3

VSS_REF

4

XTAL_OUT

5

XTAL_IN

6

VDD_REF

7

REF_0/FS_C/TEST_

8

REF_1

9

SDA

10

SCL

11

NC

12

VDD_PCI

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

+3VS_CK505

FSA

+1.05VS_CK505

1 2
1 2

+3VS

+3VS

2

6 1

5

2N7002DW-7-F_SOT363-6
Q75A

4

2N7002DW-7-F_SOT363-6
Q75B

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C236

0.1U_0402_16V4Z

2

R113

1 2

0_0805_5%

+1.05VS_CK505

64

65

CLKREQ_7#

SRC_0#/DOT_96#

25

1

C245

2

10U_0805_10V4Z

63

60

56

62

58

59

61

57

SRC_7

SRC_6

SRC_7#

VSS_SRC

CLKREQ_6#

VDD_SRC_IO

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

VSS_IO26VDD_PLL327LCDCLK/27M28LCDCLK#/27M_SS29VSS_PLL330VDD_PLL3_IO31SRC_232SRC_2#33VSS_SRC34SRC_335SRC_3#

+1.05VS_CK505

27M_SSC_CLOCK
27M_CLK_CLOCK

R159

2.2K_0402_5%

CLK_SMBDATA

CLK_SMBCLK

Compal Secret Data

1

C237

0.1U_0402_16V4Z

2

Place close to U51

0.1U_0402_16V4Z

1

C246

2

0.1U_0402_16V4Z

CLK_SRC
CLK_SRC#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
R_CLKREQ#_6

+3VS_CK505

55

SRC_6#

VDD_SRC

PCI_STOP#

CPU_STOP#

VDD_SRC_IO

SRC_10#

SRC_10

CLKREQ_10#

SRC_11

SRC_11#

CLKREQ_11#

SRC_9#

SRC_9

CLKREQ_9#

VSS_SRC

CLKREQ_4#

SRC_4#

SRC_4

VDD_SRC_IO

CLKREQ_3#

SLG8SP553VTR_QFN72_10x10

36

CLK_PCIE_SATA#
CLK_PCIE_SATA

CLK_PCIE_ICH#
CLK_PCIE_ICH

1 2
1 2

1212 Add R and R

Deciphered Date

2

1

C238

0.1U_0402_16V4Z

2

10U_0805_10V4Z

1

2

1 2
1 2
1 2
1 2

1 2

+1.05VS_CK505

H_STP_PCI#
H_STP_CPU#

CLK_PCIE_MCARD0#
CLK_PCIE_MCARD0
R_CLKREQ#_10
CLK_PCIE_MCARD1
CLK_PCIE_MCARD1#
R_CLKREQ#_11
CLK_PCIE_LAN#
CLK_PCIE_LAN
R_CLKREQ#_9

R_CLKREQ#_4
CLK_PCIE_NCARD#
CLK_PCIE_NCARD

R_CLKREQ#_C

CLK_PCIE_SATA# 27
CLK_PCIE_SATA 27

CLK_PCIE_ICH# 28
CLK_PCIE_ICH 28

2

C248

27M_SSC
27M_CLK

1

C247

2

R2002 0_0402_5%
R2003 0_0402_5%
R2004 0_0402_5%@
R2005 0_0402_5%@

R862 475_0402_1%

54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37

R2102
33_0402_1%
33_0402_1%
R2103

1

C239

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

1

C249

C250

2

0.1U_0402_16V4Z

2

R865 475_0402_1%

1 2

R866 475_0402_1%

1 2

R864 475_0402_1%

1 2

R861 475_0402_1%

1 2

R860 475_0402_1%

1 2

SATA

ICH

27M_SSC 19
27M_CLK 19

1

1

C240

0.1U_0402_16V4Z

2

+1.05VS_CK505

1

C944

2

0.1U_0402_16V4Z

CLK_PCIE_CR# 33
CLK_PCIE_CR 33
CLK_CPU_XDP 4
CLK_CPU_XDP# 4
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7CLK_MCH_BCLK#7
CLKREQ#_6 32
CLK_PCIE_MCARD2 32
CLK_PCIE_MCARD2# 32

H_STP_PCI# 28
H_STP_CPU# 28

Card Reader

XDP/ITP

3G_PLL

TV

CLK_PCIE_MCARD0# 32
CLK_PCIE_MCARD0 32

CLKREQ#_10 32

CLK_PCIE_MCARD1 35
CLK_PCIE_MCARD1# 35

CLKREQ#_11 35

CLK_PCIE_LAN# 31
CLK_PCIE_LAN 31

CLKREQ#_9 31
CLKREQ#_4 32

CLK_PCIE_NCARD# 32
CLK_PCIE_NCARD 32

CLKREQ#_C 28

WLAN

Robson

GLAN

New Card

27MHZ For VGA

C232

@

5P_0402_50V8C

C233

@

4.7P_0402_50V8C
C241

@

4.7P_0402_50V8C
C242

@

4.7P_0402_50V8C
C243

@

5P_0402_50V8C

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Clock Generator CK505

LA-4082P Vader Discrete

CLK_48M_ICH

12

CLK_14M_ICH

12

CLK_PCI_ICH

12

CLK_PCI_EC

12

CLK_DEBUG_PORT0

12

1

of

15 58Wednesday, December 26, 2007

0.2

A

B

C

D

E

0.1U_0402_16V4Z
C253

JCRT

CONN@

SUYIN_070546FR015S265ZR

12

R198

+CRTVDD+RCRT_VCC+5VS

1

2

+3VS+CRTVDD +CRTVDD

5

3

4

Q69B

2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

BLUE_CRT
GREEN_CRT
RED_CRT

6 1

Q69A

2

2.2K_0402_5%

2

Place close to

DAN217_SC59

JCRT

1

D7

@

+5VS

2

3

DAN217_SC59

M_DDCDATA 18

M_DDCCLK 18

1

@

3

R199

1

D5

DAN217_SC59

+3VS

12

D6

@

2

3

12

R200

2.2K_0402_5%

CRT
Connector

D4

2 1

CH491D_SC59

F1

1.1A_6VDC_FUSE

W=40mils

21

1106 EMI request

1 1

+5VS +5VS

C254

0.1U_0402_16V4Z

1 2

1

5

U6
SN74AHCT1G125GW_SOT353-5

P

M_HSYNC18

M_VSYNC18

12

12

@

R204

2 2

51K_0402_5%

@

R205
51K_0402_5%

A2Y

G

3

4

OE#

C255

0.1U_0402_16V4Z

1 2

HSYNC_G_A D_HSYNC

1

5

P

VSYNC_G_A

4

OE#

A2Y

G

U7
SN74AHCT1G125GW_SOT353-5

3

RED42

GREEN42

BLUE42

D_HSYNC42

D_VSYNC42

1020 change size to meet NV request

R193

0_0603_5%

1 2

R196

0_0603_5%

1 2

R2069 0_0603_5%

RED RED_CRT

1 2

R2070 0_0603_5%

GREEN GREEN_CRT

1 2

R2071 0_0603_5%

BLUE BLUE_CRT

1 2

D_VSYNC

@

1

C262
5P_0402_50V8C

2

@

1

C263
5P_0402_50V8C

2

2.2K_0402_5%

D_DDCDATA

D_DDCCLK

1102 R204,R205 no stuff

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5
16

17

12

R197

2.2K_0402_5%

D_DDCDATA 42
D_DDCCLK 42

GND
GND

CRT Termination/EMI Filter

3 3

4 4

VGA_RED18

VGA_GRN18

VGA_BLU18

A

12

150_0402_1%

150_0402_1%

R241

12

150_0402_1%

R242

12

R243

C314

22P_0402_50V8J

1

1

C315

C316 22P_0402_50V8J

2

2

22P_0402_50V8J

L13 HLC0603CSCCR11JT_0603

1 2

L15 HLC0603CSCCR11JT_0603

1 2

L17 HLC0603CSCCR11JT_0603

1 2

1

2

B

Note: CRT / TV-out should route to JP30
first then to the JP1 & JP2 on system side.

RED

GREEN

BLUE

1

10P_0402_50V8J

1

C317

@

2

10P_0402_50V8J

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C318

@

2

Issued Date

1

C319

@

10P_0402_50V8J

2

C

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

CRT Connector

LA-4082P Vader Discrete

E

0.2

of

16 58Wednesday, December 26, 2007

5

4

3

2

1

1108 EMI request

DMIC_CLK
DMIC_DAT

1

2

1 2

100_0805_5%

1

1

2

2

C273

R212

2.2K_0402_5%

DDC2_CLK
DDC2_DATA

1

C2111
220P_0402_25V8J

2

1

C2120
470P_0402_50V8J

2

LVDS_A2- 18
LVDS_A2+ 18
LVDS_A1- 18
LVDS_A1+ 18
LVDS_A0- 18
LVDS_A0+ 18
LVDS_ACLK- 18
LVDS_ACLK+ 18

DMIC_DAT 34
DMIC_CLK 34

+5VS

INV_PWM 40

BKOFF# 40

DAC_BRIG 40

+USB_CAM

DDC2_CLK 20
DDC2_DATA 20

1212 EMI request

+3VS

R213

2.2K_0402_5%

1 2

1 2

Logo LED

1102 Change size to 0805

C2110

@

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

220P_0402_25V8J

LVDS_A2­LVDS_A2+
LVDS_A1­LVDS_A1+
LVDS_A0­LVDS_A0+
LVDS_ACLK­LVDS_ACLK+

DMIC_DAT
DMIC_CLK
+5V_LOGO
INV_PWM
BKOFF#
DAC_BRIG

DDC2_DATA

C272

470P_0402_50V8J

470P_0402_50V8J

R462

C270

1

2

680P_0402_50V7K

@

D17

4

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4

INVPWR_B++LCDVDD

C271

12

680P_0402_50V7K

USB20_P4_R
USB20_N4_R

LVDS_BCLK+
LVDS_BCLK-

LVDS_B0+
LVDS_B0­LVDS_B1+
LVDS_B1­LVDS_B2+ DDC2_CLK
LVDS_B2-

USB20_P4_R

2

IO1

1

LVDS CONN

JLVDS

1

1

2

3

3

4

5

5

6

7

7

8

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

21

21

22

23

23

24

25

25

26

27

27

28

29

29

30

31

31

32

33

33

34

35

35

36

37

37

38

39

39

40

GND41GND

ACES_88242-4001

CONN@

D D

R565 0_0402_5%

USB20_P428

USB20_N428

+3VS

C C

680P_0402_50V7K

1 2

R564 0_0402_5%

1 2

LVDS_BCLK+18
LVDS_BCLK-18

LVDS_B0+18

12

C269

LVDS_B0-18
LVDS_B1+18
LVDS_B1-18
LVDS_B2+18
LVDS_B2-18

USB20_N4_R

+5VALW

C266

0.1U_0402_16V4Z

+LCDVDD

1

1

C267

0.1U_0402_16V4Z

2

2

2N7002DW-7-F_SOT363-6

Limited Current < 1A
Avoid Panel display garbage after

power on.

change to 0805

12

R207

Q71A

470_0805_5%

61

ENAVDD20

2

R210

2.2K_0402_5%

@

L8 0_0805_5%

1 2

L9

1 2

FBMA-L11-201209-221LMA30T_0805

0308_Reserve L8 and
install L9.

+5VALW+LCDVDD

12

R208
1M_0402_5%

R209 100K_0402_5%

1 2

3

2N7002DW-7-F_SOT363-6

5

Q71B

4

12

INVPWR_B+B+

C264

4.7U_0805_10V4Z

SI2301BDS-T1-E3_SOT23-3

1

2

C268
1000P_0402_25V

Q7

1 3

D

+3VS+LCDVDD

S

G

C265

1

2

4.7U_0805_10V4Z

2

B B

USB Camera Power

1106 Add SB control pin

+5VALW

PJP5

@

PAD-OPEN 2x2m

10U_0805_10V4Z

A A

GPIO2028

PAD-OPEN 2x2m

2 1
1

C1288

2

@

R2073 0_0402_5%

1 2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+5VS

PJP4

R2072

0_0402_5%

2 1

1 2

U54

1

IN

OUT

2

GND

3

SHDN

BYP

G916-390T1UF_SOT23-5

5

4

SA000025F00

S IC G916T1UF SOT23 5P ADJUSTABLE
LDO

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

12

R891

53.6_0402_1%

12

R892

24.9_0402_1%

2

+USB_CAM

1

C952

4.7U_0805_10V4Z

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

LCD CONN.

LA-4082P Vader Discrete

1

of

17 58Wednesday, December 26, 2007

0.2

A

B

C

D

E

1

C1025

2

1

C1031

2

4.7U_0603_6.3V6K

E

+PCIE

+PCIE

1

C1026

2

22U_0805_6.3VAM

+PCIE

1

C1032

2

22U_0805_6.3VAM

0.2

of

18 58Wednesday, December 26, 2007

U71A

AM16
AR13

AJ17
AJ18

AR16
AR17

AL17
AM17

AP17
AN17

AM18
AM19

AN19
AP19

AL19
AK19

AR19
AR20

AL20
AM20

AP20
AN20

AM21
AM22

AN22
AP22

AL22
AK22

AR22
AR23

AL23
AM23

AP23
AN23

AM24
AM25

AN25
AP25

AL25
AK25

AR25
AR26

AL26
AM26

AP26
AN26

AM27
AM28

AN28
AP28

AL28
AK28

AR28
AR29

AK29
AL29

AP29
AN29

AM29
AM30

AN31
AP31

AM31
AM32

AR31
AR32

AN32
AP32

AR34
AP34

Issued Date

1/16 PCI_EXPR ESS

PEX_RST

PEX_CLKREQ

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT

PEX_REFCLK
PEX_REFCLK

PEX_TX0
PEX_TX0

PEX_RX0
PEX_RX0

PEX_TX1
PEX_TX1

PEX_RX1
PEX_RX1

PEX_TX2
PEX_TX2

PEX_RX2
PEX_RX2

PEX_TX3
PEX_TX3

PEX_RX3
PEX_RX3

PEX_TX4
PEX_TX4

PEX_RX4
PEX_RX4

PEX_TX5
PEX_TX5

PEX_RX5
PEX_RX5

PEX_TX6
PEX_TX6

PEX_RX6
PEX_RX6

PEX_TX7
PEX_TX7

PEX_RX7
PEX_RX7

PEX_TX8
PEX_TX8

PEX_RX8
PEX_RX8

PEX_TX9
PEX_TX9

PEX_RX9
PEX_RX9

PEX_TX10
PEX_TX10

PEX_RX10
PEX_RX10

PEX_TX11
PEX_TX11

PEX_RX11
PEX_RX11

PEX_TX12
PEX_TX12

PEX_RX12
PEX_RX12

PEX_TX13
PEX_TX13

PEX_RX13
PEX_RX13

PEX_TX14
PEX_TX14

PEX_RX14
PEX_RX14

PEX_TX15
PEX_TX15

PEX_RX15
PEX_RX15

2006/02/13 2006/03/10

D

500 mA

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

1600 mA

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

110 mA

VDD_SENSE
GND_SENSE

PEX_PLLVDD

100mA

PEX_TERMP

NB9P-GS_B GA 969~D

Compal Secret Data

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8

NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19

VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5

PEX_RFU1

PEX_RFU2

TESTMODE

Deciphered Date

AK16
AK17
AK21
AK24
AK27

AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24

AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16

A2
AB7
AD6
AF6
AG6
AJ5
AK15
AL7
D35
E35
E7
F7
H32
M7
P6
P7
R7
U7
V6

J10
J11
J12
J13
J9

AD20
AD19

AG14

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V7K

C1058

1

C1260

2

0.01U_0402_16V7K

1

2

1

2

1U_0603_10V4Z

AG19

AG20

R1043 2.49K_0402_1%

AG21

1 2

R949 10K_0402_5%

AP35

1 2

0.1U_0402_16V4Z

C1021

4700P_0402_16V7K

C1027

1

C1054

2

0.1U_0402_16V4Z

VDD_SENSE 52

1

C1057

2

0.1U_0402_16V4Z

1

C1022

2

1

C1028

2

+3VS

1

C1073

2

4700P_0402_16V7K

4700P_0402_16V7K

1

2

1

C1023

C1024

2

2

4.7U_0603_6.3V6K

1U_0603_10V4Z

1

1

C1029

C1030

2

2

C1055

1U_0603_10V4Z

L64

1 2

10NH_LQG 15HS10NJ 02D_5%_0402

1

C1071

4.7U_0603_6.3V6M

2

Compal Electronics, Inc.

Title

PEG & LVDS & DAC

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

1U_0603_10V4Z

1

LVDS & DAC Interface

U71I

7/16 IFPAB

+1.8VS

1 1

2 2

3 3

4 4

L61 BLM18PG181SN1D_0603

1 2

1

C1018

4.7U_0603_6.3V6K

2

+1.8VS

L62 BLM18PG181SN1D_0603

1 2

1

C1035

4.7U_0603_6.3V6K

2

L63 BLM18PG181SN1D_0603

1 2

+3VS

IFPAB_PLLVDD

AK9

IFPAB_PLLVDD

IFPAB_RSET

4700P_0402_25V7K

1U_0402_6.3V4Z

1

C1033

2

4.7U_0603_6.3V6K

1

C1020

2

220P_0402_50V7K

1

1

12

C1034

C1019

2

2

4700P_0402_25V7K

1

2

10K_0402_5%

C1037

220P_0402_50V7K

1

2

1U_0402_6.3V4Z

1

C1036

2

R945

1 2

@

R1044
1K_0402_1%

IFPAB_IOVDD

C1038

U71G

AG7
AK6
AH7

6/16 DACC

DACC_VDD

DACC_VREF

DACC_RSET

AJ11

AG9

AG10

DAC C

U71F

124_0402_1%

12

R1042

4/16 DACA

AJ12

DACA_VDD

AK12

DACA_VREF

AK13

DACA_RSET

DACA_VDD
DACA_VREF

4700P_0402_16V7K

4.7U_0603_6.3V6K

1

1

C1065

C1172

2

2

0.1U_0402_16V4Z

470P_0402_50V7K

1

1

C1067

C1066

2

2

DAC A

U71H

R948

1 2

10K_0402_5%

1009 disable TV function

A

5/16 DACB(TV)

AC6

DACB_VDD

AC5

DACB_VREF

AB6

DACB_RSET

IFPAB_RSET

IFPA_IOVDD

IFPB_IOVDD

150 mA

NB9P-GS_B GA 969~D

32 mA

145 mA

I2CB_SCL
I2CB_SDA

DACC_HSYNC
DACC_VSYNC

DACC_RED

DACC_GREEN

DACC_BLUE

NB9P-GS_B GA 969~D

I2CA_SCL
I2CA_SDA

DACA_HSYNC

DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

NB9P-GS_B GA 969~D

DAC B

DACB_CSYNC

DACB_RED

DACB_GREEN

DACB_BLUE

NB9P-GS_B GA 969~D

G3
G2

AM1
AM2

1009 change HDMI I2C channel for Nvidia suggestion
1105 nVIDIA suggetion, add R

AK4

1108 nVIDIA suggestion -- change HDMI DDC to I2CD

AL4
AJ4

G1
G4

AM13
AL13

AM15
AM14
AL14

150_0402_1%

150_0402_1%

12

R1590

1009 disable TV function

AB5

AA4
AB4
Y4

B

AM12

IFPA_TXC

AM11

IFPA_TXC

AL8

IFPA_TXD0

AM8

IFPA_TXD0

AM9

IFPA_TXD1

AM10

IFPA_TXD1

AL10

IFPA_TXD2

AK10

IFPA_TXD2

AL11

IFPA_TXD3

AK11

IFPA_TXD3

AN13

IFPB_TXC

AP13

IFPB_TXC

AP8

IFPB_TXD4

AN8

IFPB_TXD4

AN10

IFPB_TXD5

AP10

IFPB_TXD5

AR10

IFPB_TXD6

AR11

IFPB_TXD6

AP11

IFPB_TXD7

AN11

IFPB_TXD7

150_0402_1%

12

12

R1592

R1591

M_DDCCLK 16
M_DDCDATA 16

M_HSYNC 16
M_VSYNC 16

VGA_RED 16
VGA_GRN 16
VGA_BLU 16

LVDS_ACLK- 17
LVDS_ACLK+ 17

LVDS_A0- 17
LVDS_A0+ 17

LVDS_A1- 17
LVDS_A1+ 17

LVDS_A2- 17
LVDS_A2+ 17

LVDS_BCLK- 17
LVDS_BCLK+ 17

LVDS_B0- 17
LVDS_B0+ 17

LVDS_B1- 17
LVDS_B1+ 17

LVDS_B2- 17
LVDS_B2+ 17

CLK_PCIE_VGA15

CLK_PCIE_VGA#15

PEG Interface

PEG_RXP09
PEG_RXN09

PEG_M_TXP09
PEG_M_TXN09

PEG_RXP19
PEG_RXN19

PEG_M_TXP19
PEG_M_TXN19

PEG_RXP29
PEG_RXN29

PEG_M_TXP29
PEG_M_TXN29

PEG_RXP39

PEG_RXN39
PEG_M_TXP39

PEG_M_TXN39

PEG_RXP49
PEG_RXN49

PEG_M_TXP49
PEG_M_TXN49

PEG_RXP59
PEG_RXN59

PEG_M_TXP59
PEG_M_TXN59

PEG_RXP69
PEG_RXN69

PEG_M_TXP69
PEG_M_TXN69

PEG_RXP79
PEG_RXN79

PEG_M_TXP79
PEG_M_TXN79

PEG_RXP89
PEG_RXN89

PEG_M_TXP89
PEG_M_TXN89

PEG_RXP99
PEG_RXN99

PEG_M_TXP99
PEG_M_TXN99

PEG_RXP109
PEG_RXN109

PEG_M_TXP109
PEG_M_TXN109

PEG_RXP119
PEG_RXN119

PEG_M_TXP119
PEG_M_TXN119

PEG_RXP129
PEG_RXN129

PEG_M_TXP129
PEG_M_TXN129

PEG_RXP139
PEG_RXN139

PEG_M_TXP139
PEG_M_TXN139

PEG_RXP149
PEG_RXN149

PEG_M_TXP149
PEG_M_TXN149

PEG_RXP159
PEG_RXN159

PEG_M_TXP159
PEG_M_TXN159

C

C1039 0.1U_0402_16V4Z
C1040 0.1U_0402_16V4Z

C1041 0.1U_0402_16V4Z
C1042 0.1U_0402_16V4Z

C1043 0.1U_0402_16V4Z
C1044 0.1U_0402_16V4Z

C1045 0.1U_0402_16V4Z
C1046 0.1U_0402_16V4Z

C1047 0.1U_0402_16V4Z
C1048 0.1U_0402_16V4Z

C1049 0.1U_0402_16V4Z
C1050 0.1U_0402_16V4Z

C1051 0.1U_0402_16V4Z
C1052 0.1U_0402_16V4Z

C1053 0.1U_0402_16V4Z
C1056 0.1U_0402_16V4Z

C1059 0.1U_0402_16V4Z
C1060 0.1U_0402_16V4Z

C1061 0.1U_0402_16V4Z
C1062 0.1U_0402_16V4Z

C1063 0.1U_0402_16V4Z
C1064 0.1U_0402_16V4Z

C1068 0.1U_0402_16V4Z
C1069 0.1U_0402_16V4Z

C1070 0.1U_0402_16V4Z
C1072 0.1U_0402_16V4Z

C1074 0.1U_0402_16V4Z
C1075 0.1U_0402_16V4Z

C1076 0.1U_0402_16V4Z
C1077 0.1U_0402_16V4Z

C1078 0.1U_0402_16V4Z
C1079 0.1U_0402_16V4Z

PLT_RST#7,26,31,32,33,35

NB9M & NB9P-GS stuff

R944 200_0402_1%

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

PEG_C_RXP0
PEG_C_RXN0

PEG_C_RXP1
PEG_C_RXN1

PEG_C_RXP2
PEG_C_RXN2

PEG_C_RXP3
PEG_C_RXN3

PEG_C_RXP4
PEG_C_RXN4

PEG_C_RXP5
PEG_C_RXN5

PEG_C_RXP6
PEG_C_RXN6

PEG_C_RXP7
PEG_C_RXN7

PEG_C_RXP8
PEG_C_RXN8

PEG_C_RXP9
PEG_C_RXN9

PEG_C_RXP10
PEG_C_RXN10

PEG_C_RXP11
PEG_C_RXN11

PEG_C_RXP12
PEG_C_RXN12

PEG_C_RXP13
PEG_C_RXN13

PEG_C_RXP14
PEG_C_RXN14

PEG_C_RXP15
PEG_C_RXN15

Security Classification

THIS SHEET OF ENGIN EERING DR AWING IS TH E PROPRIETARY PR OPERTY OF CO MPAL ELECTRO NICS, IN C. AND C ONTAINS CO NFIDENTI AL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF TH E COMPETENT DI VISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI CS, INC . NEITHER THIS SHEET NO R THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITH OUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRON ICS, INC .

5

U71P

15/16 GND

AA11

GND

AA12

GND

AA13

GND

AA14

GND

AA15

GND

AA16

GND

AA17

GND

AA18

GND

AA19

GND

AA2

GND

AA20

GND

AA21

GND

AA22

GND

AA23

GND

AA24

GND

AA25

+PCIE

GND

AA34

GND

AA5

GND

AB12

GND

AB14

GND

AB16

GND

AB18

GND

AB20

GND

AB22

GND

AB24

GND

AC9

GND

AD11

GND

AD13

GND

AD15

GND

AD17

GND

AD2

GND

AD21

GND

AD23

GND

AD25

GND

AD31

GND

AD34

GND

AD5

GND

AE11

GND

AE12

GND

AE13

GND

AE14

GND

AE15

GND

AE16

GND

AE17

GND

AE18

GND

AE19

GND

AE20

GND

AE21

GND

AE22

GND

AE23

GND

AE24

GND

AE25

GND

AG2

GND

AG31

GND

AG34

GND

AG5

GND

AK2

GND

AK31

GND

AK34

GND

AK5

GND

AL12

GND

AL15

GND

AL18

GND

AL21

GND

AL24

GND

AL27

GND

AL30

GND

AL6

GND

AL9

GND

AN2

GND

AN34

GND

AP12

GND

AP15

GND

AP18

GND

AP21

GND

AP24

GND

AP27

GND

AP3

GND

AP30

GND

AP33

GND

AP6

GND

AP9

GND

B12

GND

B15

GND

B21

GND

B24

GND

B27

GND

B3

GND

B30

GND

B33

GND

B6

GND

B9

GND

C2

GND

C34

GND

E12

GND

NB9P-GS_B GA 969~D

L66

1 2

BLM18PG181SN1D_0603

D D

C C

B B

1U_0402_6.3V4Z

A A

1U_0402_6.3V4Z

1

C1261

2

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

1

C1085

2

1U_0402_6.3V4Z

5

E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13

1109 nVIDIA suggestion -- R387,R388,R415,R422,R427 -- install

N14

Change R415 to 10 ohm

N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25

+IFPC_PLLVDD is 3.3V for NB9P-GE, but it is 1.1V for NB9P-GS/GE2 and NB9M-GS-B

V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25

0.1U_0402_16V4Z

1

1

C1086

C1087

2

2

27M_SSC15

10K_0402_5%

@

HDA_VGA_BITCLK27
HDA_VGA_RST#27
HDA_SDIN227
HDA_VGA_SDOUT27
HDA_VGA_SYNC27

GPU_PLLVDD

1

C1088

0.1U_0402_16V4Z

2

12

XTALIN XTALOUT

R968

@

@

1

C1090
18P_0402_50V8J

2

R611

@

C823

1 2

15P_0402_50V8J

1 2

33_0402_5%

R387 0_0402_5%

1 2

R388 0_0402_5%

1 2

R415 10_0402_5%

1 2

R422 0_0402_5%

1 2

R427 0_0402_5%

1 2

U61

1

A0

2

A1

3

A2

4

GND

AT24C02N- 10SU-2.7_SO8

1106 Delete R98,R1006,Q8,Q73

U71E

14/16 XTAL_PLL

AE9

PLLVDD

AD9

VID_PLLVDD

36 mA

AF9

SP_PLLVDD

D2

XTALSSIN

B1

XTALIN

27M_CLK15

HDCP
ROM

R970

4

U71D

13/16 MISC2

J26

RFU

J25

RFU

VCC

WP
SCL
SDA

HDA_BITCLK_VGA
HDA_RST#_VGA
HDA_SDIN_VGA
HDA_SDOUT_VGA
HDA_SYNC_VGA

1 2
1 2

8
7
6
5

R954 40.2K_0402_1%

R955 40.2K_0402_1%

+3VS

1

C1084

0.1U_0402_16V4Z

2

HDCP_WP
HDCP_SCL
HDCP_SDA

D7
D6
C7
B7
A7

N9
M9

HDA_BCLK
HDA_RST
HDA_SDI
HDA_SDO
HDA_SYNC

STRAP_REF_3V3

STRAP_REF_MIOB

NB9P-GS_B GA 969~D

HDCP_WP

+3VS

12

R957

2.2K_0402_5%

1109 Delete R99, Change +IFPC_PLLVDD to +PCIE

D1

1 2

XTALOUTBUFF

B2

XTALOUT

NB9P-GS_BGA_969PNB9P-GS_ BGA 969~D

XTALIN

0_0402_5%

12

@

R972
10K_0402_5%

4

12

@

1

C1089
18P_0402_50V8J

2

R969
10K_0402_5%

ROM_CS

ROM_SI
ROM_SO

ROM_SCLK

I2CH_SCL

I2CH_SDA

BUFRST

PGOOD_OUT

RFU_GND
RFU_GND

SPDIF

+1.8VS

+PCIE

ROM_CS#

C3

ROM_SI

D3

ROM_SO

C4

ROM_SCLK

D4

R951

F6
G6

R953

A5
A4

C5

AK14
K9

HDCP_SCL

L67

1 2

BLM18PG181SN1D_0603

1

C1091

4.7U_0603_6.3V6K

2

L87

1 2

BLM18PG181SN1D_0603

1

C1258

4.7U_0603_6.3V6K

2

3

+3VS

12

R950
10K_0402_5%

ROM_SI 20
ROM_SO 20
ROM_SCLK 20

10K_0402_5%

1 2

HDCP_SCL
HDCP_SDA

1 2

10K_0402_5%

+3VS

+3VS

BAV99-7-F_SOT23-3

1112 C1083,D48 no stuff

+3VS

1

D48

@

2

3

12

@

R978

24.3K_0402_1%

C1083

@

12

R979

@

3.4K_0402_1%

1 2

+3VS

1212 HDCP ROM -- R951 pull up,R959 no install

12

@

R959
10K_0402_5%

1

C1093

2

1U_0402_6.3V4Z

4700P_0402_25V7K

1

1

C1094

2

2

4700P_0402_16V7K

C1095

1U_0402_6.3V4Z

1

C1092

2

470P

1U_0402_6.3V4Z

1

C1259

2

1

C1257

2

1U_0402_6.3V4Z

4700P_0402_25V7K

1

1

C1256

2

2

4700P_0402_16V7K

C1255

470P

3

0.01U_0402_25V7K

IFPCD_PLLVDD
IFPC_RSET

12

R971
1K_0402_1%

IFPC_PLLVD D

R973

10K_0402_5%

2

R952

10K_0402_5%

SPDIF_OUT 34

R956

10K_0402_5%

U71J

8/16 IFPCD

AJ9

IFPCD_PLLVDD

IFPCD_RSET

IFPC_IOVDD

IFPD_IOVDD

32 mA

AK7

AJ8

AK8

12

NB9P-GS_B GA 969~D

Security Classification

Issued Date

THIS SHEET OF ENGIN EERING DR AWING IS TH E PROPRIETARY PR OPERTY OF CO MPAL ELECTRO NICS, IN C. AND C ONTAINS CO NFIDENTI AL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF TH E COMPETENT DI VISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI CS, INC . NEITHER THIS SHEET NO R THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITH OUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRON ICS, INC .

IFPC

AN3

AUX

DPL3_TXC
DPL3_TXC

DPL2_TXD0
DPL2_TXD0

DPL1_TXD1
DPL1_TXD1

DPL0_TXD2
DPL0_TXD2

AP2

AUX

AR2
AP1

AM4
AM3

AM5
AL5

AM6
AM7

HDMI_C_CLK­HDMI_C_CLK+

HDMI_C_TX0­HDMI_C_TX0+

HDMI_C_TX1­HDMI_C_TX1+

HDMI_C_TX2­HDMI_C_TX2+

NB9M-GE & NB9P-GS --> 0.1uF

IFPD

NB9M-GE & NB9 P-GS-->Pull down 500 ohm resistor and 2N7002

HDMI_CLK-

AN4

AUX
AUX

DPL3_TXC
DPL3_TXC

DPL2_TXD0
DPL2_TXD0

DPL1_TXD1
DPL1_TXD1

DPL0_TXD2
DPL0_TXD2

2

Compal Secret Data

Deciphered Date

2006/02/13 2006/03/10

HDMI_CLK+

AP4

HDMI_TX0­HDMI_TX0+

AR4
AR5

HDMI_TX1­HDMI_TX1+

AP5
AN5

HDMI_TX2­HDMI_TX2+

AN7
AP7

AR7
AR8

U71K

9/16 IFPEF

AJ6

12

12

10K_0402_5%

IFPEF_PLLVDD

AL1

IFPEF_RSET

AE7

IFPE_IOVDD

AD7

IFPF_IOVDD

12

R958

NB9P-GS_B GA 969~D

C1335 0.1U_0402_16V4Z

1 2

C1336 0.1U_0402_16V4Z

1 2

C1337 0.1U_0402_16V4Z

1 2

C1338 0.1U_0402_16V4Z

1 2

C1339 0.1U_0402_16V4Z

1 2

C1340 0.1U_0402_16V4Z

1 2

C1341 0.1U_0402_16V4Z

1 2

C1342 0.1U_0402_16V4Z

1 2

R967 499_0402_1%

1 2

R966 499_0402_1%

1 2

R965 499_0402_1%

1 2

R964 499_0402_1%

1 2

R963 499_0402_1%

1 2

R962 499_0402_1%

1 2

R961 499_0402_1%

1 2

R960 499_0402_1%

1 2

1

IFPE

AD4

AUX

AE4

AUX

AE5

DPL3_TXC

AE6

DPL3_TXC

AF5

DPL2_TXD0

AF4

DPL2_TXD0

AG4

DPL1_TXD1

AH4

DPL1_TXD1

AH5

DPL0_TXD2

AH6

DPL0_TXD2

IFPF

AF2

AUX

AF3

AUX

AH3

DPL3_TXC

AH2

DPL3_TXC

AH1

DPL2_TXD0

AJ1

DPL2_TXD0

AJ2

DPL1_TXD1

AJ3

DPL1_TXD1

AL3

DPL0_TXD2

AL2

DPL0_TXD2

HDMI_CLK- 44
HDMI_CLK+ 44

HDMI_TX0- 44
HDMI_TX0+ 44

HDMI_TX1- 44
HDMI_TX1+ 44

HDMI_TX2- 44
HDMI_TX2+ 44

13

D

Q74

2N7002_SOT23-3

Title

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

2

+3VS

G

S

Compal Electronics, Inc.

Straps & HDMI

1

19 58Wednesday, December 26, 2007

of

0.2

A

GPIO I/O ACTIVE USAGE

VGA Core power

GPIO0
GPIO1
GPIO2

+NVVDD +NVVDD

U71O

16/16 NVVDD

AB11

VDD

AB13

VDD

AB15

VDD

AB17

VDD

AB19

VDD

AB21

VDD

AB23

VDD

AB25

VDD

AC11

VDD

AC12

VDD

AC13

VDD

AC14

VDD

AC15

VDD

AC16

VDD

AC17

VDD

AC18

VDD

AC19

VDD

AC20

VDD

AC21

VDD

AC22

VDD

AC23

VDD

AC24

VDD

AC25

VDD

AD12

VDD

AD14

VDD

AD16

VDD

AD18

VDD

AD22

VDD

AD24

VDD

L11

VDD

L12

VDD

L13

VDD

L14

VDD

L15

VDD

L16

VDD

L17

VDD

L18

VDD

L19

VDD

L20

VDD

L21

VDD

L22

VDD

L23

VDD

L24

VDD

L25

VDD

M12

VDD

M14

VDD

M16

VDD

M18

VDD

M20

VDD

M22

VDD

M24

VDD

P11

VDD

P13

VDD

P15

VDD

P17

VDD

P19

VDD

NB9P-GS_B GA 969~D

1 1

P21

VDD

P23

VDD

P25

VDD

R11

VDD

R12

VDD

R13

VDD

R14

VDD

R15

VDD

R16

VDD

R17

VDD

R18

VDD

R19

VDD

R20

VDD

R21

VDD

R22

VDD

R23

VDD

R24

VDD

R25

VDD

T12

VDD

T14

VDD

T16

VDD

T18

VDD

T20

VDD

T22

VDD

T24

VDD

V11

VDD

V13

VDD

V15

VDD

V17

VDD

V19

VDD

V21

VDD

V23

VDD

V25

VDD

W11

VDD

W12

VDD

W13

VDD

W14

VDD

W15

VDD

W16

VDD

W17

VDD

W18

VDD

W19

VDD

W20

VDD

W21

VDD

W22

VDD

W23

VDD

W24

VDD

W25

VDD

Y12

VDD

Y14

VDD

Y16

VDD

Y18

VDD

Y20

VDD

Y22

VDD

Y24

VDD

0.1U_0402_16V7K

C1098

0.1U_0402_16V7K

C1104

4700P_0402_25V7K

C1110

4700P_0402_25V7K

C1117

C1099

0.1U_0402_16V7K

C1105

0.1U_0402_16V7K

C1111

4700P_0402_25V7K

C1118

4700P_0402_25V7K

0.1U_0402_16V7K

C1100

0.1U_0402_16V7K

C1106

4700P_0402_25V7K

C1112

4700P_0402_25V7K

C1119

C1101

0.1U_0402_16V7K

C1107

0.1U_0402_16V7K

C1113

4700P_0402_25V7K

C1120

4700P_0402_25V7K

Close to VGA

0.1U_0402_16V7K

C1102

0.1U_0402_16V7K

C1108

4700P_0402_25V7K

C1114

4700P_0402_25V7K

C1116

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

+NVVDD

C1103

C1109

C1115

GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14

MULTI LEVEL STRAPS For NB9M-Gx (64bit)

NB9P-GS and NB9P-GE2 is as same as NB9M-GE-B

STRAP0
STRAP1
STRAP2
ROM_SI

ROM_SI19

ROM_SO

ROM_SO19

ROM_SCLK

ROM_SCLK19

@

R981 5.1K_0402_5%

1 2

R984 10K_0402_5%

1 2

@

R986 5.1K_0402_5%

1 2

R988 45.3K_0402_1%

1 2

@

R990 5.1K_0402_5%

1 2

R992 15K_0402_5%

1 2

R982 45.3K_0402_5%

1 2

@

R985 5.1K_0402_5%

1 2

R987 5.1K_0402_5%

1 2

@

R989 5.1K_0402_5%

1 2

R991 5.1K_0402_5%

1 2

@

R993 5.1K_0402_5%

1 2

+3VS

NB9P-GS NB9M-GE/NB9P-GE2

STRAP0

pull up 45K

STRAP1

pull down 10K

STRAP2

pull up 10K

ROM_SO

pull up 5K

ROM_CLK

pull down 15K

Samsung 16Mx16
Hynix 16Mx16

Samsung 32Mx16
Hynix 32Mx16
Qimonda 32Mx16

ROM_SI
pull down 10K
pull down 20K

pull down 30K
pull down 45K
pull down 35K

pull up 45K

pull down 10K

pull up 5K

pull up 5K

pull down 15K

R988

STRAP2 -- R987

IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT

N/A
N/A
H
H
H
N/A
N/A
N/A
L
L
N/A
N/A
N/A
L
H

Primary DVI Hot -plug
2nd DVI Hot-plug
Panel Back-Light PWM
Panel Power Enable
Panel Back-Light Enable
NVVDD VID0
NVVDD VID1
FBVDD VID0
Thermal Alert
FAN PWM
FBVref Select
SLI SYNCO
AC Detect
PS Control or HDMI_CEC
PS Control

1107 Swap THERMDN and THERMDP

U71N

B4

B5

AP14
AR14
AN14
AN16
AP16

MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC

MIOB_CLKOUT
MIOB_CLKOUT

MIOB_CLKIN

NB9P-GS_B GA 969~D

12/16 MISC1

THERMDN

THERMDP

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST

MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8

MIOBD9
MIOBD10
MIOBD11
MIOBD12
MIOBD13
MIOBD14
MIOBD15
MIOBD16
MIOBD17

MIOB_DE

Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
W5
W7
V7

W3
W1
W2
Y5

V4
W4
AE1

SWAP_RDY_A/GPIO22

NB9P-GS_B GA 969~D

MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD11

STRAP0
STRAP1
STRAP2

MIOB_CTL3
MIOB_HSYNC

12

VGA_THERMDC

VGA_THERMDA

JTAG_TCK

T79

JTAG_TMS

T80

JTAG_TDI

T81

JTAG_TDO

T82

JTAG_TRST

T83

U71L

11/16 MIOB

AA9
AB9

W9

Y9

AA7
AA6

AF1

MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ

MIOBCAL_PD_VDDQ

MIOBCAL_PU_GND

MIOB_VREF

+3VS +3VS

I2CS_SCL

I2CS_SDA

I2CC_SCL
I2CC_SDA
I2CD_SCL
I2CD_SDA

I2CE_SCL

I2CE_SDA

STEREO/GPIO23

R1029
10K_0402_5%

GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

E2
E1

E3
E4
F4
G5
D5
E5

K1

GPIO0

K2

GPIO1

K3

GPIO2

H3

GPIO3

H2

GPIO4

H1

GPIO5

H4

GPIO6

H5

GPIO7

H6

GPIO8

J7

GPIO9

K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6

T87
T85
T86
T84
T88
T93

T89
T90
T92
T108

T109
T110

T105

1102 R2046,R2047 no stuff

+3VS

12

12

@

@

R2047

R2046

2.2K_0402_5%

2.2K_0402_5%

I2CA_SDA
I2CA_SCL

DDC2_CLK
DDC2_DATA

HDMI_DETECT
ENVDD

ENABLT
GPU_VID0
GPU_VID1

THERM#_VGA_R
SNN_GPIO9

ENABLT

R994 0_0402_5%

1 2
1 2

R995 0_0402_5%

1 2

R976 0_0402_5%
R977 0_0402_5%

1 2

R2066 2.2K_0402_5%

R2065 2.2K_0402_5%

THERM_SCI#
VGA_THERM_SCI#

R1016
10K_0402_5%

U71M

10/16 MIOA

P9

MIOA_VDDQ

R9

MIOA_VDDQ

T9

MIOA_VDDQ

U9

MIOA_VDDQ

U5

MIOACAL_PD_VDDQ

T5

MIOACAL_PU_GND

N5

MIOA_VREF

12

12
12

SMB_EC_CK2 4,40
SMB_EC_DA2 4,40

DDC2_CLK 17

DDC2_DATA 17

HDMICLK_VGA 44

HDMIDAT_VGA 44

+3VS

1109 nVIDIA suggestion -- change HDMI DDC to I2CD

HDMI_DETECT 44

ENAVDD 17
ENABLT 40
GPU_VID0 52
GPU_VID1 52

THERM_SCI# 28,40

NB9P-GS_B GA 969~D

MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8

MIOAD9
MIOAD10
MIOAD11
MIOAD12
MIOAD13
MIOAD14

MIOA_CTL3

MIOA_HSYNC

MIOA_VSYNC

MIOA_DE

MIOA_CLKOUT
MIOA_CLKOUT

MIOA_CLKIN

Thermal
LVDS
HDMI

MIOAD0

N1

MIOAD1

P4

MIOAD2

P1

MIOAD3

P2

MIOAD4

P3

MIOAD5

T3

MIOAD6

T2

MIOAD7

T1

MIOAD8

U4

MIOAD9

U1
U2
U3
R6
T6
N6

P5

MIOA_HSYNC

N3
L3

MIOA_DEMIOB_DE

N2

R4
T4
N4

12

R983
10K_0402_5%

T98
T96
T94
T95
T97
T103
T101T91
T99
T100
T102

T111

T104

VGA Therma l Sensor ADM1032ARMZ

Closed to VGA

@

2200P_0402_50V7K
R975

@

1 2

+3VS

10K_0402_5%

0.1U_0402_16V4Z

C1097

1 2

@

C1096

VGA_THERMDA
VGA_THERMDC
THERM#_VGA

2

1

+3VS

@

U62

1
2
3

ADM1032ARMZ REEL_MSOP8

VDD
D+

SDATA

ALERT#

D­THERM#4GND

SCLK

8
7
6
5

+3VS

@

R974
10K_0402_5%

1 2

VGA_SM_CLK
VGA_SM_DA
VGA_THERM_SCI#

@

R1032 0_0402_5%

12

@

R980 0_0402_5%

1 2

SMB_EC_CK2
SMB_EC_DA2

Security Classification

Issued Date

THIS SHEET OF ENGIN EERING DR AWING IS TH E PROPRIETARY PR OPERTY OF CO MPAL ELECTRO NICS, IN C. AND C ONTAINS CO NFIDENTI AL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CU STODY OF TH E COMPETENT DI VISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI CS, INC . NEITHER THIS SHEET NO R THE INF ORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITH OUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRON ICS, INC .

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

GPIO & GND

Size D ocument Number Re v

Custom

LA-4082P Vader Discrete

Date: Sheet

of

20 58Wednesday, December 26, 2007

0.2

A

VRAM Interface

DATA Bus

Address

0..31

32..63

A3

CMD0
CMD1

A0
A2
A1

CS#
WE#
BA0
CKE
ODT

A12
RAS#
A11
A10
BA1
A8
A9
A6
A5

A4
CAS#
A13
BA2

A0

A1
A3
A4
A5

CS#CMD8
WE#
BA0
CKE
ODT
A2
A12
RAS#
A11
A10
BA1
A8
A9
A6

A7

CAS#
A13
BA2

A

CMD2
CMD3
CMD4
CMD5
CMD6
CMD7

CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23 A7
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

R1027 10K_0402_5%

1 2

R1028 10K_0402_5%

1 2

MDA[63..0]22,23

1 1

DQMA[7..0]22,23

QSA[3..0]22

QSA[7..4]23

QSA#[3..0]22

QSA#[7..4]23

+1.8VS

12

@

R999

Rt

1K_0402_1%

12

@

R1002

Rb

1K_0402_1%

VREF = 0.5 * FBVDDQ
DDR2: 1.0V = 2.0V * 1K/(1K + 1K)
FBVREF = FBVDDQ * Rb/(Rt + Rb)

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

DQMA0
DQMA1

DQMA3
DQMA4
DQMA5
DQMA6

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1

QSA#4
QSA#5
QSA#6
QSA#7

DQMA2

DQMA7

QSA#2
QSA#3

R30
R32
P31
N30

L31
M32
M30

L30

P33

P34

N35

P35

N34

L33

L32

N33

K31

K30
G30

K32
G32

H30

F30
G31

H33

K35

K33
G34

K34

E33

E34
G33

AG30
AH31
AG32
AF31
AF30
AD30
AC32
AE30
AE32
AF33
AF34
AE35
AE33
AE34
AC35
AB32
AN33
AK32
AL33
AM33
AL31
AK30
AJ30
AH30
AM35
AH33
AH35
AH32
AH34
AM34
AL35
AJ33

P30

P32

J30

H34

AF32
AF35
AL32
AL34

N31

L34

J32

H35

AE31
AC33
AJ32
AJ34

N32

L35

H31
G35

AD32
AC34
AJ31
AJ35

P29

R29

L29

M29

AD29
AE29
AG29
AH29

J27

@

1

C1158

0.1U_0402_16V4Z

2

U71B

2/16 FBA

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU

FB_VREF

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

FBA_DEBUG

FB_DLLAVDD
FB_PLLAVDD

NB9P-GS_B GA 969~D

J23
J24
J29
AA27
AA29
AA31
AB27
AB29

0.022U_0402_16V7K

AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14

4700P_0402_25V7K

J15
J16
J17
J20
J21
J22

4700P_0402_25V7K

V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29

T32
T31
AC31
AC30

R997

T30

AG27
AF27

0.01U_0402_25V7K

1

2

1

2

1

2

CMDA0
CMDA1
CMDA2
CMDA3
CMDA4
CMDA5
CMDA6

CMDA8
CMDA9
CMDA10
CMDA11
CMDA12
CMDA13
CMDA14
CMDA15
CMDA16
CMDA17
CMDA18
CMDA19
CMDA20
CMDA21
CMDA22
CMDA23
CMDA24
CMDA25

CLKA0
CLKA0#
CLKA1
CLKA1#

1 2

1

C1155

2

0.022U_0402_16V7K

C1132

4700P_0402_25V7K

C1142

4700P_0402_25V7K

C1148

60.4_0402_1%

1U_0402_6.3V4Z

1

C1156

2

1

C1133

2

0.022U_0402_16V7K

1

C1143

2

4700P_0402_25V7K

1

C1128

2

0.1U_0402_16V4Z

CMDA0 22
CMDA1 22,23
CMDA2 22
CMDA3 22,23
CMDA4 23
CMDA5 23
CMDA6 23

CMDA8 22,23
CMDA9 22,23
CMDA10 22,23
CMDA11 22,23
CMDA12 22,23
CMDA13 23
CMDA14 22,23
CMDA15 22,23
CMDA16 22,23
CMDA17 22,23
CMDA18 22,23
CMDA19 22,23
CMDA20 22,23
CMDA21 22,23
CMDA22 22
CMDA23 22,23
CMDA24 22
CMDA25 22,23

CLKA0 22
CLKA0# 22
CLKA1 23
CLKA1# 23

0.1U_0402_16V4Z

1

C1126

2

0.022U_0402_16V7K

1

C1144

2

1U_0402_6.3V4Z

1

C1149

2

+1.8VS

L69

1 2

BLM18PG181SN1D_0603

1

C1157

4.7U_0603_6.3V6K

2

1

C1134

2

1

C1145

2

1

C1150

2

1

C1135

2

4.7U_0603_6.3V6K

1

C1146

2

0.1U_0402_16V4Z

1

C1151

2

1U_0402_6.3V4Z

+PCIE

+1.8VS

4.7U_0603_6.3V6K

1

C1136

2

0.1U_0402_16V4Z

1

C1147

2

0.022U_0402_16V7K

1

C1129

2

ODT

CMDA12

CKE

CMDA11

MDB[63..0]24,25

DQMB[7..0]24,25

QSB[3..0]24

QSB[7..4]25

QSB#[3..0]24

QSB#[7..4]25

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

DQMB0
DQMB1
DQMB2
DQMB3
DQMB4
DQMB5
DQMB6
DQMB7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

Security Classification

Issued Date

THIS SHEET OF ENGIN EERING DR AWING IS TH E PROPRIETARY PR OPERTY OF CO MPAL ELECTRO NICS, IN C. AND C ONTAINS CO NFIDENTI AL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CU STODY OF TH E COMPETENT DI VISION O F R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONI CS, INC . NEITHER THIS SHEET NO R THE INF ORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIR D PARTY WITH OUT PRIOR WRITTEN CO NSENT OF COMPAL ELECTRON ICS, INC .

U71C

3/16 FBC

D11

FBC_D0

E11

FBC_D1

F10

FBC_D2

D8

FBC_D3

F8

FBC_D4

F9

FBC_D5

E8

FBC_D6

F12

FBC_D7

B11

FBC_D8

C13

FBC_D9

A11

FBC_D10

B8

FBC_D11

A8

FBC_D12

C8

FBC_D13

C11

FBC_D14

C10

FBC_D15

D12

FBC_D16

E13

FBC_D17

F17

FBC_D18

F15

FBC_D19

F16

FBC_D20

E16

FBC_D21

F14

FBC_D22

F13

FBC_D23

D13

FBC_D24

A13

FBC_D25

B13

FBC_D26

A14

FBC_D27

C16

FBC_D28

A17

FBC_D29

B16

FBC_D30

D16

FBC_D31

D24

FBC_D32

D26

FBC_D33

E25

FBC_D34

F25

FBC_D35

F27

FBC_D36

E28

FBC_D37

F28

FBC_D38

D29

FBC_D39

A25

FBC_D40

B25

FBC_D41

D25

FBC_D42

C26

FBC_D43

C28

FBC_D44

B28

FBC_D45

A28

FBC_D46

A29

FBC_D47

E29

FBC_D48

F29

FBC_D49

D30

FBC_D50

E31

FBC_D51

C33

FBC_D52

D33

FBC_D53

F32

FBC_D54

E32

FBC_D55

B29

FBC_D56

C29

FBC_D57

B31

FBC_D58

C31

FBC_D59

B32

FBC_D60

C32

FBC_D61

B34

FBC_D62

B35

FBC_D63

F11

FBC_DQM0

D10

FBC_DQM1

D15

FBC_DQM2

A16

FBC_DQM3

D27

FBC_DQM4

D28

FBC_DQM5

D34

FBC_DQM6

A34

FBC_DQM7

E10

FBC_DQS_WP0

A10

FBC_DQS_WP1

D14

FBC_DQS_WP2

C14

FBC_DQS_WP3

E26

FBC_DQS_WP4

B26

FBC_DQS_WP5

D32

FBC_DQS_WP6

A32

FBC_DQS_WP7

D9

FBC_DQS_RN0

B10

FBC_DQS_RN1

E14

FBC_DQS_RN2

B14

FBC_DQS_RN3

F26

FBC_DQS_RN4

A26

FBC_DQS_RN5

D31

FBC_DQS_RN6

A31

FBC_DQS_RN7

G11

RFU

G12

RFU

G14

RFU

G15

RFU

G24

RFU

G25

RFU

G27

RFU

G28

RFU

0.057 Amps

NB9P-GS_B GA 969~D

2006/02/13 2006/03/10

FBCAL_TERM_GND

Compal Secret Data

Deciphered Date

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30

FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1

FBC_DEBUG

FBAC_DLLAVDD
FBAC_PLLAVDD

FBCAL_PD_VDDQ

FBCAL_PU_GND

N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27

C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
F24
C25
E22
C20
B22
A19
D22
D20
E19
D19
F18
C19
F22
C23
B20
A20

E17
D17
D23
E23

G19

J19
J18

K27
L27
M27

0.022U_0402_16V7K

1

1

C1122

C1130

2

2

0.022U_0402_16V7K

4700P_0402_25V7K

1

1

C1137

C1138

2

2

4700P_0402_25V7K

CKE

CMDB11

ODT

R996

0.01U_0402_25V7K

1

2

R998 30_0402_1%
R1000 30_0402_1%
R1001 40.2_0402_1%

@

R1025 10K_0402_5%

CMDB12

R1026 10K_0402_5%

CMDB0
CMDB1
CMDB2
CMDB3
CMDB4
CMDB5
CMDB6

CMDB8
CMDB9

CMDB10
CMDB11
CMDB12
CMDB13
CMDB14
CMDB15
CMDB16
CMDB17
CMDB18
CMDB19
CMDB20
CMDB21
CMDB22
CMDB23
CMDB24
CMDB25

CLKB0

CLKB0#

CLKB1

CLKB1#

1 2

60.4_0402_1%

1

C1152

C1153

2

1U_0402_6.3V4Z

4.7U_0603_6.3V6K

1 2
1 2
1 2

for NB9P-GE, the R998/R1000 are 40 ohm
For NB9M-GS-B are 30.1 ohm.

0.1U_0402_16V4Z

1

1

C1131

C1123

2

2

0.022U_0402_16V7K

0.022U_0402_16V7K

1

1

C1139

C1127

2

2

4700P_0402_25V7K

1 2
1 2

CMDB0 24
CMDB1 24,25
CMDB2 24
CMDB3 24,25
CMDB4 25
CMDB5 25
CMDB6 25

CMDB8 24,25
CMDB9 24,25
CMDB10 24,25
CMDB11 24,25
CMDB12 24,25
CMDB13 25
CMDB14 24,25
CMDB15 24,25
CMDB16 24,25
CMDB17 24,25
CMDB18 24,25
CMDB19 24,25
CMDB20 24,25
CMDB21 24,25
CMDB22 24
CMDB23 24,25
CMDB24 24
CMDB25 24,25

CLKB0 24
CLKB0# 24
CLKB1 25
CLKB1# 25

+1.8VS

L68

BLM18PG181SN1D_0603

1

C1154

2

+1.8VS

Title

Size D ocument Number Re v

Custom

LA-4082P Vader Discrete

Date: Sheet

+1.8VS

4.7U_0603_6.3V6K

1

1

C1125

C1124

2

2

4.7U_0603_6.3V6K

0.1U_0402_16V4Z

1

1

C1141

C1140

2

2

0.1U_0402_16V4Z

+PCIE

12

Compal Electronics, Inc.

VRAM Interface

21 58Wednesday, December 26, 2007

of

0.2

5

4

3

2

1

DATA Bus

Address

VRAM DDR2 chips (256MB & 512MB)

32Mx16 DDR2 400MHz *8==>512MB
32Mx16 DDR2 400MHz *4==>256MB

D D

QSA[7..0]21,23
QSA#[7..0]21,23

DQMA[7..0]21,23

MDA[63..0]21,23

QSA[7..0]
QSA#[7..0]
DQMA[7..0]
MDA[63..0]

0..31
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7

CMD9
CMD10

CLKA0

CLKA0#

CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23 A7
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

12

R1005
475_0402_1%

CMDA1021,23
CMDA1821,23

CMDA1421,23
CMDA1621,23
CMDA1721,23
CMDA2021,23
CMDA1921,23
CMDA2321,23
CMDA2121,23
CMDA2221
CMDA2421
CMDA021
CMDA221
CMDA321,23

1K_0402_1%

R1004

CMDA121,23

CMDA1121,23

CMDA821,23
CMDA921,23
CMDA1521,23
CMDA2521,23

CMDA1221,23

+1.8VS

12

R1003

12

1

2

C C

B B

1K_0402_1%

CMDA10
CMDA18

CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA22
CMDA24
CMDA0
CMDA2
CMDA3
CMDA1

CLKA0#
CLKA0

CMDA11

CMDA8
CMDA9
CMDA15
CMDA25
DQMA2

DQMA0

CMDA12

QSA2 QSA1
QSA#2 QSA#1

QSA0
QSA#0

C1163

0.1U_0402_16V4Z

U63

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

MDA7

B9

MDA0

B1

MDA5

D9

MDA2

D1

MDA3

D3

MDA4

D7

MDA1

C2

MDA6

C8

MDA23

F9

MDA18

F1

MDA20

H9

MDA16

H1

MDA17

H3

MDA21

H7

MDA19

G2

MDA22

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

1

2

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS +1.8VS

L76

12

FBMA-L10-160808-300LMT

1

C1161

0.1U_0402_16V4Z

C1162

4.7U_0805_6.3V6K

2

CMDA10
CMDA18

CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA22
CMDA24
CMDA0
CMDA2
CMDA3
CMDA1

CLKA0#
CLKA0

CMDA11

CMDA8
CMDA9
CMDA15
CMDA25
DQMA1

DQMA3

CMDA12

QSA3
QSA#3

+MEM_VREFA0+MEM_VREFA0

Vref= 0.5* 1.8V for NB9M, R1004=1K ohm
Vref= 0.5* 1.8V for NB9P-GS/GE 2, R1004=1K ohm

+1.8VS +1.8VS

1000P_0402_50V7K

1

C1173

2

A A

DDR2 BGA MEMORY DDR BGA MEMORY

0.01U_0402_16V7K

1

1

C1175

C1174

2

2

0.01U_0402_16V7K

4.7U_0805_6.3V6K

1

1

C1176

2

2

0.1U_0402_16V4Z

C1177

0.1U_0402_16V4Z

1

1

C1178

2

2

0.1U_0402_16V4Z

C1179

1

C1180

2

0.01U_0402_16V7K

1000P_0402_50V7K

1

C1164

2

U64

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

0.01U_0402_16V7K

1

1

C1166

C1165

2

2

0.01U_0402_16V7K

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

4.7U_0805_6.3V6K

1

1

C1167

2

2

0.1U_0402_16V4Z

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

C1168

MDA27
MDA28
MDA24
MDA31
MDA30
MDA25
MDA29
MDA26
MDA15
MDA9
MDA12
MDA8
MDA11
MDA13
MDA10
MDA14

1

C1159

0.1U_0402_16V4Z

2

0.01U_0402_16V7K

1

1

C1169

2

2

0.1U_0402_16V4Z

L75

12

FBMA-L10-160808-300LMT

1

C1170

C1171

2

0.01U_0402_16V7K

1

C1160

4.7U_0805_6.3V6K

2

CLKA021

CLKA0#21

475ohm 1% for NB9M
NB9P-GE, keep 240ohm

A3
A0
A2
A1

CS#
WE#
BA0
CKE
ODT

A12
RAS#
A11
A10
BA1
A8
A9
A6
A5

A4
CAS#
A13
BA2

32..63

A0

A1
A3
A4
A5

CS#CMD8
WE#
BA0
CKE
ODT
A2
A12
RAS#
A11
A10
BA1
A8
A9
A6

A7

CAS#
A13
BA2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

CHANNEL A EXT. 256M_1

LA-4082P Vader Discrete

1

0.2

of

22 58Wednesday, December 26, 2007

5

4

3

2

1

DATA Bus

Address

VRAM DDR2 chips (256MB & 512MB)

32Mx16 DDR2 400MHz *8==>512MB
32Mx16 DDR2 400MHz *4==>256MB

D D

DQMA[7..0]21,22

QSA#[7..0]21,22
QSA[7..0]21,22

MDA[63..0]21,22

DQMA[7..0]

QSA#[7..0]

QSA[7..0]

MDA[63..0]

0..31
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7

CMD9
CMD10

CMDA1021,22
CMDA1821,22

CMDA1421,22
CMDA1621,22
CMDA1721,22
CMDA2021,22
CMDA1921,22
CMDA2321,22
CMDA2121,22
CMDA621
CMDA521
CMDA421
CMDA1321
CMDA321,22
CMDA121,22

C C

CMDA1121,22

CMDA821,22
CMDA921,22
CMDA1521,22
CMDA2521,22

CMDA1221,22

+1.8VS

12

R1008

1K_0402_1%

B B

R1009

1K_0402_1%

12

1

C1185

0.1U_0402_16V4Z

2

CMDA10
CMDA18

CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA6
CMDA5
CMDA4
CMDA13
CMDA3
CMDA1

CLKA1#
CLKA1

CMDA11

CMDA8
CMDA9
CMDA15
CMDA25

CMDA12

QSA5
QSA#5

QSA#4

+MEM_VREFA1

U65

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

MDA39

B9

MDA32

B1

MDA38

D9

MDA34

D1

MDA33

D3

MDA37

D7

MDA35

C2

MDA36

C8

MDA44

F9

MDA43

F1

MDA47

H9

MDA40

H1

MDA41 MDA52

H3

MDA46

H7

MDA42 MDA54

G2

MDA45

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS

L78

FBMA-L10-160808-300LMT

1

C1183

0.1U_0402_16V4Z

2

12

1

C1184

4.7U_0805_6.3V6K

2

CMDA10
CMDA18

CMDA14
CMDA16
CMDA17
CMDA20
CMDA19
CMDA23
CMDA21
CMDA6
CMDA5
CMDA4
CMDA13
CMDA3
CMDA1

CLKA1#
CLKA1

CMDA11

CMDA8
CMDA9
CMDA15
CMDA25
DQMA6DQMA5

DQMA7DQMA4

CMDA12

QSA6
QSA#6

QSA7QSA4
QSA#7

+MEM_VREFA1

Vref= 0.5* 1.8V for NB9M, R1009=1K ohm

U66

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

MDA59

B9

MDA60

B1

MDA58

D9

MDA62

D1

MDA63

D3

MDA56

D7

MDA61

C2

MDA57

C8

MDA51

F9

MDA53

F1

MDA48

H9

MDA55

H1
H3

MDA49

H7
G2

MDA50

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS

L77

FBMA-L10-160808-300LMT

1

C1181

0.1U_0402_16V4Z

2

12

1

C1182

4.7U_0805_6.3V6K

2

CLKA121

CLKA1#21

CLKA1

CLKA1#

475ohm 1% for NB9M
NB9P-GE, keep 240ohm

1107 Change R1010 to 475 ohm

CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23 A7
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

12

R1010
475_0402_1%

A3
A0
A2
A1

CS#
WE#
BA0
CKE
ODT

A12
RAS#
A11
A10
BA1
A8
A9
A6
A5

A4
CAS#
A13
BA2

32..63

A0

A1
A3
A4
A5

CS#CMD8
WE#
BA0
CKE
ODT
A2
A12
RAS#
A11
A10
BA1
A8
A9
A6

A7

CAS#
A13
BA2

Vref= 0.5* 1.8V for NB9P-GS/GE 2, R1009=1K ohm

+1.8VS +1.8VS

1000P_0402_50V7K

1

C1195

2

A A

5

DDR2 BGA MEMORY DDR BGA MEMORY

0.01U_0402_16V7K

1

1

C1197

C1196

2

2

0.01U_0402_16V7K

4.7U_0805_6.3V6K

1

1

C1198

2

2

0.1U_0402_16V4Z

C1199

0.1U_0402_16V4Z

1

1

C1200

2

2

0.1U_0402_16V4Z

4

C1201

1

C1202

2

0.01U_0402_16V7K

1000P_0402_50V7K

1

C1186

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.01U_0402_16V7K

1

C1188

2

1

C1189

2

0.1U_0402_16V4Z

1

C1187

2

0.01U_0402_16V7K

2006/02/13 2006/03/10

4.7U_0805_6.3V6K

1

1

C1191

C1190

2

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

0.01U_0402_16V7K

1

1

C1192

C1193

2

2

0.01U_0402_16V7K

2

Title

Size Document Number Rev

Custom
Date: Sheet

Compal Electronics, Inc.

CHANNEL A EXT. 256M_2

LA-4082P Vader Discrete

1

of

23 58Wednesday, December 26, 2007

0.2

5

4

3

2

1

DATA Bus

Address

VRAM DDR2 chips (256MB & 512MB)

32Mx16 DDR2 400MHz *8==>512MB

DQMB[7..0]21,25

D D

QSB#[7..0]21,25
QSB[7..0]21,25

MDB[63..0]21,25

DQMB[7..0]
QSB#[7..0]
QSB[7..0]
MDB[63..0]

0..31
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7

CMD9

VRAM2@

CMDB1021,25
CMDB1821,25

CMDB1421,25
CMDB1621,25
CMDB1721,25
CMDB2021,25
CMDB1921,25
CMDB2321,25
CMDB2121,25
CMDB2221
CMDB2421
CMDB021
CMDB221
CMDB321,25
CMDB121,25

C C

B B

1K_0402_1%

VRAM2@

R1014

CMDB1121,25

CMDB821,25
CMDB921,25
CMDB1521,25
CMDB2521,25

CMDB1221,25

VRAM2@

R1013

1K_0402_1%

12

+1.8VS

12

1

2

CMDB10
CMDB18

CMDB14
CMDB16
CMDB17
CMDB20
CMDB19
CMDB23
CMDB21
CMDB22
CMDB24
CMDB0
CMDB2
CMDB3
CMDB1

CLKB0#
CLKB0

CMDB11

CMDB8
CMDB9
CMDB15
CMDB25

DQMB1 DQMB0

CMDB12

QSB2
QSB#2

QSB1
QSB#1

+MEM_VREFB0

VRAM2@

C1207

0.1U_0402_16V4Z

U67

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

MDB11

B9

MDB13

B1

MDB9

D9

MDB14

D1

MDB15

D3

MDB8

D7

MDB12

C2

MDB10

C8

MDB18

F9

MDB21

F1

MDB17

H9

MDB23

H1

MDB22

H3

MDB16

H7

MDB20

G2

MDB19

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS

VRAM2@

L80

FBMA-L10-160808-300LMT

VRAM2@

1

C1205

0.1U_0402_16V4Z

2

12

VRAM2@

1

C1206

4.7U_0805_6.3V6K

2

CMDB10
CMDB18

CMDB14
CMDB16
CMDB17
CMDB20
CMDB19
CMDB23
CMDB21
CMDB22
CMDB24
CMDB0
CMDB2
CMDB3
CMDB1

CLKB0#
CLKB0

CMDB11

CMDB8
CMDB9
CMDB15
CMDB25
DQMB3DQMB2

CMDB12

QSB3
QSB#3

QSB0
QSB#0

+MEM_VREFB0

Vref= 0.5* 1.8V for NB9M, R1014=1K ohm
Vref= 0.5* 1.8V for NB9P-GS/GE 2, R1014=1K ohm

VRAM2@

U68

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

MDB0

B9

MDB6

B1

MDB2

D9

MDB4

D1

MDB5

D3

MDB3

D7

MDB7

C2

MDB1

C8

MDB27

F9

MDB28

F1

MDB24

H9

MDB30

H1

MDB31

H3

MDB25

H7

MDB29

G2

MDB26

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS

VRAM2@

L79

FBMA-L10-160808-300LMT

VRAM2@

1

C1203

0.1U_0402_16V4Z

2

12

VRAM2@

1

C1204

4.7U_0805_6.3V6K

2

CLKB021

CLKB0#21

CLKB0

CLKB0#

475ohm 1% for NB9M
NB9P-GE, keep 240ohm

CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23 A7
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

12

VRAM2@

R1015
475_0402_1%

A3
A0
A2
A1

CS#
WE#
BA0
CKE
ODT

A12
RAS#
A11
A10
BA1
A8
A9
A6
A5

A4
CAS#
A13
BA2

32..63

A0

A1
A3
A4
A5

CS#CMD8
WE#
BA0
CKE
ODT
A2
A12
RAS#
A11
A10
BA1
A8
A9
A6

A7

CAS#
A13
BA2

1107 Change R1015 to 475 ohm

+1.8VS

1000P_0402_50V7K

VRAM2@

VRAM2@

1

1

C1218

C1217

2

2

0.01U_0402_16V7K

A A

DDR2 BGA MEMORY

0.01U_0402_16V7K

VRAM2@

VRAM2@

1

1

C1219

C1220

2

2

0.1U_0402_16V4Z

4.7U_0805_6.3V6K

VRAM2@

VRAM2@

1

1

C1221

C1222

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VRAM2@

1

1

C1223

2

2

0.01U_0402_16V7K

VRAM2@

C1224

+1.8VS

1000P_0402_50V7K

1

2

VRAM2@

C1208

1

2

0.01U_0402_16V7K

VRAM2@

C1209

0.01U_0402_16V7K

1

2

DDR BGA MEMORY

4.7U_0805_6.3V6K

VRAM2@

VRAM2@

1

C1210

1

C1211

2

2

0.1U_0402_16V4Z

VRAM2@

C1212

0.01U_0402_16V7K

VRAM2@

1

1

C1213

2

2

0.1U_0402_16V4Z

VRAM2@

C1214

VRAM2@

1

C1215

2

0.01U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

CHANNEL B EXT. 256M_1

LA-4082P Vader Discrete

1

0.2

of

24 58Wednesday, December 26, 2007

5

4

3

2

1

DATA Bus

Address

VRAM DDR2 chips (256MB & 512MB)

32Mx16 DDR2 400MHz *8==>512MB

DQMB[7..0]21,24

QSB#[7..0]21,24

D D

QSB[7..0]21,24

MDB[63..0]21,24

DQMB[7..0]
QSB#[7..0]
QSB[7..0]
MDB[63..0]

0..31
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6

32..63
A3
A0

A0
A2
A1

A1

A3

A4

A5

CMD7

VRAM2@

U69

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

VRAM2@

C1229

0.1U_0402_16V4Z

CMDB10
CMDB18

CMDB14
CMDB16
CMDB17
CMDB20
CMDB19
CMDB23
CMDB21
CMDB6
CMDB5
CMDB4
CMDB13
CMDB3
CMDB1

CLKB1#
CLKB1

CMDB11

CMDB8
CMDB9
CMDB15
CMDB25

CMDB12

QSB4

+MEM_VREFB1

CMDB1021,24
CMDB1821,24

CMDB1421,24
CMDB1621,24
CMDB1721,24
CMDB2021,24
CMDB1921,24
CMDB2321,24
CMDB2121,24
CMDB621
CMDB521
CMDB421
CMDB1321
CMDB321,24
CMDB121,24

C C

B B

1K_0402_1%

VRAM2@

R1019

CMDB1121,24

CMDB821,24
CMDB921,24
CMDB1521,24
CMDB2521,24

CMDB1221,24

VRAM2@

R1018

1K_0402_1%

12

+1.8VS

12

1

2

MDB39

B9

MDB35

B1
D9

MDB33

D1

MDB32

D3

MDB36

D7

MDB34

C2

MDB37

C8

MDB45

F9

MDB43

F1

MDB46

H9

MDB40

H1

MDB41

H3

MDB47

H7

MDB42

G2

MDB44 MDB57

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS

VRAM2@

L82

FBMA-L10-160808-300LMT

VRAM2@

1

C1227

0.1U_0402_16V4Z

2

12

VRAM2@

1

C1228

4.7U_0805_6.3V6K

2

CMDB10
CMDB18

CMDB14
CMDB16
CMDB17
CMDB20
CMDB19
CMDB23
CMDB21
CMDB6
CMDB5
CMDB4
CMDB13
CMDB3
CMDB1

CLKB1#
CLKB1

CMDB11

CMDB8
CMDB9
CMDB15
CMDB25
DQMB7DQMB5

DQMB6DQMB4

CMDB12

QSB7QSB5
QSB#7QSB#5

QSB6
QSB#6QSB#4

+MEM_VREFB1

Vref= 0.5* 1.8V for NB9M, R1019=1K ohm

VRAM2@

U70

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDDQ10

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

MDB49

B9

MDB55

B1

MDB51MDB38

D9

MDB53

D1

MDB54

D3

MDB48

D7

MDB52

C2

MDB50

C8

MDB59

F9

MDB60

F1

MDB56

H9

MDB63

H1

MDB62

H3

MDB58

H7

MDB61

G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

+1.8VS

VRAM2@

L81

FBMA-L10-160808-300LMT

VRAM2@

1

C1225

0.1U_0402_16V4Z

2

12

VRAM2@

1

C1226

4.7U_0805_6.3V6K

2

CLKB121

CLKB1#21

CLKB1

CLKB1#

475ohm 1% for NB9M
NB9P-GE, keep 240ohm

CMD10
CMD11
CMD12
CMD13
CMD14
CMD15
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23 A7
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD30

12

VRAM2@

R1020
475_0402_1%

1107 Change R1020 to 475 ohm

CMD9

WE#
BA0
CKE
ODT

A12
RAS#
A11
A10
BA1
A8
A9
A6
A5

A4
CAS#
A13
BA2

CS#

CS#CMD8

WE#

BA0

CKE

ODT

A2

A12

RAS#

A11

A10

BA1

A8

A9

A6

A7

CAS#

A13

BA2

Vref= 0.5* 1.8V for NB9P-GS/GE 2, R1019=1K ohm

+1.8VS +1.8VS

1000P_0402_50V7K

VRAM2@

VRAM2@

1

1

C1240

C1239

2

2

0.01U_0402_16V7K

A A

DDR2 BGA MEMORY

0.01U_0402_16V7K

VRAM2@

VRAM2@

1

1

C1242

C1241

2

2

0.1U_0402_16V4Z

4.7U_0805_6.3V6K

VRAM2@

VRAM2@

1

1

C1243

C1244

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VRAM2@

VRAM2@

1

1

C1245

C1246

2

2

0.01U_0402_16V7K

1000P_0402_50V7K

VRAM2@

1

1

C1230

2

2

0.01U_0402_16V7K

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

DDR BGA MEMORY

0.01U_0402_16V7K

VRAM2@

VRAM2@

1

C1231

C1232

2

2006/02/13 2006/03/10

4.7U_0805_6.3V6K

VRAM2@

1

1

C1233

2

2

0.1U_0402_16V4Z

Compal Secret Data

VRAM2@

C1234

Deciphered Date

0.01U_0402_16V7K

VRAM2@

1

1

C1235

2

2

0.1U_0402_16V4Z

VRAM2@

C1236

2

VRAM2@

1

C1237

2

0.01U_0402_16V7K

Title

Size Document Number Rev

Custom
Date: Sheet

Compal Electronics, Inc.

CHANNEL B EXT. 256M_2

LA-4082P Vader Discrete

1

of

25 58Wednesday, December 26, 2007

0.2

5

+3VS

R333 8.2K_0402_5%

1 2

R334 8.2K_0402_5%

1 2

R335 8.2K_0402_5%

1 2

R336 8.2K_0402_5%

1 2

R337 8.2K_0402_5%

D D

C C

1 2

R338 8.2K_0402_5%

1 2

R339 8.2K_0402_5%

1 2

R340 8.2K_0402_5%

1 2

+3VS

R341 8.2K_0402_5%

1 2

R342 8.2K_0402_5%

1 2

R343 8.2K_0402_5%

1 2

R344 8.2K_0402_5%

1 2

R345 8.2K_0402_5%

1 2

R346 8.2K_0402_5%

1 2

R347 8.2K_0402_5%

1 2

R348 8.2K_0402_5%

R349 8.2K_0402_5%
R350 8.2K_0402_5%
R351 8.2K_0402_5%
R352 8.2K_0402_5%

12

1 2
1 2
1 2
1 2

PCI_DEVSEL#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
PCI_PERR#

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#

4

U58B

D11

AD0

C8

AD1

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

D9

E12

E9

C9

E10

B7
C7
C5

G11

F8

F11

E7

A3
D2

F10

D5

D10

B3

F7
C3

F3

F4
C1
G7
H7
D1
G5
H6
G1
H3

J5

E1

J6
C4

ICH9-M ES_FCBGA676

PCI

AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ0#

GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2

PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

3

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6
A7

PCI_REQ2#

F13
F12

PCI_REQ3#

E6

PCI_GNT3#

F6
D8

B4
D6
A5

PCI_IRDY#

D3
E3

PCI_RST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#

C14

CLK_PCI_ICH

D4

PCI_PME#

R2

3/28 PCI_PME # R e m v o e 8 . 2k pull high +3VALW
resistance.

PCI_PIRQE#

H4

PCI_PIRQF#

K6

PCI_PIRQG#

F2

PCI_PIRQH#

G2

PCI_RST# 39,40

PCI_SERR# 40

PLT_RST# 7,18,31,32,33,35
CLK_PCI_ICH 15
PCI_PME# 40

PCI_PIRQH# 39

2

Place closely pin B10

CLK_PCI_ICH

12

1

2

@

R353
10_0402_5%

@

C537

8.2P_0402_50V

1

B B

PCI_GNT3#

A A

A16 swap override Strap

Low= A16 swap override Enble
High= Default

R354

PCI_GNT3#

@

1 2

5

*

1K_0402_5%

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

0

1

1

SPI_CS1#_R28

4

1

0

1

SPI_CS1#_R

PCI_GNT0#

Boot BIOS Location

SPI

PCI

LPC

*

R356

@

1 2

1K_0402_5%

R355

@

1 2

1K_0402_5%

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VALW

2006/02/13 2006/03/10

3

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9(1/4)-PCI/INT

LA-4082P Vader Discrete

1

0.2

of

26 58Wednesday, December 26, 2007

5

+RTCVCC

R359 1M_0402_5%

1 2

R357 330K_0402_5%

1 2

R361 330K_0402_5%

1 2

R363 180K_0402_5%

D D

C C

1 2

P- HDD

S- HDD

B B

1212 Swap SATA1 and SATA4

SM_INTRUDER#
LAN100_SLP
ICH_INTVRMEN
ICH_SRTCRST#

+RTCVCC

1

C538

0.1U_0402_16V4Z

2

R367 20K_0402_5%

1 2

HDA_SDIN034
HDA_SDIN135
HDA_SDIN219

SATA_LED#41

SATA_RXN0_C30

SATA_RXP0_C30
SATA_TXN030
SATA_TXP030

SATA_RXN1_C30

SATA_RXP1_C30
SATA_TXN130
SATA_TXP130

12

@

R364

0_0402_5%

1U_0603_10V4Z

+1.5VS

12

@

R360

0_0402_5%

1

C539

2

R371 24.9_0402_1%

C543 0.01U_0402_50V7K
C545 0.01U_0402_50V7K

C546 0.01U_0402_50V7K
C547 0.01U_0402_50V7K

4

ICH9M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

ICH8M LAN100 SLP Strap
(Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP Low = In te rn al VR Disabled

12

CLRP2
SHORT PADS

1 2

1 2
1 2

1 2
1 2

Low = Internal VR Disabled
High = Internal VR Enabled(Default)

High = Internal VR Enabled(Default)

U58A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD_0

D12

LAN_TXD_1

E13

LAN_TXD_2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9-M ES_FCBGA676

T51PAD
T52PAD

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
ICH_SRTCRST#
SM_INTRUDER#

ICH_INTVRMEN
LAN100_SLP

GLAN_COMP
HDA_BITCLK

HDA_SYNC
HDARST#
HDA_SDIN0

HDA_SDIN1
HDA_SDIN2

HDA_SDOUT

SATA_LED#
SATA_RXN0_C

SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C

SATA_RXN1_C
SATA_RXP1_C
SATA_TXN1_C
SATA_TXP1_C

3

RTC

LPCCPU

LAN / GLAN

IHDA

SATA

1015 add pull up to meet Intel design

+3VS

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#

INTR

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

R2058

10K_0402_5%

K5
K4
L6
K2

K3
J3

J1
N7

AJ27
AJ25

AE23
AJ26
AD22
AF25
AE22

AG25
L3

AF23
AF24

AH27
AG26
AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18
AJ7
AH7

12

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRAME#

GATEA20
H_A20M#

H_DPSLP#
R_H_FERR#
H_PWRGOOD
H_IGNNE#
H_INIT#

H_INTR
KB_RST#

H_NMI
H_SMI#

H_STPCLK#
THRMTRIP_ICH#

SATA_RXN4_C
SATA_RXP4_C
SATA_TXN4_C
SATA_TXP4_C

SATA_RXN5_C
SATA_RXP5_C
SATA_TXN5_C
SATA_TXP5_C

CLK_PCIE_SATA#
CLK_PCIE_SATA

R382

Within 500 mils

2

SATA_LED#

LPC_AD[0..3] 32,39,40

LPC_FRAME# 32,39,40

T50 PAD

GATEA20 40
H_A20M# 4

R369

1 2

R370

1 2

H_PWRGOOD 4,5
H_IGNNE# 4
H_INIT# 4

H_INTR 4

KB_RST# 40

H_NMI 4
H_SMI# 4

H_STPCLK# 4

R379 54.9_0402_1%

1 2

C540 0.01U_0402_50V7K

12

C541 0.01U_0402_50V7K

12

C542 0.01U_0402_50V7K

12

C544 0.01U_0402_50V7K

12

1 2

24.9_0402_1%

0_0402_5%

56_0402_5%

H_DPRSTP#H_DPRSTP_R#

H_FERR#

GATEA20
KB_RST#

H_DPRSTP#
H_DPSLP#

+VCCP

R358 10K_0402_5%

1 2

R362 10K_0402_5%

1 2

R365 56_0402_5%@

1 2

R366 56_0402_5%@

1 2

H_DPRSTP# 5,7,51
H_DPSLP# 5

within 2" from R379

12

R374
56_0402_5%

H_THERMTRIP# 4,7,40

placed within 2" from
ICH9M

SATA_RXN4_C 30
SATA_RXP4_C 30

SATA_TXN4 30

SATA_TXP4 30

SATA_RXN5_C 38
SATA_RXP5_C 38

SATA_TXN5 38

SATA_TXP5 38

CLK_PCIE_SATA# 15
CLK_PCIE_SATA 15

+VCCP

R368
56_0402_5%

1 2

ODD

e-SATA

De-feature disable

1

+3VS

+VCCP

H_FERR# 4

1008 add them for Intel suggestion

R439 33_0402_5%
R373 33_0402_5%
R372 33_0402_5%

R440 33_0402_5%
R375 33_0402_5%
R376 33_0402_5%

R442 33_0402_5%
R378 33_0402_5%
R377 33_0402_5%

R444 33_0402_5%
R380 33_0402_5%
R381 33_0402_5%

ICH_RTCX1

ICH_RTCX2

1

C549
15P_0402_50V8J

2

C548

HDA_VGA_BITCLK19
HDA_BITCLK_MDC35
HDA_BITCLK_CODEC34

HDA_VGA_SYNC19
HDA_SYNC_MDC35
HDA_SYNC_CODEC34

HDA_VGA_RST#19
HDA_RST#_MDC35
HDA_RST#_CODEC34,40

HDA_VGA_SDOUT19
HDA_SDOUT_MDC35
HDA_SDOUT_CODEC34

R386

1 2

10M_0402_5%

1

2

Y3

1 4
2 3

32.768KHZ_12.5P_MC-146

4

XOR CHAIN ENTRANCE STRAP:RSVD

+3VS

R383

@

1 2

R384

@

1 2

1K_0402_5%

1K_0402_5%

HDA_SDOUT_CODEC

ICH_RSVD

ICH_RSVD 28

ICH_RSVD HDA_SDOUT_CODEC

A A

00
0
1

1
0

15P_0402_50V8J

11

5

1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

1 2
1 2
1 2

HDA_BITCLK

12

@

R385
10_0402_5%

1

@

C550
10P_0402_25V8K

2

HDA_BITCLK

ICH9-MVGA

HDA_SYNC

MDC

HDARST#

CODEC

HDA_SDOUT

R875

W=20mils

1

C906

2.2U_0603_6.3V4Z

2

Place near ICH9

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

1 2

0_0402_5%

2

W=20mils

D36

1

DAN202U_SC70

@

BATT1

W=20mils

1

CR2032 RTC BATTERY

CONN@

JBATT1

1

1

2

2

3

GND

4

GND

ACES_85205-02001

of

27 58Wednesday, December 26, 2007

BATT1.1+3VL+RTCVCC

2
3

Size Document Number Rev

Custom

Date: Sheet

R876

W=20mils

1 2

1K_0402_5%

Title

Compal Electronics, Inc.

ICH9(2/4)_LAN,HD,SATA,LPC

LA-4082P Vader Discrete

0.2

5

+3VS

D D

1102 Add test point

C C

1212 Add R2095 for EC_SCI#

1108 For LAN DSM
1109 Add GPIO22 for card reader wake up event

+3VALW

B B

1 2

R389 10K_0402_5%

1 2

R390 8.2K_0402_5%

1 2

R391 10K_0402_5%

1 2

R394 8.2K_0402_5%@

1 2

R397 10K_0402_5%

1 2

R398 8.2K_0402_5%@

1 2

R399 8.2K_0402_5%

1 2

R400 8.2K_0402_5%

1 2

R401 10K_0402_5%

1 2

R685 8.2K_0402_5%@

1 2

R686 8.2K_0402_5%

1 2

R687 8.2K_0402_5%@

1 2

R689 8.2K_0402_5%

1 2

R690 8.2K_0402_5%

1 2

R691 8.2K_0402_5%

1 2

R692 8.2K_0402_5%

1 2

R693 8.2K_0402_5%

1 2

R694 8.2K_0402_5%

1 2

R870 10K_0402_5%@

1 2

R405 10K_0402_5%

1 2

R408 8.2K_0402_5%

1 2

R409 1K_0402_5%

1 2

R410 10K_0402_5%

1 2

R411 10K_0402_5%

1 2

R414 10K_0402_5%

1 2

R416 10K_0402_5%

1 2

R417 10K_0402_5%

1 2

R418 10K_0402_5%

1 2

R419 10K_0402_5%@

1 2

R695 8.2K_0402_5%@

1 2

R696 8.2K_0402_5%

1 2

R2096 10K_0402_5% @

1 2

R2101 10K_0402_5%

1212 For WLAN issue

Board ID

+3VS +3VS

R776
10K_0402_5%

1 2

@

R777
10K_0402_5%

1 2

A A

Discrete-->H
UMA-->L

1008 add board ID detection

SIRQ
PM_CLKRUN#
GPIO39
THERM_SCI#
CLKREQ#_C
GPIO18
CR_WAKE#
GPIO20
OCP#
PM_BMBUSY#
CR_CPPE#
EC_SCI#_SB

GPIO37
GPIO57
GPIO48
GPIO21
GPIO19
GPIO36

GPIO49

LINKALERT#
ICH_LOW_BAT#
ICH_PCIE_W AKE#
ICH_RI#
XDP_DBRESET#
S4_STATE#
ME_EC_CLK1
ME_EC_DATA1
GPIO10
EC_LID_OUT#
EC_SMI#
GPIO14
EC_SCI#_GPIO12
XMIT_OFF

R774
10K_0402_5%

1 2

@

R775
10K_0402_5%

1 2

17"
platform-->H

14"
platform-->L

5

+3VALW

10K_0402_5%

H_STP_PCI#15
H_STP_CPU#15

R393 2.2K_0402_5%
R392 2.2K_0402_5%

ICH_SMBCLK15,32,35,39

ICH_SMBDATA15,32,35,39

+3VS

12

12

@

@

R402

R403
10K_0402_5%

0718 INSTALL R179

VGATE15,51

R412

100K_0402_5%

OCP#4

CR_CPPE#33

EC_SCI#40
EC_SMI#40

LAN_DSM#_SB31

ISOLATEB31,40

GPIO2017

CR_WAKE#33

R423

MCH_ICH_SYNC#7

ICH_RSVD27

8.2K_0402_5%

EXP_CPPE#32

SB_SPKR34

1 2

+3VS

+3VS

SB_SPKR
low -->default

High -->No boot

WLAN

Robson

1008 no stuff

TV Tuner

GLAN

1394_CR1

1212 Swap PCIE GLAN and New Card

USB_OC#6
USB_OC#1
USB_OC#2
USB_OC#4

USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#0

WXMIT_OFF#
USB_OC#5
USB_OC#10
USB_OC#11

RP31

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP32

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

RP33

4 5
3 6
2 7
1 8

10K_1206_8P4R_5%

4

1 2
1 2

T57PAD

XDP_DBRESET#4

PM_BMBUSY#7

EC_LID_OUT#40

R404 0_0402_5%

1 2

ICH_PCIE_WAKE#31,32
SIRQ40
THERM_SCI#20,40

1 2

PCIE_RXN132
PCIE_RXP132
PCIE_TXN132
PCIE_TXP132

PCIE_RXN235
PCIE_RXP235
PCIE_TXN235
PCIE_TXP235

PCIE_RXN332
PCIE_RXP332
PCIE_TXN332
PCIE_TXP332

GLAN_RXN31
GLAN_RXP31
GLAN_TXN31
GLAN_TXP31

PCIE_RXN533
PCIE_RXP533
PCIE_TXN533
PCIE_TXP533

PCIE_RXN432
PCIE_RXP432
PCIE_TXN432
PCIE_TXP432

SPI_CS1#_R26

BT_OFF38

R424 1K_0402_5% @

+3VALW

T59PAD

OCP#
CR_CPPE#

1 2

EC_SMI#

1 2

LAN_DSM#_SB

1 2

R2085 1K_0402_1%

CLKREQ#_C15

R438

1 2

1 2

C556 0.1U_0402_16V4Z
C557 0.1U_0402_16V4Z

C558 0.1U_0402_16V4Z
C559 0.1U_0402_16V4Z

C560 0.1U_0402_16V4Z
C561 0.1U_0402_16V4Z

C564 0.1U_0402_16V4Z
C565 0.1U_0402_16V4Z

C608 0.1U_0402_16V4Z
C577 0.1U_0402_16V4Z

C562 0.1U_0402_16V4Z
C563 0.1U_0402_16V4Z

R429 0_0402_5%

4

ICH_SMBCLK
ICH_SMBDATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1

ICH_RI#
SUS_STAT#

XDP_DBRESET#
PM_BMBUSY#
EC_LID_OUT#
H_STP_PCI#

R_STP_CPU#
PM_CLKRUN#
ICH_PCIE_W AKE#

SIRQ
THERM_SCI#

VGATE

EC_SCI#_SBEC_SCI#

R2094 0_0402_5%

EC_SCI#_GPIO12

R2095 0_0402_5%@

17/14
GPIO18
GPIO20
CR_WAKE#
DIS/UMA

CLKREQ#_C
GPIO38
GPIO39
GPIO48

0_0402_5%

GPIO49
GPIO57

SB_SPKR
MCH_ICH_SYNC#
ICH_RSVD

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

T61PAD
T62PAD

T63PAD
T64PAD

1 2

12

G16
A13
E17
C17
B18

F19

R4

G19

M6
A17
A14

E19

L4

E20

M5

AJ23

D21
A20

AG19
AH21
AG21

A21
C12
C21

AE18

K1

AF8

AJ22

A9

D19

L1
AE19
AG22
AF21
AH24

A8

M7

AJ24

B21

AH20

AJ20
AJ21

PCIE_RXN1
PCIE_RXP1
PCIE_C_TXN1
PCIE_C_TXP1

PCIE_RXN2
PCIE_RXP2
PCIE_C_TXN2
PCIE_C_TXP2

PCIE_RXN3
PCIE_RXP3
PCIE_C_TXN3
PCIE_C_TXP3

GLAN_RXN
GLAN_RXP
GLAN_TXN_C
GLAN_TXP_C

PCIE_RXN5
PCIE_RXP5
PCIE_C_TXN5
PCIE_C_TXP5

PCIE_RXN4
PCIE_RXP4
PCIE_C_TXN4
PCIE_C_TXP4

SPI_CS1#_R

USB_OC#0
USB_OC#1
USB_OC#2
WXMIT_OFF#DIS/UMA 17/14
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

USBRBIAS

R430

22.6_0402_1%

Within 500 mils

3

U58C

SMBCLK
SMBDATA
LINKALERT#/GPIO60/CLGPIO4
SMLINK0
SMLINK1

RI#
SUS_STAT#/LPCPD#

SYS_RESET#
PMSYNC#/GPIO0
SMBALERT#/GPIO11
STP_PCI#

STP_CPU#
CLKRUN#
WAKE#

SERIRQ
THRM#

VRMPWRGD
TP11
GPIO1

GPIO6
GPIO7
GPIO8
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

SPKR
MCH_SYNC#
TP3
TP8
TP9
TP10

ICH9-M ES_FCBGA676

SMB

U58D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9-M ES_FCBGA676

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

clocks

SYS / GPIOGPIOMISC

Power MGT

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

Controller Link

PCI - Express

SPI

USB

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#
PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

MEM_LED/GPIO24

WOL_EN/GPIO9

DMI0RXN

DMI0RXP
DMI0TXN
DMI0TXP

DMI1RXN

DMI1RXP
DMI1TXN
DMI1TXP

DMI2RXN

DMI2RXP
DMI2TXN
DMI2TXP

DMI3RXN

DMI3RXP
DMI3TXN
DMI3TXP

DMI_CLKN
DMI_CLKP

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29
AF28

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

2006/02/13 2006/03/10

1025 change to follow IBT00 design for G-sensor

GPIO21

AH23

GPIO19

AF19

GPIO36

AE21

GPIO37

AD20

CLK_14M_ICH

H1

CLK_48M_ICH

AF3

ICH_SUSCLK

P1

SLP_S3#

C16

SLP_S4#

E16

SLP_S5#

G17

S4_STATE#

C10

PM_PWROK

G20
M2
B13
R3
D20
D22
R5
R6
B16
F24

B19
F22

C19
C25

A19
F21

D18
A16

C18
C11
C20

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_IRCOMP
USB20_N0

USB20_P0
USB20_N1
USB20_P1
USB20_N2
USB20_P2
USB20_N3
USB20_P3
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8
USB20_N9
USB20_P9
USB20_N10
USB20_P10
USB20_N11
USB20_P11

R407 0_0402_5%

ICH_LOW_BAT#
PWRBTN_OUT#

R_EC_RSMRST#
CK_PWRGD
M_PWROK

CL_CLK0

CL_DATA0

CL_VREF0_ICH
CL_VREF1_ICH

CL_RST#

XMIT_OFF
GPIO10
GPIO14

LAN_WOL_EN

R428 24.9_0402_1%

Compal Secret Data

Deciphered Date

2

GPIO19 41

CLK_14M_ICH 15
CLK_48M_ICH 15

T58 PAD

SLP_S3# 40
SLP_S4# 40
SLP_S5# 40

PM_PWROK 7,40

1 2

PWRBTN_OUT# 40

R413 100_0402_5%

1 2

R795 10K_0402_5%

1 2

CK_PWRGD 15
M_PWROK 7,40

CL_CLK0 7

CL_DATA0 7

CL_RST# 7

XMIT_OFF 32

1108 For LAN DSM

R796

100K_0402_5%

DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7

DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7

DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7

DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7

CLK_PCIE_ICH# 15
CLK_PCIE_ICH 15

1 2

USB20_N0 38
USB20_P0 38
USB20_N1 38
USB20_P1 38
USB20_N2 38
USB20_P2 38
USB20_N3 42
USB20_P3 42
USB20_N4 17
USB20_P4 17
USB20_N5 32
USB20_P5 32
USB20_N6 38
USB20_P6 38
USB20_N7 38
USB20_P7 38
USB20_N8 32
USB20_P8 32
USB20_N9 32
USB20_P9 32
USB20_N10 38
USB20_P10 38
USB20_N11 38
USB20_P11 38

2

R406

10K_0402_5%

1 2

DPRSLPVR 7,51

EC_RSMRST# 40

0.1U_0402_16V4Z

1

C554

2

1

C555

12

+3VALW

Within 500 mils

+1.5VS

2

0.1U_0402_16V4Z

USB-0 Right sideNew Card
USB-1 Right side
USB-2 E-SATA & USB Combo
USB-3 Dock
USB-4 USB Ca mera
USB-5 WLAN
USB-6 Bluetooth
USB-7 Fingerprint
USB-8 MiniCard(TV)
USB-9 New Card
USB-10 Left Side
USB-11 Touch Screen

Title

Size Document Number Rev

Custom

Date: Sheet

1

Place clos ely pin H1Place closely pin AF3

CLK_48M_ICH

+3VS

+3VALW

12

@

R396
10_0402_5%

@

1

C553

4.7P_0402_50V8C

2

R_EC_RSMRST#

12

R421
453_0402_1%

12

R426
453_0402_1%

12

@

R395
10_0402_5%

@

1

C552

4.7P_0402_50V8C

2

R420

1 2

R425

1 2

R_EC_RSMRST# 47

3.24K_0402_1%

3.24K_0402_1%

Compal Electronics, Inc.

ICH9(3/4)_DMI,USB,GPIO,PCIE

LA-4082P Vader Discrete

1

CLK_14M_ICH

of

28 58Wednesday, December 26, 2007

0.2

5

+RTCVCC

0.1U_0402_16V4Z

D D

R433

100_0402_5%

C C

B B

A A

R434

10_0402_5%

+1.5VS

0316 change design

+1.5VS

+5VS +3VS

12

+3VALW+5VALW

12

R435

1 2

CHB1608U301_0603

+3VS

1

C597

2

0.1U_0402_16V4Z

R431

1 2

CHB1608U301_0603

21

D13
CH751H-40_SC76

ICH_V5REF_RUN

20 mils

1

C849

0.1U_0402_10V6K

2

21

D14
CH751H-40_SC76

ICH_V5REF_SUS

20 mils

1

C850

0.1U_0402_10V6K

2

1

C588

2

+1.5VS

0.1U_0402_16V4Z

R436 CHB1608U301_0603

1 2

+1.5VS

5

40 mils

10U_0805_10V4Z

220U_D2_4VM

1U_0603_10V4Z

10U_0805_10V4Z

1

2

1

+

2

C589

C595

1

2

C566

C570

C599

0.1U_0402_16V4Z

1

2

1

2

2.2U_0603_6.3V4Z

20 mils

1

C567

2

10U_0805_10V4Z

1

C571

2

+1.5VS

1U_0603_10V4Z

10U_0805_10V4Z

+1.5VS

1U_0603_10V4Z

+1.5VS

0.1U_0402_16V4Z

+1.5VS

1

C600

2

ICH_V5REF_RUN

ICH_V5REF_SUS

1

C572

2

2.2U_0603_6.3V4Z

C590

C593

C596

VCC_LAN1_05_INT_ICH_1

T69

VCC_LAN1_05_INT_ICH_2

T70

R437

1 2

CHB1608U301_0603

4.7U_0805_10V4Z

1

C573

2

1

2

1

2

1

2

1

C601

2

+3VS

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

M24
M25

W24
W25

AJ19

AC16
AD15
AD16
AE15
AF15
AG15
AH15

AJ15

AC11
AD11
AE11
AF11
AG10
AG11
AH10

AJ10

AC18
AC19

AC21

AC12
AC13
AC14

A23

AE1

G25
H24
H25

K24
K25

N23
N24
N25
P24
P25
R24
R25
R26
R27

U24
U25
V24
V25
U23

K23
Y24
Y25

AC9

G10

AA7
AB6
AB7
AC6
AC7

A10
A11

A12
B12

A27
D28

D29
E26
E27

A26

4

U58F

VCCRTC

A6

V5REF

V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]

F25

VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCSATAPLL

VCC1_5_A[01]
VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]

VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCC1_5_A[17]
VCC1_5_A[18]

VCC1_5_A[19]
VCC1_5_A[20]
VCC1_5_A[21]

G9

VCC1_5_A[22]

11mA

11mA

VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]

AJ5

VCCUSBPLL
VCC1_5_A[26]

VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCLAN3_3[1]
VCCLAN3_3[2]

23mA

VCCGLANPLL

80mA

VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

1mA

VCCGLAN3_3

ICH9-M ES_FCBGA676

4

G3: 6uA
2mA

2mA
646mA

47mA

1342mA

ARX

212mA

ATX

USB CORE

1634mA

VCCA3GP

GLAN POWER

CORE

23mA

48mA

2mA

VCCP_CORE

PCI

11mA

11mA

VCCPSUS

VCCPUSB

19/73/73mA19/78/78mA

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCDMIPLL

VCC_DMI[1]
VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[07]

VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

308mA

VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]
VCCSUS1_5[2]

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

VCCSUS3_3[05]

VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

3

+VCCP

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
W23

Y23
AB23

AC23
AG29

AJ6
AC10

AD19
AF20
AG24
AC20

0.1U_0402_16V4Z

B9
F9
G3
G6
J2
J7
K7

AJ4
AJ3

AC8
F17

VCCSUS1_5_ICH_1

AD8

VCCSUS1_5_ICH_2

F18

A18
D16
D17
E22

AF1

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

VCCCL1_05_ICH

G22
G23

A24
B24

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

+3VS

T65
T66

3

0.1U_0402_16V4Z

1

1

C568

C569

0.1U_0402_16V4Z

2

2

0.01U_0402_16V7K

1

1

C574

2

2

1

C576
22U_0805_6.3VAM

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C581

2

1

C585

2

1008 Change power rail for Discrete platform

R1038

1

C587

0.1U_0402_16V4Z

2

T75
T76

1

C591

0.1U_0402_16V4Z

2

T71

@

1

C598
1U_0603_10V4Z

2

+3VALW

1

C594

4.7U_0603_6.3V6M

2

+3VALW

2006/02/13 2006/03/10

R432

1 2

CHB1608U301_0603
C575
10U_0805_10V4Z

+VCCP

0317 change value

+3VS

0.1U_0402_16V4Z

1

1

C582

C583

2

2

R778 0_0603_5%

1 2

1 2

0_0603_5%

1

2

+3VALW

C592

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

4.7U_0603_6.3V6M

1

2

C578

1

2

2

+1.5VS

+VCCP

0.1U_0402_16V4Z

1

C579

2

(DMI)

+3VS

C586

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

1

C580

2

U58E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AC3

VSS[014]

AD1

VSS[015]

AD10

VSS[016]

AD12

VSS[017]

AD13

VSS[018]

AD14

VSS[019]

AD17

VSS[020]

AD18

VSS[021]

AD21

VSS[022]

AD28

VSS[023]

AD29

VSS[024]

AD4

VSS[025]

AD5

VSS[026]

AD6

VSS[027]

AD7

VSS[028]

AD9

VSS[029]

AE12

VSS[030]

AE13

VSS[031]

AE14

VSS[032]

AE16

VSS[033]

AE17

VSS[034]

AE2

VSS[035]

AE20

VSS[036]

AE24

VSS[037]

AE3

VSS[038]

AE4

VSS[039]

AE6

VSS[040]

AE9

VSS[041]

AF13

VSS[042]

AF16

VSS[043]

AF18

VSS[044]

AF22

VSS[045]

AH26

VSS[046]

AF26

VSS[047]

AF27

VSS[048]

AF5

VSS[049]

AF7

VSS[050]

AF9

VSS[051]

AG13

VSS[052]

AG16

VSS[053]

AG18

VSS[054]

AG20

VSS[055]

AG23

VSS[056]

AG3

VSS[057]

AG6

VSS[058]

AG9

VSS[059]

AH12

VSS[060]

AH14

VSS[061]

AH17

VSS[062]

AH19

VSS[063]

AH2

VSS[064]

AH22

VSS[065]

AH25

VSS[066]

AH28

VSS[067]

AH5

VSS[068]

AH8

VSS[069]

AJ12

VSS[070]

AJ14

VSS[071]

AJ17

VSS[072]

AJ8

VSS[073]

B11

VSS[074]

B14

VSS[075]

B17

VSS[076]

B2

VSS[077]

B20

VSS[078]

B23

VSS[079]

B5

VSS[080]

B8

VSS[081]

C26

VSS[082]

C27

VSS[083]

E11

VSS[084]

E14

VSS[085]

E18

VSS[086]

E2

VSS[087]

E21

VSS[088]

E24

VSS[089]

E5

VSS[090]

E8

VSS[091]

F16

VSS[092]

F28

VSS[093]

F29

VSS[094]

G12

VSS[095]

G14

VSS[096]

G18

VSS[097]

G21

VSS[098]

G24

VSS[099]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9-M ES_FCBGA676

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

ICH9(4/4)_POWER&GND

LA-4082P Vader Discrete

1

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

1

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

of

29 58Wednesday, December 26, 2007

0.2

5

1

C603

2

10U_0805_10V4Z

0903 change Qty

0.1U_0402_16V4Z

1

1

C604

C605

2

2

0.1U_0402_16V4Z

+5VS

D D

Pleace near HD CONN (JP23)

0.1U_0402_16V4Z

@

1

C610

2

0903 change

share HDD2

+3VS

@

1

C609

2

1000P_0402_50V7K

Pleace near HD CONN

1

C613

2

10U_0805_10V4Z

0903 change Qty

0.1U_0402_16V4Z

1

1

2

C614

C615

2

0.1U_0402_16V4Z

C C

+5VS

Pleace near HD CONN (JP23)

+3VS

0.1U_0402_16V4Z

@

@

1

1

C620

C619

2

2

1000P_0402_50V7K

10U_0603_6.3V6M

@

1

C621

2

1U_0603_10V4Z

@

1

C618

2

Pleace near HD CONN

B B

4

HDD Connector

CONN@

JHDD1

23

GND

24

GND

SUYIN_127072FR022G210ZR_RV

DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA
SUYIN_127043FR022G204ZL_22P_NR

2nd HDD Connector-option

CONN@

JHDD2

23

GND

24

GND

SUYIN_127072FR022G210ZR_RV

DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA
SUYIN_127043FR022G204ZL_22P_NR

GND

GND

GND

GND
GND
GND

GND

Reserved

GND

GND

GND

GND

GND
GND
GND

GND

Reserved

GND

1
2

A+

3

A-

4

SATA_RXN0

5

B-

6

B+

7

8

V33

9

V33

10

V33

11
12
13
14

V5

15

V5

16

V5

17
18
19
20

V12

21

V12

22

V12

1
2

A+

3

A-

4
5

B-

6

B+

7

8

V33

9

V33

10

V33

11
12
13
14

V5

15

V5

16

V5

17
18
19
20

V12

21

V12

22

V12

C602 0.01U_0402_16V7K

SATA_RXP0

C607 0.01U_0402_16V7K

+3VS

0903 change

+5VS

SATA_RXN1

C612 0.01U_0402_16V7K

SATA_RXP1

C617 0.01U_0402_16V7K

Near CONN side.

+3VS

0903 change

+5VS

SATA_TXP0
SATA_TXN0

12
12

Near CONN side.

SATA_TXP1
SATA_TXN1

12
12

3

SATA_TXP0 27

SATA_TXN0 27

SATA_RXN0_C 27
SATA_RXP0_C 27

SATA_TXP1 27

SATA_TXN1 27

SATA_RXN1_C 27
SATA_RXP1_C 27

2

1

CD-ROM Connector

+5VS

Placea caps. near ODD CONN.

1U_0603_10V4Z

0.1U_0402_16V4Z

1

C624

2

A A

10U_0805_10V4Z

1

C625

2

5

10U_0805_10V4Z

C626

1

C627

2

14
15

SUYIN_127382FR013G509ZR

4

1

2

JODD

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

V5

10

V5

11

MD

GND
GND

GND
GND

12
13

1009 Update to correct CIS

SATA_RXN4

C622 0.01U_0402_16V7K

SATA_RXP4

C623 0.01U_0402_16V7K

Near CONN side.

+5VS

SATA_TXP4
SATA_TXN4

12
12

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

SATA_TXP4 27

SATA_TXN4 27

SATA_RXN4_C 27

SATA_RXP4_C 27

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

2

ZZZ1

LA-4082P

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

HDD & CDROM

LA-4082P Vader Discrete

1

of

30 58Wednesday, December 26, 2007

0.2

5

4

3

2

1

0_0603_5%

2

C629

0.1U_0402_16V4Z

1

C652

+3VALW

@

C656

68P_0402_50V8K

@

C657

68P_0402_50V8K

+3V_LAN

R452 300_0402_5%

1

2

2

1

R451 300_0402_5%

2

1025 add to meet HP request

+3VALW+3V_LAN

@

R1106

1 2

0_1206_5%

TCT1
TD1+
TD1­TCT2
TD2+
TD2­TCT3
TD3+
TD3­TCT4
TD4+
TD4-

1 3

0_0603_5%

MCT1
MX1+

MCT2
MX2+

MCT3
MX3+

MCT4
MX4+

D

G

2

U18

29

HSOP

30

HSON

23

HSIP

24

HSIN

33

CLKREQB

26

REFCLK_P

27

REFCLK_N

20

PERSTB

1

SROUT12

5

FB12

62

ENSR

64

RSET

19

LANWAKEB

36

ISOLATEB

60

CKTAL1

61

CKTAL2

65

EXPOSE_PAD

25

EGND

31

EGND

15

NC

17

NC

18

NC

34

NC

35

NC

39

NC

40

NC

41

NC

42

NC

RTL8111C-GR_QFN64_9X9

24
23
22

MX1-

21
20
19

MX2-

18
17
16

MX3-

15
14
13

MX4-

S

Q106
AP2305GN

RJ45_MIDI3­RJ45_MIDI3+

RJ45_MIDI2­RJ45_MIDI2+

RJ45_MIDI1­RJ45_MIDI1+

RJ45_MIDI0­RJ45_MIDI0+

EEDO

EEDI/AUX

EESK
EECS

LED3
LED2
LED1
LED0

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

DVDD12
DVDD12
DVDD12
DVDD12
DVDD12
DVDD12

EVDD12
EVDD12

VDD33
VDD33
VDD33
VDD33

VDDSR

AVDD33
AVDD33

AVDD12
AVDD12
AVDD12
AVDD12

IGPIO

OGPIO

47
48
44

54
55
56
57

3
4
6
7
9
10
12
13

21
32
38
43
49
52

22
28

16
37
46
53

63
2

59
8

11
14
58

50
51

C1121

C2105

C2106

C2107

LAN_DI
LAN_SK
LAN_CS

LAN_LINK#
LAN_ACTIVITY#

LAN_MDI0+
LAN_MDI0­LAN_MDI1+
LAN_MDI1­LAN_MDI2+
LAN_MDI2­LAN_MDI3+
LAN_MDI3-

+LAN_VDD12

+LAN_EVDD12

+3V_LAN

+AVDD33

LAN_DSM#

1 2

0.01U_0402_16V7K

1 2

0.01U_0402_16V7K

1 2

0.01U_0402_16V7K

1 2

0.01U_0402_16V7K

C634

22U_0805_6.3VAM

+LAN_VDD12

LAN_DO

45

HP PoE solution

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D D

LANPWR#40

Place Close to Chip

0.1U_0402_16V4Z

1 2
1 2

0.1U_0402_16V4Z

R2048

1 2

1
2
3
4
5
6
7
8

9
10
11
12

1

C664

0.01U_0402_16V7K

2

0.01U_0402_16V7K

PCIE_RXP2_LAN
PCIE_RXN2_LAN

GLAN_REQ#

+CTRL_18

2.49K_0402_1%

GLAN_WAKE#
ISOLATEB

LAN_X1
LAN_X2

U19

NS692405

C659

+LAN_VDD12

1

C660

2

C653
C654

1 2

R456 0_0402_5%

+3V_LAN

R446

R454

1 2

0_0402_5%

1

C663

2

GLAN_RXP28
GLAN_RXN28
GLAN_TXP28

GLAN_TXN28

CLKREQ#_915

CLK_PCIE_LAN15

C C

B B

A A

CLK_PCIE_LAN#15

PLT_RST#7,18,26,32,33,35

ICH_PCIE_WAKE#28,32
ISOLATEB28,40

+3VS

12

@

R445
1K_0402_1%

ISOLATEB

R443
15K_0402_5%

LAN_MDI3­LAN_MDI3+

LAN_MDI2­LAN_MDI2+

LAN_MDI1­LAN_MDI1+

LAN_MDI0­LAN_MDI0+

1

0.01U_0402_16V7K

0.01U_0402_16V7K

2

Place these components
colsed to LAN chip

5

+AVDD33

0.1U_0402_16V4Z

Close to Pin2 & pin59

+CTRL_18

Close to Pin1

LAN_DO
LAN_DI
LAN_SK
LAN_CS

27P_0402_50V8J

L85

0_0603_5%

1

1

C635

0.1U_0402_16V4Z

2

2

1 2

R2074 10K_0402_5%@

1 2

R2075 0_0402_5%@

1 2

R2086 0_0402_5%

R450

1 2

75_0402_1%
R447

1 2

75_0402_1%
R448

1 2

75_0402_1%
R449

1 2

75_0402_1%

1108 Add LAN DSM function

3

L74

2

2

C650

4.7uHc
hok

e

L83

1 2

4.7UH_1008HC-472EJFS-A_5%_1008

R453

1

C257

2

RJ45_GND

2006/02/13 2006/03/10

C651

0.1U_0402_16V4Z

1

1

22U_0805_6.3VAM

1 2

3.6K_0402_5%

U17

4

DO

GND

3

DI

NC

2

SK

NC

1

CS

VCC

AT93C46-10SI-2.7_SO8

Y2

LAN_X2LAN_X1

12

25MHZ_20P

+3V_LAN

+3VALW

LAN_DSM#_KBC 40
LAN_DSM#_SB 28

C658

1 2

1000P_1808_3KV7K

+LAN_VDD12

2

C630

1

+3V_LAN

5
6
7
8

2

1

0.1U_0402_16V4Z

1

C256
27P_0402_50V8J

2

LAN_ACTIVITY#

LAN_LINK#

Compal Secret Data

Deciphered Date

Close to Pin16,37,46,53

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2

C636

1

1

0.1U_0402_16V4Z

2

1

0.1U_0402_16V4Z

+LAN_VDD12

+3V_LAN

12

RJ45_MIDI3-42
RJ45_MIDI3+42
RJ45_MIDI1-42
RJ45_MIDI2-42
RJ45_MIDI2+42
RJ45_MIDI1+42
RJ45_MIDI0-42
RJ45_MIDI0+42

+3V_LAN

12

Title

Size Document Number Rev

Custom

Date: Sheet of

0.1U_0402_16V4Z

2

2

C631

1

C637

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C644

Beadfor8111

00m

L84

LAN Conn.

CONN@

JRJ45

13

Yellow LED+

14

Yellow LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED+

12

Green LED-

FOX_JM36113-P1122-7F

1

C661

0.1U_0402_16V4Z

2

2

C638

1

2

C645

1

A

C649

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C639

1

2

C646

1

0.1U_0402_16V4Z

C3

0_0603_5%

0.1U_0402_16V4Z

SHLD1

DETECT PIN1

DETCET PIN2

SHLD1

LANGND

1

C662

4.7U_0805_10V4Z

2

2

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Compal Electronics, Inc.

8111C GLAN

LA-4082P Vader Discrete

+3V_LAN

2

C642

1

0.1U_0402_16V4Z

2

C640

1

0.1U_0402_16V4Z

2

C647

1

0.1U_0402_16V4Z

+LAN_EVDD12

2

C632

1

16
9

10
15

1

C643

0.1U_0402_16V4Z

+LAN_VDD12

2

C641

1

2

C648

1

2

C633

1

31 58Wednesday, December 26, 2007

0.2

A

B

C

D

E

Mini Card 0--WLAN

0.01U_0402_16V7K

1

C1343

CLKREQ#_1015

CLK_PCIE_MCARD0#15
CLK_PCIE_MCARD015

PCIE_RXN128
PCIE_RXP128

@

R478

10K_0402_5%

D88

2

0.1U_0402_16V4Z

CH_DATA38

CH_CLK38

PCIE_TXN128
PCIE_TXP128

+3VALW

21

R481 0_0402_5%

1 1

2 2

XMIT_OFF28

CH751H-40PT_SOD323-2

+1.5VS_WLAN +3VALW

4.7U_0805_10V4Z

1

1

C1344

C1345

2

2

ICH_PCIE_W AKE#
CH_DATA
CH_CLK
CLKREQ#_10

R461 0_0402_5%

PCIE_C_RXN1

1 2

PCIE_C_RXP1

1 2

R463 0_0402_5%

PCIE_TXN1
PCIE_TXP1

12

@

R479
100K_0402_5%

13

D

@

Q13
2N7002_SOT23

S

1 2

0_0603_5%

R2115

XMIT_OFF#

+3VS_WLAN

12

2

G

1 2

1022 change to follow HP design

0.01U_0402_16V7K

4.7U_0805_10V4Z

1

1

C676

C677

2

2

0.1U_0402_16V4Z

follow Mini-CARD SPEC

CONN@

JP13

112
334
556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
G153G2
G355G4

FOX_AS0B226-S99N-7F_52P

1212 Move to WLAN

+3VS_WLAN

1 2

R2118 0_0805_5%@

1 2

R458 0_0805_5%

1 2

R1564 0_0805_5%

1 2
1 2

+1.5VS_WLAN
+3VS_WLAN

1

C1350

2

0.1U_0402_16V4Z

1226 Add R to +3VALW

+3VALW

+1.5VS_WLAN

+1.5VS_WLAN

1023 change to follow 14"

USB20_N5 28
USB20_P5 28

1

C678

2

+3VS_WLAN

2
4
6
8
10
12
14
16
18

XMIT_OFF#

20

PLT_RST#

22

R464 0_0402_5%

24

R1582 0_0402_5%@

26
28

ICH_SMBCLK

30

ICH_SMBDATA

32
34
36
38
40
42
44
46
48
50
52
54
56

0903 update CIS to H5.2mm

0906 add

+3VS

+1.5VS

WL_LED# 41

+3VS
+3VALW

Mini Card 2---TV tuner

0.01U_0402_16V7K

1008 add them for debug card

1

C672

2

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

C673

2

CLK_DEBUG_PORT015

PCIE_RXN328
PCIE_RXP328

0.1U_0402_16V4Z

1

C674

2

CLK_PCIE_MCARD2#15
CLK_PCIE_MCARD215

4.7U_0805_10V4Z

CLKREQ#_615

R465
R467

1022 change to follow HP design

+3VS_TV+1.5VS_TV

1

1

2

C679

C680

2

+3VALW

1

2

0.1U_0402_16V4Z

0903 update CIS to H5.2mm

ICH_PCIE_W AKE#
CH_DATA
CH_CLK
CLKREQ#_6

+3VS_TV

PLT_RST#

PCIE_C_RXN3
PCIE_C_RXP3

PCIE_TXN3
PCIE_TXP3

0_0402_5%

1 2
1 2

0_0402_5%

PCIE_TXN328
PCIE_TXP328

1027 add them for meet Minicard Rev1.1 spec

1224 Delete R470,R471

C671

+1.5VS

+3VS

+3VALW

CONN@

JP14

2

112

4

334

6

556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
G153G2
G355G4

FOX_AS0B226-S99N-7F_52P

R1577

8

R1578

10

R1579

12

R1580

14

R1581

16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56

R476 0_0805_5%

1 2

R477 0_0805_5%

1 2
1 2

R2119 0_0805_5%@

1226 Add R to +3VALW
0906 add debug channel

+3VS_TV
+1.5VS_TV

1 2

LPC_AD3

1 2

LPC_AD2

1 2

LPC_AD1

1 2

LPC_AD0

1 2

PLT_RST#

R466 0_0402_5%@

1 2

R468 0_0402_5%

1 2

ICH_SMBCLK
ICH_SMBDATA

+1.5VS_TV
+3VS_TV

+1.5VS_TV

+3VS_TV

0_0402_5%DEBUG@
0_0402_5%DEBUG@
0_0402_5%DEBUG@
0_0402_5%DEBUG@
0_0402_5%DEBUG@

LPC_FRAME# 27,39,40

LPC_AD3 27,39,40
LPC_AD2 27,39,40
LPC_AD1 27,39,40
LPC_AD0 27,39,40

+3VALW
+3VS
+1.5VS_TV

USB20_N8 28
USB20_P8 28

1023 change to follow 14"

New Card

C685 0.1U_0402_16V4Z

3 3

+3VALW

12

C686 0.1U_0402_16V4Z

12

C687 0.1U_0402_16V4Z

12

PLT_RST#7,18,26,31,33,35

SYSON40,41,43,49
SUSP#34 ,40,43,46,48,49,50,52

+3VALW

R485 100K_0402_5%@

EXP_CPPE#28

+1.5VS

+3VS

PLT_RST#
SYSON
SUSP#

12

EXP_CPPE#

internal pull high to 3.3Vaux-in
EC need setting at Hi-Z & output Low

4 4

A

B

U25

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin
AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

R5538D001-TR-F_QFN20_4X4~D

1.5Vout

1.5Vout

3.3Vout

3.3Vout

PERST#

OC#

GND

11
13

3
5

15
19
8
16

NC

7

+1.5VS_PEC

+3VS_PEC

+3V_PEC

PERST#

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/02/13 2006/03/10

USB20_N928

USB20_P928

1023 change to follow 14"

ICH_SMBCLK15,28,35,39

ICH_SMBDATA15,28,35,39

+1.5VS_PEC
+1.5VS_PEC

ICH_PCIE_W AKE#28,31

CLK_PCIE_NCARD#15
CLK_PCIE_NCARD15

+3V_PEC
+3VS_PEC

CLKREQ#_415

PCIE_RXN428

PCIE_RXP428
PCIE_TXN428

PCIE_TXP428

Compal Secret Data

Deciphered Date

USB20_N9
USB20_P9
EXP_CPPE#

ICH_SMBCLK
ICH_SMBDATA

PERST#

CLKREQ#_4
EXP_CPPE#

D

CONN@

JEXP

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

SANTA_130801-1_26P

Size Document Number Rev

Custom

Date: Sheet

Near to Express Card slot.

+3VS_PEC

4.7U_0805_10V4Z

1

1

C683

C684

2

2

0.1U_0402_16V4Z

+1.5VS_PEC

4.7U_0805_10V4Z

1

1

C688

C689

2

2

0.1U_0402_16V4Z

+3V_PEC

4.7U_0805_10V4Z

1

1

C691

C690

2

2

0.1U_0402_16V4Z

Title

Compal Electronics, Inc.

WLAN, WWAN, New Card

LA-4082P Vader Discrete

0.2

of

32 58Wednesday, December 26, 2007

E

A

Use 0603 type and over 20 mils
trace width on both side

1 1

12

1 2
1 2

@

R1543

100_0402_5%

10K_0402_5%
10K_0402_5%

XDCE#

12

XDWP#_SDWP#
XD_RB#

+VCC_4IN1

@

C901

100P_0402_25V8K

R1544
R1545

+VCC_OUT

R1553

1 2

1102 Install R1553

0_0805_5%

Strap pin for JMicro

+3VS

1023 JMicro suggest to change

R1546

2 2

R1548

1212 Change XD_ALE to +3VS

R1547

+3VS

SDCLK

3 3

MSCLK

4 4

R15554.7K_0402_5%

1 2

R15564.7K_0402_5%

1 2

@

R1541

1 2

100_0402_5%

@

R1542

1 2

100_0402_5%

12

10K_0402_5%

12

10K_0402_5%

12

200K_0402_5%

XDCD0#_SDCD#

XDCD1#_MSCD#

C897

22P_0402_50V8J

C898

22P_0402_50V8J

XD_CLE
XD_ALE

XD_RE#

@

C1325

1 2

100P_0402_25V8K

@

C900

1 2

100P_0402_25V8K

24.576MHz_16P_3XG-24576-43E1

12

12

X2

12

For JM380

A

PCIE_TXN528

PCIE_TXP528

PCIE_RXN528
PCIE_RXP528

1023 JMicro suggest to change

CR_CPPE#28

CR_WAKE#28

1109 Add D86 for card reader wake up

XIN

12

R134
1M_0402_5%

XOUT

2N7002_SOT23-3

1212 Change to high active control

B

need change to low active switch

+VCC_4IN1

C1333

@

C1331

10U_0805_10V4Z

1

2

12

C694

0.1U_0805_50V7M

0.1U_0402_16V4Z

Power Circuit

U73

XIN
XOUT

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

38

TXIN

39

TXOUT

30

TAV33

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB380-QGAZ0A_QFN48_7X7

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CLK_PCIE_CR#15
CLK_PCIE_CR15

+3VS

+VCC_OUT

PCIE_RXN5_C
PCIE_RXP5_C

12

XDCD1#_MSCD#
XDCD0#_SDCD#

CR_LED#

C693 0.1U_0402_16V7K

1 2

C697 0.1U_0402_16V7K

1 2

R114 8.2K_0402_5%

C695

1 2

0.1U_0402_16V4Z

PLT_RST#7,18,26,31,32,35

R2087 0_0402_5%

1 2

D86

21

CH751H-40PT_SOD323-2

use for PWR_EN#

8mA sink current

White LED: VF=3V, IF = 5mA, Res = 56ohm

+5VS

12

21

13

D

Q53

S

B

1009 lower LED power consumption

R1557
470_0402_5%

D47
HT-F196BP5_WHITE

2

G

CR_LED#

R2097

4.7K_0402_5%

1 2

C

+VCC_OUT +VCC_4IN1

3
4

1

2

G5250C2T1U_SOT23-5

2

@

U74

IN
EN

GND

1

OUT

5

OUT

C1334

@

1U_0603_10V4Z

+3VS

reserved power circuit

10U_0805_10V4Z

5

APVDD

10

APV18

19

DV33

20

DV33

44

DV33

18

DV18

37

JMB380

Issued Date

DV18

MDIO0
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
MDIO6
MDIO7
MDIO8

MDIO9
MDIO10
MDIO11
MDIO12
MDIO13
MDIO14

TPA1P

TPBIAS_1

TREXT

APGND

TCPS
TPB1N
TPB1P
TPA1N

C

XD_SD_MS_D0

48

XD_SD_MS_D1

47

XD_SD_MS_D2

46

XD_SD_MS_D3

45

SDCMD_MSBS_XDWE#

43

SDCLK_MSCLK_XDCE#

42

XDWP#_SDWP#

41

XD_CLE

40

XD_D4

29

XD_D5

28

XD_D6

27

XD_D7

26

XD_RE#

25

XD_RB#

23

XD_ALE

22

TPA1+

34

TPBIAS1

35

TREXT

36
6
24

TPB1-

31

TPB1+

32

TPA1-

33
49

GND

2006/02/13 2006/03/10

40mil

12

@

1

R1562
150K_0402_5%

2

0.1U_0402_16V4Z

1

C892

2

0.1U_0402_16V4Z

1

2

R1554

1 2

Compal Secret Data

+VCC_4IN1

XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
XD_D4
XD_D5
XD_D6
XD_D7

SDCMD_MSBS_XDWE#
XDWP#_SDWP#
XD_ALE
XD_CD#
XD_RB#
XD_RE#
XDCE#
XD_CLE

1

1

C1326

C1327

2

2

1000P_0402_50V7K

+3VS

1

C1328

C692

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1329

2

0.1U_0402_16V4Z

12K_0402_1%

C899 220P_0402_50V8K

1 2

R1558

1 2

TPBIAS1

Deciphered Date

D

+1.8VS_CR

1

2

0.1U_0402_16V4Z

1

C1330

2

4.99K_0402_1%

1

C1332

0.33U_0603_16V4Z

2

D

Card Reader Connector

CONN@

JREAD

3

XD-VCC

32

XD-D0

10

9
8
7
6
5
4

34
33
35
40
39
38
37
36

11
31

41
42

1109 Do not install R2030

R2030

@

1 2

C893

0_0805_5%

+1.8VS_CR

R1550 22_0402_5%

1 2

R1551 22_0402_5%

1 2

R1552 22_0402_5%

1 2

R1560 56_0402_5%
R1559 56_0402_5%

R1561 56_0402_5%
R290 56_0402_5%

7 IN 1 CONN

XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

7IN1 GND
7IN1 GND

7IN1 GND
7IN1 GND

TAITW_R015-B10-LM

XDCD1#_MSCD#
XDCD0#_SDCD#

1 2
1 2

1 2
1 2

Title

Size Document Number Rev

Custom

Date: Sheet

E

21

SD-VCC

28

+1.8VS

SD-WP-SW

D46

2
3

DAN202U_SC70

SDCLKSDCLK_MSCLK_XDCE#
MSCLK
XDCE#

TPB1­TPB1+
TPA1­TPA1+

MS-VCC

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7

SD-CMD

SD-CD-SW

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

MS-INS

SDCLK

20

XD_SD_MS_D0

14

XD_SD_MS_D1

12

XD_SD_MS_D2

30

XD_SD_MS_D3

29

XD_D4

27

XD_D5

23

XD_D6

18

XD_D7

16

SDCMD_MSBS_XDWE#

25

XDCD0#_SDCD#

1

XDWP#_SDWP#

2

MSCLK

26

XD_SD_MS_D0

17

XD_SD_MS_D1

15

XD_SD_MS_D2

19

XD_SD_MS_D3

24

XDCD1#_MSCD#

22

SDCMD_MSBS_XDWE#

13

MS-BS

XD_CD#

1

1

C696

270P_0402_50V7K

2

CONN@

J1394A

1

TPB-

2

TPB+

GND

3

TPA-

GND

4

TPA+

SUYIN_020115FB004SX00ZL

Compal Electronics, Inc.

JMB380/385 card reader/1394

LA-4082P Vader Discrete

E

+VCC_4IN1

5
6

0.2

of

33 58Wednesday, December 26, 2007

A

B

C

D

E

1008 Change to +3V

+3VS_HDA

R867

1 2

BLM18BD601SN1D_0603

0.1U_0402_16V4Z

1

C904

1 1

2

+3VS

+3VS

R885

1 2

BLM18BD601SN1D_0603

+3VDD_CODEC

1

C725

2

1U_0603_10V4Z

+3VAMP_CODEC

1

C727

2

0.1U_0402_16V4Z

1019 Change Size to 1206 for IDT request

R886

1 2

1

C730

2

0.1U_0402_16V4Z

0_1206_5%

1

C731

2

1U_0603_10V4Z

+VDDA_CODEC

0212_Change to +5VALW.

W=40Mil

C722

1 2

+5VALW

0.1U_0402_16V4Z

SUSP#32 ,40,43,46,48,49,50,52

0208_Change SLP_S3# to SUSP#.

CODEC POWER

U28

1

IN

2

GND

3

SHDN

G9191-475T1U_SOT23-5

OUT

BYP

5

4

1

C732

0.1U_0402_16V4Z

2

(4.75V)

300mA

+VDDA_CODEC

1

C723

2.2U_0805_16V4Z

2

U56

SENSEB#

9

DVDD_CORE*

1

DVDD_CORE

25

AVDD1*

38

AVDD2**

3

DVDD_IO

32

MONO_OUT

6

BITCLK

5

SDO

8

SDI_CODEC

10

SYNC

11

RESET#

46

DMIC_CLK

33

CAP2

12

PCBEEP

40

NC / OTP

34

SENSE_B / NC

37

NC

18

NC

19

NC

20

NC

27

VREFFILT

26

AVSS1*

42

AVSS2**

7

DVSS**

92HD71B7X5NLGXA1X8_QFN48_7X7

@

C746

1 2

1000P_0402_50V7K

@

C747

1 2

1000P_0402_50V7K

@

C748

1 2

1000P_0402_50V7K

@

C749

1 2

1000P_0402_50V7K

R2068

@

1 2

0_0402_5%

R527

1 2

0_1206_5%

R528

1 2

0_1206_5%

B

EAPD/ SPDIF OUT 0 or 1 / GPIO 0

GNDAGND

VOL_UP/DMIC_0/GPIO 1
VOL_DN/DMIC_1/GPIO 2

GPIO 3

VREFOUT-E / GPIO 4

GPIO 5
GPIO 6

SPDIF OUT1 / GPIO 7

SPDIF OUT0

VREFOUT-B
VREFOUT-C

SENSE_A

PORTA_R

PORTA_L

PORTB_R

PORTB_L

PORTC_R
PORTC_L

PORTD_R
PORTD_L

PORTE_R

PORTE_L

PORTF_R

PORTF_L

GNDA 36,37,42

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VDD_CODEC

+3VAMP_CODEC

+3VS_HDA

HDA_BITCLK_CODEC27
HDA_SDOUT_CODEC27

1106 Add EC_BEEP

2 2

R2076 47K_0402_5%

EC_BEEP40

SB_SPKR28

3 3

1 2

R520

1 2

HDA_SDIN027
HDA_SYNC_CODEC27
HDA_RST#_CODEC27,40

1 2

DMIC_CLK17

R531 5.1K_0402_1%
R916 39.2K_0402_1%

47K_0402_5%
R521 10K_0402_5%

1 2

C956 0.1U_0402_16V4Z

+3VAMP_CODEC

SENSE_B#42

HDA_BITCLK_CODEC
HDA_SDOUT_CODEC

R517 33_0402_5%

HDA_SYNC_CODEC
HDA_RST#_CODEC

R1528 22_0402_5%
C913 1U_0603_10V4Z

C955

1 2

1 2
1 2

0.1U_0402_16V4Z

C744

1 2

1 2

12

MONO_INR

0.1U_0402_16V4Z

1

C979

2

1 2

10U_0805_10V4Z

VC_REFA

1106 Change C746,C747,C748,C749 to 1000PF

SENSE A SENSE B

Port Resistor Port Resistor

A 39.2K

4 4

B 20K

C 10K

D 5.11K

A

E

F

G

H

39.2K

20K

10K

5.11K

47

0_0402_5%

2
4
30
31

EAPD_CODEC_R

43
44

SPDIF_OUT_DOCK

45

SPDIF_OUT

48

VREFOUT_B

28
29

SENSE

13

HP_OUTR

41

HP_OUTL

39

MIC_EXT_R

22

MIC_EXT_L

21

MIC_IN_R

24

MIC_IN_L

23

LINE_OUT_R

36

LINE_OUT_L

35

DOCK_MIC_R_CODEC

15

DOCK_MIC_L_CODEC

14

17
16

C

R2060

1 2

EAPD_CODEC 40
DMIC_DAT 17

EAPD_CODEC_R 37

SPDIF_OUT_DOCK 42
SPDIF_OUT 19

VREFOUT_B 36

R523 5.1K_0402_1%

1 2

R526 20K_0402_1%

1 2

R524 39.2K_0402_1%

1 2

C951 0.1U_0402_16V4Z

1 2

R1599 10K_0402_1%@

1 2

HP_OUTR 36
HP_OUTL 36

MIC_EXT_R 36
MIC_EXT_L 36

MIC_IN_R 36
MIC_IN_L 36

LINE_OUT_R 36,37
LINE_OUT_L 36,37

C2108 1U_0603_10V4Z
C2109 1U_0603_10V4Z

12
12

1.21K_0402_1%

1/Av circuit

R1573

+3VAMP_CODEC

HP Jack & Dock

Jack MIC

Internal MIC

Internal SPKR.

1 2

1 2

1107 HP request

HDA_BITCLK_CODEC

12

@

R525
47_0402_5%

@

1

C745
33P_0402_50V8K

2

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

EXTMIC_DET# 36
JACK_DET# 36,42

INTMIC_DET# 36

1023 change detection circuit to solve Speaker
can not work.

R2080 10K_0402_5%

1 2

R2081 10K_0402_5%

1 2

R1574

1.21K_0402_1%

D

1107 Delete R515,R516,C916

DOCK_MIC_R 42
DOCK_MIC_L 42

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Codec_IDT9271B7

LA-4082P Vader Discrete

DOCK MIC

E

of

34 58Wednesday, December 26, 2007

0.2

5

4

3

2

1

MDC 1.5 Conn.

Change type 4/25

CONN@

JP18

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

@

Connector for MDC Rev1.5

1

C754

2

1 2

C752

HDA_SDOUT_MDC
HDA_SYNC_MDC

HDA_SDIN1_MDC

33_0402_5%

+3VS

0.1U_0402_16V4Z

1

C753

2

4.7U_0805_10V4Z

D D

HDA_SDOUT_MDC27

HDA_SYNC_MDC27

HDA_SDIN127

HDA_RST#_MDC27

R529

1000P_0402_50V7K

1

2

IAC_BITCLK

GND13GND14GND15GND16GND17GND

18

RES0
RES1

3.3V
GND3
GND4

ACES_88018-124G

R803 0_0603_5%

2
4
6
8
10
12

@

1 2

+3VS

R530

10_0402_5%

12

+3VS

HDA_BITCLK_MDC 27

C751

@

1 2

10P_0402_25V8K

Mini Card 1---Robson

C C

CLKREQ#_1115

CLK_PCIE_MCARD1#15
CLK_PCIE_MCARD115

PCIE_RXN228
PCIE_RXP228

B B

PCIE_TXN228
PCIE_TXP228

0.01U_0402_16V7K

1

C759

2

0.1U_0402_16V4Z

R533 0_0402_5%

1 2
1 2

R534 0_0402_5%

4.7U_0805_10V4Z

1

2

CLKREQ#_11

PCIE_RX2N_R
PCIE_RX2P_R

+3VS_MINI

C760

+3VS_MINI

1

2

C761

0.01U_0402_16V7K

1

C755

2

CONN@

JP19

1

1

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

53

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

GND1

GND2

GND155GND1

FOX_AS0B226-S99N-7F~D

4.7U_0805_10V4Z

1

C756

2

0.1U_0402_16V4Z

+1.5VS_MINI

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54
56

+1.5VS_MINI +3VALW

1

C757

2

1226 Add R to +3VALW

+3VALW

R2120

@

+3VS_MINI

1 2

0_0805_5%
R1565

1 2

0_0805_5%

R1566

1 2

0_0805_5%

0903 change from L to R

PLT_RST#

R469 0_0402_5%

1 2

R1583 0_0402_5%@

1 2

ICH_SMBCLK 15,28,32,39
ICH_SMBDATA 15,28,32,39

+1.5VS

0906 Add

+3VS_MINI
+3VALW

0903 update CIS to H5.2mm

@

1

C758

0.1U_0402_16V7K

2

+3VS

PLT_RST# 7,18,26,31,32,33

SP01000P700 S H-CONN ACES 88914-5204 52P P0.8

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

MDC 1.5 & Robson

LA-4082P Vader Discrete

1

0.2

of

35 58Wednesday, December 26, 2007

A

0906 Change

3/28 from
NC7SZ04P5X_SC70-5
change to 2N7002

R542 0_0402_5%

1 2
1 2

1 2
1 2

1 2

R1530
R946

R1531
R947

1 2

7.5K_0402_1%

1 2

7.5K_0402_1%

1 2

7.5K_0402_1%

1 2

7.5K_0402_1%

EC_MUTE#37,40

1 1

LINE_OUT_R34,37

LINE_OUT_L34,37

C770 0.1U_0402_16V7K
C772 0.1U_0402_16V7K

C773 0.1U_0402_16V7K
C1324 0.1U_0402_16V7K

1224 Change value

1

2

1U_0805_25V6K

1

C765

2

1212 Change to 1uF

2 2

C775

1U_0805_25V6K

Keep 10 mil
width

B

U30

14

RS/D

9

LS/D

16

RIN+

17

RIN-

12

LIN+

13

LIN-

15

RBYPASS

11

LBYPASS

2

GND

5

GND

TPA6020A2RGWR_QFN20_5x5

C

+5VAMP +5VS

1

C2102

2

RVDD
LVDD

ROUT+

ROUT-

LOUT+
LOUT-

10U_0805_10V4Z

19
7

SPKR+

1

SPKR-

3

SPKL+

4

SPKL-

6

20

NC

18

NC

10

NC

8

NC

R535

1 2

1

C2101
10U_0805_10V4Z

2

0906 Change pin define
Audio & USB board conn

CONN@

JP48

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

ACES_87213-1400G

0_1206_5%

EXT_MIC_R
EXT_MIC_L

HP_OUT_R
HP_OUT_L

EXTMIC_DET#
HP_DET#

CIR_IN

+5VL

EXTMIC_DET# 34

CIR_IN 40,42

D

+VDDA_CODEC

MIC_IN_L34

0_0603_5%

MIC_IN_R34

@

R900

R906 0_0402_5%@

1 2

4.7K_0402_5%

@

C970

1 2

12

22U_0805_6.3VAM

@

C971

1 2

22U_0805_6.3VAM

@

R904

12

12

@

R905

4.7K_0402_5%

C972

@

1 2

INT_MIC_DET#
MICIN_L
MICIN_R

1U_0603_10V4Z

1108 Change C9 70,C971 to 22uF

@

R1597

+3VS

ANA_MIC_DET40

INTMIC_DET#34

2N7002DW-7-F_SOT363-6

1023 change to n channel FET to solve Speaker can
not work.

1 2

Q108B

@

10K_0402_5%

3

5

4

E

MIC INT In-L

CONN@

JP21

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88231-04001

+VDDA_CODEC

@

R1596
10K_0402_5%

1 2

61

INT_MIC_DET#

2
@

Q108A
2N7002DW-7-F_SOT363-6

SP02000D000 S W-CONN ACES 85204-04001 4P P1.25

SPEAKER

1023 add R1012 to solve Speaker can
not work

JACK_DET#34,42

R1012
10K_0402_5%

1 2

A

2

+3VALW

1 2
61

2

R1007
10K_0402_5%

2N7002DW-7-F_SOT363-6
Q145A

G

13

D

Q202

2N7002_SOT23-3

S

3

5

4

3 3

HP_DET#

HP_OUTR34

HP_OUTL34

4 4

B+

12

R1011
330K_0402_5%

Q145B

2N7002DW-7-F_SOT363-6

6 1

5

Q147B
2N7002DW-7-F_SOT363-6

3

4

2

Q147A
2N7002DW-7-F_SOT363-6

B

1108 Add 0.01uF

1

C2112

0.01U_0402_16V7K

2

+

C2103

1 2

100U_6.3V_M

+

C2104

1 2

100U_6.3V_M

+

C1346

1 2

100U_6.3V_M

+

C1347

1 2

100U_6.3V_M

1107 Add R2082,R2083

R2082 40.2_0603_1%

1 2

R2083 40.2_0603_1%

1 2

HP_OUT_R

HP_OUT_L

HP OUT For M/B

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DOCK_LOUT_R 42

HP OUT For Docking

DOCK_LOUT_L 42

2006/02/13 2006/03/10

C

Compal Secret Data

Deciphered Date

SPKL+
SPKL­SPKR+
SPKR-

47P_0402_50V8J

VREFOUT_B34

MIC_EXT_R34
MIC_EXT_L34

1

C958

2

47P_0402_50V8J

R1587

C1359
C1360

@

2

47P_0402_50V8J

1 2

1U_0603_10V6K

1 2
1 2

1U_0603_10V6K

4.7K_0402_5%

C957

@

D

C960

@

C959

@

2

2

47P_0402_50V8J

0_0402_5%

R1588

EXT_MIC_R
EXT_MIC_L

Title

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

1

1

1

JP20

1

1

2

2

3

3

4

4

5

GND1

6

GND2

ACES_88231-04001

CONN@

C1358

1 2

1U_0603_10V4Z

12

12

R1589

4.7K_0402_5%

Compal Electronics, Inc.

AMP & Audio Jack

E

0.2

of

36 58Wednesday, December 26, 2007

A

1107 Change C982 from 5900p to 0.039u

C982 0.039uF_0603_25V

1 2

1 1

C986

LINE_OUT_R34,36

LINE_OUT_L34,36

1224 C987 change from 0.47u to 0.056uF
Change C984, C980, C993, C990 to 0.027uF

2 2

1107 Add pull down for Sub-Woofer
shutdown and EC_MUTE#

3 3

EC_MUTE#36,40

EAPD_CODEC_R34

4 4

1 2

1U_0603_10V4Z

C989

1 2

1U_0603_10V4Z

+VDDA_CODEC +VREF

R930

1 2

10K_0603_5%

10K_0603_5%

BASS_OUT

R2084 0_0402_5%@
R2061 0_0402_5%
R2063 8.2K_0402_5%

0.22U_0402_10V4Z

R923

1 2

20K_0402_1%
R925

1 2

20K_0402_1%

C991

+VREF

12

0.1U_0402_10V6K

1K_0402_5%

1 2

0_0402_5%

1 2

0_0402_5%

R941
R942

1

C1015

0.22U_0402_10V4Z

2

1

2

R932

1 2

C1002 0.47U_0402_10V4Z~D

1 2

C1005 0.47U_0402_10V4Z~D

R937
R938

@

1 2
1 2
1 2

1

C1011
1U_0603_16V4Z

2

1

C1014

2

1

2

C995

12

R934

1 2

51_0402_5%

1 2

51_0402_5%

R921

1 2

10K_0402_1%

100P_0402_50V8J

1

C996

2

4.7U_0603_6.3V4Z~D

+VDDA_CODEC

12

@

R935
0_0402_5%

1
2

3
4

5
7

8

17

18
19

U35A

3
2

U60

INN
INP

GAIN0
GAIN1

SHUTDOWN
VCLAMP

BSN
BSP

AGND
AGND

+VDDA_CODEC

4

P

+

OUT

-

G

TLV2464_TSSOP14

11

B+

HPA00304PWR_TSSOP24

1

B

C987

1 2

0.056uF_0603_16V

R931 0_0805_5%

1 2

C1001

1 2

D81

12

RLS4148_LL34-2

+V_WOOFER

24

VCC

23

VREF

22

BYPASS

21

COSC

20

ROSC

16

PVCC

9

PVCC

14

OUTP

15

OUTP

10

OUTN

11

OUTN

6

PGND

12

PGND

13

PGND

C

@

R917 0_0603_5%

1107 Change C980,C984 from 5900p to 0.039u
1107 Change C983,C992 from 1000p to 100p

R920

1 2

30.1K_0402_1%

R927

1 2

30.1K_0402_1%

1 2

C983

100P_0402_50V8J

C984 0.027uF_0603_16V

1 2

12

R922
10K_0402_1%

C992

100P_0402_50V8J

C993

1 2

0.027uF_0603_16V

12

R928
10K_0402_1%

+VREF

1

2

+VREF

1

2

1009 change Subwoofer power circuit

4.7U_0805_25V6-K

D82

RLS4148_LL34-2

1U_0603_10V4Z

C1003
C1004

2.2U_0603_106K
220P_0402_50V7K

C1010
R939

1 2

120K_0402_5%

12

1 2
1 2

1 2

+V_WOOFER

2

C1006
1U_0805_25V4Z

1

+V_WOOFER

2

C1008

1

1U_0805_25V4Z

2

1

2

C1007
1U_0805_25V4Z

1

3

BAT54AW_SOT323-3~D

D38

2

C1009

1

1U_0805_25V4Z

1108 Change to dual package

D

C980 0.027uF_0603_16V

+VDDA_CODEC

5
6

+VDDA_CODEC

10

9

4.7U_0805_25V6K

1 2

4

U35B

P

+

7

OUT

-

G

TLV2464_TSSOP14

11

R924

1 2

60.4K_0402_1%
C990

1 2

0.027uF_0603_16V

4

U35C

P

+

8

OUT

-

G

TLV2464_TSSOP14

11

R929

1 2

60.4K_0402_1%

1107 Change C1008,C1009 to 1UF and no install R936

B+

12

1

1

C1017

2

2

1 2

1 2

@

R936
0_0603_5%

C1016

4.7U_0805_25V6K

R919

10K_0402_1%

R926

10K_0402_1%

+VREF

C985

C988

1 2

1U_0603_10V4Z

C994 0.1U_0402_10V6K@
C997 0.1U_0402_10V6K@
C998 0.1U_0402_10V6K@
C999 0.1U_0402_10V6K@
C1000 0.1U_0402_10V6K@

1

2

100P_0402_50V8J

1 2
1 2
1 2
1 2
1 2

1113 Remove L58,L60 for layout spacing

L57

1 2

BLM31AJ260SN1L_1206~D

L59

1 2

BLM31AJ260SN1L_1206~D

4700P_0402_25V

C1012

1

2

1

C1013

2

4700P_0402_25V

Need check

+VREF

C981

1 2

5600P_0402_25V7K

R918

1 2

10K_0402_1%

+VDDA_CODEC

4

U35D

12

P

+

14

OUT

13

-

G

TLV2464_TSSOP14

11

Sub-woofer Connector

CONN@

JP49

1

1

2

2

3

GND

4

GND

ACES_88231-02001

E

BASS_OUT

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

D

Date: Sheet

Compal Electronics, Inc.

EQ & Sub Woofer

LA-4082P Vader Discrete

E

0.2

of

37 58Wednesday, December 26, 2007

5

4

3

2

1

Left side ESATA/USB combination ConnectorLeft side USB Connector

+5VALW

U32

1

GND

2

IN

3

IN

1

C787

D D

4.7U_0805_10V4Z

2

4

USB_EN#

EN#

TPS2061IDGNR_MSOP8

OUT
OUT
OUT
OC#

8

W=60mils

7
6
5

R561 10K_0402_5%

150U_D_6.3VM

1

+

C786

2

1 2

USB_VCCC

0.1U_0402_16V4Z

1

2

C788

1000P_0402_50V7K

1

C789

2

+5VALW

USB20_N1028
USB20_P1028

1023 change to follow 14"

+5VALW

USB20_N10

@

D22

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4

GND

USB20_P10

2

IO1

1

1023 change to follow 14"

CONN@

JP27

1

VCC

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020173MR004M598ZL

1023 change to follow 14"

USB20_N228
USB20_P228

SATA_TXP527
SATA_TXN527

SATA_RXN5_C27
SATA_RXP5_C27

+5VALW

SATA_TXN5

+5VALW +5VALW

SATA_RXN5

C784 0.01U_0402_16V7K
C785 0.01U_0402_16V7K

D15

@

4
3

PRTR5V0U2X_SOT143-4

@

4
3

PRTR5V0U2X_SOT143-4

2

IO1

VIN

1

GND

IO2

D84

2

IO1

VIN

1

GND

IO2

12
12

SATA_TXP5

SATA_RXP5

USB_VCCC

SATA_TXP5
SATA_TXN5

SATA_RXN5
SATA_RXP5

USB20_N2

CONN@

JP25

USB

1

B_VCC

2

B_D-

3

B_D+

4

B_GND

5

GND

6

A+

ESATA

7

A-

8

GND

SHIELD

9

B-

SHIELD

10

B+

SHIELD

11

GND

SHIELD

TYCO_1759576-1

D85

@

4
3

PRTR5V0U2X_SOT143-4

2

IO1

VIN

1

GND

IO2

12
13
14
15

USB20_P2

USB cable connector for Right side

C C

+5VALW

USB20_N028
USB20_P028

USB20_N128
USB20_P128

USB_EN#

1023 change to follow 14"

CONN@

JP43

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

G11119

10

G12

10

ACES_87213-1000G

12

Finger printer

1212 Add soft start circuit

B B

+3VALW

0.1U_0402_16V4Z

USB_EN#40

USB20_N728
USB20_P728

1023 change to follow 14"

PACDN042_SOT23-3~D

A A

C2121

@

R2113

@

47K_0402_5%

1 2

R698 0_0603_5%@

1 2

Q34

@

S

D

2

1

@

D33

13

G

SI2301BDS_SOT23

2

R654 0_0402_5%

1 2

R655 0_0402_5%

1 2

2

3

1

20070209 Add for FPR

R653

1 2

R582
0_0603_5%

1 2

1

C835

0.1U_0402_16V4Z

2

USB20_N7_R
USB20_P7_R

@

+3VS

0_0603_5%

CONN@

JP41

1

1

2

2

3

3

4

4

5

5

6

6

7

GND

8

GND

ACES_85201-06051

1107 Change FPR pin assignment

Touch screen connector

USB20_N1128
USB20_P1128

1023 change to follow 14"

1023 change to follow 14"

BT Connector

CONN@

JP30

1
2
3
4
5
6
7
8
9
10

C790

1 2

+3VAUX_BT

USB20_P6_R
USB20_N6_R

R569 1K_0402_5%@

1 2

R570 1K_0402_5%@

1 2

0612 no install

2

1

C794

1

2

R567 0_0402_5%
R568 0_0402_5%

Q24 SI2301BDS_SOT23

S

G

12

R2114
100K_0402_5%

1
2
3
4
5
6
7

8
GND1
GND2

ACES_88231-08001

1212 BT issue, change circuit

+3VALW

+3VS

R2112 0_0603_5%

1 2
1 2

R572 0_0603_5%@

1U_0603_10V4Z

0.1U_0402_16V4Z

BT_OFF28

R574 10K_0402_5%

+5VS

USB20_N11

2

12
12

+5VALW

USB20_N6_R

D

13

+5VS

D18

@

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4

1

C791

0.01U_0402_16V7K

2

1020 change to meet correct power rail

CONN@

JP26

1

1

2

2

3

3

4

4

5P connector

5

5

6

GND1

7

GND2

ACES_88266-05001

USB20_P11

2

IO1

1

GND

USB20_P6 28
USB20_N6 28
BT_LED 41
CH_DATA 32

CH_CLK 32

D25

@

4

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4

1

2

2

IO1

1

+3VAUX_BT

C792

0.1U_0402_16V4Z

USB20_P6_R

1

C793

4.7U_0805_10V4Z

2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

USB, BT, eSATA

LA-4082P Vader Discrete

1

0.2

of

38 58Wednesday, December 26, 2007

5

1113 EC request

+3VL +3VALW

R2091

@

0_0402_5%

1 2

D D

1

C795

0.1U_0402_16V4Z

SMB_EC_CK140,41,45
SMB_EC_DA140,41,45

2

8
7
6
5

R2092
0_0402_5%

1 2

U34

VCC
WP
SCL
SDA

AT24C16AN-10SI-2.7_SO8

GND

1

A0

2

A1

3

A2

4

12

R575
100K_0402_5%

12

R580
100K_0402_5%

4

FSEL#40
SPI_CLK40

C798

10P_0402_25V8K

1008 Change power rail

+3VL

0.1U_0402_16V4Z

R576

1 2
1 2
1 2

0_0402_5%
0_0402_5%
0_0402_5%

R577
R578

SPI_CLK_R

1

2

3

2

1

LPC Debug

SPI ROM

20mils

1

C796

2

SPI_FSEL#
SPI_CLK_R

U33

8

VCC

3

W

7

HOLD

1

S

6

C

5

D

WIESON G6179 8P SPI

SP07000F500 S SOCKET WIESON G6179-100000 8P
SPIFLASH
WIESO_G6179-100000_8P

VSS

4

SPI_SOSPI_FWR#

2

Q

1 2

R579 0_0402_5%

FRD#

FRD# 40FWR#40

Port

CLK_DEBUG_PORT115

LPC_FRAME#27,32,40

Connect pin3 & 23
together and pin 24
to GND in 6/29.

PCI_RST#26,40

LPC_AD027,32,40
LPC_AD127,32,40
LPC_AD227,32,40
LPC_AD327,32,40

Change f rom +3VL to +3VS. 6/9
Removed +3VS. 6/13

B+

ON/OFFBTNLED#

VCC1PWRGD
SPI_CLK_JP52
SPI_CS#_JP52
SPI_SI_JP52
SPI_SO_JP52
SPI_HOLD#_0

CONN@

JP32

1

Ground

2

LPC_PCI_CLK

3

Ground

4

LPC_FRAME#

5

+V3S

6

LPC_RESET#

7

+V3S

8

LPC_AD0

9

LPC_AD1

10

LPC_AD2

11

LPC_AD3

12

VCC_3VA

13

PWR_LED#

14

CAPS_LED#

15

NUM_LED#

16

VCC1_PWRGD

17

SPI_CLK

18

SPI_CS#

19

SPI_SI

20

SPI_SO

21

SPI_HOLD#

22

Reserved

23

Reserved

24

Reserved

ACES_87216-2404_24P

C C

ON/OFFBTN_LED#40,41

VCC1_PWRGD40

+3VALW

R889

1 2

Acceleromter-1

+3VS +3VS_ACL

D45

2 1

CH751H-40PT_SOD323-2

12

10K_0402_5%

1
6

8

12
13
14

7

+3VS_ACL

+3VS_ACL_IO

PCI_PIRQH#26

B B

ICH_SMBCLK15,28,32,35

+3VS_ACL

ICH_SMBDATA15,28,32,35

R1538

R1535

1 2

U72

LIS302DL

VDD_IO

GND

VDD

GND
GND

INT 1
INT 29GND

SDO
SDA / SDI / SDO
SCL / SPC

RSVD

CS

RSVD

LIS302DLTR_LGA14_3X5~D

0_0603_5%

2
4
5
10

3
11

+3VS_ACL_IO

0.1U_0402_16V4Z

R1539

1 2

0_0603_5%

1

C1321

2

+3VS_ACL_IO

+3VS_ACL

1

2

C1322
10U_0805_6.3V6M

SPI_CLK

FSEL#

FWR#

HOLD#

3.3K_0402_5%

FRD#

ON/OFFBTN_LED#

VCC1_PWRGD

1 2

R584 0_0402_5%@

1 2

R586 0_0402_5%@

1 2

R587 0_0402_5%@

1 2

R588 0_0402_5%@

1 2

R590 0_0402_5%@

1 2

R591 0_0402_5%@

1 2

R592 0_0402_5%@

SPI_CLK_JP52

SPI_CS#_JP52

SPI_SI_JP52

SPI_HOLD#_0

SPI_SO_JP52

ON/OFFBTNLED#

VCC1PWRGD

Must be pl aced in the center of the system.

U72 & U77 must be close

Acceleromter-2

1 2

ICH_SMBDATA

ICH_SMBCLK

PCI_PIRQH#

G_CS#

10K_0402_5% @

A A

+3VS_ACL

5

R2052

need to update CIS

@

U77

BMA150

INT

CSB
SCK
SDO
SDI

BMA150_LGA12

VDDIO

VDD

GND

RSVD
RSVD

RSVD
RSVD

4

4

5
6
7
8

9

+3VS_ACL_IO

2

+3VS_ACL

3
1

10

11
12

Security Classification

Issued Date

THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/02/13 2006/03/10

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

BIOS ROM

LA-4082P Vader Discrete

1

0.2

of

39 58Wednesday, December 26, 2007

+3VL_EC

1

2

0.1U_0402_16V4Z

SMB_EC_DA1
SMB_EC_CK1
SMB_EC_DA2
SMB_EC_CK2

1025 Add Pull
up for GPI

0205_Add Pull
down R402 for
SUSP#.

0.1U_0402_16V4Z

1

C809

C810

2

R605 4.7K_0402_5%
R606 4.7K_0402_5%
R607 4.7K_0402_5%
R608 4.7K_0402_5%

1

C811

2

1000P_0402_50V7K

1 2
1 2
1 2
1 2

CLK_PCI_EC15

R610

+3VL

C817

0.1U_0402_16V4Z

1

C812

2

@

C815

1 2

47K_0402_5%

12

0.1U_0402_16V4Z

1

C813
1000P_0402_50V7K

2

1212 Change to +3VL

+3VL +3VS

@

R609

1 2

1 2

15P_0402_50V8J

33_0402_5%

HDA_RST#_CODEC27,34

1102 Change HAD_RST#_CODEC

12

J1

from KBC pin 36 to pin 38

JOPEN

1105 Add resistor

1102 Change R615 to 8.2k ohm add pull down on SYSON

+3VALW

R620
10K_0402_5%

1 2

EC_PME#

ON/OFF41

DOCK_SLP_BTN#42

DIM_LED43

C551

15P_0402_50V8J

+3VL

1025 Add Pull up
for ESB channel

+3VALW

12

H_THERMTRIP#4,7,27

R618
10K_0402_5%

LID_SW#

4.7K_0402_5%

@

1

2

SUSP#

12

8.2K_0402_5%
R615

0214_Add Pull high
resistor for LID_SW# and
WL_BTN#.

1114 R620 no stuff, SB internal pull up
1212 Change power rail to +3VALW

R624

@

1 2

0_0402_5%

12

PCI_PME#26

SYSON

8.2K_0402_5%
R2062

1106 Change LANPWR to KBC pin31

R2078

LANPWR#_R

LANPWR#31

1 2

0_0402_5%

EC

@

DEBUG

JP35

port

ACES_85205-0400

ESB_CLK
ESB_DAT

@

R2079 0_0402_5%

1

1

URX

2

2
3
4

1 2

UTX

3
4

R639 4.7K_0402_5%

1 2

R638 4.7K_0402_5%

1 2

R2116

@

ESB_CLK

33_0402_5%

R2117

@

ESB_DAT

33_0402_5%

@

12

@

12

LANPWR#_R

C2123

12

15P_0402_50V8J

C2124

12

15P_0402_50V8J

+5VL

1225 Add R,C for EMI

LPC_FRAME#27,32,39

PCI_RST#

12

R619
100K_0402_5%

SMB_EC_CK139,41,45
SMB_EC_DA139,41,45
SMB_EC_CK24,20
SMB_EC_DA24,20

SLP_S3#28
SLP_S5#28
EC_SMI#28

+3VL

R630

R543 0_0402_5%

R455

1 2

10M_0402_5%

1

2

LID_SW#41

ESB_CLK41

ESB_DAT41

12

CONA#42

1 2

CRY1

CRY2

1

C584
15P_0402_50V8J

2

Y4

OSC4OSC

32.768KHZ_12.5PF_9H03200413

1019 change to

NC3NC

meet ME limit

R623

1 2

GATEA2027
KB_RST#27

SIRQ28

LPC_AD327,32,39
LPC_AD227,32,39
LPC_AD127,32,39
LPC_AD027,32,39

PCI_RST#26,39
EC_SCI#28

DIM_LED

10K_0402_5%

+3VL +3VL_EC

R603

0_0805_5%

1 2

U37

GATEA20
KB_RST#
SIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC

PCI_RST#
ECRST#
EC_SCI#

1 2

R2067 0_0402_5%

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2

SLP_S3#
SLP_S5#
EC_SMI#
LID_SW#
ESB_CLK
ESB_DAT
EC_PME#
EC_THERM TP_LED#
CONA#

UTX

LANPWR#_R
ON/OFF

CRY2
CRY1

2

B

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

+3VL_EC

+EC_AVCC

+3VS

1212 Change power rail to +3VS

12

R625
10K_0402_5%

EC_THERM

C

Q5
MMBT3904_NL_SOT23-3

E

3 1

Int. K/B

KSO5/GPIO25

Matrix

KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

XCLK1
XCLK0

SM Bus

12

L42
0_0603_5%

1 2

C820 0.1U_0402_16V4Z

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_AVCC

9

22

33

96

111

125

VCC

VCC

VCC

VCC

VCC

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

GPO

GPIO

GPI

GND

GND

GND

GND

GND

11

24

35

94

113

Issued Date

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10
GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

V18R

AGND

KB926QFB0_LQFP128_14X14

69

ECAGND

L43

1 2

0_0603_5%

2006/02/13 2006/03/10

1106 Add EC_BEEP

INV_PWM

21

FAN_PWM

23

EC_BEEP

26

ACOFF

27

BATT_TEMP

63

BATT_OVP

64

ADP_I

65

ADP_ID

66

TP_BTN#

75

ANA_MIC_DET

76

DAC_BRIG

68

VCTRL

70

IREF

71

AC_SET

72

EC_MUTE#

83

USB_EN#

84

I2C_INT

85

MUTE_LED

86

TP_CLK

87

TP_DATA

88

R2077 0_0402_5%@

97

DOCK_VOL_UP#

98

DOCK_VOL_DWN#

99
109

FRD#

119

FWR#

120

SPI_CLK

126

FSEL#

128

CIR_IN

73

VCC1_PWRGD

74

FSTCHG

89

STD_ADP

90

CAPS_LED#

91

BAT_LED#

92

ON/OFFBTN_LED#

93

SYSON

95

VR_ON

121

AC_IN

127

EC_RSMRST#

100

R622

101

1 2

EC_ON

102

WL_BLUE_LED#

103

PM_PWROK

104

BKOFF#

105

M_PWROK

106
107

LAN_DSM#_KBC

108

SLP_S4#

110

ENABLT

112
114

THERM_SCI#

115

SUSP#

116

PWRBTN_OUT#

117

NMI_DBG#

118
124

2

1

NMI_DBG#

Compal Secret Data

1 2

R621 10K_0402_5%

0_0402_5%

C821

4.7U_0603_6.3V6K

1212 For C
Revision

R1629 10K_0402_5%

1 2

D52

21

CH751H-40PT_SOD323-2

Deciphered Date

INV_PWM 17
FAN_PWM 4
EC_BEEP 34
ACOFF 46,47

BATT_TEMP 45
BATT_OVP 45
ADP_I 46
ADP_ID 45
TP_BTN# 41

ANA_MIC_DET 36

DAC_BRIG 17

VCTRL 46
IREF 46
AC_SET 46

EC_MUTE# 36,37

USB_EN# 38
I2C_INT 41

MUTE_LED 42

ISOLATEB 28,31
DOCK_VOL_UP# 42

DOCK_VOL_DWN# 42

FRD# 39

FWR# 39

SPI_CLK 39

FSEL# 39

CIR_IN 36,42

VCC1_PWRGD 39

FSTCHG 46

STD_ADP 46

CAPS_LED# 41

BAT_LED# 41

ON/OFFBTN_LED# 39,41
SYSON 32,41,43,49

VR_ON 51

EC_RSMRST# 28

EC_LID_OUT# 28

EC_ON 47

WL_BLUE_LED# 41
PM_PWROK 7,28
BKOFF# 17
M_PWROK 7,28
TP_LED# 41

LAN_DSM#_KBC 31

SLP_S4# 28
ENABLT 20

EAPD_CODEC 34

THERM_SCI# 20,28
SUSP# 32,34,43,46,48,49,50,52
PWRBTN_OUT# 28

1

C2118

0.1U_0402_16V4Z

2

C816

12

+3VL

PCI_SERR# 26

100P_0402_50V8J

12

1 2

ECAGND

R614 4.7K_0402_5%

1 2

R617 4.7K_0402_5%

1 2

TP_CLK 41

R616

@

4.7K_0402_5%

TP_DATA 41

1102 For C0 -- R616 no stuff

Select SPI RO M or LPC
ROM

TP_BTN#

CIR_IN

1104 Change po we r r ail from +3VL to +5VL

1025 add to solve S4 can not work
issue

17" INT_KBD
CONN.( TYPE "D"
KB)

KSO17
KSO16
KSO15
KSO10
KSO11
KSO14
KSO13
KSO12
KSO3
KSO6
KSO8
KSO7
KSO4
KSO2
KSI0
KSO1
KSO5
KSI3
KSI2
KSO0
KSI5
KSI4
KSO9
KSI6
KSI7
KSI1

Size Document Number Rev

Custom

Date: Sheet

BATT_OVP

2

1

R1630

1 2

10K_0402_5%

AC_IN

R643
10K_0402_5%

R642
10K_0402_5%

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

Title

D53

2 1

CH751H-40PT_SOD323-2

2

C822
100P_0402_50V8J

1

+5V

12

+3VS

12

+5VL

CONN@

JP34

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

27

25

G1

28

26

G2

ACES_85201-26051

Compal Electronics, Inc.

EC KB926/KB Conn.

LA-4082P Vader Discrete

C829
100P_0402_50V8J

0908 SWAP

+3VL

ACIN 46

1009 change
diode D53
direction

SPI_CLK

2

C828
15P_0402_50V8J

1

For EMI

@

KSO14
KSO11

2

KSO10

3

KSO15

4 5

100P_1206_8P4C_50V8

@

KSO6
KSO3

2

KSO12

3

KSO13

4 5

100P_1206_8P4C_50V8

@

KSO2
KSO4

2

KSO7

3

KSO8

4 5

100P_1206_8P4C_50V8

@

KSO0
KSI2

2

KSI3

3

KSO5

4 5

100P_1206_8P4C_50V8

@

2

KSO1

3

KSI0

4 5

100P_1206_8P4C_50V8

@

KSI1
KSI7

2

KSI4

3

KSI5

4 5

100P_1206_8P4C_50V8

CP1

81
7
6

CP2

81
7
6

CP3

81
7
6

CP4

81
7
6

CP5

81
7
6

CP6

81
7
6

0.1

of

40 58Wednesday, December 26, 2007

A

B

C

D

E

LED

White

D35

CAPS_LED#40

1 1

ON/OFFBTN_LED#

BAT_LED#40

SATA_LED#27

GPIO1928

2 2

1025 change to follow IBT00 design
1102 Change GSENSOR LED control pin from SB to KBC

1106 Delete R668, control by SB

R667

21

HT-F196BP5_WHITE

White

D28

21

HT-F196BP5_WHITE

White

D34

21

HT-F196BP5_WHITE

1 2

0_0402_5%

for debug only

1212 Delete SW5,SW6

1009 lower LED power consumption

R1534

1 2

470_0402_5%

R648

1 2

470_0402_5%

R631

1 2

470_0402_5%

D29

White

White

R633

R2031

1 2

820_0402_5%

1 2

470_0402_5%

21

43

AMBER

Amber

QSMF-C16E_AMBER-WHITE

+5VS_LED

+5VALW_LED

+5VALW_LED

Cap Lock

System status LED

Battery Charge LED

+5VS_LED

+3VS

HDD LED

1009 lower LED power consumption

WL_LED#32

SWITCH BOARD.

ESB_CLK40

ESB_DAT40
SMB_EC_CK139,40,45
SMB_EC_DA139,40,45

Updated @1029

1025 change Capactivity board pin defination

+3VS

Q115

47K

10K

2

DTA114YKAT146_SOT23-3

1 3

R652 0_0402_5%@

1 2

R641 0_0402_5%@

1 2

R644 0_0402_5%

1 2

R646 0_0402_5%

1 2

2N7002DW-7-F_SOT363-6

BT_LED38

R505

100K_0402_5%

WL_LED

R506

100K_0402_5%

61

Q114A

2

12

5

12

1009 Remove double pull up resisters

+5VS_LED

ON/OFFBTN_LED#39,40

I2C_INT40

+5VALW_LED

LID_SW#40

ON/OFF40

10K_0402_5%

R640

CAP_CLK
CAP_DAT

1 2

R705 150_0402_5%

1 2

12

1K_0402_5%

R666

D83 PJDLC05_SOT23~D@

WL_BLUE_LED# 40

+3VS

12

R2098

10K_0402_5%

1212 Add R2098 for LED

3

2N7002DW-7-F_SOT363-6
Q114B

4

1224 Add Cap

+3VL

1

C2122

4.7U_0805_10V4Z

2

CONN@

JP38

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

2

3

1

GND

12

GND

ACES_85201-1005N

3 3

K/B backlight

CONN@

JP51

1

1

2

2

3

5

3

G1

4

6

4

G2

ACES_85201-04051

4 4

R2059

1 2

0_0805_5%

+5VS_LED

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

T/P Board (Inculde T/P_ON/OFF)

1212 EMI request

@

C824

0.1U_0402_16V4Z

+5VS_LED

1

1

@

C825

2

2

TP_BTN#
TP_LED#

@

C826
100P_0402_50V8J

2

3

1

TP_CLK 40
TP_DATA 40
TP_BTN# 40
TP_LED# 40

0226_Change package from 0603 to 0402.

D

CONN@

JP33

1

1

2

2

3

3

4

4

5

5

TP_BTN#

6

6

TP_LED#

7

7

8

8

9

GND

10

GND

ACES_85201-08051

SP01000H300 S H-CONN ACES 85201-0405N 4P P1.0
ACES_85201-0405N_4P

2006/02/13 2006/03/10

C

Compal Secret Data

+5V

1

2

100P_0402_50V8J

Deciphered Date

TP_DATA
TP_CLK

D87
PSOT24C_SOT23-3

@

1212 Change TP po wer rail to +5VALW

+5VALW +5V

2

3

D31
PSOT24C_SOT23-3

@

1

SYSON32,40,43,49

Title

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

10K_0402_5%

SYSON

Compal Electronics, Inc.

KBD, ON/OFF, SW, CIR

Q29

SI2301BDS-T1-E3_SOT23-3

S

G

12

13

D

Q31
2N7002_SOT23-3

S

E

2

R645

2

G

D

13

of

41 58Wednesday, December 26, 2007

0.1

DOCK_PWR_ON Spec
0V = Notebook S4/S5, Dock off

2.5V = Notebook S3, Dock on
4V = Notebook S0, Dock on

+5VS

R589 1K_0402_5%

1 2

+3VALW

R585 1K_0402_5%

1 2

13

D

SYSON#43,50

Q36
2N7002_SOT23-3

1212 Change value

DOCK_PRESENT

2

G

S

1112 Change power rail from +3VALW to +3VL

R1570

1 2

22_0402_5%

12

2
3

R593
10K_0402_5%

1 2

R61
2K_0402_5%

D43

1

DAN202U_SC70

+3VL

1 2

13

2

G

DOCK_PWRON

R62
10K_0402_5%

D

Q14
2N7002_SOT23-3

S

CONA# 40

GREEN16
RED16
D_DDCDATA16
BLUE16
D_HSYNC16
D_DDCCLK16

USB20_N328

D_VSYNC16

USB20_P328
RJ45_MIDI3+31
RJ45_MIDI3-31
RJ45_MIDI2+31
RJ45_MIDI2-31
RJ45_MIDI1+31
RJ45_MIDI1-31
RJ45_MIDI0+31
RJ45_MIDI0-31

B+

Atlas/ Saturn Dock

CONN@

JP40

43

43

44

44

40

40

38

38

36

36

34

34

32

32

30

30

28

28

26

26

24

24

22

22

20

20

18

18

16

16

14

14

12

12

10

10

8

8

6

6

4

4

2

2

41

41

42

SHIELD

42

SHIELD

FOX_QL1122L-H212AR-7F

PJP3

21

PAD-OPEN 2x2m

DOCKVIN

GREEN
RED
D_DDCDATA
BLUE
D_HSYNC
D_DDCCLK

D_VSYNC

RJ45_MIDI3+
RJ45_MIDI3­RJ45_MIDI2+
RJ45_MIDI2­RJ45_MIDI1+
RJ45_MIDI1­RJ45_MIDI0+ DOCK_MIC_R_C
RJ45_MIDI0-

+V_BATTERY

need change to reverse type connector

DOCK_LOUT_R

DOCK_LOUT_L

1

1

2

2

C943

C942

220P_0402_50V7K

220P_0402_50V7K

R_VOL_DWN#R_VOL_UP#

1

C830
1000P_0402_50V7K

2

1

C831
1000P_0402_50V7K

2

DOCKVIN

1

C827
1000P_0402_50V7K

2

39

39

37

37

35

35

33

33

31

31
29
27
25
23
21
19
17
15
13
11

1

2

C923

CIR_IN

29

DOCK_PWRON

27

MUTE_LED

25

DOCK_SLP_BTN#

23

JACK_DET#

21

R_VOL_UP#

19

R_VOL_DWN#

17

SPDIFO_L

15

AUDIO_OGND

13

DOCK_LOUT_R

11

DOCK_LOUT_L

9

9

7

7

DOCK_MIC_L_C

5

5

AUDIO_IGND

3

3

DOCK_PRESENT

1

1

45
46

DOCK_MIC_R
DOCK_MIC_L

1

2

C924

220P_0402_50V7K

220P_0402_50V7K

CIR_IN 36,40

MUTE_LED 40

DOCK_SLP_BTN# 40

R649 200_0402_5%

1 2

R650 200_0402_5%

1 2

DOCK_LOUT_R 36
DOCK_LOUT_L 36

12

R804
2K_0402_5%

MMBT3904_NL_SOT23-3

1000P_0402_50V7K

MIC_Dock

DOCK_MIC_R34
DOCK_MIC_L34

SPDIFO_L

C902

+1.5VS

@

R1621
33_0402_5%

1 2

C

@

Q112

1

2

2

B

E

3 1

R1622

1 2

0_0402_5%

12

R805
2K_0402_5%

1107 Delete C976,C977

JACK_DET# 34,36

DOCK_VOL_UP# 40
DOCK_VOL_DWN# 40

C895

220P_0402_25V8J

DOCK_VOL_UP#
DOCK_VOL_DWN#

C894

1 2

0.1U_0402_16V7K

12

1

R651
110_0402_5%

2

Need 600 Ohm 500 mA

L56
FBM-11-160808-601-T_0603

1 2
1 2

L55
FBM-11-160808-601-T_0603

1009 Add pull up

R594 10K_0402_5%
R595 10K_0402_5%

R647 220_0402_5%

1 2

1

C921

220P_0402_50V7K

2

12
12

SPDIF_OUT_DOCK 34

DOCK_MIC_R_C
DOCK_MIC_L_C

1

C922

2

220P_0402_50V7K

+3VS

1009 Remove TV components

DOCK_MIC_L_C

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/02/13 2006/03/10

Compal Secret Data

R912 10K_0402_5%

1 2

47K_0402_5%

Deciphered Date

R913

1

2

1 2

2

B

C978
1U_0603_10V6K

+3VS

12

R914
10K_0402_5%

C

Q15

E

MMBT3904_NL_SOT23-3

3 1

+3VS

12

R915
10K_0402_5%

3

Q100B

5

2N7002DW-7-F_SOT363-6

4

Title

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

2

Compal Electronics, Inc.

DOCK CONN.

SENSE_B# 34

61

Q100A
2N7002DW-7-F_SOT363-6

of

42 58Wednesday, December 26, 2007

0.1

5

4

3

2

1

+5VALW to +5VS Transfer +3VALW to +3VS Transfer

B+

U39

8

D

1

12

D D

R2099

330K_0402_5%

SUSP

5

C841
10U_0805_10V4Z

2

3

Q89B

2N7002DW-7-F_SOT363-6

4

7

D

6

D

5

D

AO4466_SO8

RUNON_5VS

12

R2100

@

470_0402_5%

1

C2119

@

0.01U_0402_16V7K

2

+5VS+5VALW +3VS+3VALWB+

1

S

2

S

3

S

4

1

G

C837

0.1U_0402_16V4Z

2

1

C838
10U_0805_10V4Z

2

1212 For power sequence

R656

330K_0402_5%

SUSP

2

12

1

C836
10U_0805_10V4Z

2

61

Q89A

2N7002DW-7-F_SOT363-6

RUNON

U40

8

D

7

D

6

D

5

D

AO4466_SO8

12

R657
470_0402_5%

1

C842

0.01U_0402_16V7K

2

1

S

2

S

3

S

4

G

1

C839

0.1U_0402_16V4Z

2

1

C840
10U_0805_10V4Z

2

+1.8V to +1.8VS Transfer

+5VL

100K_0402_5%

SYSON#

Q96A

SYSON

R658

2

+5VL

12

61

12

R659
100K_0402_5%

SUSP

3

Q96B

SUSP#

5

2N7002DW-7-F_SOT363-6

4

SUSP 50SYSON#42,50

SUSP# 32,34,40,46,48,49,50,52

+1.8VS+1.8V

U59

S

D

S

D

S

D

G

D

AO4466_SO8

+1.8VS_ONRUNON

1
2
3
4

1

2

C C

C963

10U_0805_10V4Z

8
7
6
5

1

2

R1932

1 2

150K_0402_1%

D78

1 2

1SS355_SOD323-2

1

C961

2

0.1U_0402_16V4Z

C2100

0.1U_0402_16V4Z

220U_6.3VM_R15

1

+

C1618

2

1

C962

2

10U_0805_10V4Z

SYSON32,40,41,49

2N7002DW-7-F_SOT363-6

DIMM LED

DIM_LED40

DIM_LED

1009 Add for LED power

H38
HOLEA

1

+5VALW +5VALW_LED

12

R877

10K_0402_5%

13

D

2

G

S

Q66

SI2301BDS-T1-E3_SOT23-3

S

G

DIM_LED#

Q97
2N7002_SOT23-3

Q18

SI2301BDS-T1-E3_SOT23-3

S

G

DIM_LED#

1212 Delete Q97B,R211

D

13

1

D

13

+5VS_LED+5VS

C905

0.1U_0402_16V4Z

2

1

C294

0.1U_0402_16V4Z

2

H36

H37

HOLEA

HOLEA

1

1

2

2

1212 Outline modify

H6
HOLEA

1

H7
HOLEA

1

H8
HOLEA

1

H9
HOLEA

1

H10
HOLEA

1

H2
HOLEA

1

H3
HOLEA

1

H1
HOLEA

B B

1

H5
HOLEA

1

H11

H12

HOLEA

1

H21
HOLEA

1

H31
HOLEA

1

HOLEA

1

H22
HOLEA

1

H32
HOLEA

1

Discharge circuit

+5VS +3VS

12

R660
470_0603_5%

61

Q93A

2N7002DW-7-F_SOT363-6

A A

2

2N7002DW-7-F_SOT363-6

5

5

12

R661
470_0603_5%

3

Q93B

2N7002DW-7-F_SOT363-6

4

+1.8V

12

61

2

4

R662
470_0603_5%

Q94A

2N7002DW-7-F_SOT363-6

+1.5VS

12

R663
470_0603_5%

3

Q94B

SUSPSUSP SUSPSUSP SUSP SUSPSYSON#

5

2N7002DW-7-F_SOT363-6

4

+VCCP +0.9V +1.8VS

12

R664
470_0603_5%

61

Q95A

2

2N7002DW-7-F_SOT363-6

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

12

R665
470_0603_5%

3

Q95B

5

4

2N7002_SOT23-3

2006/02/13 2006/03/10

12

R697
470_0603_5%

Q99

13

D

2

G

S

Compal Secret Data

Deciphered Date

2

H14

H13

HOLEA

HOLEA

1

1

H23

H24

HOLEA

HOLEC

1

1

FM2

FM1

1

1

Title

DC/DC Interface

Size Document Number Rev

Custom

LA-4082P Vader Discrete

Date: Sheet

H16

1

HOLEA

1

H26
HOLEC

1

FM4

H17
HOLEA

1

H27
HOLEC

1

1

H15
HOLEA

1

H25
HOLEC

1

FM3

Compal Electronics, Inc.

H19
HOLEA

1

H29
HOLEC

1

H34
HOLEA

1

43 58Wednesday, December 26, 2007

of

H20
HOLEA

1

H35
HOLEA

1

0.1

H18
HOLEA

1

H28
HOLEC

1

H33
HOLEA

1

1

5

HDMI_CLK-19

HDMI_CLK+19

D D

HDMI_TX0-19

HDMI_TX0+19

HDMI_TX1-19

HDMI_TX1+19

HDMI_TX2-19

C C

HDMI_TX2+19

HDMI_CLK-

HDMI_CLK+

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2-

HDMI_TX2+

R2104

@

1 2

0_0402_5%

L70

1

1

4

4

WCM-2012-900T_0805

R2105

@

1 2

0_0402_5%
R2106

@

1 2

0_0402_5%

L71

1

1

4

4

WCM-2012-900T_0805

R2107

@

1 2

0_0402_5%
R2108

@

1 2

0_0402_5%

L72

1

1

4

4

WCM-2012-900T_0805

R2109

@

1 2

0_0402_5%
R2110

@

1 2

0_0402_5%

L73

1

1

4

4

WCM-2012-900T_0805

R2111

@

1 2

0_0402_5%

2

3

2

3

2

3

2

3

HDMI_R_CLK-

2

HDMI_R_CLK+

3

HDMI_R_TX0-

2

HDMI_R_TX0+

3

HDMI_R_TX1-

2

HDMI_R_TX1+

3

HDMI_R_TX2-

2

HDMI_R_TX2+

3

4

1212 Add 0 ohm

HDMI Connector

1

C1348

0.1U_0402_16V4Z

2

+5VS

1

5

P

4

OE#

A2Y

G

U75
SN74AHCT1G125GW_SOT353-5

3

HDMI_R_TX0­HDMI_R_TX0+

HDMI_R_TX1­HDMI_R_TX1+

HDMI_R_TX2­HDMI_R_TX2+

3

R1571

1 2

2.2K_0402_5%

+3VS

HDMI_DETECT 20

C1249 100P_0402_50V8J@

1 2

C1250 100P_0402_50V8J@

1 2

C1251 100P_0402_50V8J@

1 2

C1252 100P_0402_50V8J@

1 2

C1253 100P_0402_50V8J@

1 2

C1254 100P_0402_50V8J@

1 2

1009 update correct CIS & P/N

BAT54AW_SOT323-3~D

0.1U_0402_16V4Z

2

R1572

100K_0402_5%

C1349

1

1 2

2

D79

R1036

2.2K_0402_5%

HDMI_HPD

HDMIDAT
HDMICLK

HDMI_R_CLK­HDMI_R_CLK+

HDMI_R_TX0­HDMI_R_TX0+

HDMI_R_TX1­HDMI_R_TX1+

HDMI_R_TX2­HDMI_R_TX2+

1

+5VS

1

2

1 2

3

R1035

2.2K_0402_5%

1 2

21

D41

RB411D T146 _SOT23-3

CONN@

JHDMI

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

SUYIN_100042MR019SX53ZL

GND
GND
GND
GND

20
21
22
23

Issued Date

HDMI ESD

2006/02/13 2006/03/10

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

HDMI LS & Conn.

LA-4082P Vader Discrete

1

0.1

of

44 58Wednesday, December 26, 2007

+3VS

2

Q98A

HDMIDAT_VGA20

HDMICLK_VGA20

B B

A A

61

2N7002DW-7-F_SOT363-6

+3VS

5

Q98B

3

4

2N7002DW-7-F_SOT363-6

HDMIDAT

HDMICLK

Security Classification

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

+3VALW

PQ3
TP0610K-T1-E3_SOT23-3

B

C

D

2

1 1

1 3

PR8
100_0402_5%

ACES_88334-057N

5

5

4

4

3

3

2

2

1

1

PJP1

2 2

1 2

ADP_SIGNAL

ADPIN

PD1

2

1

1 2

PR3
10K_0402_5%

3

@PJSOT24C_SOT23-3

AC_LED 46

12

12

100P_0402_50V8J

PC2

12

PD4

PR2

RLZ3.6B_LL34

10K_0402_5%

SMB3025500YA_2P

1 2

12

PC3
1000P_0402_50V7K

PL1

PC4

100P_0402_50V8J

12

PC7

12

VIN

@100P_0402_50V8J

12

PC5

1000P_0402_50V7K

ADP_ID 40

PL2

SMB3025500YA_2P

DOCKVIN

12

PC6

0.01U_0402_25V7K

BATT

12

+5VALW

PR1

340K_0402_1%

12

PR4

499K_0402_1%

12

12

PR6

105K_0402_1%

12

PC1

0.01U_0402_25V7K

3
2

PU1A

LM358ADT_SO8

8

P

+

1

0

-

G

4

PR5

10K_0402_5%

12

BATT_OVP 40

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 47 +-3 degree C

VMB

PL3

PJP2

3 3

4 4

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

GND

10

GND

SUYIN_200275MR008GXOLZR

12

PR17
1K_0402_5%

EC_SMD
EC_SMC

100_0402_5%

BAT_ID 46

PR16

6.49K_0402_1%

1 2

A

PR13

12

+3VL

12

PR14
100_0402_5%

BATT_TEMP 40

PD2
@SM05_SOT23

3
2

1

2

3

PD3

1

@SM24.TC_SOT23-3

SMB_EC_DA1

SMB_EC_CK1

SMB3025500YA_2P

1 2

12

PC8
1000P_0402_50V7K

B

12

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BATT

PC9

0.01U_0402_50V4Z

0.22U_0603_10V7K

SMB_EC_DA1 39,40,41

SMB_EC_CK1 39,40,41

PC10

2007/05/29 2008/05/29

CPU

12

+5VS

12

PH1
10K_TH11-3H103FT_0603_1%

PR10

15K_0402_1%

1 2

PR12

1 2

150K_0402_1%

+5VALW

12

2.55K_0402_1%

Compal Secret Data

Deciphered Date

PR11

PR15

150K_0402_1%

C

12

PR7

47K_0402_1%

1 2

8

5

P

+

6

-

G

4

12

PC11
1000P_0402_50V7K

7

0

PU1B

LM358ADT_SO8

ENTRIP1 47

13

D

PQ1

2

G

SSM3K7002FU_SC70-3

S

ENTRIP2 47

13

D

PQ2

2

G

SSM3K7002FU_SC70-3

S

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DC Connector/CPU_OTP

Montevina Consumer Discrete

D

45 58Wednesday, December 26, 2007

of

0.1

A

VIN

1 1

PR101

47K_0402_5%

1 2

12

PC101

47P_0402_50V8J

PR107
47K_0402_1%

1 2

PQ107

SSM3K7002FU_SC70-3

2 2

2

13

D

2

G

S

PACIN

ACOFF#

2

13

PQ105
DTC115EUA_SC70-3

PR111

3K_0402_1%

1 2

1 2

PD101

RLS4148_LL34-2

PQ101
AM4835EP-T1-PF_SO8

8
7

5

DTA144EUA_SC70-3

PQ104

1 3

13

D

2

G

S

VCTRL40

PQ109
SSM3K7002FU_SC70-3

1
2
36

4

PC106

PR114
@0_0402_5%

1 2

1U_0603_6.3V6M

P2

12

0.22U_0603_16V7K

12

PR109
150K_0402_5%

PC117

AM4835EP-T1-PF_SO8

1
2
3 6

4

12

PR106

200K_0402_5%

PR113

143K_0402_1%

12

PQ103

AC_SET40

SUSP#32,34,40,43,48,49, 50,52

12

12

PR115
100K_0402_1%

8
7

5

@0.01U_0402_16V7K

PC112

1 2

1U_0603_6.3V6M

Charge Detector

ADP_I40

PR123

3
2

P2

12

8

+

-

4

1M_0402_5%

1 2

PR125
47_1206_5%

P

1

O

G

PU102A
LM393DG_SO8

12

PC125

0.1U_0603_25V7K

+3VL

12

PR129

10K_0402_1%

STD_ADP 40

+3VL

PR128

100K_0402_5%

2

G

FSTCHG40

12

CHGEN#

13

D

PQ112
SSM3K7002FU_SC70-3

S

FSTCHG#

1 2

PR137
20K_0402_1%

+3VL

PR132

100K_0402_5%

2

G

ACDET

12

3 3

VIN

12

PR131
133K_0402_1%

12

PR135
10K_0603_0.1%

1.24VREF

4 4

PR104
0_0402_5%

1 2

PC107

PR110
0_0402_5%

1 2

BQ24740VREF

+3VL

PR116

39K_0402_5%

10K_0402_5%

1 2

12

PC120

0.22U_0603_10V7K

12

13

D

PQ113
SSM3K7002FU_SC70-3

S

PR138

100K_0402_1%

B

12

12

PR118

0.1U_0402_10V7K

8

9

10

11

12

13

14

ACSET

IADSLP

AGND

VREF

VDAC

VADJ

EXTPWR

ISYNSET

PC121

PC123

ACDET

7

6

LPREF

ACSET

IADAPT

SRSET

15

16

IADAPT

12

100P_0402_50V8J

12

P4

PR102

0.012_2512_1%

1 2

1 2

PC102

1U_0603_6.3V6M

12

PC108

0.1U_0603_25V7K

3

5

4

ACP

LPMD

ACDET

PU101
BQ24740RHDR_QFN28_5X5

SRP

BAT

SRN

19

17

18

BATT

133K_0402_1%

12

PR121
200K_0402_1%

B+

12

PC109
@0.1U_0603_25V7K

2

ACN

CELLS

20

PR120

PL101
HCB2012KF-121T50_0805

1 2

CHGEN#

1

29

TP

CHGEN

28

PVCC

27

BTST

26

HIDRV

25

PH

24

REGN

23

LODRV

22

PGND

DPMDET

21

12

BST_CHG

DH_CHG

LX_CHG

REGNVADJ

DL_CHG

IREF 40

12

PC103

4.7U_0805_25V6-K

PR108
10_1206_5%

1 2

PC110
1U_0805_25V6K

1 2

PD102

RLS4148_LL34-2

12

PC119
1U_0603_10V6K

PR117

100K_0402_5%

1 2

13

D

2

G

PQ111

S

SSM3K7002FU_SC70-3

12

PC104

4.7U_0805_25V6-K

PC111

0.1U_0402_10V7K

1 2

12

12

PC105

4.7U_0805_25V6-K

BQ24740VREF

12

PR119
47K_0402_5%

12

PC124

0.1U_0603_25V7K

C

CHG_B+

578

3 6

578

3 6

CHG_B+

PQ108
AO4466_SO8

241

PQ110
AO4466_SO8

241

BAT_ID 45

12

PC122

0.047U_0402_16V7K

PL102
10U_LF919AS-100M-P3_4.5A_20%

1 2

12

@0.1U_0603_25V7K

PR126

133K_0402_1%

12

PC126

AC_LED45

12

PC113

PC114

4.7U_0805_25V6-K

VIN

12

PR130

2.15K_0402_1%

1 2

12

PR133
10K_0603_0.1%

PC127

22P_0402_50V8J

+3VL

PR112

0.015_1206_1%

1 2

1 2

4.7U_0805_25V6-K
PC118

0.1U_0402_10V7K

12

PQ102
FDS6675BZ_SO8

1
2
3 6

4

ACOFF#

PR139

100K_0402_5%

1 2

PACIN

2

G

BATT

12

PR122
1M_0402_5%

1 2

8

PU102B

5

P

+

O

6

-

G

LM393DG_SO8

4

60.4K_0402_1%

4

5

8
7

5

13

D

PQ114
SSM3K7002FU_SC70-3

S

12

PC115

PC116

4.7U_0805_25V6-K

4.7U_0805_25V6-K

7

PD103

RLZ4.3B_LL34

PR136

1 2

PU104

REF

CATHODE

NC
NC

ANODE

LMV431ACM5X_SOT23-5

BATT

VIN

12

PR127

10K_0402_1%

12

P2

3
2
1

D

PR103

47K_0402_5%

1 2

12

PR105
10K_0402_5%

13

2

PQ106
DTC115EUA_SC70-3

PR124
1K_0402_5%

1 2

12

PR134
10K_0402_5%

1.24VREF

VIN

ACOFF 40,47

ACIN 40

PACIN

Security Cl assification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Docum e n t N u mb er Re v

Date: Sheet

Charger

Montevina Consumer Discrete

D

of

46 58Wednesday, December 26, 2007

0.1

A

B

C

D

E

2VREF_51125

PC302

ENTRIP2

6

ENTRIP2

EN0

13

1 2

PR312

@0_0402_5%

PR317

0_0402_5%

0.22U_0603_10V7K

5

VFB2

SKIPSEL

14

B++

12

PR302

30.9K_0402_1%

1 2

PR304

4

TONSEL

GND

15

20K_0402_1%

1 2

PR306

133K_0402_1%

ENTRIP1

1 2

2

1

3

VFB1

VREF

ENTRIP1

24

VO1

23

PGOOD

22

VBST1

21

DRVH1

20

LL1

19

DRVL1

TPS51125RGER_QFN24_4X4

VREG5

VIN

VCLK

17

16

18

UG_5V
LX_5V
LG_5V

PR308

0_0402_5%

1 2

VL

12

PC311

12

10U_0805_10V6K

PC312

0.1U_0603_25V7K

1 2

0_0805_5%

PR316

B++

12

PC304

2200P_0402_50V7K

PC308

0.1U_0402_10V7K

1 2

12

12

PC313

PC305

4.7U_0805_25V6-K

4.7U_0805_25V6-K

UG1_5V

PR310
0_0402_5%

1 2

R_EC_RSMRST# 28

578

PQ302

AO4466_SO8

3 6

241

PL303

4.7UH_PCMC063T-4R7MN_5.5A_20%

1 2

578

3 6

241

PQ304

FDS6690AS_NL_SO8

+5VALWP

1

+

PC310

150U_D_6.3VM

2

1 1

PR301

13.7K_0402_1%

1 2

B+

2 2

3 3

PL301

HCB2012KF-121T50_0805

1 2

B++

12

PC301

2200P_0402_50V7K

+3VALWP

12

PC303

4.7U_0805_25V6-K

PL302

4.7UH_SIQB74B-4R7PF_4A_20%

1

+

PC309

2

+3VLP

578

PQ301
AO4466_SO8

12

PQ303
AO4466_SO8

220U_6.3VM_R15

ENTRIP245ENTRIP145

UG1_3V

PR309

3 6

241

578

3 6

241

0_0402_5%

1 2

PC306

10U_0805_6.3V6M

LG_3V

LX_3V

12

PR307

1 2

1 2

0_0402_5%

PC307

0.1U_0402_10V7K

PR303

20K_0402_1%

1 2

PR305

174K_0402_1%

1 2

PU301

25

P PAD

7

VO2

8

9
10
11
12

12

620K_0402_5%

VREG3
VBST2
DRVH2
LL2
DRVL2

1 2

BST_3V BST_5V

UG_3V

PR311

2VREF_51125

SSM3K7002FU_SC70-3

PQ305

13

D

2

G

S

2

G

13

D

PQ306
SSM3K7002FU_SC70-3

S

PJP301

+5VL

+3VL

0.1

of

47 58Wednesday, December 26, 2007

+3VL

1

5

P

NC

4

A2Y

4 4

ACOFF40,46

G

PU302

3

74LVC1G14GW_SOT353-5

A

SSM3K7002FU_SC70-3

PR315
604K_0402_1%

1 2

12

PQ308

2

G

PC314

0.022U_0402_16V7K

1 2

PR313

13

D

D

S

S

100K_0402_5%

13

PQ307

2

G

SSM3K7002FU_SC70-3

12

VL

100K_0402_5%
PR314

EC_ON 40

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

C

+5VALWP

+3VALWP

Compal Secret Data

PJP302

1 2

PAD-OPEN 4x4m
PJP303

1 2

PAD-OPEN 4x4m

Deciphered Date

(4.5A,180mils ,Via NO.= 9)

+5VALW

(3A,120mils ,Via NO.= 6)

+3VALW

Title

Size Document Number Rev

D

Date: Sheet

VL

PJP304

2 1

PAD-OPEN 2x2m

+3VLP

2 1

PAD-OPEN 2x2m

Compal Electronics, Inc.

3.3VALWP/5VALWP

Montevina Consumer Discrete

E

A

1 1

B

C

D

PR401

4.7K_0402_5%

SUSP#

50,52

2 2

3 3

1 2

0.1U_0402_10V7K

+1.5VSP

PC401

12

PR405

0_0402_5%

12

PR409
@10K_0402_5%

+5VALW

PR403

316_0402_1%

12

12

12

PC405
1U_0603_10V6K

+1.5VSP

PR407

1 2

10K_0402_1%

PR404
255K_0402_1%

1 2

578

3 6

578

3 6

241

241

AO4466_SO8
PQ401

AO4466_SO8
PQ402

PR402

13
12
11
10
9

BST1_1.5VBST_1.5V

DH_1.5V
LX_1.5V

+5VALW

12

4.7U_0805_10V6K

1 2

0.1U_0402_10V7K

1 2

DL_1.5V

PC406

PC402

PR406

15.4K_0402_1%

1 2

1

PU401

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

15

TP

EN_PSV

14

VBST

DRVH

V5DRV

DRVL

0_0402_5%

LL

TRIP

GND7PGND

8

4.7U_0805_25V6-K
PC403

12

3.3UH_PCMC063T-3R3MN_6A_20%

PL402

1 2

2200P_0402_50V7K

PC404

12

1

+

PC409

2

220U_B2_2.5VM

B++

+1.5VSP

TPS51117RGYR_QFN14_3.5x3.5

12

PR408

10K_0402_1%

+1.5VSP

PJP401

1 2

PAD-OPEN 4x4m

(4A,160mils ,Via NO.=8)

+1.5VS

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

2007/05/29 2008/05/29

Compal Secret Data

Deciphered Date

C

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.5VSP

Montevina Consumer Discrete

D

48 58Wednesday, December 26, 2007

of

0.1

5

4

3

2

1

D D

B+++

B+++

12

12

12

PC501

PC516

4.7U_0805_25V6-K

C C

+1.05V_VCCP

2.2UH_PCMC063T-2R2MN_8A_20%

+1.05V_VCCP

1

12

PC508

220U_D2_4VM

B B

+

2

PC509

4.7U_0805_6.3V6K

@4.7U_0805_25V6-K

PC502

2200P_0402_50V7K

PQ501

AO4466_SO8

PL501

12

PQ503

AO4466_SO8

578

3 6

241

578

3 6

241

SUSP#32,34,40,43,46,48,50,52

<BOM Structu re>

+1.05V_VCCP

@0.022U_0402_16V7K

0.1U_0402_10V7K

UG1_1.05V

PC506

12

PR513

0_0402_5%

PC513

@0.1U_0402_10V7K

29.4K_0402_1%

PC503

PR506
0_0402_5%

12

PR5080_0402_5%

12

PR501

1 2

12

12

12

BST_1.05V
UG_1.05V

LX_1.05V

LG_1.05V

1U_0603_10V6K

PR502

75K_0402_1%

1 2

PU501

25

P PAD

7

PGOOD2

8

EN2

9

VBST2

10

DR VH2

11

LL2

12

DR VL2

PR511

16.5K_0402_1%

1 2

12

PC514

PR505

0_0402_5%

6

VO2

PGND2

13

1 2

PR514

3.3_0402_5%

5

VFB2

TRIP2

14

1 2

4

3

GND

TONSEL

V5FILT

V5IN

15

16

12

PR503

10.2K_0603_0.1%

1 2

2

1

VO1

VFB1

24

PGOOD1

23

EN1

22

VBST1

21

DR VH1

20

LL1

19

DR VL1

TRIP1

PGND1

TPS51124RGER_QFN24_4x4

17

18

12

PR510

16.5K_0402_1%

+5VALW

PC515

4.7U_0805_10V6K

BST_1.8V
UG_1.8V

LG_1.8V

PR504

14.3K_0603_0.1%

1 2

12

PC512
@0.1U_0402_16V7K

+1.8VP

PR507

0_0402_5%

PR509

0_0402_5%

PR512

0_0402_5%

1 2

12

12

PC507

0.1U_0402_10V7K

1 2

UG1_1.8V

B+++

PQ502

AO4466_SO8

578

3 6

D6D5D7D

4

G

S

3

SYSON 32,40,41,43

PL502

HCB2012KF-121T50_0805

PC504

4.7U_0805_25V6-K

241

2.2UH_PCMB104E-2R2MS_14A_20%

1 2

8

PQ504
FDS6670AS_NL_SO8

4.7U_0805_6.3V6K

S

S

2

1

12

PL503

PC518

12

12

4.7U_0805_25V6-K

PC510

B+

12

12

PC519

4.7U_0805_25V6-K

PC505

2200P_0402_50V7K

+1.8VP

+1.8VPLX_1.8V

1

+

PC517

1 2

2

330U_2V_M_R15M

PJP501

5

1 2

PAD-OPEN 4x4m
PJP502

1 2

PAD-OPEN 4x4m

+1.05V_VCCP

+1.8VP

A A

(6A,240mils ,Via NO.=12)

+VCCP

(7A,280mils ,Via NO.= 14)

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

3

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

1.05V_VCCP/1.8VP

Montevina Consumer Discrete

49 58Wednesday, December 26, 2007

1

0.1

of

5

D D

C C

PJP601

1 2

+0.9VP

B B

+1.1V_PCIE

PAD-OPEN 3x3m

PJP603

1 2

PAD-OPEN 3x3m

(2A,80mils ,Via NO.= 4)

+0.9V

(3A,120mils ,Via NO.= 6)

+PCIE

4

+1.8V

12

PC601

10U_0805_10V4Z

SYSON#42,43

SUSP43

1 2

PR602

@0_0402_5%

SSM3K7002FU_SC70-3

1 2

PR604

0_0402_5%

PQ601

12

PC606
@0.1U_0402_16V7K

12

PR601
1K_0402_1%

12

PR603

13

D

2

G

1K_0402_1%

S

12

PC604

3

12

0.1U_0402_10V7K

PU601

VIN1VCNTL

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

+0.9VP

PC605
10U_0805_6.3V6M

2

6
5

NC

7

NC

8

NC

9

TP

12

PC603
1U_0603_10V6K

+5VALW

SUSP#32,34,40,43,46,48,49,52

1 2

PR606

0_0402_5%

PC611

@0.01U_0402_16V7K

6

PU603

7

POK

VCNTL

VOUT

8

EN

VOUT

12

GND

1

APL5913-KAC-TRL_SO8

VIN
VIN

FB

+5VALWP

12

PC609
1U_0603_10V6K

5
9
3
4
2

40.2K_0402_1%

105K_0402_1%

12

PR607

12

PR608

+1.5VS

12

12

PC613
47P_0402_50V8J

1

12

PC610
10U_0805_6.3V6M

+1.1V_PCIE

PC612
22U_0805_6.3V6M

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CU STODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITH OUT PRIOR WRITTEN CONSEN T OF COMPAL ELECTRONICS, INC.

3

2006/11/23 2007/11/23

Compal Secret Data

Deciphered Date

Title

Size Document Number R e v

2

Date: Sheet

Compal Electronics, Inc.

0.9VSP/2.5VSP/1.2V_PCIE

Montevina Consumer Discrete

1

50 58Wednesday, Decem ber 26, 2007

0.1

of

8

7

6

5

4

3

2

1

+CPU_B+

H H

PQ205

5

4

3 6

241

5

4

578

3 6

241

5

D8D7D6D

S1S2S3G

4

578

3 6

241

PQ206

D8D7D6D

@SI4684DY-T1-E3_SO8

S1S2S3G

PQ208

@AO4456_SO8

PQ200

D8D7D6D

SI4684DY-T1-E3_SO8

S1S2S3G

PR202

1 2

4.7_1206_5%

PC209

2200P_0603_50V7K

ISEN1DL_CPU1

PQ203
SI4684DY-T1-E3_SO8

ISEN2

578

3 6

241

+CPU_B+

PR201
10_0603_5%

4
3
5
6

1
2

9

8

0.01U_0402_25V7K

VR_TT#
RBIAS
NTC
SOFT

VID0
VID1
VID2
VID3
VID4
VID5
VID6

DPRSTP#
DPRSLPVR
PSI#
PMON
CLK_EN#
VR_ON
VSEN
RTN

VDIFF

FB

COMP

VW
GND

PR245

1 2

12

PC207

19

20

18

VIN

VSS

VDD

DFB15VO

DROOP

14

12

PC238

12

330P_0402_50V7K

+3VS

1 2

39

40

3V3

PGOOD

PWM1

ISEN1

PWM2

ISEN2

FCCM

PWM3

ISEN3

OCSET

VSUM

16

VO

PR246

1K_0402_1%

PR208

1.91K_0603_1%

27

23

26

22

24

25

21

7

VSUM

17

12

PR239

4.53K_0402_1%

12

PWM1

ISEN1

PWM2

ISEN2

0_0402_5%

@0_0402_5%

PC231

0.22U_0603_10V7K

VGATE 15,28

PR227

12

PR229

12

1 2

1 2

12

0.1U_0402_10V7K

PC234

1U_0603_10V6K

+5VS

PWM3

ISEN3

PR231

11.5K_0402_1%

PC229

1000P_0402_50V7K

12

PH200

12

10KB_0603_5%_ERTJ1VR103J

1_0402_5%

+5VS

PC224

1 2

PR237

12

PR247

PR252

12

3K_0402_1%

12

12

PC205

1U_0603_10V6K

14

PU201

VCC

11

PVCC

PWM1

PWM2

FCCM

EN

17

TP

12

PGND

5

PR250
0_0402_5%

BOOT1

12

UGATE1

13

PHASE1

2

LGATE1

10

BOOT2

9

UGATE2

8

PHASE2

6

LGATE2

GND

1

ISL6210CRZ-T_QFN16_4X4

+5VS

12

PC223

@1U_0603_10V6K

3

15

16

4

7

@1K_0402_1%

G G

+5VS

10_0603_5%

PR205

1 2

PC210

12
12
12
12

PR222

12

PR228

12

12

PC245
@82n_0402_10V7K

PR235
0_0402_5%

12

PR238

PC233

12

12

0.01U_0402_16V7K

1U_0603_10V6K

12

PC237

12

PU200 ISL6260CCRZ_QFN40_6X6

28
29
30
31
32
33
34

37
36

38
35
12
13

11

10

12

41

12

5.11K_0603_1%

1K_0402_1%

PR244

12

F F

PR210

12

0.015U_0402_16V7K

PR234

12

PC232

1 2

220P_0402_25V8J

147K_0402_1%

PC216

12

PR212

0_0402_5%

PR214

0_0402_5%

PR216

0_0402_5%

PR220

0_0402_5%

PR223

0_0402_5%

PR226 0_0402_5%

1000P_0402_50V7K

1000P_0402_50V7K

PC222

1800P_0402_50V7K

1 2

1 2

PC228

0.022U_0402_16V7K

12
12
12

0_0402_5%

12

12

12

PC220

12

PC221

12

1.2K_0402_1%

6.98K_0402_1%

PR211

0_0402_5%

PR213

0_0402_5%

PR215

0_0402_5%

PR217

499_0402_1%

0_0402_5%

PR236

51K_0402_1%

1000P_0402_50V7K
PR242

E E

CPU_VID05
CPU_VID15
CPU_VID25
CPU_VID35
CPU_VID45
CPU_VID55
CPU_VID65

H_DPRSTP#5,7,27

DPRSLPVR7,28

D D

H_PSI#5

CLK_ENABLE#15

VR_ON40

VCCSENSE5

C C

B B

VSSSENSE5

180_0402_1%

BST_CPU1_1

BST_CPU2_1

PU203

5

BOOT

VCC

6

FCCM

UGATE

2

PWM

PHASE

3

LGATE

GND

@ISL6208CRZ-T_QFN8

PR200

0_0402_5%

DH_CPU1

0_0402_5%

DH_CPU2
LX_CPU2

1
8
7
4

12

LX_CPU1

PR209

DL_CPU2

BST_CPU3_1

DH_CPU3
LX_CPU3

BST_CPU1_2

PR232

@0_0402_5%

AO4456_SO8

BST_CPU2_2

12

DL_CPU3

0.22U_0603_16V7K

1 2

PQ201

0.22U_0603_16V7K

1 2

PQ204

AO4456_SO8

12

BST_CPU3_2

@0.22U_0603_16V7K

1 2

PC206

578

3 6

241

PC217

578

3 6

241

PC230

PQ207

@AO4456_SO8

PQ202

AO4456_SO8

AO4456_SO8

578

PC202

PR230

10K_0402_1%

1 2

4.7_1206_5%

12

5.11K_0402_1%

1 2

VSUM

PR218

PR233

1 2

1 2

4.7_1206_5%

12

PC219

2200P_0603_50V7K

PC236

12

12

PC203

2200P_0402_50V7K

0.36H_ETQP4LR36WFC_24A_20%

1 2

PR206

4.7_1206_5%

1 2

PC225

1 2
12

@680P_0603_50V8J

PC204

10U_1206_25V6M

10U_1206_25V6M

PL201

1 2

PR204

0.22U_0603_16V7K

@0_0402_5%

12

PC212

2200P_0402_50V7K

PL202

0.36H_ETQP4LR36WFC_24A_20%

1 2

PR221

10K_0402_1%

1 2

PR224

5.11K_0402_1%

VSUM

12

12

PC226

PC227

@4.7U_0805_25V6-K

@2200P_0402_50V7K

@4.7U_0805_25V6-K

@0.36H_ETQP4LR36WFC_24A_20%

PR243

PR240

@10K_0402_1%

1 2

@4.7_1206_5%

PR248

@5.11K_0402_1%

1 2

VSUM

12

PC208

12

12

PR207

12

PC242

10U_1206_25V6M

PC218

0.22U_0603_16V7K

PR225

@0_0402_5%

12

12

PC244

@4.7U_0805_25V6-K

PL203

1 2

@0.22U_0603_16V7K

12

PC243

SMB3025500YA_2P

1

+

PC200

2

68U_25V_M_R0.36

PR203
10_0402_1%

1 2

VO

+CPU_B+

12

PC241

10U_1206_25V6M

12

+CPU_B+

12

@4.7U_0805_25V6-K

PC235

12

PR249

@0_0402_5%

PL200

1 2

PR219
10_0402_1%

1 2

VO

12

PC201

+VCC_CORE

+VCC_CORE

PR241
@10_0402_1%

1 2

VO

68U_25V_M_R0.36

1

+

2

B+

+VCC_CORE

A A

8

7

6

5

Security Cl assification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.

4

2005/03/10 2006/03/10

Compal Secret Data

Deciphered Date

3

Compal Electronics, Inc.

Title

Size Docu me n t N u m ber Re v

C

Montevina Consumer Discrete

Date: Sheet

2

CPU_CORE

of

51 58Wednesday, December 26, 2007

1

A

B

C

D

5

6

12

7

8

2.2_0603_5%

2.2U_0603_10V6K

PR719
0_0402_5%

12

4

EN

COMP

PU701

FB

ISL6269ACRZ-T_QFN16_4X4

FSET

VO

ISEN

9

+5VS

12

PR722

PC701

12

6269_PVCC

12

3

FCCM

PGND

10

PR703
0_0402_5%

+6269_VCC

PC707

12

2.2U_0603_10V6K

2

VCC

LG

11

1

VIN

GND

PGOOD

PHASE

UG

BOOT

PVCC

12

6269_PVCC

17

16

LX_VGA

15

14

13

PR711

0_0402_5%

DH_VGA

1 2

BST_VGA BST1_VGA

1 2

PR708

0_0402_5%

PR705

1 2

7.87K_0402_1%

DH_VGA_1

0.22U_0603_16V7K

1 2

PC706

578

+NVVDDP

PL701

10U_1206_25V6M

PC704

12

HCB2012KF-121T50_0805

2200P_0402_50V7K

PC710

12

1

1

+

+

2

PC713

2

PC708

330U_D2E_2VM_R7M

330U_D2E_2VM_R7M

+NVVDD

12

1

+

2

12

PC714

330U_D2E_2VM_R7M

B+

PC705
@680P_0402_50V7K

1

+

PC718

2

330U_D2E_2VM_R7M

(12A,480mils ,Via NO.= 24)

+NVVDDP

VGA_B+

10U_1206_25V6M

PC703

12

5

PQ701

D8D7D6D

SI4684DY-T1-E3_SO8

S1S2S3G

4

PL702

0.33UH_PCMC063T-R33MN_20A_20%

1 2

578

PQ703

AO4456_SO8

3 6

241

3 6

241

12

PR710

PQ702

@4.7_1206_5%

PC709

AO4456_SO8

@680P_0603_50V7K

1 2

PJP701

1 2

PAD-OPEN 4x4m
PJP702

1 2

PAD-OPEN 4x4m
PJP703

1 2

PAD-OPEN 4x4m

1 1

PR702

47K_0402_5%

SUSP#32,34,40,43,46,48,49,50

PR721

VDD_SENSE18

+NVVDDP

2 2

GPU_VID120

GPU_VID020

3 3

PR715

12

10K_0402_1%

PR717
10K_0402_1%

12

PR718
10K_0402_1%

12

12

PC712

0.022U_0402_16V7K

PR716

12

10K_0402_1%

0_0402_5%

PR712

10_0402_5%

1 2

2

G

12

PR714

8.66K_0402_1%

1 2

13

D

PQ705
SSM3K7002FU_SC70-3

S

12

PC711

0.01U_0402_16V7K

1 2

PR707

2.1K_0402_1%

1 2

13

D

2

G

S

12

PR713
13K_0402_1%

PQ704
SSM3K7002FU_SC70-3

1 2

0.1U_0402_10V7K

PC716

22P_0402_50V8J

12

PC717

6800P_0402_25V7K

PR704

4.12K_0402_1%

PC702

12

PR720

90.9K_0402_1%

PR706

57.6K_0402_1%

PC715

0.01U_0402_16V7K

+NVVDDP

0_0402_5%

PR709

12

12

12

12

+6269_VCC

GPUID1 GPUID0 NB9P-GS

00
0
1

1
0

0.9V

1.0V

1.05V

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

Compal Secret Data

Deciphered Date

C

Title

Size Document Number R e v

Date: Sheet

Compal Electronics, Inc.

VGA_CORE

Montevina Consumer Discrete

D

52 58Wednesday, December 26, 2007

of

0.1

5

4

Version Change List ( P. I. R. List ) for Power Circuit

3

2

1

Request

Item

Page# Tit le

D D

1

43 DCIN/

BATTERY CONN

44

Charger

Date

2006/09/07

Owner

HP R.L.

Change charger control from HW to FW All the related components

Issue Description

50 ADP_OCP
50 2006/10/12 DB2

2

3

4

5

6

C C

8

/PCIE_VDD

+1.25VMP/

52

+1.05V_VCCP

VDD_CORE

51

/PCIE_VDD

51 2006/11/08

/PCIE_VDD

51 VDD_CORE

/PCIE_VDD

VDD_CORE

51

9

48 2006/11/08

10

11

12

13

B B

1.8V/0.9V Add PM_SLP_M# sequence Add PR387 SI

+1.25VMP/

52

+1.05V_VCCP

+1.25VMP/

52

+1.05V_VCCP

50 2007/2/28 SI2System identity Change PR223 from 147K to 137KADP_OCP

2006/10/12

2006/10/12

2006/10/12 Fine tune PCIE_VDD

2006/11/08

2006/11/08Charger44 SI

2006/11/20 For HW's requirement, fine tune +2.5VS sequence

2007/2/28

HP R.L.

HP R.L.

HW
Tony J

PWR
Francis H

HW
Tony J

HW
Tony J

PWR
Francis H

HP

HW
Tony J

HW
Tony J

HP R.L.

Identify 65W adapter as "light" Change PR223 from 180K to 147KADP_OCP

Change VGA chipset from ATi M62S to M64S Change PR355 from 11K to 9.76K

For HW's requirement, fine tune +1.05V_VCCP sequence

Fine tune the GPU "Power Play" sequence

Change PR392 from 33.2K to 24.9K

Change PR249 from 0 to 47K
Add PC186 as 47pF
Install PD45

Change PR358 from 47K to 49.9K
Change PR359 from 150K to 100K

Add PC196 as 1uf

Fine tune the power sequence of PCIE_VDD Change PU31 pin5, 9 source from VDD_MEM18 to +1.8V
Base on "Energy STAR" spec, reduce S5 and S3

power consumption (AC mode)

Uninstall PQ11

Change PR243 to 47K,
Change PC170 to 0.1uF

Fine tune the +2.5VS power level to 2.57V (typ) Change PR244 from 13K to 13.7K SI2

Solution Description Cut in

DB1B

DB2

DB2

DB2

SIVDD_CORE

SI

SI

A A

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

PWR PIR

Montevina Consumer Discrete

1

0.1

of

53 58Wednesday, December 26, 2007

5

4

3

2

1

M.B. Ver.Reason for change PAGE Modify ListFixed IssueItem

Fix Audio disappear

<2007.10.08>

D D

<2007.10.09>

C C

B B

<2007.10.19>

1

2

Fix Audio disappear

3

4

Fix Audio disappear

5

Fix can not power on issue

6

7

Fix HDMI can not detect

1

2

3

Fix ODD wrong pins

4

5

Solve EC always damage

6

7

8

9

10

11

1

2

follow Intel SB design suggestion to separate HDA Bus

Add to determine board type and project

Meet EC request

follow Intel SB design suggestion

meet SW debug request

follow Intel HDA bus design for Discrete platform Change codec pow e r r ail from +1.5v to +3v

Meet EC and SPI access sequence

28

28 non-stuff R419, R695

29

32

34

39 change SPI power rail from+3valw to +3VL

Follow Intel design guide

follow Nvidia design request

Meet HP request to remove TV

update ODD footprint

lower system power consumption

Meet Sub-woofer pwoer request

18

18

30

33

37

Solve EC always damage

lower system power consumption

Meet HP request to remove TV Remove TV all components at Dock side

lower system power consumption and meet LED status

solve HDMI pull up

Meet ME limit area at KBC

41

42

43

44

27 Change Y4 material

Follow IDT suugestion 35 change R886 to 1206

Add R439, R440, R442, R444

Add R777, R776, R774, R775

Change power rail from +1.5v to +3v

Add Debug CLK and PLT_RST#

Change R30 value

7

change HDMI I2C channel to I2C B channel

Remove TV all components at VGA side

update JODD footprint

change Card Reader LED power rail

change D81, D82

change D53 direction40

Remove pull up resisters 41Double pull up and pwoer rail is different

change Cap-lock, HDD LED power rail

Add +5VS_LED (Inculde DIM function)

update D79 footprint

0.227

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

3

<2007.10.20>

<2007.10.22>

A A

1

2

3

1

2

5

Follow Nvidia suggestion 25 Change R193, R 196 size to 0603

follow correct power rail 38 change Touch screen power rail

39Meet HP request Change ST G-sensor P/N & package

Meet HP request for WLAN &TV slot swap

Swapped WLAN and TV all support components32

Change LAN chip to meet Energy star spec 31 change LAN brand to Realtek 0.2

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

2

Date: Sheet

Compal Electronics, Inc.

HW PIR(1)

Montevina Consumer Discrete

0.2

0.2

0.2

0.2

0.1

of

54 58Wednesday, December 26, 2007

1

5

4

3

2

1

M.B. Ver.Reason for change PAGE Modify ListFixed IssueItem

28

Fix USB loading of SB

<2007.10.23>

D D

1

2

3

1

follow 14" Blade USB channel design

Follow JMicro CardReader Vendor Suggestion

Solve Speak no sound issue add pullup at HP_DET#

Meet HP request for QC and DC co-lay add G TL REF and XDP circuits

<2007.10.25>

2

3

C C

<2007.10.31>

4

1

2

3

Meet Intel request for CLK request Add R127 to meet Intel CLK design

Solve G-sensor LED control

28, 41

Follow Capactivity board design

Chnage all USB channel
Change USB channel of Camera

17
32

Change USB channel of WLAN & TV Tuner & New card

38

Change USB channel of Left side, Right side, E-SATA
38 Change USB channel of Touch screen, Finger print
42 Change USB channel of Dock

33

Change R114 & R1546 value

36

Change Q203 to N-channel FET

36
34

Change R524 pin2 connect to JACK_DET#

4
5
6

15

change G -sensor LED control to GPIO19 of SB

41

change Pin7 & 7 NET

34

Use Audio Co de c GP IO 5 to sh ut doown Sub-woofer

Connect HDA_RST#_CODEC to EC40

34

Separate SPDIF out to VGA and Docking

0.2

0.2

0.2

0.2

0.2

0.2

0.2

<2007.11.02>

B B

A A

1

2

3

4

5

6

7

8

9

5

Common design

Change +5VS _L OGO resistor size to 0805

Double pull up 20 0.3

For card reader power

For KBC C0 version

Add pull down resistor for SUSP# and SYSON

Change HAD_RST#_CODEC from KBC pin 36 to pin 38

Change GSENSOR LED control pin from SB to KBC

Add pull down for sub-woofer power-down 37

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

16 0.3

R204,R205 no stuff

17 0.3

R642 size to 0805

R2046,R2047 no stuff

33

install R1553

40

R616 no stuff

40

Change R615 to 8.2k and add R2062

40

41

Install R668, no install R667

Add R2063

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

HW PIR(2)

Montevina Consumer Discrete

0.3

0.3

0.3

0.3

0.3

0.3

0.1

of

55 58Wednesday, December 26, 2007

1

5

4

3

2

1

M.B. Ver.Reason for change PAGE Modify ListFixed IssueItem

<2007.11.04>

D D

<2007.11.05>

<2007.11.06>

C C

<2007.11.07>

1

2

3

4

1

2

EMI request CRT add resistor for EMI

1

2

3

4

5

6

1

Move resistor from LS4086P to MB Add R206441 0.3

Change to dual type for layout space 16 Change Q69,Q70 to dual type 0.3

Only use LIS302DLTR

Change CIR_IN power rail

nVIDIA suggestion for NB9M-GS/GE

nVIDIA suggestion -- add Pull up 2.2K on
HDMIDAT_VGA and HDMICLK_VGA to
+3VS. at VGA side

HP suggestion

USB camere power and add GPO pin for shutdown

LAN DSM support

EC_BEEP

G-sensor LED control by SB

39

40

22

18

16

34

17

31

34

41

U77, R2025 no install

Connect R642.1 to +5VL

R1005 change to 475 ohm

Add R2065,R2066

Add R2069,R2070,R2071

Change C746,C747,C748,C749 to 1000PF

Add PJP5,R2072,R2073

1. USB camera – SB GPIO20

2. ISOLATE – SB GPIO18

3. LAN OGPIO – SB GPIO14

Add R2076

Delete R668

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

0.3

Modify FPR connector pin assignment 38 Modify JP41 pin assignment 0.3

34

2

B B

3

<2007.11.08>

<2007.11.09>

A A

<2007.11.12>

1

2

1

2

1

5

Modify Audio

nVIDIA suggestion 20

EMI request 17 Add C2100,C2111 0.3

nVIDIA suggestion

JMicron suggestion

HP request 4 Add EMC1403 for Qaud core 0.3

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

4

MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1. Add C2108,C 2109,R2080,R2081

36

2. Add R2082,R2083

37

3. Change C1008,C1009 to 1UF

42

4. Delete C976,C977

5. Delete R515,R516,C916

6. Change C982,C980,C984 from 5900p to 0.039u

7. Change C983,C992 from 1000p to 100p

8. Add EC_MUTE# to sub-woofer shutdown pin and R2084

1. Delete strap pin

2. Change R1020, R1015, R1010 to 475 ohm

3. Swap THERMDN and THERMDP

36

Change C970,C971 to 22uF, add C2112, change D38 to dual type 0.3Audio
37

Change HDMI DDC to I2CD
19 R387,R388,R4 1 5 , R4 22,R427 -- install

Change R415 to 10 ohm and no install

Delete R99, Change +IFPC_PLLVDD to +PCIE20

Do not install R2030

Add D86 for card reader wake up

33

Add SB GPIO22 f or wake up event

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

2

0.3

0.3

0.3

0.3

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

HW PIR(3)

Montevina Consumer Discrete

1

of

56 58Wednesday, December 26, 2007

0.1

5

4

3

2

1

M.B. Ver.Reason for change PAGE Modify ListFixed IssueItem

<2007.12.12>

D D

C C

1

2

3 28 Swa p GL AN and NewCard PCIE port 0.4

4

5

6

7

9

10

11

12

13

MV DG for VDDC_QDAC

WLAN issue

PCIE issue

Modify CardReader LED

KBC

WL_BLUE_LED# issue

Power sequence

DIM_LED

EC_PME#

WLAN issue

Change TP power rail

G-sensor

For Dock present

10 Chagne VCCD_QDAC to +1.5VS 0.4

32 Change XMIT_ OFF#,WL_LED# and component to W LAN connector 0. 4

33

Use 2N7002 to control LED

Change SMB_EC_DA1,SMB_EC_CK1 power rail from +5VL to +3VL
Add C2118 for KBC pin124

40

Chagne EC_TH ERM pow er rail to +3VS

41

Add R2089 pull up for WL_BLUE_LED# 0.4

43 Add R2099,R2100,C2119 and Q89 change to dual type 0. 4

43

Delete Q97B,R211

40 Cha nge EC_P ME# power rail to +3VALW

28 Add R2101

41 Ch ange TP power rail to +5VALW

41 G-sensor -- R2031 change to 470 ohm and pull up to +3VS

42

R1570 change to 22 ohm,R61 change to 2K ohm

0.4

0.4

0.48

0.4

0.4

0.4

0.4

0.4

14

B B

<2007.12.24>

<2007.12.25>

A A

15

16

17

1

1

5

Clock generator

HDCP ROM

EMI request

Modify BT/FPR circuit

HP request

For ENE cap board EMI issue

4

15

Add series R2102,R2103 for 27M_SSC and 27M_CLK

19

R951 pull up,R959 no install

C272,C273,C2120 -- 470pF
C828,C798 -- 10pF

17

C2111 -- 220pF
Add D87

38

36

Change value

37

40 Add R and C 0.4

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

Compal Secret Data

Deciphered Date

2

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

HW PIR(4)

Montevina Consumer Discrete

1

0.4

0.4

0.4

0.4

0.4

0.1

of

57 58Wednesday, December 26, 2007

A

1 1

Security Classification

Issued Date

THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2007/11/24 2007/11/24

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

Notes List

Montevina Consumer Discrete

58 58Wednesday, December 26, 2007

of

0.2