HP DV7 AMD Schematics

A

1 1

B

C

D

E

2 2

Compal confidential

JBK00 LA-4091P Schematics Document

Mobile AMD S1G2 CPU with ATI RS780M & SB700 core logic

3 3

2007-10-30

REV:0.2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-4091P

E

of

153Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

Compal

Consumer AMD UMA 17"

confidential

1 1

Thermal Sensor

AMD S1G2 CPU

DDR2 800MHz 1.8V

ADM1032ARMZ

638-PIN uFCPGA 638

P4, 5, 6, 7

Htper Transport Link

16X16

Dual Channel

Fan conn

P6

P4

ATI RS780M

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

P8, 9

Finger Print

Clock Generator SLG8SP626

P36

LVDS Panel

USB Camera with Digital MIC

USB conn x3

BT Conn

Touch Screen

Dock

P36

P43

P21

P29

P22

PCI-E BUS*5

Mini-Card*2

WLAN & TV Tunner

P30

Express Card

P30

A-Link Expr ess II

4X PCI-E

ATI SB700

P23, 24, 25, 26, 27

P10, 11, 12

USB2.0 X12

Azalia

SATA Master-1

SATA Master-2

SATA Slave

2 2

Interface

CRT

HDMI

Realtek 8102E(10/100M) 8111C(GbE)

72QFN

P20

3 3

LED

P41

RTC CKT.

P19

Power OK CKT.

RJ45 Conn.

P29

JMOB385

CardReader

P30

SPI ROM 25LF080A

SPI

P37

Touch Pad CONN. Int.KBD

Power On/Off CKT.

4 4

DC/DC Interface CKT.

P43

DC/DC Interface CKT.

P43

A

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

ENE

KB926

CIR

P38

C

LPC BUS

P38

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Audio CKT AMP & Audio Jack

Codec_IDT9271

MDC V1.5

SATA HDD Connector

SATA ODD Connector

SATA 2nd HDD Option Connector

P33 P35

P29

P28

e-SATA Connector

P36

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

LA-4091P

TPA6020A2

Subwoofer

E

P35

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A

B

C

D

E

Voltage Rails

O MEANS ON X MEANS OFF

Symbol Note :

+5VS

1 1

2 2

S5 S4/ Battery only

S5 S4/AC & Battery don't exist

State

S0

S1

S3

S5 S4/AC

power plane

+B

+3VL

O

X

+5VALW +3VALW +1.2VALW

+1.8V

+0.9V

O

X

O

XX

X

XX X

+3VS

+2.5VS

+1.8VS

+1.5VS

+1.1VS

+VGA_CORE

+1.2V_HT

+CPU_CORE_NB

+CPU_CORE_0

+CPU_CORE_1

OO

X

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build DEBUG @ : means just reserve for debu g.

Layout Notes

L

UMA@ : means for RS780M.

I2C / SMBUS ADDRESSING

DEVICE

3 3

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

HEX

A0

D2

3AACCELEROMETER 0 0 1 1 1 0 1 0

EC SM Bus1 address

Device

Smart Battery

24C16

CPU SIC interface

4 4

HEX HEX

Address Address

0001 011X b

16H

1010 000X b

A0H

1001 100X b

98H

A

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

EC SM Bus2 address

Device

ADI1032-2 CPU

9AH

1001 101X b

B

SMBUS Control Table

SOURCE

SMB_EC_CK1

SMB_EC_DA1

SMB_EC_CK2

SMB_EC_DA2

I2C_CLK

I2C_DATA

DDC_CLK0

DDC_DATA0

DDC_CLK1

DDC_DATA1

SCL0

SDA0

SCL1

SDA1

SCL2

SDA2

SCL3

SDA3

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

KB926

RS780M

SB700

2007/08/02 2008/08/02

C

X X

X

XX

Compal Secret Data

EEPROMBATTINVERTER

V

XX

XXX XX XXXX XXXX XX

Deciphered Date

THERMAL SENSORSERIAL

CPU &

I / II

ADM1032

V

XXXXXX

V

CLK CHIPSODIMM

MINI CARD

Slot 2

X X

XXXXX

XXXX

VVXX

XXX

XX

VXX

X

XX

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

X

Compal Electronics, Inc.

Notes List

LA-4091P

LCD

XX X

VXX

XXX XXXX XXX

G-Sensor

HDMI

X

X X

X

VXXX

X X

V

X X X

0.1

353Thursday, November 08, 2007

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A

1 1

B

C

D

E

+1.2V_HT

250 mil

1

C1

H_CADIP[0..15]10

H_CADIP[0..15]

H_CADIN[0..15]

H_CADOP[0..15]

H_CADON[0..15]

H_CADOP[0..15] 10

H_CADON[0..15] 10H_CADIN[0..15]10

C1

4.7U_0805_10V4Z

2

1

C2

4.7U_0805_10V4Z

2

VLDT CAP.

1

C3

0.22U_0603_16V4Z

2

1

2

C4

0.22U_0603_16V4Z

1

C5

C5 180P_0402_50V8J

180P_0402_50V8J

2

1

C6

C6 180P_0402_50V8J

180P_0402_50V8J

2

Near CPU Socket

+1.2V_HT

2 2

3 3

VLDT=500mA

H_CADIP0 H_CADIN0 H_CADIP1 H_CADIN1 H_CADIP2 H_CADIN2 H_CADIP3 H_CADIN3 H_CADIP4 H_CADIN4 H_CADIP5 H_CADIN5 H_CADIP6 H_CADIN6 H_CADIP7 H_CADIN7 H_CADIP8 H_CADIN8 H_CADIP9 H_CADIN9 H_CADIP10 H_CADIN10 H_CADIP11 H_CADIN11 H_CADIP12 H_CADIN12 H_CADIP13 H_CADIN13 H_CADIP14 H_CADIN14 H_CADIP15 H_CADIN15

H_CLKIP010 H_CLK IN010 H_CLKIP110 H_CLK IN110

H_CTLIP010

H_CTLIP110 H_CTLOP1 10 H_CTLIN110

CONN@

D1 D2 D3 D4

E3 E2 E1

F1 G3 G2 G1

H1

J1 K1 L3 L2 L1

M1

N3 N2 E5 F5 F3 F4

G5

H5 H3 H4 K3 K4 L5

M5 M3 M4

N5 P5

J3

J2

J5 K5

N1 P1 P3 P4

VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3

L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15

L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1

L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1

6090022100G_B

JP1A

HT LINK

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9

L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15

L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

+VLDT_B

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

1 2

C7 4.7U_0805_10V4ZC7 4.7U_0805_10V4Z

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7 H_CADOP8 H_CADON8 H_CADOP9 H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CLKOP0 10 H_CLK ON0 10 H_CLKOP1 10 H_CLK ON1 10

H_CTLOP0 10 H_CTLON0 10H_CTLIN010

H_CTLON1 10

PWM Fan Control circuit

CH751H-40PT_SOD323-2

FAN_PWM33

+5VS

JP2

1

C8

D1

2 1

6

2

1

D

Q1

G

3

S

SI3456BDV-T1-E3_TSOP6

4 5

C8

4.7U_0805_10V4Z

2

+VCC_FAN

1

C9

0.1U_0402_16V4Z

2

12

D2

@D2

@

RLZ5.1B_LL34

1

2

3

GND

4

GND

ACES_88231-02001

CONN@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

AMD CPU S1G2 HT I/F

LA-4091P

453Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

Processor DDR2 Memory Interface

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

AD10

AF10 AE10

AA16

D10 C10 B10

H16

T19 V22 U21 V19

T20 U19 U20 V20

J22

J20

N19 N20 E16 F16

Y16

P19 P20

N21 M20 N22 M19 M22

L20 M24

L21

L19 K22 R21

L22 K20 V24 K24 K19

R20 R23

J21

R19

T22

T24

DDR_A_CLK0

DDR_A_CLK#0

DDR_A_CLK1

DDR_A_CLK#1

DDR_B_CLK0

DDR_B_CLK#0

DDR_B_CLK1

DDR_B_CLK#1

VTT1 VTT2 VTT3 VTT4

MEMZP MEMZN

RSVD_M1

MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1

MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1

MA_CKE0 MA_CKE1

MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1 MA_CLK_H2 MA_CLK_L2 MA_CLK_H3 MA_CLK_L3

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_RAS_L MA_CAS_L MA_WE_L

JP1B

MEM:CMD/CTRL/CLK

VTT_SENSE

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1 MB_CLK_H2 MB_CLK_L2 MB_CLK_H3 MB_CLK_L3

MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

1

2

1

2

1

2

1

2

VTT5 VTT6 VTT7 VTT8 VTT9

MEMVREF

RSVD_M2

MB_CKE0 MB_CKE1

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9

MB_WE_L

C10

1.5P_0402_50V9C

C11

1.5P_0402_50V9C

C14

1.5P_0402_50V9C

C15

1.5P_0402_50V9C

W10 AC10 AB10 AA10 A10

Y10

W17

B18

W26 W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

+0.9V+0.9V

VTT_SENSE

+MCH_RE F

DDR_B_ODT0 DDR_B_ODT1

DDR_CS1_DIMMB#

DDR_CKE0_DIMMB DDR_CKE1_DIMMB

DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_CLK#1DDR_A_CLK#1

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15

DDR_B_BS#0 DDR_B_BS#1 DDR_B_BS#2

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

T1PAD T1PAD

T3PAD T3PAD

DDR_B_ODT0 9 DDR_B_ODT1 9

DDR_CS1_DIMMB# 9

DDR_CKE0_DIMMB 9 DDR_CKE1_DIMMB 9

DDR_B_CLK0 9 DDR_B_CLK#0 9 DDR_B_CLK1 9 DDR_B_CLK#1 9

DDR_B_BS#0 9 DDR_B_BS#1 9 DDR_B_BS#2 9

DDR_B_RAS# 9 DDR_B_CAS# 9 DDR_B_WE# 9

1 1

2 2

R1

1K_0402_1%

R2

1K_0402_1%

+1.8V

1 2

+MCH_RE F

1

C12

2

1

C13

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z 1000P_0402_25V8J

1000P_0402_25V8J

Place them close to CPU within 1"

R4 39.2_0402_1%R4 39.2_0402_1%

1 2

DDR_A_BS#08 DDR_A_BS#18 DDR_A_BS#28

DDR_A_RAS#8 DDR_A_CAS#8 DDR_A_WE#8

1 2

R3 39.2_0402_1%R3 39.2_0402_1%

T2 PADT2 PAD

DDR_A_ODT0 DDR_A_ODT1

DDR_CS0_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMB#

DDR_CKE0_DIMMA DDR_CKE1_DIMMA

DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15

DDR_A_BS#0 DDR_A_BS#1 DDR_A_BS#2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

CONN@

+1.8V

DDR_A_ODT08 DDR_A_ODT18

DDR_CS0_DIMMA#8 DDR_CS1_DIMMA#8 DDR_CS0_DIMMB# 9

DDR_CKE0_DIMMA8 DDR_CKE1_DIMMA8

DDR_A_CLK08

DDR_A_CLK#08

DDR_A_CLK18

3 3

DDR_A_CLK#18

DDR_A_MA[15..0]8 DDR_B_MA[15..0] 9

DDR_B _D[63..0 ]9

DDR_B_DM[7..0]9 DDR_A_DM[7..0] 8

DDR_B_DQS09 DDR_B_DQS#09 DDR_B_DQS19 DDR_B_DQS#19 DDR_B_DQS29 DDR_B_DQS#29 DDR_B_DQS39 DDR_B_DQS#39 DDR_B_DQS49 DDR_B_DQS#49 DDR_B_DQS59 DDR_B_DQS#59 DDR_B_DQS69 DDR_B_DQS#69 DDR_B_DQS79 DDR_B_DQS#79

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7

AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11

AE14 AF14 AF11 AD11

AB26 AE22 AC16 AD12

AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24

Y11

A12 B16 A22 E25

C12 B12 D16 C16 A24 A23 F26 E26

JP1C

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

6090022100G_BCONN@

MEM:DATA

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24 AC24 Y19 AB16 Y13

G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7

DDR_A_D[63..0] 8

DDR_A_DQS0 8 DDR_A_DQS#0 8 DDR_A_DQS1 8 DDR_A_DQS#1 8 DDR_A_DQS2 8 DDR_A_DQS#2 8 DDR_A_DQS3 8 DDR_A_DQS#3 8 DDR_A_DQS4 8 DDR_A_DQS#4 8 DDR_A_DQS5 8 DDR_A_DQS#5 8 DDR_A_DQS6 8 DDR_A_DQS#6 8 DDR_A_DQS7 8 DDR_A_DQS#7 8

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

AMD CPU S1G2 DDRII I/F

LA-4091P

553Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

A:Need to re-Link "SGN00000200"

1 1

CLK_CPU_BCLK15

CLK_CPU_BCLK#15

+1.8VS

R15

R15 300_0402_5%

300_0402_5%

1 2

+1.8VS

+3VS

0.1U_0402_16V4Z

C27

1 2

2200P_0402_50V7K

LDT_ RST#

1

C22

0.01U_0402_25V4Z

@

2

R21

R21 300_0402_5%

300_0402_5%

1 2

H_PWRGD

1

C23

0.01U_0402_25V4Z

@

2

+1.8VS

R36

R36 300_0402_5%

300_0402_5%

1 2

LDT_STOP#

1

C25

0.01U_0402_25V4Z

@

2

1

C26

2

THERMDA_CPU

THERMDC_CPU

LDT_ RST#19

2 2

H_PWRGD19

3 3

4 4

LDT_STOP#11,19

2200p change to 1000p for ADT7421

+2.5VS

C16

100U_D2_10VM

1 2

C20

1 2

C21 3900P_0402_50V7KC21 3900P_0402_50V7K

Place close to CPU wihtin 1.5"

+CPU_CORE_0

+CPU_CORE_1

+1.8VS

R30

1 2

CPU_LDT_REQ#

1

C24

0.01U_0402_25V4Z

2

+1.8V

U2

1

VDD

2

D+

SDATA

3

ALERT#

D-

THERM#4GND

ADM1032ARMZ-2REEL_MSOP8

FBM_L11_201209_300L_0805

1

+

2

3900P_0402_50V7K

12

R8

R8 169_0402_1%

169_0402_1%

R487 10_0402_5%R487 10_0402_5%

1 2 1 2

R486 10_0402_5%R486 10_0402_5%

R489 10_0402_5%R489 10_0402_5%

1 2 1 2

R488 10_0402_5%R488 10_0402_5%

300_0402_5%

@

+3VS

20K_0402_5%

R18

390_0402_5%

CPU_SID

R19

390_0402_5%

CPU_SIC

8

SCLK

7

6

5

1 2

CPU_VDD1_FB_H CPU_VDD1_FB_L

R175

12

SMB_EC_CK2

SMB_EC_DA2

Address:100_1101

A

B

+2.5VDDA

L1

VDDA=300mA

3300P_0402_50V7K

1

C174.7U_0805_10V4Z C174.7U_0805_10V4Z

2

Address:100_1100

R13 44.2_0402_1%R13 44.2_0402_1% R14 44.2_0402_1%R14 44.2_0402_1%

+1.2V_HT

CPU_VDD0_FB_H CPU_VDD0_FB_L

Close to CPU

CPU_LDT_REQ# 11,19

12

S

Q127 FDV301N_NL_SOT23-3

S

Q129 FDV301N_NL_SOT23-3

T4 PADT4 PAD

T9 PADT9 PAD T11 PADT11 PAD

1 2

C939 0.1U_0402_16V4ZC939 0.1U_0402_16V4Z

R814

34.8K_0402_1%~N

G

2

13

D

G

2

13

D

SMB_EC_CK2 33

SMB_EC_DA2 33

B

12

1

C19

C18

0.22U_0603_16V4Z

2

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

1 2 1 2

CPU_VDD0_FB_H43 CPU_VDD0_FB_L43

CPU_VDD1_FB_H43 CPU_VDD1_FB_L43

CPU_TEST23_TSTUPD

CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST27_SINGLECHAIN

1 2

2.09V for Gate

SMB_EC_DA1 32,33,34,37

EC is PU to 5VALW

SMB_EC_CK1 32,33,34,37

LDT_ RST# H_PWRGD LDT_STOP# CPU_LDT_REQ#

CPU_SIC CPU_SID

CPU_ HTR EF0 CPU_ HTR EF1

CPU_VDD0_FB_H CPU_VDD0_FB_L

CPU_VDD1_FB_H CPU_VDD1_FB_L

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

R25 0_0402_5%R25 0_0402_5%

FDV301N, the Vgs is: min = 0.65V Typ = 0.85V Max = 1.5V

C

JP1D

F8

VDDA1

F9

VDDA2

A9

CLKIN_H

A8

CLKIN_L

B7

RESET_L

A7

PWROK

F10

LDTS TOP_L

C6

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

R6

HT_REF0

P6

HT_REF1

F6

VDD0_FB_H

E6

VDD0_FB_L

Y6

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

G9

TEST19

E9

TEST25_H

E8

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

C2

TEST9

AA6

TEST6

A3

RSVD1

A5

RSVD2

B3

RSVD3

B5

RSVD4

C1

RSVD5

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

6090022100G_B

C

THERMTRIP_L

VDDNB_FB_H VDDNB_FB_L

M11

KEY1

W18

KEY2

CPU_SVC

A6

SVC

CPU_SVD

A4

SVD

AF6 AC7

PROCHOT_L

AA8

MEMHOT_L

THERMDC_CPU

W7

THERMD C

THERMD A

VDDIO_FB_H VDDIO_FB_L

DBREQ_L

TEST28_H TEST28_L

TEST29_H TEST29_L

RSVD10

THERMDA_CPU

W8

W9 Y9

VDD_NB_FB_H

H6

VDD_NB_FB_L

G6

CPU_DBREQ#

E10

CPU_TDO

AE9

TDO

CPU_TEST28_H_PLLCHRZ_P

J7

CPU_TEST28_L_PLLCHRZ_N

H8

CPU_TEST17_BP3

D7

TEST17

CPU_TEST16_BP2

E7

TEST16

CPU_TEST15_BP1

F7

TEST15

CPU_TEST14_BP0

C7

TEST14

C3

TEST7

K8

TEST10

C4

TEST8

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

H18 H19

RSVD9

AA7

RSVD8

D5

RSVD7

C5

RSVD6

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

NOTE: HDT TERMINATION IS REQUIRED FOR RE V. Ax SIL ICON ONLY .

2007/08/02 2008/08/02

CPU_SVC 43 CPU_SVD 43

CPU_THE RMTRIP#_R CPU_PROCHOT#_1.8

+1.8V sense no support

T22PAD T22PAD T21PAD T21PAD

VDD_NB_FB_H 43 VDD_NB_FB_L 43

+1.8V

R39220_0402_5%@ R39220_0402_5%@

R37220_0402_5%@ R37220_0402_5%@

R38220_0402_5%@ R38220_0402_5%@

R40220_0402_5%@ R40220_0402_5%@

12

Compal Secret Data

12

Deciphered Date

12

D

+1.8V

T7PAD T7PAD T8PAD T8PAD T10PAD T10PAD T12PAD T12PAD

R41220_0402_5%@ R41220_0402_5%@

1 2

R10 10K_0402_5%R10 10K_0402_5%

1 2

R5 300_0402_5%R5 300_0402_5%

CPU_THE RMTRIP#_R

+1.8V

route as diffe rential

T5PAD T5PAD

as short as possible

T6PAD T6PAD

testpoint under package

T13PAD T13PAD T14PAD T14PAD

HDT Connector

CONN@ SAMTEC_ASP-68200-07

CONN@

D

R11 10K_0402_5%@R11 10K_0402_5%@

1 2

R9 300_0402_5%R9 300_0402_5%

CPU_PROC HOT#_1.8

VDD_NB_FB_H VDD_NB_FB_L

Close to CPU

CPU_SVC CPU_SVD

CPU_TEST27_SINGLECHAIN

CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST15_BP1 CPU_TEST14_BP0 CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

JP3

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423 26

SAMTEC_ASP-68200-07

E

B

2

E

3 1

C

MMBT3904_NL_SOT23-3

12

MMBT3904_NL_SOT23-3@

R484 10_0402_5%R484 10_0402_5%

1 2 1 2

R485 10_0402_5%R485 10_0402_5%

0718 AMD --> 1K ohm

HDT_RST#

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

R6

1 2

Q3

B

2

E

3 1

+CPU_CORE_NB

R22 1K_0402_5%R22 1K_0402_5% R23 1K_0402_5%R23 1K_0402_5%

R24 300_0402_5%R24 300_0402_5%

R26 300_0402_5%R26 300_0402_5% R27 300_0402_5%R27 300_0402_5% R28 300_0402_5%R28 300_0402_5% R29 300_0402_5%R29 300_0402_5% R31 300_0402_5%R31 300_0402_5% R32 300_0402_5%R32 300_0402_5% R33 300_0402_5%R33 300_0402_5% R34 300_0402_5%R34 300_0402_5% R35 300_0402_5%R35 300_0402_5%

Compal Electronics, Inc.

AMD CPU S1G2 CTRL

1 2

Q2

C

1 2 1 2

1 2

U1

4

Y

LA-4091P

R7

+3VS

12 12 12 12 12 12 12 12

5

P

G

3

0_0402_5%@R60_0402_5%@

0_0402_5%

2

B

1

A

NC7SZ08P5X_NL_SC70-5@U1NC7SZ08P5X_NL_SC70-5@

+1.8V

LDT_ RST#

E

ENTRIP2 37,39

H_THERMTRIP# 20,33

H_PROCHOT# 1 9

SB_PWRGD 20,33,43

653Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

VDD(+CPU_CORE) decoupling.

+CPU_CORE_0

1

+

C30

1 1

C30 330U_X_2VM_R6M

330U_X_2VM_R6M

2

1

+

C28

C28 330U_X_2VM_R6M

330U_X_2VM_R6M

2

Near CPU Socket

+CPU_CORE_0

1

C32

C32 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE_0

1

C40

0.22U_0603_16V4Z

2

2 2

1

C33

C33 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C41

0.01U_0402_25V4Z

2

1

C34

C34 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

2

C42

C42 180P_0402_50V8J

180P_0402_50V8J

1

C35

C35 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

VDDIO decoupling.

+1.8V

1

C46

C46 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C47

C47 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C48

0.22U_0603_16V4Z

2

Under CPU Socket

1

C49

0.22U_0603_16V4Z

2

B

+CPU_CORE_1

1

C36

C36 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C50

180P_0402_50V8J

2

1

+

C31

C31 330U_X_2VM_R6M

330U_X_2VM_R6M

2

+CPU_CORE_1

1

C51

180P_0402_50V8J

2

1

C37

C37 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C43

0.22U_0603_16V4Z

2

C

JP1E

G4 H2

J9 J11 J13 J15

K6 K10 K12 K14

L4 L7

L9 L11 L13 L15

M2 M6 M8

M10

N7 N9

N11

K16 M16 P16

T16

V16

H25

J17

K18 K21 K23 K25

L17

M18 M21 M23 M25 N17

6090022100G_B

Athlon 64 S1 Processor Socket

CONN@

JP1E

VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23

VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12

1

+

C29

C29 330U_X_2VM_R6M

330U_X_2VM_R6M

2

1

C38

C38 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C44

0.01U_0402_25V4Z

2

1

C39

C39 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C45

C45 180P_0402_50V8J

180P_0402_50V8J

2

+CPU_CORE_0

+CPU_CORE_NB

+1.8V

+CPU_CORE_NB decoupling.

+CPU_CORE_NB

1

C52

C52 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C53

C53 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C54

C54 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

D

JP1F

AA4

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

+CPU_CORE_1

+1.8V

AA11 AA13 AA15 AA17 AA19

AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21

AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

AB2 AB7 AB9

AD6 AD8

B4 B6 B8

B9 B11 B13 B15 B17 B19 B21 B23 B25

D6 D8

D9 D11 D13 D15 D17 D19 D21 D23 D25

E4

F2 F11 F13 F15 F17 F19 F21 F23 F25

H7

H9

H21 H23

J4

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65

6090022100G_B

Athlon 64 S1 Processor Socket

CONN@

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

E

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

3 3

4 4

+1.8V

1

C55

0.22U_0603_16V4Z

2

+1.8V +1.8V

1

C60

0.01U_0402_25V4Z

2

+1.8V

1

2

Between CPU Socket and DIMM

1

C57

0.22U_0603_16V4Z

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

1

C62

C62 180P_0402_50V8J

180P_0402_50V8J

2

1

C76

4.7U_0805_10V4Z

2

C74

4.7U_0805_10V4Z

1

C56

0.22U_0603_16V4Z

2

1

C61

0.01U_0402_25V4Z

2

1

C75

4.7U_0805_10V4Z

2

1

C58

0.22U_0603_16V4Z

2

1

C63

C63 180P_0402_50V8J

180P_0402_50V8J

2

A: Add C165 and C176 to follow AMD Layout review recommand for EMI

1

C77

4.7U_0805_10V4Z

2

1

C64

C64 180P_0402_50V8J

180P_0402_50V8J

2

1

C: Change to NBO CAP

+

C78

C78 220U_Y_4VM

220U_Y_4VM

@

2

1

C65

C65 180P_0402_50V8J

180P_0402_50V8J

2

VTT decoupling.

+0.9V

1

C66

4.7U_0805_10V4Z

2

+0.9V

1

C79

4.7U_0805_10V4Z

2

1

C67

4.7U_0805_10V4Z

2

1

C68

0.22U_0603_16V4Z

2

Near CPU Socket Right side.

1

C80

4.7U_0805_10V4Z

2

1

C81

0.22U_0603_16V4Z

2

+0.9V

Near Power Supply

1

C: Change to NBO CAP

+

C59

C59 220U_Y_4VM

220U_Y_4VM

2

1

C69

0.22U_0603_16V4Z

2

1

C82

0.22U_0603_16V4Z

2

1

C70

C70 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C83

C83 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C71

C71 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C84

C84 1000P_0402_25V8J

1000P_0402_25V8J

2

1

C72

C72 180P_0402_50V8J

180P_0402_50V8J

2

1

C85

C85 180P_0402_50V8J

180P_0402_50V8J

2

1

C73

C73 180P_0402_50V8J

180P_0402_50V8J

2

1

C86

C86 180P_0402_50V8J

180P_0402_50V8J

2

Near CPU Socket Left side.

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

AMD CPU S1G2 PWR & GND

LA-4091P

753Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

+V_DDR_MCH_REF

JP4

1

VREF

3

DDR_A_D0 DDR_A_D1

DDR_A_DQS#0

1 1

2 2

3 3

4 4

DDR_CKE0_DIMMA5

DDR_A_BS#25

DDR_A_BS#05 DDR_A_WE#5

DDR_A_CAS#5 DDR_CS1_DIMMA#5

DDR_A_ODT15

SMB_CK_DAT09,15,20,28 SMB_CK_CLK09,15,20,28

+3VS

DDR_A_DQS0

DDR_A_D2 DDR_A_D3

DDR_A_D8 DDR_A_D9

DDR_A_DQS#1 DDR_A_DQS1

DDR_A_D10 DDR_A_D11

DDR_A_D16 DDR_A_D20 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2

DDR_A_MA12 DDR_A_MA9 DDR_A_MA8

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 DDR_A_MA0

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_A_ODT0 DDR_CS1_DIMMA#

DDR_A_ODT1

DDR_A_D32 DDR_A_D33

DDR_A_DQS#4 DDR_A_DQS4

DDR_A_D34 DDR_A_D35

DDR_A_D40 DDR_A_D41

DDR_A_DM5

DDR_A_D42 DDR_A_D43

DDR_A_D48 DDR_A_D49

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51

DDR_A_D56 DDR_A_D57

DDR_A_DM7

DDR_A_D58 DDR_A_D59

1

C103

0.1U_0402_16V4Z

2

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5692B-A0G16-P

CONN@

DQS3#

NC/CKE1

NC/A15 NC/A14

NC/A13

DQS5#

DQS7#

DQ12 DQ13

CK0#

DQ14 DQ15

DQ20 DQ21

DQ22 DQ23

DQ28 DQ29

DQS3

DQ30 DQ31

RAS#

ODT0

DQ36 DQ37

DQ38 DQ39

DQ44 DQ45

DQS5

DQ46 DQ47

DQ52 DQ53

CK1#

DQ54 DQ55

DQ60 DQ61

DQS7

DQ62 DQ63

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7 VSS

VSS DM1 VSS CK0

VSS

DM2 VSS

VSS

VDD

VDD BA1

VDD

VSS

VSS DM4 VSS

VSS

VSS CK1

VSS DM6 VSS

VSS

VSS SAO SA1

B

+1.8V+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50

NC

52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90

A11

92

A7

94

A6

96 98

A4

100

A2

102

A0

104 106 108 110

S0#

112 114 116 118 120

NC

122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_A_D4 DDR_A_D5

DDR_A_DM0

DDR_A_D6 DDR_A_D7

DDR_A_D12 DDR_A_D13

DDR_A_DM1

DDR_A_D14 DDR_A_D15

DDR_A_D21

DDR_A_DM2

DDR_A_D22 DDR_A_D23

DDR_A_D28 DDR_A_D29

DDR_A_DQS#3 DDR_A_DQS3

DDR_A_D30 DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA15 DDR_A_MA14

DDR_A_MA11 DDR_A_MA7 DDR_A_MA6

DDR_A_MA4 DDR_A_MA2

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_MA13

DDR_A_D36 DDR_A_D37

DDR_A_DM4

DDR_A_D38 DDR_A_D39

DDR_A_D44 DDR_A_D45

DDR_A_DQS#5 DDR_A_DQS5

DDR_A_D46 DDR_A_D47

DDR_A_D52 DDR_A_D53

DDR_A_DM6

DDR_A_D54 DDR_A_D55

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

DDR_A_D[0..63]

DDR_A_DM[0..7]

DDR_A _DQS[0..7]

DDR_A_MA[0..15]

DDR_A_DQS#[0..7]

DDR_A_CLK0 5 DDR_A_CLK#0 5

+V_DDR_MCH_REF

1

2

DDR_CKE1_DIMMA 5

DDR_A_BS#1 5 DDR_A_RAS# 5 DDR_CS0_DIMMA# 5

DDR_A_ODT0 5

DDR_A_CLK1 5 DDR_A_CLK#1 5

C

DDR_A_D[0..63] 5

DDR_A_DM[0..7] 5

DDR_A _DQS[0..7] 5

DDR_A_MA[0..15] 5

DDR_A_DQS#[0..7] 5

+1.8V

R43

R43 1K_0402_1%

1K_0402_1%

1 2

1

C96

C95

2

1 2

0.1U_0402_16V4Z

1000P_0402_25V8J

R44

R44 1K_0402_1%

1K_0402_1%

+V_DDR_MCH_REF 9

D

DDR_A_MA6 DDR_A_MA7 DDR_A_MA11 DDR_A_MA14

DDR_CKE0_DIMMA DDR_A_BS#2 DDR_A_MA15 DDR_CKE1_DIMMA

DDR_A_MA0 DDR_A_BS#1 DDR_A_MA2 DDR_A_MA4

DDR_A_MA5 DDR_A_MA8 DDR_A_MA9 DDR_A_MA12

DDR_A_BS#0 DDR_A_MA1 DDR_A_MA10 DDR_A_MA3

DDR_CS1_DIMMA# DDR_A_ODT1 DDR_A_WE# DDR_A_CAS#

DDR_A_ODT0 DDR_A_MA13 DDR_A_RAS# DDR_CS0_DIMMA#

RP1

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP2

47_0804_8P4R_5%

RP3

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP4

47_0804_8P4R_5%

RP5

47_0804_8P4R_5%

RP6

47_0804_8P4R_5%

RP7

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

+0.9V

1 2

C87 0.1U_0402_16V4ZC87 0.1U_0402_16V4Z

1 2

C88 0.1U_0402_16V4ZC88 0.1U_0402_16V4Z

1 2

18

C90 0.1U_0402_16V4ZC90 0.1U_0402_16V4Z

27

1 2

36

C89 0.1U_0402_16V4ZC89 0.1U_0402_16V4Z

45

1 2

C91 0.1U_0402_16V4ZC91 0.1U_0402_16V4Z

1 2

C92 0.1U_0402_16V4ZC92 0.1U_0402_16V4Z

1 2

18

C93 0.1U_0402_16V4ZC93 0.1U_0402_16V4Z

27

1 2

36

C94 0.1U_0402_16V4ZC94 0.1U_0402_16V4Z

45

1 2

18

C98 0.1U_0402_16V4ZC98 0.1U_0402_16V4Z

27

1 2

36

C97 0.1U_0402_16V4ZC97 0.1U_0402_16V4Z

45

1 2

18

C100 0.1U_0402_16V4ZC100 0.1U_0402_16V4Z

27

1 2

36

C99 0.1U_0402_16V4ZC99 0.1U_0402_16V4Z

45

1 2

C102 0.1U_0402_16V4ZC102 0.1U_0402_16V4Z

1 2

C101 0.1U_0402_16V4ZC101 0.1U_0402_16V4Z

E

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDRII SO-DIMM 0

LA-4091P

853Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

+1.8V

+V_DDR_MCH_REF8

1

1 1

2 2

3 3

4 4

2

DDR_CKE0_DIMMB5

DDR_B_BS#25

DDR_B_BS#05 DDR_B_WE#5

DDR_B_CAS#5 DDR_CS1_DIMMB#5

DDR_B_ODT15

SMB_CK_DAT08,15,20,28 SMB_CK_CLK08,15,20,28

DDR_B_D0 DDR_B_D1

DDR_B_DQS#0 DDR_B_DQS0

C104

DDR_B_D2 DDR_B_D3

DDR_B_D8

1000P_0402_25V8J

DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB

DDR_B_BS#2

DDR_B_MA12 DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_B_ODT0 DDR_CS1_DIMMB#

DDR_B_ODT1

DDR_B_D32 DDR_B_D33

DDR_B_DQS#4 DDR_B_DQS4

DDR_B_D34 DDR_B_D35

DDR_B_D40 DDR_B_D41

DDR_B_DM5

DDR_B_D42 DDR_B_D43 DDR_B_D47

DDR_B_D48 DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7

DDR_B_D58 DDR_B_D59

+3VS

0.1U_0402_16V4Z

C119

1

2

JP5

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

PTI_A5652D-A0G16-P

CONN@

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0 CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

DM2

VSS DQ22 DQ23

VSS DQ28 DQ29

VSS

DQS3#

DQS3

VSS DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

BA1 RAS#

VDD ODT0

NC/A13

VDD

VSS DQ36 DQ37

VSS

DM4

VSS DQ38 DQ39

VSS DQ44 DQ45

VSS

DQS5#

DQS5

VSS DQ46 DQ47

VSS DQ52 DQ53

VSS

CK1 CK1#

VSS

DM6

VSS DQ54 DQ55

VSS DQ60 DQ61

VSS

DQS7#

DQS7

VSS DQ62 DQ63

VSS

SAO

SA1

NC

A11

A7 A6

A4 A2 A0

S0#

NC

+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200

DDR_B_D4 DDR_B_D5

DDR_B_DM0

DDR_B_D6 DDR_B_D7

DDR_B_D12 DDR_B_D13

DDR_B_DM1

DDR_B_D14 DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D23

DDR_B_D28 DDR_B_D29

DDR_B_DQS#3 DDR_B_DQS3

DDR_B_D30 DDR_B_D31

DDR_CKE1_DIMMB

DDR_B_MA15 DDR_B_MA14

DDR_B_MA11 DDR_B_MA7 DDR_B_MA6DDR_B_MA8

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_MA13

DDR_B_D36 DDR_B_D37

DDR_B_DM4

DDR_B_D38 DDR_B_D39

DDR_B_D44 DDR_B_D45

DDR_B_DQS#5 DDR_B_DQS5

DDR_B_D46

DDR_B_D52

DDR_B_DM6

DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

+3VS

DDR_B_D[0..63]

DDR_B_DM[0..7]

DDR_B _DQS[0..7]

DDR_B_MA[0..15]

DDR_B_DQS#[0..7]

DDR_B_CLK0 5 DDR_B_CLK#0 5

DDR_CKE1_DIMMB 5

DDR_B_BS#1 5 DDR_B_RAS# 5 DDR_CS0_DIMMB# 5

DDR_B_ODT0 5

DDR_B_CLK1 5 DDR_B_CLK#1 5

DDR_B_D[0..63] 5

DDR_B_DM[0..7] 5

DDR_B _DQS[0..7] 5

DDR_B_MA[0..15] 5

DDR_B_DQS#[0..7] 5

DDR_B_BS#1 DDR_B_MA2 DDR_B_MA0 DDR_B_MA6

DDR_B_MA4 DDR_B_MA14 DDR_B_MA7 DDR_B_MA11

DDR_B_BS#2 DDR_CKE0_DIMMB DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA5 DDR_B_MA8 DDR_B_MA9 DDR_B_MA12

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA3 DDR_B_MA1

DDR_B_ODT1 DDR_CS1_DIMMB# DDR_B_CAS# DDR_B_WE#

DDR_B_MA13 DDR_B_ODT0 DDR_B_RAS# DDR_CS0_DIMMB#

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

1 8 2 7 3 6 4 5

47_0804_8P4R_5%

RP10

RP11

RP12

RP13

RP14

RP8

RP9

18 27 36 45

+0.9V

12

C105 0.1U_0402_16V4ZC105 0.1U_0402_16V4Z

1 2

C106 0.1U_0402_16V4ZC106 0.1U_0402_16V4Z

12

C108 0.1U_0402_16V4ZC108 0.1U_0402_16V4Z

1 2

C107 0.1U_0402_16V4ZC107 0.1U_0402_16V4Z

12

C109 0.1U_0402_16V4ZC109 0.1U_0402_16V4Z

1 2

C110 0.1U_0402_16V4ZC110 0.1U_0402_16V4Z

12

C111 0.1U_0402_16V4ZC111 0.1U_0402_16V4Z

1 2

C112 0.1U_0402_16V4ZC112 0.1U_0402_16V4Z

12

C114 0.1U_0402_16V4ZC114 0.1U_0402_16V4Z

1 2

C113 0.1U_0402_16V4ZC113 0.1U_0402_16V4Z

12

C116 0.1U_0402_16V4ZC116 0.1U_0402_16V4Z

1 2

C115 0.1U_0402_16V4ZC115 0.1U_0402_16V4Z

12

C118 0.1U_0402_16V4ZC118 0.1U_0402_16V4Z

1 2

C117 0.1U_0402_16V4ZC117 0.1U_0402_16V4Z

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDRII SO-DIMM 1

LA-4091P

953Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

U3B

D4

GFX_RX0 P

C4

GFX_RX0 N

A3

GFX_RX1 P

B3

1 1

PCIE_PTX_C_IRX_P026 PCIE_PTX_C_IRX_N026

2 2

3 3

4 4

PCIE_PTX_C_IRX_P127 PCIE_PTX_C_IRX_N127 PCIE_PTX_C_IRX_P226 PCIE_PTX_C_IRX_N226 PCIE_PTX_C_IRX_P325 PCIE_PTX_C_IRX_N325

PCIE_PTX_C_IRX_P526 PCIE_PTX_C_IRX_N526

SB_RX0P19 SB_RX0N19 SB_RX1P19 SB_RX1N19 SB_RX2P19 SB_RX2N19 SB_RX3P19 SB_RX3N19

GFX_RX1 N

C2

GFX_RX2 P

C1

GFX_RX2 N

E5

GFX_RX3 P

F5

GFX_RX3 N

G5

GFX_RX4 P

G6

GFX_RX4 N

H5

GFX_RX5 P

H6

GFX_RX5 N

J6

GFX_RX6 P

J5

GFX_RX6 N

J7

GFX_RX7 P

J8

GFX_RX7 N

L5

GFX_RX8 P

L6

GFX_RX8 N

M8

GFX_RX9 P

L8

GFX_RX9 N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780M_FCBGA528

RS780M Display Port Support (muxed on GFX)

DP0

DP1

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

GFX_TX0,TX1,TX2 and TX3

AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7

AUX1 and HPD1

GFX_TX0 P GFX_TX0 N GFX_TX1 P GFX_TX1 N GFX_TX2 P GFX_TX2 N GFX_TX3 P GFX_TX3 N GFX_TX4 P GFX_TX4 N GFX_TX5 P GFX_TX5 N GFX_TX6 P GFX_TX6 N GFX_TX7 P GFX_TX7 N GFX_TX8 P GFX_TX8 N GFX_TX9 P

GFX_TX9 N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N

GPP_TX0P

GPP_TX0N

GPP_TX1P

GPP_TX1N

GPP_TX2P

GPP_TX2N

GPP_TX3P

GPP_TX3N

GPP_TX4P

GPP_TX4N

GPP_TX5P

GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

B

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2

PCIE_ITX_PRX_P1

AB4

PCIE_ITX_PRX_N1

AB3

PCIE_ITX_PRX_P2

AA2

PCIE_ITX_PRX_N2

AA1

PCIE_ITX_PRX_P3

Y1

PCIE_ITX_PRX_N3

Y2 Y4 Y3

PCIE_ITX_PRX_P5

V1

PCIE_ITX_PRX_N5

V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

TMDS_B_DATA2 18 TMDS_B_DATA2# 18 TMDS_B_DATA1 18 TMDS_B_DATA1# 18 TMDS_B_DATA0 18 TMDS_B_DATA0# 18 TMDS_B_CLK 18 TMDS_B_CLK# 18

C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K C154 0.1U_0402_16V7KC154 0.1U_0402_16V7K C155 0.1U_0402_16V7KC155 0.1U_0402_16V7K C156 0.1U_0402_16V7KC156 0.1U_0402_16V7K C157 0.1U_0402_16V7KC157 0.1U_0402_16V7K C158 0.1U_0402_16V7KC158 0.1U_0402_16V7K C159 0.1U_0402_16V7KC159 0.1U_0402_16V7K

C160 0.1U_0402_16V7KC160 0.1U_0402_16V7K

SB_TX0P_C SB_TX0N_C SB_TX1P_C SB_TX1N_C SB_TX2P_C SB_TX2N_C SB_TX3P_C SB_TX3N_C

R55 1.27K_0402_1%R55 1.27K_0402_1% R56 2K_0402_1%R56 2K_0402_1%

C161 0.1U_0402_16V7KC161 0.1U_0402_16V7K

C162 0.1U_0402_16V7KC162 0.1U_0402_16V7K C163 0.1U_0402_16V7KC163 0.1U_0402_16V7K C164 0.1U_0402_16V7KC164 0.1U_0402_16V7K C165 0.1U_0402_16V7KC165 0.1U_0402_16V7K C166 0.1U_0402_16V7KC166 0.1U_0402_16V7K C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K C167 0.1U_0402_16V7KC167 0.1U_0402_16V7K

1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2

+1.1VS

C

PCIE_ITX_C_PRX_P0 26 PCIE_ITX_C_PRX_N0 26 PCIE_ITX_C_PRX_P1 27 PCIE_ITX_C_PRX_N1 27 PCIE_ITX_C_PRX_P2 26 PCIE_ITX_C_PRX_N2 26 PCIE_ITX_C_PRX_P3 25 PCIE_ITX_C_PRX_N3 25

PCIE_ITX_C_PRX_P5 26 PCIE_ITX_C_PRX_N5 26

SB_TX0P 19 SB_TX0N 19 SB_TX1P 19 SB_TX1N 19 SB_TX2P 19 SB_TX2N 19 SB_TX3P 19 SB_TX3N 19

New Card

Cardreader

WLAN

GLAN

TV Tuner

H_CLKOP04 H_CLK ON04 H_CLKOP14 H_CLK ON14

H_CTLOP 04

H_CTLON04

H_CTLON14

0718 Place within 1" layout 1:2

H_CADOP[0..15]4

H_CADON[0..15]4 H_CADIN[0..15] 4

R57 301_0402_1%R57 301_0402_1%

1 2

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9

H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CTLOP 0 H_CTLON0 H_CTLOP 1 H_CTLON1

D

H_CADON[0..15]

U3A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M_FCBGA528

PART 1 OF 6

HYPER TRANSPORT CPU I/F

H_CADIP[0..15]H_CADOP[0..15]

H_CADIN[0..15]

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

H_CADIP[0..15] 4

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18

H24 H25 L21 L20

H_CTLIP0

M24

H_CTLIN0

M25

H_CTLIP1

P19

H_CTLIN1

R18

B24 B25

0718 Place within 1" layout 1:2

E

H_CLKIP0 4 H_CLK IN0 4 H_CLKIP1 4 H_CLK IN1 4

H_CTLIP0 4

H_CTLIN0 4

H_CTLIP1 4H_CTLOP 14

H_CTLIN1 4

R58 301_0402_1%R58 301_0402_1%

1 2

NEED CHECK R68 & R69 WITH AMD

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

RS780-HT/PCIE

LA-4091P

E

of

10 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

+1.8VS

L6

1 2

C175

+NB_PLLVDD

1

2

LCD_DDC_DAT17

+3VS

1

2

R67 0_0402_5%R67 0_0402_5%

1 2

NBGFX_ CLK15 NBGFX_CLK#15

CLK_SBLINK_BCLK15 CLK_SBLINK_BCLK#15

1

C176

2

+VDDA18HTPLL

1

C179

2

+VDDA18PCIEPLL

1

C180

2

1 2

R71

4.7K_0402_5%

RED

GREEN

BLUE

+1.8VS

+NB_HTPVDD+1.8VS

+1.1VS

1 2

R72

4.7K_0402_5%

BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z

L9

1 2

BLM18PG121SN1D_0603

C178

2.2U_0603_6.3V4Z

PLT_ RST#14,19,25,26,27,32,33

NB_OSC_14.318M15

LCD_DDC_CLK17

HDMIDAT_UM A18 HDMICLK _UMA18

1 2

R62 150_0402_1%R62 150_0402_1%

1 2

1 1

+1.8VS

2 2

+1.8VS

1 2

R371 300_0402_5%R371 300_0402_5%

+1.8VS

NB_PW RGD

R63 150_0402_1%R63 150_0402_1%

1 2

R64 150_0402_1%R64 150_0402_1%

L7

1 2

BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z

L10

1 2

BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z

L11

1 2

BLM18PG121SN1D_0603

2.2U_0603_6.3V4Z

+1.1VS

For SB700 A12 use

3 3

L2

1 2

BLM18PG121SN1D_0603

L4

0_0603_5%

2.2U_0603_6.3V4Z

+AVDDQ

CRT_HSYNC14,16

CRT_VSYNC14,16 UMA_CRT_CLK16 UMA_CRT_DAT16 LVDS_BCLK- 17

NB_PW RGD20

LDT_STOP#6,19

CPU_LDT_REQ#6,19

CLK_ NBHT15 CLK_ NBHT#15

+3VS

1

C172

2

RED16

GREEN16

BLUE16

R65 715_0402_1%R65 715_0402_1%

1 2

+NB_PLLVDD

+NB_HTPVDD

+VDDA18HTPLL

+VDDA18PCIEPLL

R88 10K_0402_5%R88 10K_0402_5%

AUX_CAL14

Strap pin

+AVDD1

+AVDD2

RED

GREEN

BLUE

+NB_PLLVDD +NB_HTPVDD

NB_PW RGD

AVDD=100mA

1

2

CRT_HSYNC CRT_VSYNC

NB_RESET#

12

C170

2.2U_0603_6.3V4Z

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(D FT _G PI O2 )

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb (NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTS TOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REF CLKP

T1

GFX_REF CLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780M_FCBGA528

PART 3 OF 6

TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

CLOCKs PLL PWR

MIS.

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U 0P(NC ) TXOUT_U0N(NC )

TXOUT_U 2P(NC ) TXOUT_U2N(NC )

TXOUT_U3N(NC )

TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC)

VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

TMDS_HPD(NC)

SUS_STAT#(PWM_GPIO5)

HPD(NC )

THERMALDIODE_P THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

+VDDLTP18

A13 B13

+VDDLT18

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9

R69 0_0402_5%R69 0_0402_5%

F7

R70 0_0402_5%R70 0_0402_5%

G12

D9 D10

1 2

D12

R77 0_0402_5%R77 0_0402_5%

AE8 AD8

1 2

D13

R80

1.8K_0402_5%

LVDS_A0+ 17 LVDS_A0- 17 LVDS_A1+ 17 LVDS_A1- 17 LVDS_A2+ 17 LVDS_A2- 17

LVDS_B0+ 17 LVDS_B0- 17 LVDS_B1+ 17 LVDS_B1- 17 LVDS_B2+ 17 LVDS_B2- 17

LVDS_ACLK+ 17 LVDS_ACLK- 17 LVDS_BCLK+ 17

1 2 1 2

+VDDLTP18

+VDDLT18

0.1U_0402_16V4Z

HPD 18

SUS_STAT# 20 SUS_STAT_R# 14

1

C173

2

UMA_ENVDD 17 ENBKL 33

Strap pin

L3

1 2

BLM18PG121SN1D_0603

1

C171

2.2U_0603_6.3V4Z

2

1 2

BLM18PG121SN1D_0603

1

C174

4.7U_0805_10V4Z

2

+1.8VS

L5

+1.8VS

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

RS780 VEDIO/CLK GEN

LA-4091P

11 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

2

U3D

U61

MEM_BA0 MEM_BA1

MEM_A12 MEM_A11 MEM_A10 MEM_A9 MEM_A8 MEM_A7 MEM_A6 MEM_A5 MEM_A4 MEM_A3 MEM_A2 MEM_A12 MEM_A1

12

R91

100_0402_1%

B B

SIDE@

MEM_A0

MEM_CLK N MEM_CLK P

MEM_CKE

MEM_CS#

MEM_WE#

MEM_RAS#

MEM_CAS #

MEM_DM0 MEM_DM1

MEM_ODT

MEM_DQS_P 0 MEM_DQS_N0

MEM_DQS_P 1 MEM_DQS_N1

+MEM_VREF

MEM_BA2

U61

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3

WE

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC

E2

NC

L1

NC

R3

NC

R7

NC

R8

NC

HY5PS561621AFP-25_FBGA84

SIDE@

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD

VDDL

VSSDL

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VSS VSS VSS VSS VSS

MEM_DQ15

B9

MEM_DQ11

B1

MEM_DQ13 ME M_A1

D9

MEM_DQ12 ME M_A2

D1

MEM_DQ8

D3

MEM_DQ10

D7

MEM_DQ9

C2

MEM_DQ14

C8

MEM_DQ3

F9

MEM_DQ7

F1

MEM_DQ1

H9

MEM_DQ6

H1

MEM_DQ5

H3

MEM_DQ0

H7

MEM_DQ4

G2

MEM_DQ2

G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

+1.8V_MEM_ VDDQ

+VDDL

+1.8V_MEM_ VDDQ

1U_0603_10V6K

1

Layout No te: 50 mil for VSSDL

C184

SIDE@

2

SIDE@

12

R92 40.2_0402_1%

12

R93 40.2_0402_1%

SIDE@

MEM_A0

MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS # MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CLK P MEM_CLK N

MEM_COMP_P

MEM_COMP_N

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14

AD16 AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

RS780M_FCBGA528

U3D

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC ) MEM_A11(NC ) MEM_A12(NC ) MEM_A13(NC )

MEM_BA0 (NC) MEM_BA1 (NC) MEM_BA2 (NC)

MEM_RASb(NC ) MEM_CAS b(NC) MEM_WEb(NC) MEM_CSb (NC) MEM_CKE (NC) MEM_ODT(NC)

MEM_CKP (NC) MEM_CKN(NC)

MEM_COMPP (NC) MEM_COMPN(NC)

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC )

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P (NC) MEM_DQS1N(NC )

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC)

IOPLLVSS(NC)

MEM_VREF(NC )

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23

AE18

MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15

MEM_DQS_P 0 MEM_DQS_N0 MEM_DQS_P 1 MEM_DQS_N1

MEM_DM0 MEM_DM1

+NB_IOPLLVDD

+MEM_VREF1

1

MEM_COMP_ P and ME M_COMP_N tra ce width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

0_0603_5%

+1.8V_IOPLLVDD

1

2

1 2

1

C181

2.2U_0603_6.3V4Z

2

SIDE@

L13

+1.1VS

C182

0.1U_0402_16V4Z

SIDE@

L12

1 2

1

C183

2.2U_0603_6.3V4Z

2

SIDE@

+1.8VS

0_0603_5%

+1.8V_MEM_ VDDQ+1.8V_ME M_VDDQ

1

SIDE@

A A

SIDE@

C195

2

1

C199

2

SIDE@

R96

1 2

1K_0402_1%

0.1U_0402_16V4Z

+MEM_VREF

SIDE@

0.1U_0402_16V4Z

R98

1 2

1K_0402_1%

SIDE@

1

C196

2

0.1U_0402_16V4Z

1

C200

2

0.1U_0402_16V4Z

2

R97

1 2

R99

1 2

SIDE@

1K_0402_1%

+MEM_VREF1

SIDE@

1K_0402_1%

SIDE@

+1.8V_MEM_ VDDQ

SIDE@

1U_0402_6.3V4Z

2

C607

1

2

C608

1

SIDE@

1U_0402_6.3V4Z

SIDE@

C201

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

2

0.1U_0402_16V4Z

Issued Date

C202

1

C203

SIDE@

2

0.1U_0402_16V4Z

2007/08/02 2008/08/02

L15

1 2

0_0805_5%SIDE@

220 ohm @ 100MHz,2A

22U_0805_6.3V6M

+1.8VS

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

1

Date: Sheet of

Compal Electronics, Inc.

RS780 SIDE PORT

LA-4091P

12 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

1 1

2 2

3 3

+1.1VS

FBMA-L11-201209-221LMA30T_0805

+1.2V_HT

+1.35VS

+1.8VS

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805@

L16

L18

L19

L43

L22

4.7U_0805_10V4Z

12

C209

4.7U_0805_10V4Z

2A

12

1

C215

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

2A

12

C225

4.7U_0805_10V4Z

2A

12

1

C246

C235

2

4.7U_0805_10V4Z

2A

1

C206

2

0.1U_0402_16V4Z

1

C216

C214

2

0.1U_0402_16V4Z

1

C226

2

0.1U_0402_16V4Z

1

C236

2

0.1U_0402_16V4Z

1

C207

C208

2

0.1U_0402_16V4Z

1

C217

2

0.1U_0402_16V4Z

1

C227

C228

2

0.1U_0402_16V4Z

1

C238

C237

2

0.1U_0402_16V4Z

+1.8VS

1U_0402_6.3V4Z

1

C210

2

0.1U_0402_16V4Z

+VDDHTRX

1

C218

2

0.1U_0402_16V4Z

1

C229

2

0.1U_0402_16V4Z

1

C239

2

0.1U_0402_16V4Z

C251

+VDDHT

1

2

+VDDHTTX

1

2

+VDDA18PCIE

1

2

1

2

+1.8VS

B

AE25 AD24 AC23 AB22 AA21

AE11 AD11

1

C252

C252 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

SIDE@

U3E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDD18_1

G9

VDD18_2 VDD18_MEM1(NC) VDD18_MEM2(NC)

RS780M_FCBGA528

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

VDDA_12=2.5A

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

C

L17

1 2

FBMA-L11-201209-221LMA30T_0805

+VDDA11PCIE

FBMA-L11-201209-221LMA30T_0805

10U_0805_10V4Z

C211

10U_0805_10V4Z

C212

C220 1U_0402_6.3V4ZC220 1U_0402_6.3V4Z

1 2

C219 1U_0402_6.3V4ZC219 1U_0402_6.3V4Z

1 2

C222 1U_0402_6.3V4ZC222 1U_0402_6.3V4Z

1 2

C221 1U_0402_6.3V4ZC221 1U_0402_6.3V4Z

1 2

C224 0.1U_0402_16V4ZC224 0.1U_0402_16V4Z C223 0.1U_0402_16V4ZC223 0.1U_0402_16V4Z

+1.1VS +NB_VDDC

FBMA-L11-201209-221LMA30T_0805

12 12

L20

1 2

FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805 L21

L21

1 2

VDD_CORE=5A

1

C2470.1U_0402_16V4Z C2470.1U_0402_16V4Z

2

+3VS

C2400.1U_0402_16V4Z C2400.1U_0402_16V4Z

2

1

C2420.1U_0402_16V4Z C2420.1U_0402_16V4Z

C2410.1U_0402_16V4Z C2410.1U_0402_16V4Z

C2430.1U_0402_16V4Z C2430.1U_0402_16V4Z

C2310.1U_0402_16V4Z C2310.1U_0402_16V4Z

C2300.1U_0402_16V4Z C2300.1U_0402_16V4Z

2

+1.8VS

1 2

1

C2440.1U_0402_16V4Z C2440.1U_0402_16V4Z

C2320.1U_0402_16V4Z C2320.1U_0402_16V4Z

C23310U_0805_10V4Z C23310U_0805_10V4Z

2

12 12 12 12 12

C2500.1U_0402_16V4Z C2500.1U_0402_16V4Z

C2530.1U_0402_16V4Z C2530.1U_0402_16V4Z

+1.1VS

330U_D2E_2.5VM

1

C234

1

C24510U_0805_10V4Z C24510U_0805_10V4Z

+

2

C2491U_0402_6.3V4Z SIDE@C2491U_0402_6.3V4Z SIDE@ C2481U_0402_6.3V4Z SIDE@C2481U_0402_6.3V4Z SIDE@ C5970.1U_0402_16V4Z SIDE@C5970.1U_0402_16V4Z SIDE@ C5980.1U_0402_16V4Z SIDE@C5980.1U_0402_16V4Z SIDE@ C5990.1U_0402_16V4Z SIDE@C5990.1U_0402_16V4Z SIDE@

D

U3F

A25

VSSAHT1

D23

VSSAHT2

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

W22

VSSAHT23

W24

VSSAHT24

W25

VSSAHT25

Y21

VSSAHT26

AD25

VSSAHT27

L12

VSS11

M14

VSS12

N13

VSS13

P12

VSS14

P15

VSS15

R11

VSS16

R14

VSS17

T12

VSS18

U14

VSS19

U11

VSS20

U15

VSS21

V12

VSS22

W11

VSS23

W15

VSS24

AC12

VSS25

AA14

VSS26

Y18

VSS27

AB11

VSS28

AB15

VSS29

AB17

VSS30

AB19

VSS31

AE20

VSS32

AB21

VSS33

K11

VSS34

RS780M_FCBGA528

PART 6/6

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30

GROUND

VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

E

+1.8VS

U67

VIN1VCNTL

1

C903

10U_0805_10V4Z@

Q56

2N7002_SOT23-3@

4 4

VLDT_EN#36

R601 0_0402_5%@R601 0_0402_5%@

A

1 2

2N7002_SOT23-3@

2

G

2

C703

0.1U_0402_16V7K@

1

12

2

R599

R599 1K_0402_1%@

1K_0402_1%@

+VREF1.35V

12

R600

@

3K_0402_5%

13

D

S

0.1U_0402_16V7K@

2

GND

3

VREF

4

VOUT

G2992F1U_SO8@

2

1

C702

C905

1

2

10U_0805_10V4Z@

B

+1.35VS

6

5

NC

7

NC

8

NC

9

TP

+3VS

1

C463

C463 1U_0603_10V6K@

1U_0603_10V6K@

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

RS780 PWR/GND

LA-4091P

E

of

13 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

RS780 DFT_GPIO5 mux at CRT_VSYNC pull low to 3K

CRT_VSYNC11,16

1 1

12

R101 1K_0402_5%@R101 1K_0402_5%@

12

R102 1K_0402_5%R102 1K_0402_5%

+3VS

DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. 1 : Enable (RX780, RS780) 0 : Disable (RX780, RS780) PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#

DFT_GPIO[4:2]: STRAP_PCIE_GPP_CFG[2:0]

These pin straps are used to configure PCI-E GPP mode. 000 : 00001 001 : 00010

RS780 use register to control PCI-E configure

2 2

010 : 01011 011 : 00100 100 : 01010 101 : 01100 111 : 01011

DFT_GPIO1: LOAD_EEPROM_STRAPS

1 2

R104 150_0402_1%@R104 150_0402_1%@

D4 CH751H-40PT_SOD323-2@D4 CH751H-40PT_SOD323-2@

2 1

Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

RS780 DFT_GPIO1

AUX_CAL11

SUS_STAT_R#11 PLT_RST# 11,19,25,26,27,32,33

3 3

RS780 use HSYNC to enable SIDE PORT (internal pull high)

CRT_HSYNC11,16

4 4

A

12

R107 1K_0402_5%SIDE@ R107 1K_0402_5%SIDE@

B

DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb

RX780: Enables the Test Debug Bus using PCIE bus 1 : Disable ( Can still be enabled using nbcfg register access ) 0 : Enable

RS780: Enables Side port memory ( RS780 use HSYNC#)

1. Disable (RS780) 0 : Enable (RS780)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

RS780 STRAPS

LA-4091P

14 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

R168

1 2

0_0805_5%

Card reader

MiniCard_ 2

SEL_SATA

+VDDCLK_IO

SB LINK

+3VS

1

C452

2

0.1U_0402_16V4Z

1

C453

2

0.1U_0402_16V4Z

1

C454

2

1

C455

2

0.1U_0402_16V4Z

1

C456

2

0.1U_0402_16V4Z

C464

22P_0402_50V8J

1

C457

2

CLK_XTAL_OUT

CLK_XTAL_IN

Y2

12

14.31818MHZ_20P_6X1430004201

1

C465

22P_0402_50V8J

2

22P_0402_50V8J

2

Routing the trace at least 10mil

72

73

U10

1

SMB_CK_CLK08,9,20,28 SMB_CK_DAT08,9,20,28

CLK_SBLINK_BCLK#11

CLK_SBLINK_BCLK11 CLK_SBSRC_BCLK# 19

CLK_PCIE_MCARD1#26

CLK_PCIE_MCARD126

CLK_PCIE_MCARD2#26

CLK_PCIE_MCARD226

+3VS_CLK

R180

8.2K_0402_5%

1 2

27M_SEL

1*

0 configure as SRC_7 output * default

+3VS_CLK

+VDDCLK_IO

+3VS_CLK

+VDDCLK_IO

configure as 27M and 27M_SS output

SCL

2

SDA

3

VDD_DOT

4

SRC_7#/27M

5

SRC_7/27M_SS

6

VSS_DOT

7

SRC_5#

8

SRC_5

9

SRC_4#

10

SRC_4

11

VSS_SRC

12

VDD_SRC_IO

13

SRC_3#

14

SRC_3

15

SRC_2#

16

SRC_2

17

VDD_SRC

18

VDD_SRC_IO

71

GND

VSS_48

VSS_SRC19SRC_1#20SRC_121SRC_0#22SRC_023CLKREQ_0#24ATIGCLK_2#25ATIGCLK_226VSS_ATIG27VDD_AT IG_IO28VDD_AT IG29ATIGCLK_1#30ATIGCLK_131ATIGCLK_0#32VSS_SB_SRC36SB_SRC_135SB_SRC_1#34ATIGCLK_0

+1.2V_HT

22U_0805_6.3V6M

1 1

2 2

PA_RS7X0A1

3 3

+3VS_CLK

R179

8.2K_0402_5%@

1 2

R181

8.2K_0402_5%

SEL_SATA

4 4

1 2

1*0configure as SATA output

configure as normal SRC(SRC_6) output

* default

R167

1 2

0_0805_5%

+3VS_CLK

CLK_XTAL_OUT

CLK_XTAL_IN

69

68

VDD_48

48MHz_17048MHz_0

XTAL_OUT

66

67

XTAL_IN

VSS_REF

+3VS_CLK

NB_OSC_14.318M_R

+3VS_CLK

SEL_SATA

27M_SEL

63

65

62

64

REF_2/SEL_27

REF_1/SEL_SATA

REF_0/SEL_HTT66

+3VS_CLK

+VDDCLK_ IO

CLKREQ_LAN

1

2

+3VS_CLK

61

60

VDD_HTT

VDD_REF

HTT_0/66M_0

C444

C444 22U_0805_6.3V6M

22U_0805_6.3V6M

+3VS_CLK

1 2

R174 10K_0402_5%R174 10K_0402_5%

59

58

57

55

56

PD#

VSS_HTT

CPU_K8 _0

CPU_K8_0#

HTT_0#/66M_1

SB_SRC_SLOW#

VDD_SB_SRC_IO

33

1

C445

0.1U_0402_16V4Z

2

1

C458

0.1U_0402_16V4Z

2

+3VS_CLK

1 2

R946 0_0402_5%

1 2

R945 0_0402_5%

54

VDD_CPU

VDD_CPU_I/O

SRC_6#/SATA#

VDD_SB_SRC

53 52

VSS_CPU

51

CLKREQ_1#

50

CLKREQ_2#

49

VDD_A

48

VSS_A

47

VSS_SATA

46

SRC_6/SATA

45 44

VDD_SATA

43

CLKREQ_3#

42

CLKREQ_4#

41 40

SB_SRC_0

39

SB_SRC_0#

38 37

SLG8SP626VTR_QFN72_10x10

NBGFX_ CLK 1 1 NBGFX_CLK# 11

CLK_PCIE_MCARD0 27 CLK_PCIE_MCARD0# 27 CLKREQ_LAN 25 CLK_PCIE_LAN 25 CLK_PCIE_LAN# 25

CLK_PCIE_NCARD 26 CLK_PCIE_NCARD# 26

1

C446

0.1U_0402_16V4Z

2

1

C459

0.1U_0402_16V4Z

2

R170 33_0402_5%R170 33_0402_5%

1 2

R379 200_0402_1% R379 200_0402_1%

R220 33_0402_5%R220 33_0402_5%

1 2

+3VS_CLK +VDDCLK_IO

CLKREQ_NCARD# CLKREQ_MCARD2#

+3VS_CLK

1 2

R372 10K_0402_5%R372 10K_0402_5%

+3VS_CLK +VDDCLK_IO

1

C447

0.1U_0402_16V4Z

2

1

C460

0.1U_0402_16V4Z

2

R186

R186 261_0402_1%@

261_0402_1%@

1 2

CLKREQ_MCARD1#

NB GFX

MiniCard_ 1

GLAN

New Ca rd

1 2

CLKREQ_NCARD# 26 CLKREQ_MCARD2# 26

CLK_SBSRC_BCLK 19

+3VS_CLK

R380

NB

1

C449

0.1U_0402_16V4Z

2

1

C448

0.1U_0402_16V4Z

2

1

C461

0.1U_0402_16V4Z

2

CLK_48M_USB 20

NB_OSC_14.318M 11

100_0402_5%

CLK_14M_SIO 32 CLK_ NBHT 1 1 CLK_ NBHT# 11

CLK_CPU_BCLK 6

CPU

CLK_CPU_BCLK# 6

CLKREQ_NCARD#

CLKREQ_MCARD2#

CLKREQ_MCARD1#

CLKREQ_LAN

SB SRC

CLKREQ_MCARD1# 26

NB CLOC K INPUT TABLE

NB CLOC KS

HT_REFCLKP

HT_REFCLKN

REFCLK_P

REFCLK_N

GFX_REF CLK

GPP_REFCLK

GPPSB_REFCLK 100M DIFF 100M DIFF

100M DIFF 100M DIFF

14M SE (1.8V) 14M SE (1.1V) NC vref

100M DIFF

1

C450

0.1U_0402_16V4Z

2

OSC_14M_NB

1.8V 75R/100RRX780

RS780

1.1V 158R/90.9R

1 2

R324 8.2K_0402_5%R324 8.2K_0402_5%

1 2

R325 8.2K_0402_5%R325 8.2K_0402_5%

1 2

R326 8.2K_0402_5%R326 8.2K_0402_5%

1 2

R390 8.2K_0402_5%R390 8.2K_0402_5%

PA_RS7X0A1

RX780 RS780

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

1

C451

1U_0402_6.3V4Z

2

+3VS_CLK

Use voltage divider resistor R379 & R380 to pull low

NB_OSC_14.318M

configure as single-ended 66MHz output1

*0 configure as differential 100MHz output

* default

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet

http://laptop-motherboard-schematic.blogspot.com/

Compal Electronics, Inc.

Clock generator

LA-4091P

E

of

15 53Thursday, November 08, 2007

0.1

A

B

C

D

E

CRT CONNECTOR

1 1

1

D35

DAN217_SC59

2

3

@

L47

R217

150_0402_1%

RED

GREEN

BLUE

12

C471

150_0402_1%

1

C859

2

6P_0402_50V8K

RED11

GREEN11

BLUE11

12

R211

R214

150_0402_1%

2 2

4.7K_0402_5%

UMA_CRT_DAT11 D_DDCDATA 35

UMA_CRT_CLK11

RS780 DAC_SCL & SDA is 5V tolerance

3 3

R237

12

+3VS

1 2

R238

4.7K_0402_5%

+3VS

5

6.8K_0402_5%

3

4

Q10B

Q10B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

+3VS

2

61

Q10A

Q10A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

470P_0402_50V8J

@

R100

C857

1

2

+CRT_VCC

1

2

R218

6.8K_0402_5%

D_DDCDATA

D_DDCCLK

C856

@

470P_0402_50V8J

D_DDCCLK 35

1

C469

2

6P_0402_50V8K

L47

1 2

BLM15AG121SN1D_0402

L48

1 2

BLM15AG121SN1D_0402

L49

1 2

BLM15AG121SN1D_0402

1

2

6P_0402_50V8K

CRT_HSYNC11,14

CRT_VSYNC11,14

C858

D37

DAN217_SC59

@

GREEN_L

1

C476

2

22P_0402_50V8J

1

2

RED_L

BLUE_L

D34

DAN217_SC59

3

@

1

C472

2

C473

0.1U_0402_16V4Z

C477

0.1U_0402_16V4Z

1

2

22P_0402_50V8J

1 2

3

+CRT_VCC

+R_CRT_VCC

D36

2 1

RB491D_SOT23

+3VS

D_DDCDATA

HSYNC

VSYNC

D_DDCCLK

RED_L 3 5

GREEN_L 35

BLUE_L 35

1

5

P

D_HSYNC

4

OE#

A2Y

G

U14

3

SN74AHCT1G125GW_SOT353-5

1

5

P

D_VSYNC

4

OE#

A2Y

G

U13

SN74AHCT1G125GW_SOT353-5

3

F2

21

1A_6VDC_MINISMDC110

0.1U_0402_16V4Z

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

16 17

SI:change CRT Conn.

+CRT_VCC+5VS

1

C475

2

JP6

GND

GND GND

GND

SUYIN_070546FR015S265ZR

1 2

L84 10_0402_5%L84 10_0402_5%

1 2

L83 10_0402_5%L83 10_0402_5%

D_HSYNC 35

D_VSYNC 35

HSYNC

VSYNC

1

C474

@

1

C470

@

2

10P_0402_50V8J

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

CRT Connector

LA-4091P

16 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

+LCDVDD

R225

470_0805_5%

1 1

2N7002DW-7-F_SOT363-6

UMA_ENVDD11

2 2

INVPWR_B++LCDVDD

C479

C480

1

2

680P_0402_50V7K

@

USB20_P520 USB20_N520

LVDS_BCLK+11 LVDS_BCLK-11

LVDS_B0+11 LVDS_B0-11 LVDS_B1+11 LVDS_B1-11 LVDS_B2+11 LVDS_B2-11

2

C719

C719 10U_0805_10V4Z

10U_0805_10V4Z

1

C480

12

680P_0402_50V7K

@

USB20_P5 USB20_N5

LVDS_BCLK+ LVDS_BCLK-

+3VS

C481

D22

+5VALW

USB20_N5

3 3

4

VIN

3

IO2

PRTR5V0U2X_SOT143-4@

GND

12

C870680P_0402_50V7K @C870680P_0402_50V7K @

12

C871680P_0402_50V7K @C871680P_0402_50V7K @

IO1

USB20_P5

2

1

LVDS_BCLK+

LVDS_BCLK-

C481

12

680P_0402_50V7K

@

SI: Add +5VS jumper

+5VALW

+5VS

PJP4

PAD-OPEN 2x2m

C720

10U_0805_10V4Z

CAM_SHDN#21

4 4

R17 0_0402_5%@R17 0_0402_5%@

PJP7

PJP7 PAD-OPEN 2x2m

PAD-OPEN 2x2m

2 1

2

R16

R16 0_0402_5%

0_0402_5%

1

1 2

12

U54

1

VIN

VOUT

2

GND

3

EN

BP

RT9193-39GB_SOT23-5

0.1U_0402_16V4Z

5

4

C511

215K_0402_1%@

1

2

12

R891

12

R892

R892 100K_0402_1%

100K_0402_1%

@

+USB_CAM

Q144B

R276

2.2K_0402_5%

LVDS CONN

JP7

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

39 GND41GND

ACES_88242-4001

CONN@

BKOFF#

LCD_DDC_CLK

LCD_DDC_DAT

12

3

4

1 2

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

1 2

+5VALW

R224

R224 1M_0402_5%

1M_0402_5%

1 2

R222

1 2

5

100K_0402_5%

61

2

Q144A

Q144A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

B+ INVPWR_B+

2

4

6

8

10 12

LVDS_ACLK-

14

LVDS_ACLK+

16 18 20 22

DMIC_DAT

24

DMIC_CLK

26 28

INV T_P WM

30

BKOFF#

32

DAC_BRIG

34 36

LCD_DDC_CLK

38

LCD_DDC_DAT

40 42

+3VS

R4834.7K_0402_5%@ R4834.7K_0402_5%@

R2744.7K_0402_5% R2744.7K_0402_5%

R2754.7K_0402_5% R2754.7K_0402_5%

2

C863

C863 1000P_0402_50V7K

1000P_0402_50V7K

1

4.7U_0805_10V4Z

L44

FBMA-L11-201209-221LMA30T_0805

12

LVDS_A2- 11 LVDS_A2+ 11 LVDS_A1- 11 LVDS_A1+ 11 LVDS_A0- 11 LVDS_A0+ 11 LVDS_ACLK- 11 LVDS_ACLK+ 11

DMIC_DAT 29 DMIC_CLK 29

12

C867

C866

@

680P_0402_50V7K

2

C487

1 2

+USB_CAM

+3VS

80mil

S

G

Q43

Q43 SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

D

1 3

80mil

1

2

R491100_0805_5% R491100_0805_5%

LCD_DDC_CLK 11 LCD_DDC_DAT 11

+LCDVDD

C491

0.1U_0402_16V4Z

LVDS_ACLK-

LVDS_ACLK+

+5VS

1 2

C868 680P_0402_50V7K@ C868 680P_0402_50V 7K@

1 2

C869 680P_0402_50V7K@ C869 680P_0402_50V 7K@

SI: Change R491 to 0805 size

1

C483

C482

2

@

680P_0402_50V7K

INV_PWM 33

BKOFF# 33

DAC_BRIG 33

680P_0402_50V7K

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

LCD CONN.

LA-4091P

17 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

+HDMI_5V_OUT

C851

1 1

0.1U_0402_16V4Z

2 2

2

1

5

1

P

OE#

A2Y

G

3

2.2K_0402_5%

4

U39

U39 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

R615

12

HPD 1 1

+3VS

R628

100K_0402_5%

B

1 2

HDMI_HPD

C850

2

0.1U_0402_16V4Z

1

C

12

R209

R176

4.7K_0402_5%

HDMIDAT_UM A11

HDMICLK _UMA11

R209

4.7K_0402_5%

1 2

D

+3VS

6.8K_0402_5%

5

3

4

Q139B

Q139B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

+3VS

2

61

Q139A

Q139A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

R210

+HDMI_5V_OUT+3VS

R236

6.8K_0402_5%

HDMI_SD ATA

HDMI_SC LK

E

SI:Add R6161~R624 for EMI requset

HDMI_CLK-

C507 0.1U_0402_16V7KC507 0.1U_0402_16V7K

TMDS_B_CLK10 TMDS_B_CLK#10

TMDS_B_DATA010

TMDS_B_DATA0#10

3 3

TMDS_B_DATA110

TMDS_B_DATA1#10

TMDS_B_DATA210 TMDS_B_DATA2#10

4 4

1 2

C508 0.1U_0402_16V7KC508 0.1U_0402_16V7K

1 2

C655 0.1U_0402_16V7KC655 0.1U_0402_16V7K

1 2

C675 0.1U_0402_16V7KC675 0.1U_0402_16V7K

1 2

C804 0.1U_0402_16V7KC804 0.1U_0402_16V7K

1 2

C827 0.1U_0402_16V7KC827 0.1U_0402_16V7K

1 2

C852 0.1U_0402_16V7KC852 0.1U_0402_16V7K

1 2

C853 0.1U_0402_16V7KC853 0.1U_0402_16V7K

1 2

A

HDMI_CLK+ HDMI_CLK-

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+

HDMI_TX2-

HDMI_TX0-

HDMI_TX0+

HDMI_TX1-

HDMI_TX1+

HDMI_TX2+

B

1 2

R616 0_0402_5%R616 0_0402_5%

L85

1

4

WCM-2012-900T_0805@

1 2

R617 0_0402_5%R617 0_0402_5%

1 2

R618 0_0402_5%R618 0_0402_5%

L86

1

4

WCM-2012-900T_0805@

1 2

R619 0_0402_5%R619 0_0402_5%

1 2

R620 0_0402_5%R620 0_0402_5%

L87

1

4

WCM-2012-900T_0805@

1 2

R621 0_0402_5%R621 0_0402_5%

1 2

R623 0_0402_5%R623 0_0402_5%

L88

1

4

WCM-2012-900T_0805@

1 2

R624 0_0402_5%R624 0_0402_5%

2

3

2

3

2

3

2

3

HDMI_R_CK-

SI:Add Q136 & Q137 for AMD request

HDMI_R_CK+HDMI_CLK+

HDMI_R_CK+

1 2

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-HDMI_TX2-

HDMI_R_D2+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

R307 750_0402_1%R307 750_0402_1%

HDMI_R_CK-

1 2

R315 750_0402_1%R315 750_0402_1%

HDMI_R_D0-

1 2

R304 750_0402_1%R304 750_0402_1%

HDMI_R_D0+

1 2

R172 750_0402_1%R172 750_0402_1%

HDMI_R_D1-

1 2

R297 750_0402_1%R297 750_0402_1%

HDMI_R_D1+

1 2

R173 750_0402_1%R173 750_0402_1%

HDMI_R_D2+

1 2

R141 750_0402_1%R141 750_0402_1%

HDMI_R_D2-

1 2

R139 750_0402_1%R139 750_0402_1%

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Q136A

Q136A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

6 1

+5VS

Q136B

2N7002DW-7-F_SOT363-6

3

+5VS

Q137A

Q137A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

6 1

+5VS

Q137B

2N7002DW-7-F_SOT363-6

3

+5VS

Deciphered Date

2

4

5

2

4

5

D

+5VS +HDMI_5V_OUT

HDMI Connector

+HDMI_5V_OUT

HDMI_SD ATA HDMI_SC LK HDMI_HPD

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D10

2 1

RB491D_SOT23

JP8

18

+5V

16

SDA

15

SCL

19

HP_DE T

12

CK-

10

CK+

9

D0-

7

D0+

6

D1-

4

D1+

3

D2-

1

D2+

SUYIN_100042MR019S153ZL

CEC

Reserved

GND GND GND GND GND GND GND GND

DDC/CEC_GND

1

C468

0.1U_0402_16V4Z

2

13 14

2 5 8 11 20 21 22 23 17

SI:Update HDMI footprint

Compal Electronics, Inc.

HDMI

LA-4091P

E

0.1

18 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

MP:Update D10 to meet HDMI.

A

B

C

D

E

Check AMD need pull low or not

R300 8.2K_0402_5%@R300 8.2K_0402_5%@

NB_RST#_R

12 12

1

C505

1U_0402_6.3V4Z

2

CPU_LDT_REQ#

H_PROCHOT#

H_PWRGD

SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

+SB_PCIEVDD

SB_32KHI

SB_32KHO

C492 0.1U_0402_16V7KC492 0.1U_0402_16V7K

1 1

+3VALW

C506

12

5

U16

0.1U_0402_16V4Z@

2 2

3 3

NB_RST#_R

R314 20M_0402_5%@ R314 20M_0402_5%@

1 2

C643

1 2

18P_0402_50V8J

R389

20M_0603_5%

C652

1 2

18P_0402_50V8J

U16

2

P

B

4

Y

1

A

G

NC7SZ08P5X_NL_SC70-5@

3

12

R312 33_0402_5%

Y3

12

Y3

4

1

32.768KHZ_12.5P_1TJS125BJ4A421P

PLT_ RST#

3

OUT

NC

2

IN

NC

SB_RX0P10

SB_RX0N10

SB_RX1P10

SB_RX1N10

SB_RX2P10

SB_RX2N10

SB_RX3P10

SB_RX3N10

SB_TX0P10 SB_TX0N10 SB_TX1P10 SB_TX1N10 SB_TX2P10 SB_TX2N10 SB_TX3P10 SB_TX3N10

+PCIE_VDDR

+1.2V_HT

PLT_RST# 11,14,25,26,27,32,33

SB_32KHI

SB_32KHO

1 2

BLM18PG121SN1D_0603

1 2

C493 0.1U_0402_16V7KC493 0.1U_0402_16V7K

1 2

C494 0.1U_0402_16V7KC494 0.1U_0402_16V7K

1 2

C495 0.1U_0402_16V7KC495 0.1U_0402_16V7K

1 2

C496 0.1U_0402_16V7KC496 0.1U_0402_16V7K

1 2

C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K

1 2

C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K

1 2

C499 0.1U_0402_16V7KC499 0.1U_0402_16V7K

1 2

R305 562_0402_1%R305 562_0402_1% R306 2.05K_0402_1%R306 2.05K_0402_1%

L53

10U_0805_10V4Z

C504

1

2

Close to SB

CLK_SBSRC_BCLK15 CLK_SBSRC_BCLK#15

Close to SB

H_PROCHOT#

R319 10K_0402_5% R319 10K_0402_5%

12

CPU_LDT_REQ#6,11

H_PROCHOT#6

H_PWRGD6

LDT_STOP#6,11

LDT_ RST#6

B

+3VS

4 4

A

U15A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_C LKP

M25

NB_HT_C LKN

P17

CPU_HT_ CLKP

M18

CPU_HT_ CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_ RST#

218S7EALA11FG_BGA528_SB700

Part 1 of 5

RTC XTAL

CPU

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

SB700

PCI EXPRESS INTERFACE

CLOCK GENERATOR

LPC

RTC

C

PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4

PCICLK5/GPIO41

PCI CLKS

PCIRST#

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

TRDY#

PCI INTERFACE

STOP# PERR# SERR# REQ0# REQ1# REQ2#

REQ3#/GPIO70 REQ4#/GPIO71

GNT0#

GNT1#

GNT2#

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

LOCK#

INTE #/ GP IO33 INTF #/ GP IO34

INTG #/G PIO 35

INTH# /G PIO 36

LPCCLK0 LPCCLK1

LFRAME#

LDRQ0#

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

SERIRQ

RTCCLK

INTRUDER_AL ERT#

2007/08/02 2008/08/02

AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

IRD Y#

LAD0 LAD1 LAD2 LAD3

VBAT

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9

PAR

P4 P3 P1 P2 T4 T3

N1

U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3

PCI_AD23

Y2

PCI_AD24

AA2

PCI_AD25

AB4

PCI_AD26

AA1

PCI_AD27

AB3

PCI_AD28

AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2

PCI_PIRQH#

AE3

G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15

C3 C2 B2

+SB_VBAT

Compal Secret Data

1 2

R302 22_0402_5%@R302 22_0402_5%@

1 2

R301 22_0402_5%R301 22_0402_5%

PCI_AD23 23 PCI_AD24 23 PCI_AD25 23 PCI_AD26 23 PCI_AD27 23 PCI_AD28 23

PCI_SERR# 33

T15PAD T15PAD

T16PAD T16PAD T17PAD T17PAD

R967 0_0402_5%R967 0_0402_5%

R308 22_0402_5%R308 22_0402_5%

1 2

R309 22_0402_5%R309 22_0402_5%

1 2

C509

0.1U_0402_16V4Z

Deciphered Date

08/29 new add

LPC_AD0 32,33 LPC_AD1 32,33 LPC_AD2 32,33 LPC_AD3 32,33 LPC_FRAME# 32,33

LPC_DRQ1# 32

SIRQ 32,33

RTC_CLK 23

+SB_VBAT

1

C510

2

1U_0402_6.3V4Z

12

1

2

CLK_PCI_SIO

ACCEL_INT 28

CLK_PCI_EC CLK_PCI_TCG

EC & TPM &Debug

STRAP PIN

R316

R316 120_0402_5%

120_0402_5%

1 2

W=20mils

2

J1

2

1

D

R317

R317 120_0402_5%

120_0402_5%

1 2

JUMP_43X39@J1 JUMP_43X39@

PCICLK2 23

CLK_PCI_SIO2 32

CLK_PCI_SIO 23,32 PCI_CLK4 23 PCI_CLK5 23

CLK_PCI_TCG

CLK_PCI_EC

CLK_PCI_SIO

CLK_PCI_EC 23,33 CLK_PCI_TCG 23,32

+RTCVCC

DAN202U_SC70

1 2

R369 100_0402_5%@R369 100_0402_5%@

1 2

R303 100_0402_5%@R303 100_0402_5%@

1 2

R310 100_0402_5%@R310 100_0402_5%@

+3VL

D42

2

R876

1

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

R876

3

1 2

W=20mils

1K_0402_5%

Compal Electronics, Inc.

SB700-PCIE/PCI/ACPI/LPC/RTC

+RTCBATT

LA-4091P

C503 100P_0402_25V8K@C503 100P_0402_25V8K@

1 2

C501 100P_0402_25V8K@C501 100P_0402_25V8K@

1 2

C502 100P_0402_25V8K@C502 100P_0402_25V8K@

1 2

W=20mils

E

1 2 3 4

19 53Thursday, November 08, 2007

JBA TT1

1 2 GND GND

ACES_85205-02001

CONN@

0.1

NB_RST#_R

1 2

http://laptop-motherboard-schematic.blogspot.com/

A

+3VALW

R561

R561 10K_0402_5%

10K_0402_5%

1 2

LAN_PCIE_WAKE#25,26

1 1

+3VS

1 2

R388 4.7K_0402_5%R388 4.7K_0402_5%

MINI_PCIE_WAKE#25,26

SUS_STAT#

PCIE_WAKE#

SB700 has internal PD

+3VALW

2 2

3 3

1 2

R320 2.2K_0402_5%@R320 2.2K_0402_5%@

1 2

R321 2.2K_0402_5%@R321 2.2K_0402_5%@

1 2

R322 2.2K_0402_5%@R322 2.2K_0402_5%@

EC_RSMRST#

1 2

R327 2.2K_0402_5%R327 2.2K_0402_5%

+3VS

R328 2.2K_0402_5%R328 2.2K_0402_5%

1 2

R329 2.2K_0402_5%R329 2.2K_0402_5%

1 2

+3VALW

R331 2.2K_0402_5%R331 2.2K_0402_5%

1 2

R332 2.2K_0402_5%R332 2.2K_0402_5%

1 2

STRAP PIN

SB_TEST2

SB_TEST1

SB_TEST0

NB_PW RGD11

R386

100_0402_5%@

For SB700 A11 divider to

1.8V for RS & RX780

SMB_CK_CLK0

SMB_CK_DAT0

SMB_CK_CLK1

SMB_CK_DAT1

HDA_BITCLK_CODEC29 HDA_BITCLK_MDC34 HDA_SDOUT_MDC34

HDA_SDOUT_CODEC29 HDA_SDIN029 HDA_SDIN134

HDA_SYNC_MDC34

HDA_SYNC_CODEC29

HDA_RS T#_CODE C29 HDA_RS T#_MDC34

HDARST#23,33

R333 33_0402_5%R333 33_0402_5% R334 33_0402_5%R334 33_0402_5% R335 33_0402_5%R335 33_0402_5% R336 33_0402_5%R336 33_0402_5%

R337 33_0402_5%R337 33_0402_5% R338 33_0402_5%R338 33_0402_5%

R339 33_0402_5%R339 33_0402_5% R340 33_0402_5%R340 33_0402_5%

12

EC_RSMRST#33

EC_LID_OUT#33

EXP_CPPE#26

1 2 1 2 1 2 1 2

1 2 1 2

B

demo circuit LID use RI#

SLP_S3#33 SLP_S5#33

PWRBTN_OUT#33

SB_PWRGD6,33,43 SUS_STAT#11

GATEA2033 KB_RST#33 EC_SCI#33 EC_SMI#33

H_THERMTRIP#6,33

12

R3810_0402_5% R3810_0402_5%

EC_RSMRST#

SB_SPKR29 SMB_CK_CLK08,9,15,28 SMB_CK_DAT08,9,15,28

SMB_CK_CLK126

SMB_CK_DAT126

HDA_BITCLK

HDA_SDOUT HDA_SDIN0 HDA_SDIN1

SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0

PCIE_WAKE#

H_THERMTRIP#

SMB_CK_CLK0 SMB_CK_DAT0 SMB_CK_CLK1 SMB_CK_DAT1

T46PAD T4 6PAD T45PAD T4 5PAD

HDA_SYNC

HDARST#

T41PAD T4 1PAD

U15D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PW RGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC 2#/GPM2#

F8

USB_OC 1#/GPM1#

E4

USB_OC 0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC _G PIO0

H20

IMC _G PIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC _G PIO4

E24

IMC _G PIO5

E25

IMC _G PIO6

D23

IMC _G PIO7

218S7EALA11FG_BGA528_SB700

C

SB700

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

USB OC

HD AUDIO

INTEGRATED uC

Part 4 of 5

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N

USB_FSD12P USB_FSD12N

USB 1.1

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N

USB_HSD3P USB_HSD3N

GPIO

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11 SDA2/IMC_GPIO12

SCL3_LV/IMC_GPIO13

SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC _G PIO1 8 IMC _G PIO1 9 IMC _G PIO2 0 IMC _G PIO2 1 IMC _G PIO2 2 IMC _G PIO2 3 IMC _G PIO2 4 IMC _G PIO2 5

IMC _G PIO2 6 IMC _G PIO2 7

INTEGRATED uC

IMC _G PIO2 8 IMC _G PIO2 9 IMC _G PIO3 0 IMC _G PIO3 1 IMC _G PIO3 2 IMC _G PIO3 3 IMC _G PIO3 4 IMC _G PIO3 5 IMC _G PIO3 6 IMC _G PIO3 7 IMC _G PIO3 8 IMC _G PIO3 9 IMC _G PIO4 0 IMC _G PIO4 1

IMC _G PIO8 IMC _G PIO9

D

C617 100P_0402_25V8K@C617 100P_0402_25V8K@

1 2

C8

USB_RCOMP

G8

E6 E7

USB10_P12

F7

USB10_N12

E8

USB20_P11

H11

USB20_N11

J10

USB20_P10

E11

USB20_N10

F11

A11 B11

USB20_P8

C10

USB20_N8

D10

USB20_P7

G11

USB20_N7

H12

USB20_P6

E12

USB20_N6

E14

USB20_P5

C12

USB20_N5

D12

USB20_P4

B12

USB20_N4

A12

USB20_P3

G12

USB20_N3

G14

USB20_P2

H14

USB20_N2

H15

USB20_P1

A13

USB20_N1

B13

USB20_P0

B14

USB20_N0

A14

A18 B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

1 2

GPIO16 23 GPIO17 23

R311 100_0402_5%@R311 100_0402_5%@

R32311.8K_0402_1% R32311.8K_0402_1%

USB10_P12 31 USB10_N12 31

USB20_P11 26 USB20_N11 26

USB20_P10 26 USB20_N10 26

USB20_P8 26 USB20_N8 26

USB20_P7 31 USB20_N7 31

USB20_P6 31 USB20_N6 31

USB20_P5 17 USB20_N5 17

USB20_P4 31 USB20_N4 31

USB20_P3 35 USB20_N3 35

USB20_P2 31 USB20_N2 31

USB20_P1 31 USB20_N1 31

USB20_P0 31 USB20_N0 31

CLK_48M_USB 15

Touch Screen

STRAP PIN STRAP PIN

1 2

USB-11 New Card

USB-10 MiniCard(TV tuner)

USB-9 Card Reader(delete)

USB-8 WLAN

USB-7 Fingerprint

USB-6 Bluetooth

USB-5 USB Camera

USB-4 Left side

USB-3 Dock

USB-2 Left Side

USB-1 Right side

USB-0 Right side

E

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SB700 USB/AC97

LA-4091P

20 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

1 1

SATA_TXP024 SATA_TXN024

SATA_RXN0_C24 SATA_RXP0_C24

SATA_TXP124 SATA_TXN124

SATA_RXN1_C24 SATA_RXP1_C24

SATA_TXP531 SATA_TXN531

SATA_RXN5_C31 SATA_RXP5_C31

SATA_TXP424 SATA_TXN424

SATA_RXN4_C24 SATA_RXP4_C24

2 2

3 3

25MHZ_20P

C512 0.01U_0402_25V7KC512 0.01U_0402_25V7K C513 0.01U_0402_25V7KC513 0.01U_0402_25V7K

C514 0.01U_0402_25V7KC514 0.01U_0402_25V7K C515 0.01U_0402_25V7KC515 0.01U_0402_25V7K

C520 0.01U_0402_25V7KC520 0.01U_0402_25V7K C521 0.01U_0402_25V7KC521 0.01U_0402_25V7K

C518 0.01U_0402_25V7KC518 0.01U_0402_25V7K C519 0.01U_0402_25V7KC519 0.01U_0402_25V7K

+1.2V_HT

+3VS

C51610P_0402_50V8J C51610P_0402_50V8J

12

Y4

C51710P_0402_50V8J C51710P_0402_50V8J

12

1 2 1 2

L54

12

BLM18PG121SN1D_0603

1U_0402_6.3V4Z

L55

BLM18PG121SN1D_0603

1U_0402_6.3V4Z

SATA_X1

12

R341

10M_0402_5%

SATA_X2

R343 10K_0402_5%R343 10K_0402_5%

1 2

+3VS

SATA_LED#34

2

C523

C522

C523 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

12

2

C524

1

+PLLVDD_SATA

+XTLVDD_SATA

B

SATA_STX_DRX_P0 SATA_STX_DRX_N0

SATA_STX_DRX_P1 SATA_STX_DRX_N1

SATA_STX_DRX_P5 SATA_STX_DRX_N5

SATA_STX_DRX_P4 SATA_STX_DRX_N4

T24 PADT24 PAD T25 PADT25 PAD

T26 PADT26 PAD T27 PADT27 PAD

T18 PADT18 PAD T19 PADT19 PAD

T20 PADT20 PAD T23 PADT23 PAD

SATA_CAL

12

R342 1K_0402_1%R342 1K_0402_1%

SATA_X1

SATA_X2

U15B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

218S7EALA11FG_BGA528_SB700

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

C

IDE _IO RD Y

IDE _IR Q

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE _D RQ

IDE _IO R# IDE _IO W# IDE _C S 1# IDE _C S 3#

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SP I_D I/G PIO 12

SPI_DO/GPIO11

SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RS T#/GPIO13

SPI ROM

ROM_RST#/GP IO14

FANOUT0/GP IO3

FANOUT1/GP IO48 FANOUT2/GP IO49

FANIN0/GPIO50

FANIN1/GPIO51

FANIN2/GPIO52

TEMP_ COMM TEM PIN 0/ GP IO61 TEM PIN 1/ GP IO62 TEM PIN 2/ GP IO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD

AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15 J1

M8 M5 M7

P5 P8 R8

C6 B6 A6 A5 B5

A4 B4 C4 D4

LFB_ID0

D5

LFB_ID1

D6

LFB_ID2

A7 B7

F6

G7

C525

0.1U_0402_16V4Z

T31 PADT31 PAD

+SB_AVDD

1

2

L56

BLM18PG121SN1D_0603

1

C526

2.2U_0603_6.3V4Z

2

GSENSOR_LED# 34 SB_INT_FLASH_SEL 32

XMIT_OFF# 26 BT_COMBO_EN# 26

EC_THE RM# 3 3

BT_OFF 31 CAM_SHDN# 17

+3VALW

12

D

Local Frame Buffer Strapping List Copy from Becks.

Hynix32M*16

Samsung32M*16

110

101

LFB_ID0 to LFB_ID2 got internal PU 10K to S5.

LFB_ID2

R344 1K_0402_5%@R344 1K_0402_5%@

1 2

R367 1K_0402_5%@R367 1K_0402_5%@

1 2

R345 1K_0402_5%@R345 1K_0402_5%@

1 2

CH751H-40PT_SOD323-2

2 1

D41

1 2

R562 10K_0402_5%R562 10K_0402_5%

LFB_ID1

LFB_ID0

AC_IN 33,38,39

+3VALW

E

LFB_ID0LFB_ID1LFB_ID2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SB700 SATA/IDE/SPI

LA-4091P

21 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

+3VS

1 1

+

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

C528 22U_A_4VM

C528 22U_A_4VM C531 1U_0402_6.3V4ZC531 1U_0402_6.3V4Z C530 1U_0402_6.3V4ZC530 1U_0402_6.3V4Z C533 1U_0402_6.3V4ZC533 1U_0402_6.3V4Z C536 1U_0402_6.3V4ZC536 1U_0402_6.3V4Z C535 1U_0402_6.3V4ZC535 1U_0402_6.3V4Z C539 1U_0402_6.3V4ZC539 1U_0402_6.3V4Z C541 0.1U_0402_16V4ZC541 0.1U_0402_16V4Z C542 0.1U_0402_16V4ZC542 0.1U_0402_16V4Z

No IDE device unmount CAP

+3VS

+1.2V_HT

2 2

+1.2V_HT

+3VALW

3 3

+

C543 22U_A_4VM@

C543 22U_A_4VM@ C544 1U_0402_6.3V4Z@C544 1U_0402_6.3V4Z@ C547 1U_0402_6.3V4Z@C547 1U_0402_6.3V4Z@ C549 1U_0402_6.3V4Z@C549 1U_0402_6.3V4Z@

12

1 2 1 2 1 2

L61

1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2 1 2 1 2 1 2

12

+

12

L63

+

12

L66

FBMA-L11-201209-221LMA30T_0805

C552 22U_A_4VM

C552 22U_A_4VM C553 1U_0402_6.3V4ZC553 1U_0402_6.3V4Z C555 1U_0402_6.3V4ZC555 1U_0402_6.3V4Z C554 1U_0402_6.3V4ZC554 1U_0402_6.3V4Z C558 1U_0402_6.3V4ZC558 1U_0402_6.3V4Z C557 0.1U_0402_16V4ZC557 0.1U_0402_16V4Z C560 0.1U_0402_16V4ZC560 0.1U_0402_16V4Z

FBMA-L11-201209-221LMA30T_0805

C566 22U_A_4VM

C566 22U_A_4VM C567 1U_0402_6.3V4ZC567 1U_0402_6.3V4Z C568 1U_0402_6.3V4ZC568 1U_0402_6.3V4Z C571 0.1U_0402_16V4ZC571 0.1U_0402_16V4Z C572 0.1U_0402_16V4ZC572 0.1U_0402_16V4Z

FBMA-L11-201209-221LMA30T_0805

C576 10U_0805_10V4ZC576 10U_0805_10V4Z C577 10U_0805_10V4ZC577 10U_0805_10V4Z C580 1U_0402_6.3V4ZC580 1U_0402_6.3V4Z C581 1U_0402_6.3V4ZC581 1U_0402_6.3V4Z C583 0.1U_0402_16V4ZC583 0.1U_0402_16V4Z C582 0.1U_0402_16V4ZC582 0.1U_0402_16V4Z C584 0.1U_0402_16V4ZC584 0.1U_0402_16V4Z

+PCIE_VDDR

+1.2V_SATA

12

+AVDD_USB

12

B

U15C

L9

VDDQ_1

M9

VDDQ_2

T15

VDDQ_3

U9

VDDQ_4

U16

VDDQ_5

U17

VDDQ_6

V8

VDDQ_7

W7

VDDQ_8

Y6

VDDQ_9

AA4

VDDQ_10

AB5

VDDQ_11

AB21

VDDQ_12

Y20

VDD33_18_1

AA21

VDD33_18_2

AA22

VDD33_18_3

AE25

VDD33_18_4

P18

PCIE_VDDR_1

P19

PCIE_VDDR_2

P20

PCIE_VDDR_3

P21

PCIE_VDDR_4

R22

PCIE_VDDR_5

R24

PCIE_VDDR_6

R25

PCIE_VDDR_7

AA14

AVDD_SATA_1

AB18

AVDD_SATA_4

AA15

AVDD_SATA_2

AA17

AVDD_SATA_3

AC18

AVDD_SATA_5

AD17

AVDD_SATA_6

AE17

AVDD_SATA_7

A16

AVDDTX_0

B16

AVDDTX_1

C16

AVDDTX_2

D16

AVDDTX_3

D17

AVDDTX_4

E17

AVDDTX_5

F15

AVDDRX_0

F17

AVDDRX_1

F18

AVDDRX_2

G15

AVDDRX_3

G17

AVDDRX_4

G18

AVDDRX_5

218S7EALA11FG_BGA528_SB700

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

3.3V_S5 I/OCORE S5

SATA I/O

USB_PHY_1.2V_1 USB_PHY_1.2V_2

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

S5_1.2V_1 S5_1.2V_2

V5_VREF

AVDDCK_3.3V

AVDDCK_1.2V

AVDDC

L15 M12 M14 N13 P12 P14 R11 R15 T16

L21 L22 L24 L25

A17 A24 B17 J4 J5 L1 L2

G2 G4

A10 B10

AE7

J16

K17

E9

+1.2V_HT_R

+S5_3V

+S5_1.2V

+1.2_USB

+V5_VREF

+AVDDCK_3.3V

+AVDDCK_1.2V

+AVDDC

C

+1.2V_CKVDD

1 2

R564 0_0805_5%R564 0_0805_5%

L65 0_0603_5%L65 0_0603_5%

0.1U_0402_16V4Z

1 2

R592 0_0805_5%@R592 0_0805_5%@

1 2

R593 0_0805_5% R593 0_0805_5%

+

1 2

C52922U_A_4VM

C52922U_A_4VM C5321U_0402_6.3V4Z C5321U_0402_6.3V4Z

12

C5341U_0402_6.3V4Z C5341U_0402_6.3V4Z

12

C5381U_0402_6.3V4Z C5381U_0402_6.3V4Z

12

C5371U_0402_6.3V4Z C5371U_0402_6.3V4Z

12

C5270.1U_0402_16V4Z C5270.1U_0402_16V4Z

12

C5400.1U_0402_16V4Z C5400.1U_0402_16V4Z

12

L60

12

BLM18PG121SN1D_0603

C546 1U_0402_6.3V4ZC546 1U_0402_6.3V4Z

1 2

C545 1U_0402_6.3V4ZC545 1U_0402_6.3V4Z

1 2

C548 0.1U_0402_16V4ZC548 0.1U_0402_16V4Z

12

C551 0.1U_0402_16V4ZC551 0.1U_0402_16V4Z

12

C550 10U_0805_10V4ZC550 10U_0805_10V4Z

1 2

+3VALW

+

1 2

C55622U_A_4VM

C55622U_A_4VM C5591U_0402_6.3V4Z C5591U_0402_6.3V4Z

12

C5611U_0402_6.3V4Z C5611U_0402_6.3V4Z

12

C5621U_0402_6.3V4Z C5621U_0402_6.3V4Z

12

C5630.1U_0402_16V4Z C5630.1U_0402_16V4Z

12

C5640.1U_0402_16V4Z C5640.1U_0402_16V4Z

12

C5650.1U_0402_16V4Z C5650.1U_0402_16V4Z

12

+1.2VALW

+

1 2

C578

C57322U_A_4VM

C5741U_0402_6.3V4Z C5741U_0402_6.3V4Z

12

C5751U_0402_6.3V4Z C5751U_0402_6.3V4Z

12

2

C579

1U_0603_10V4Z

1

L67

12

BLM18PG121SN1D_0603

12

+1.2VALW

+1.2V_HT

L64 0_0603_5%L64 0_0603_5%

D14

CH751H-40PT_SOD323-2

+3VALW

C5852.2U_0603_6.3V4Z C5852.2U_0603_6.3V4Z

C5860.1U_0402_16V4Z C5860.1U_0402_16V4Z

D

U15E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

+1.2VALW

C5691U_0402_6.3V4Z C5691U_0402_6.3V4Z

12

C5701U_0402_6.3V4Z C5701U_0402_6.3V4Z

12

R3461K_0402_5% R3461K_0402_5%

12

+5VS

21

+3VS

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

H18

PCIE_CK_VSS_1

J17

PCIE_CK_VSS_2

J22

PCIE_CK_VSS_3

K25

PCIE_CK_VSS_4

M16

PCIE_CK_VSS_5

M17

PCIE_CK_VSS_6

M21

PCIE_CK_VSS_7

P16

PCIE_CK_VSS_8

F9

AVSSC

Part 5 of 5

218S7EALA11FG_BGA528_SB700

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42

GROUND

VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

E

L68

+AVDDCK_1.2V

+AVDDCK_3.3V

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

L68

12

BLM18PG121SN1D_0603

L69

BLM18PG121SN1D_0603

2007/08/02 2008/08/02

+1.2V_HT

C5872.2U_0603_6.3V4Z C5872.2U_0603_6.3V4Z

12

C5880.1U_0402_16V4Z C5880.1U_0402_16V4Z

12

+3VS

C5892.2U_0603_6.3V4Z C5892.2U_0603_6.3V4Z

12

C5900.1U_0402_16V4Z C5900.1U_0402_16V4Z

12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

LA-4091P

E

of

22 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

REQUIRED STRAPS

PCI_CLK3

PULL

1 1

2 2

HIGH

PULL LOW

PCICLK219

CLK_PCI_SIO19,32

PCI_CLK419

PCI_CLK519 CLK_PCI_EC19,33 CLK_PCI_TCG19,32

RTC_CLK19 HDARST#20,33

GPIO1720

GPIO1620

BOOTFAIL TIMER ENABL ED

BOOTFAIL TIMER DISABLED

DEFAULT

+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW

R347

10K_0402_5%

@

R357

10K_0402_5%

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

12

R348

@

12

R358

12

10K_0402_5%

12

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

R349

R359

@

12

10K_0402_5%

@

12

10K_0402_5%

RESERVED

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

LPC_CLK0

R350

10K_0402_5%

@

R360

10K_0402_5%

@

ENABL E PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

12

R351

12

R361

10K_0402_5%

@

10K_0402_5%

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

12

R352

10K_0402_5%

@

R362

10K_0402_5%

12

RTC_CLKLPC_CLK1

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1 , apply 32KHz to RTC_CLK)

12

R353

10K_0402_5%

@

12

R363

2.2K_0402_5%

@

AZ_RST_CD#

EC ENABLED

EC DISABLED

DEFAULT

12

R354

10K_0402_5%

@

12

R364

10K_0402_5%

GP17

GP16PCI_CLK2

Internal pull up

H,H = Reserved

H,L = S PI ROM

L,H = LPC ROM (Default)

L,L = FWH ROM

12

R356

R355

10K_0402_5%

@

SI: mount 10K

12

R366

R365

2.2K_0402_5%

@

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

12

2.2K_0402_5%

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

R374

@

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

12

R375

2.2K_0402_5%

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

PCI_AD28

PULL

3 3

PCI_AD2819 PCI_AD2719 PCI_AD2619 PCI_AD2519 PCI_AD2419 PCI_AD2319

4 4

A

HIGH

PULL LOW

B

USE LONG RESET

DEFAULT

USE SHORT RESET

R373

@

12

2.2K_0402_5%

C

PCI_AD25 PCI_AD24

USE IDE PLL

DEFAULT

BYPASS IDE PLL

R376

@

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

12

R377

2.2K_0402_5%

@

2007/08/02 2008/08/02

12

2.2K_0402_5%

PCI_AD23

RESERVED

12

R378

2.2K_0402_5%

@

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SB700 STRAPS

LA-4091P

23 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

HDD Connector

JP9

+5VS

1

2

0.1U_0402_16V4Z

1

C594

2

1 1

C593

10U_0805_10V4Z

1

C591

2

0.1U_0402_16V4Z

1

C595

2

0.1U_0402_16V4Z

Pleace near HD CONN (JP23)

SUYIN_127072FR022G210ZR_RV

2 2

+5VS

1

C601

10U_0805_10V4Z

1

2

0.1U_0402_16V4Z

1

C602

C603

2

C603

2

0.1U_0402_16V4Z

2nd HDD Connector-option

1

C604

2

0.1U_0402_16V4Z

Pleace near HD CONN (JP23)

SUYIN_127072FR022G210ZR_RV

3 3

SUYIN_127072FR022G210ZR_RV

JP9

1

GND

2

A+

3

A-

GND

B-

B+

GND

V33 V33

V33 GND GND GND

V5 V5 V5

GND

Reserved

GND

V12

CONN@

DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA SUYIN_127043FR022G204ZL_22P_NR

JP10

GND

A+

A-

GND

B-

B+

GND

V33

V33 GND GND GND

V5 V5 V5

GND

Reserved

GND

V12

CONN@

DC010003M00 HOUSING SUYIN 127043FR022G204ZL 22P SATA SUYIN_127043FR022G204ZL_22P_NR

0.01U_0402_16V7K

4

SATA_RXN0 SATA_RXN0_C

5 6

0.01U_0402_16V7K

7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

1 2 3 4 5 6 7

8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Near CONN side.

+3VS

+5VS

0.01U_0402_16V7K

SATA_RXN1 SATA_RXN1_C SATA_RXP1 SATA_RXP1_C

0.01U_0402_16V7K

Near CONN side.

+3VS

+5VS

12 12

C592

C592 C596

C596

C605

C605 C606

C606

SATA_TXP0 SATA_TXN0

SATA_RXP0_CSATA_RXP0

SATA_TXP1 SATA_TXN1

SATA_TXP0 21

SATA_TXN0 21

SATA_RXN0_C 21 SATA_RXP0_C 21

SATA_TXP1 21

SATA_TXN1 21

SATA_RXN1_C 21 SATA_RXP1_C 21

CD-ROM Connector

JP11

CONN@

JP11

GND

GND GND

1 2

A+

3

A-

B-

B+

DP

V5 V5

MD

0.01U_0402_16V7K

4

SATA_RXN4 SATA_RXN4_C

5 6

0.01U_0402_16V7K

7

8 9 10 11 12 13

Near CONN side.

+5VS

SATA_TXP4 SATA_TXN4

C612

12

SATA_RXP4_CSATA_RXP4

C611

12

SATA_TXP4 21 SATA_TXN4 21

SATA_RXN4_C 21

SATA_RXP4_C 21

+5VS

Placea caps . near ODD CONN.

0.1U_0402_16V4Z

C613

1

C614

2

4 4

10U_0805_10V4Z

1U_0603_10V4Z

1

2

1

C615

C616

C616 10U_0805_10V4Z

10U_0805_10V4Z

2

SUYIN_127382FR013G509ZR

SI: Update ODD footprint to fix pin reverse issue

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

HDD/CDROM

LA-4091P

E

of

24 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

1 1

Place Close to Chip

1 2

1

C645

10U_0805_10V4Z@

2

PCIE_PTX_IRX_P3

PCIE_PTX_IRX_N3

ISOLATEB

LAN_X1 LAN_X2

U19

1

TD+

2

TD-

3

CT

4

NC

5

NC

6

CT

7

RD+ RD-8RX-

NS681680

20

21

15

16

17 18

25

27

46

26 28

41 42

23 24

7 14 31 47

22

16

TX+

15

TX-

14

CT

13

NC

12

NC

11

CT

10

RX+

9

C485 0.1U_0402_16V7K C485 0.1U_0402_16V7K

PCIE_PTX_C_IRX_P310

PCIE_PTX_C_IRX_N310

PCIE_ITX_C_PRX_P310

PCIE_ITX_C_PRX_N310

LAN_PCIE_WAKE#20,26

2 2

12

C488 0.1U_0402_16V7K C488 0.1U_0402_16V7K

12

CLK_PCIE_LAN15

CLK_PCIE_LAN#15

CLKREQ_LAN15

PLT_ RST#11,14,19,26,27,32,33

R408 2.49K_0402_1%R408 2.49K_0402_1%

+3VS

12

R384

R384 1K_0402_1%

1K_0402_1%

ISOLATEB

R401

R401 15K_0402_5%

15K_0402_5%

Close to Pin45

+LAN_VDD12

2

C650

0.1U_0402_16V4Z

1

3 3

Y1

LAN_X2LAN_X1

12

25MHZ_20P

1

C255

27P_0402_50V8J

4 4

2

C659 0.01U_0402_16V7K C659 0.01U_0402_16V7K

C660 0.01U_0402_16V7K C660 0.01U_0402_16V7K

12

A

1

C254

27P_0402_50V8J

2

LAN_MDI0+ LAN_MDI0-

LAN_MDI1+ LAN_MDI1-

B

U18

HSOP

HSON

HSIP

HSIN

REFCLK_P REFCLK_M

CLKREQB

PERSTB

RSET

LANWAKEB ISOLATEB

CKXTAL1 CKXTAL2

NC NC

GND GND GND GND

GNDTX

RTL8102EL-GR_LQFP48_7X7

RTL8102EL

Close to Pin1,37,29

2

C620

0.1U_0402_16V4Z

1

LANPWR33

2

C621

0.1U_0402_16V4Z

1

RJ45_MIDI0+ RJ45_MIDI0-

C600 0.01U_0603_100V4ZC600 0.01U_0603_100V4Z C610 0.01U_0603_100V4ZC610 0.01U_0603_100V4Z

RJ45_MIDI1+ RJ45_MIDI1-

B

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

EECS

LED0

MDIP0 MDIN0 MDIP1 MDIN1

VCTRL12A

VDDTX DVDD12 DVDD12 DVDD12 DVDD12

VCTRL12D

VDD33

AVDD33

+3V_LAN

2

C622

0.1U_0402_16V4Z

1

+3VALW

R713

100K_0402_5%

1 2

R715 10K_0402_5%

RJ45_MIDI0+ 35 RJ45_MIDI0- 35

12 12

RJ45_MIDI1+ 35 RJ45_MIDI1- 35

LAN_DO LAN_DI LAN_SK_LAN_LINK# LAN_CS

33 34 35 32

38

2 3 5 6 8

NC

9

NC

11

NC

12

NC

4

NC

48

19 30 36 13 10

39

NC

44

NC

45

29 37

1 40

NC

43

NC

1 2

LAN_DO LAN_DI LAN_SK_LAN_LINK# LAN_CS

LAN_ACTIVITY#

LAN_MDI0+ LAN_MDI0LAN_MDI1+ LAN_MDI1-

VCTRL12

2

C707

1

0.1U_0402_16V4Z

R394

1 2 1 2

R396

C

1 2

R382 3.6K_0402_5%R382 3.6K_0402_5%

U17

4

DO

GND

3

DI

NC

2

SK

NC

1

CS

VCC

AT93C46-10SI-2.7_SO8

12

R712 10K_0402_5%R712 10K_0402_5%

5 6 7 8

+3V_LAN

2

C618

1

0.1U_0402_16V4Z

+3V_LAN

D

Close to Pin10,13,30,36Close to Pin48

VCTRL12

+EVDD12 +LAN_VDD12

40 mils

RJ45_GND

C

Close to Pin19

2

C644

C644 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

+3V_LAN

1 2

C658 1000P_1808_3KV7K

2007/08/02 2008/08/02

+LAN_VDD12

+3V_LAN

PJP6

1 2

PAD-OPEN 4x4m

S

D

13

G

2

Q61

Q61 SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

75_0402_1%

75_0402_1% 75_0402_1%

75_0402_1%

Sec urity Classific ation

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

1

2

+EVDD12

C642

10U_0805_10V4Z@

2

C636

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

2

C641

1

Compal Secret Data

Deciphered Date

2

C637

0.1U_0402_16V4Z

1

LAN_ACTIVITY#

LAN_SK_LAN_LINK#

D

2

C638

0.1U_0402_16V4Z

1

R391 300_0402_5%R391 300_0402_5%

1

C656

C656 68P_0402_50V8K

68P_0402_50V8K

@

2

C657

C657 68P_0402_50V8K

68P_0402_50V8K

@

1

R395 300_0402_5%R395 300_0402_5%

2

C639

0.1U_0402_16V4Z

1

+3V_LAN

12

RJ45_MIDI1-

RJ45_MIDI1+

RJ45_MIDI0-

RJ45_MIDI0+

+3V_LAN

12

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

E

+LAN_VDD12

2

C640

0.1U_0402_16V4Z

1

LAN Conn.

JP12

13

Yellow LED +

14

Yellow LED -

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED+

12

Green LED-

FOX_JM36113-P1122-7FCONN@

1

C661

0.1U_0402_16V4Z

2

Compal Electronics, Inc.

RTL8111C/8102E 10/100/1000 LAN

LA-4091P

SHLD1

DETECT PIN1

DETCET PIN2

SHLD1

1

C662

4.7U_0805_10V4Z

2

E

16

9

10

15

LANGND

25 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

Mini Card---TV tuner

+3VS_TV

0.1U_0402_16V4Z

1

C665

C666

2

+3VS_TV

2

R406 0_1206_5%R406 0_1206_5%

+1.5VS

R407 0_1206_5%R407 0_1206_5%

+3VS

4.7U_0805_10V4Z

1 1

New Card

+3VS

0.1U_0402_16V4Z

PLT_ RST#

12

+1.5VS

100K_0402_5%@

+3VALW

C679

EXP_CPPE#20

+3VALW

C681

12

0.1U_0402_16V4Z

12

C680

PLT_ RST#11,14,19,25,27,32,33

SYSON33,34,36,40

SUSP#29,33,36,38,41

0.1U_0402_16V4Z

12

R412

Power Switch internal pull high

2 2

U21

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

THERMAL_PAD

18

RCLKEN

R5538D001-TR-F_QFN20_4X4~D

1.5Vout

3.3Vout

OC#

PERST#

GND

11 13

3 5

15

19

8

16

NC

7

21

USE TI TPS2231MRGPR

+1.5VS_PEC

+3VS_PEC

+3V_PEC

PERST#

4.7U_0805_10V4Z

SI: Exchange TV & WLAN minicard location

CLKREQ_MCARD1#15

CLK_PCIE_MCARD1#15 CLK_PCIE_MCARD115

PCIE_PTX_C_IRX_N510 PCIE_PTX_C_IRX_P510

PCIE_ITX_C_PRX_N510

PCIE_ITX_C_PRX_P510

+3VALW

0.1U_0402_16V4Z

@

CONN@

JP14

2

112

4

334

6

556

8

778

10

9910

12

111112

14

131314

16

151516

18

171718

20

191920

22

212122

24

232324

26

252526

28

272728

30

292930

32

313132

34

333334

36

353536

38

373738

40

393940

42

414142

44

434344

46

454546

48

474748

50

494950

52

515152

54

GND153GND2

MOLEX 67910-0002 52P

1 2

0.01U_0402_16V7K

1

C667

2

+3VS_TV

+1.5VS_TV

PLT_ RST#

+3VALW

SMB_CK_CLK1 SMB_CK_DAT1

+1.5VS_TV

+3VS_TV

+1.5VS_TV

+3VS_TV

1

C668

2

0.1U_0402_16V4Z

+1.5VS_TV

4.7U_0805_10V4Z

1

C669

2

+1.5VS_TV

USB20_N10 20 USB20_P10 20

1

C670

2

Mini-Express Card---WLAN

+3VS_WLAN +3VALW+1.5VS_WLAN

4.7U_0805_10V4Z

0.01U_0402_16V7K

Near to Express Card slot.

29 30

C677

C683

+3VS_PEC

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

+1.5VS_PEC

4.7U_0805_10V4Z

1

2

0.1U_0402_16V4Z

C684

B

C678

C682

+3V_PEC

1

2

1

2

1

2

4.7U_0805_10V4Z

1

C685

2

0.1U_0402_16V4Z

CH_CLK

BT_COMBO_EN#21

1 2

R547 0_0402_5%R547 0_0402_5%

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

JP16

1

3 3

4 4

USB20_N1120

USB20_P1120

SMB_CK_CLK120

SMB_CK_DAT120

+1.5VS_PEC

MINI_PCIE_WAKE#20,25 CH_CLK31

CLK_PCIE_NCARD#15 CLK_PCIE_NCARD15

PCIE_PTX_C_IRX_N010

PCIE_PTX_C_IRX_P010

PCIE_ITX_C_PRX_N010 PCIE_ITX_C_PRX_P010

+1.5VS_PEC

+3V_PEC

+3VS_PEC

CLKREQ_NCARD#15

A

EXP_CPPE#

MINI_PCIE_WAKE#

PERST#

EXP_CPPE#

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCL K-

19

REFCL K+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND1

28

GND2

SANTA_131851-A_LT

SHIELD SHIELD

1

C785

2

R553

4.7K_0402_5%

1 2

PCIE_PTX_C_IRX_N210 PCIE_PTX_C_IRX_P210

PCIE_ITX_C_PRX_N210

PCIE_ITX_C_PRX_P210

2007/08/02 2008/08/02

1

C786

2

0.1U_0402_16V4Z

MINI_PCIE_WAKE#

CH_DATA31

CLKREQ_MCARD2#15

CLK_PCIE_MCARD2#15 CLK_PCIE_MCARD215

+3VS_WLAN

Compal Secret Data

4.7U_0805_10V4Z

1

C787

2

R556 0_0402_5%

CH_CLK

Deciphered Date

й

1 2

0.01U_0402_16V7K

MOLEX 67910-0002 52P

1

C781

2

CONN@

JP26

112 334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

GND153GND2

D

0.1U_0402_16V4Z

4.7U_0805_10V4Z

1

C783

C782

2

+1.5VS_WLAN +3VS_WLAN

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

54

1

0.1U_0402_16V4Z

2

L78 0_1206_5%L78 0_1206_5%

1 2

L79 0_1206_5%L79 0_1206_5%

1 2

PLT_ RST#

+3VAUX

SMB_CK_CLK1 SMB_CK_DAT1

USB20_N8 20 USB20_P8 20

WL_LED# 34

SI: Exchange TV & WLAN minicard location

Title

Mini-Card/Mini-PCI/Express Card

Size Document Numbe r Rev

Custom

Date: Sheet

Date: Sheet of

1

C784

2

+3VS

+1.5VS

XMIT_OFF# 21

R634 0_0603_5%@R634 0_0603_5%@

1 2

R635 0_0603_5%

1 2

Compal Electronics, Inc.

LA-4091P

+3VALW +3VS

26 53Thursday, November 08, 2007

E

of

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

SI:Per ME request change JP21 to new one

1 1

12

R411

100_0402_5%@

12

R370

R370 470_0402_5%

470_0402_5%

21

D5

D5 HT-F196BP5_WHITE

HT-F196BP5_WHITE

13

Q53

2

G

2N7002_SOT23-3

R411

PCIE_ITX_C_PRX_N110

CR_LED#

C901

+VCC_4IN1

+3VS

2 2

SI:Use build in Regulator Chip mount R383,C689,C694

+VCC_OUT

3 3

+3VS

10K_0402_5%

10U_0805_10V4Z

R4510K_0402_5% R4510K_0402_5%

1 2

R106

R383

1 2

0_0603_5%

C689

R1214.7K_0402_5% R1214.7K_0402_5%

1 2

R1114.7K_0402_5% R1114.7K_0402_5%

1 2

XDWP#_SDWP#

XD_RB#

XD_CLE

12

R40510K_0402_5% R40510K_0402_5%

XD_ALE

12

R12210K_0402_5% R12210K_0402_5%

XD_RE#

12

R86200K_0402_5% R86200K_0402_5%

+VCC_4IN1

1

C694

0.1U_0402_16V4Z

2

XDCD0#_SDCD#

XDCD1#_MSCD#

SI:Per Jmicro request change R405 & R122 from 200K to 10K

PCIE_PTX_C_IRX_N110 PCIE_PTX_C_IRX_P110

SI:Per Jmicro request change R114 from 10K to 8.2K

C901

100P_0402_25V8K@

+5VS

D

S

B

+VCC_4IN1 +VCC_4IN1

XDCE#

12

CLK_PCIE_MCARD0#15 CLK_PCIE_MCARD015

PCIE_ITX_C_PRX_P110

C693 0.1U_0402_16V7KC693 0.1U_0402_16V7K

1 2

C697 0.1U_0402_16V7KC697 0.1U_0402_16V7K

1 2

+3VS

PLT_ RST#11,14,19,25,26,32,33

R113

4.7K_0402_5%

1 2

XD_SD_MS_D0 XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7

SDCMD_MSBS_XDWE# XDWP#_SDWP# XD_ALE XD_CD# XD_RB# XD_RE# XDCE# XD_CLE

PCIE_PTX_IRX_N1 PCIE_PTX_IRX_P1

12

R1148.2K_0402_5% R1148.2K_0402_5%

1 2

R40910K_0402_5% R40910K_0402_5%

T28 PADT28 PAD

XDCD1#_MSCD# XDCD0#_SDCD#

+VCC_OUT

CR_LED#

C

Card Reader Connector

JP21

3

XD-VCC

32

XD-D0

10

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

34

XD-WE

33

XD-WP

35

XD-ALE

40

XD-CD

39

XD-R/B

38

XD-RE

37

XD-CE

36

XD-CLE

11

7IN1 GND

31

7IN1 GND

41

7IN1 GND

42

7IN1 GND

TAITW_R015-B10-LM

7 IN 1 CONN

SD-VCC MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

Power Circuit

U23

3

APCLKN

4

APCLKP

9

APRXN

8

APRXP

11

APTXN

12

APTXP

7

APREXT

38

PCIES_EN

39

PCIES

JMB385

1

XRSTN

2

XTEST

13

SEEDAT

14

SEECLK

15

CR1_CD1N

16

CR1_CD0N

17

CR1_PCTLN

21

CR1_LEDN

JMB385-LGEZ0A_LQFP48_7X 7

SI: Use 0740 date code chip

APVDD

APV18

TAV33

DV33 DV33 DV33 DV18 DV18

MDIO0 MDIO1 MDIO2 MDIO3 MDIO4 MDIO5 MDIO6 MDIO7 MDIO8

MDIO9 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14

APGND

GND GND GND GND

5 10 30

19 20 44 18 37

48 47 46 45 43 42 41 40 29 28 27 26 25 23 22

34

NC

35

NC

36

NC

6

24 31 32 33

21 28

SDCLK

20

XD_SD_MS_D0

14

XD_SD_MS_D1

12

XD_SD_MS_D2

30

XD_SD_MS_D3

29

XD_SD_D4

27

XD_SD_D5

23

XD_SD_D6

18

XD_SD_D7

16

SDCMD_MSBS_XDWE#

25

XDCD0#_SDCD#

1

XDWP#_SDWP#

2

MSCLK

26

XD_SD_MS_D0

17

XD_SD_MS_D1

15

XD_SD_MS_D2

19

XD_SD_MS_D3

24

XDCD1#_MSCD#

22

SDCMD_MSBS_XDWE#

13

XD_SD_MS_D0

XD_SD_MS_D1 XD_SD_MS_D2 XD_SD_MS_D3 SDCMD_MSBS_XDWE# SDCLK_MSCLK_XDCE# XDWP#_SDWP# XD_CLE XD_SD_D4 XD_SD_D5 XD_SD_D6 XD_SD_D7 XD_RE# XD_RB# XD_ALE

+1.8VS_OUT

1

C892

2

10U_0805_10V4Z

0.1U_0402_16V4Z

C688

+3VS

0.1U_0402_16V4Z

SDCLK

1 2

100_0402_5%@

MSCLK

1 2

100_0402_5%@

1000P_0402_50V7K

1

C687

2

C6950.1U_0402_16V4Z C6950.1U_0402_16V4Z

1

C691

2

1

C686

2

0.1U_0402_16V4Z

D

R413

R410

C893

0.1U_0402_16V4Z

12

1

C692

2

0.1U_0402_16V4Z

+1.8VS_OUT

1

C690

0.1U_0402_16V4Z

2

1 2

1

2

C902

100P_0402_25V8K@

C900

100P_0402_25V8K@

+1.8VS

SI:Use build in Regulator Chip unmount R387

XDCD1#_MSCD#

XDCD0#_SDCD#

12

R45722_0402_5% R45722_0402_5%

12

R45622_0402_5% R45622_0402_5%

12

R45522_0402_5% R45522_0402_5%

+3VS

R387

1 2

0_0603_5%@

D40

2

3

DAN202U_SC70

SDCLKSDCLK_MSCLK_XDCE# MSCLK XDCE#

1

E

XD_CD#

1

C696

270P_0402_50V7K

2

SI:Use new chip ,change to

SI:Use build in Regulator Chip unmount U22 and relation parts

+VCC_OUT

+3VS

4 4

C895

0.1U_0402_16V4Z@

U22

3

IN

4

EN

1

2

GND

G5250C2T1U_SOT23-5@

2

reserved power circuit

A

High active control

+VCC_4IN1

40mil

1

OUT

5

OUT

1U_0603_10V4Z@

C896

1

2

12

150K_0402_5%

150K_0402_5% R123

R123

@

Sec urity Classific ation

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

JMB380/385 card reader/1394

LA-4091P

27 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

5

4

3

2

1

D D

+3VS

1

C1030

C1031

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

C C

+3VS

+3VS +3VS

SMB_CK_CLK08,9,15,20

B B

SMB_CK_DAT08,9,15,20

ACCELEROMETER

SMB_CK_CLK0 8,9,15,20

14

U66

1

2

3

4

5

6

R964 10K_0402_5%R964 10K_0402_5%

Vdd_IO

GND

Reserved

GND

Vdd

12

SCL / SPC

SDA / SDI / SDO

CS

7

I2C address:0111000Xb

U68

5

CSB

6

SCK

8

SDI

10

reserved

1

reserved

13

12

SDO

11

Reserved

10

GND

9

INT 2

8

INT 1

LIS302DLTR_LGA14_3x5

9

VDDIO

2

VDD

4

INT

7

SDO

3

GND

11

GND

12

GND

BMA150_LGA12@

SMB_CK_DAT0 8,9,15,20

Pin12(int ernal p ull high ) pul l up I2C address :0011101b pull low I2C ad dress:0011100b

ACCEL_INT 19

+3VS

1 2

C830 0.1U_0402_16V4Z@C830 0.1U_0402_16V4Z@

ACCEL_INT 19

1

C828

C829

2

0.1U_0402_16V4Z

10U_0805_6.3V6M

@

SI: Reserve Bosch solution

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/08/04 2006/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

R5C833_1394

Montevina Consumer Discrete

1

0.1

of

28 53Thursday, November 08, 2007

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

R885

1 2

+3VS

BLM18BD601SN1D_0603

1 1

HDA_BITCLK_CODEC20

HDA_SDOUT_CODEC20

HDA_SDIN020

47K_0402_5%

+VDDA_CODEC

SENSE_B#35

47_0402_5%@

33P_0402_50V8K@

C745

HDA_SYNC_CODEC20

HDA_RS T#_CODE C20

R525

2 2

R537

EC_BEEP33

SB_SPKR20

R523 10K_0402_5%R523 10K_0402_5%

C956 0.1U_0402_16V4ZC956 0.1U_0402_16V4Z

3 3

R524

1 2

+3VDD_CODEC

1

2

C734

1U_0603_10V4Z

DMIC_CLK17

12

1

2

12

C913 1U_0603_10V4ZC913 1U_0603_10V4Z

R584 5.1K_0402_1%R584 5.1K_0402_1%

1 2

R916 39.2K_0402_1%R916 39.2K_0402_1%

1 2

0.1U_0402_16V4Z

HDA_BITCLK_CODEC

1

2

C733

C904

0.1U_0402_16V4Z

+3VDD_CODEC

+VDDA_CODEC

+3VDD_CODEC

HDA_BITCLK_CODEC

R522 33_0402_5%R522 33_0402_5%

1 2

R230 22_0402_5%R230 22_0402_5%

1 2

C955 0.1U_0402_16V4ZC955 0.1U_0402_16V4Z

1

C979

2

10U_0805_10V4Z

10U_0805_10V4Z C744

C744

1 2

SENSEB#

+VC_REF A

+VDDA_CODEC

1

2

1U_0603_10V4Z

C731

C730

0.1U_0402_16V4Z

U27

9

DVDD_CORE*

1

DVDD_CORE

25

AVDD1*

38

AVDD2**

3

DVDD_IO

32

MONO_OUT

6

BITCLK

5

SDO

8

SDI_CODEC

10

SYNC

11

RESET#

46

DMIC_CLK

33

CAP2

12

PCBEEP

40

NC / OTP

34

SENSE_B / NC

37

NC

18

NC

19

NC

20

NC

27

VREFFILT

26

AVSS1*

42

AVSS2**

7

DVSS**

92HD71B7X5NLGXA1X8_QFN48_7X7

W=40Mil

C728

EAPD/ SPDIF OUT 0 or 1 / GPIO 0

VOL_UP/DMIC_0/GPIO 1

VOL_DN/DMIC_1/GPIO 2

GPIO 3

VREFOUT-E / GPIO 4

GPIO 5

GPIO 6

SPDIF OUT1 / GP IO 7

SPDIF OUT0

VREFOUT-B

VREFOUT-C

SENSE_A

PORTA_R

PORTA_L

PORTB_R

PORTB_L

PORTC_R

PORTC_L

PORTD_R

PORTD_L

PORTE_R

PORTE_L

PORTF_R

PORTF_L

0212_Change to +5VALW.

1 2

0.1U_0402_16V4Z

SUSP#26,33,36,38,41

47

2

4

30

31

43

44

45

48

28

29

13

41

39

22

21

24

23

36

35

15

14

17

16

CODEC POWER

+5VALW

SPDIF_OUT

SENSEA#

HP_OUTRMONO_INR

HP_OUTL

MIC_EXT_R

MIC_EXT_L

MIC_IN_R

MIC_IN_L

LINE_OUT_R

LINE_OUT_L

C972 1U_0603_10V6KDOCK@C972 1U_0603_10V6KDOCK@

DOCK_MICR

DOCK_MICL

C973 1U_0603_10V6KDOCK@C973 1U_0603_10V6KDOCK@

U32

1

IN

2

GND

3

SHDN

G9191-475T1U_SOT23-5

1U_0603_10V4Z

C908

1 2

C907

1 2

1U_0603_10V4Z

1 2

5

OUT

4

BYP

EAPD_CODEC 33

DMIC_DAT 17

SPDIF_OUT 35

+VREFO UT_B 30

HP_OUTR 3 0

HP_OUTL 30

MIC_IN_R 30

MIC_IN_L 30

LINE_OUT_R 30

LINE_OUT_L 30

+VDDA_CODEC

2.2U_0805_16V4Z

1

C729

2

1

C732

0.1U_0402_16V4Z

2

R5485.1K_0402_1% R5485.1K_0402_1%

12

R56920K_0402_1% R56920K_0402_1%

12

R57139.2K_0402_1% R57139.2K_0402_1%

12

R57010K _0402_1% R57010K_0402_1%

12

C9510.1U_0402_16V4Z C9510.1U_0402_16V4Z

12

HP Jack & Dock

MIC_EXTR 30

Jack MIC

MIC_EXTL 30

Int ern al MIC

Internal SPKR.

R910

DOCK@

1.21K_0402_1%

(4.75V) 300mA

should be 10K for int MIC

+VDDA_CODEC

EXTMIC_DET# 30 JACK_DET# 30,35 INTM IC_ DE T# 30

DOCK@

1 2

R943 10K_0402_5%

1 2

R944 10K_0402_5%

12

DOCK@

R911

DOCK@

1.21K_0402_1%

1/10*Vin need close to Codec

DOCK_MIC_R 35

DOCK_MIC_L 35

DOCK MIC

C746

1 2

1000P_0402_25V8J@

SENSE A SENSE B

Port Resistor Port Resistor

A 39.2K

B 20K

4 4

C 10K

D 5.11K

A

E

F

G

H

39.2K

20K

10K

5.11K

0312_Mount C379~383, R313.

1000P_0402_25V8J@

C747

1 2

1000P_0402_25V8J@

C748

1 2

1000P_0402_25V8J@

C749

1 2

1000P_0402_25V8J@

R195 0_1206_5%R195 0_1206_5%

1 2

R198

1 2

0_0805_5%@

GNDAGND

B

GNDA 30,35

Sec urity Classific ation

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

HP_DET#

0(LOW)

NC

NC NC

D

MIC_DET

0(LOW)

NC

0(LOW)

PORT-A

LINEOUT

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

OFF

ON

ON Enable

ON

OFF

Compal Electronics, Inc.

Audio Codec-IDT9271B7

LA-4091P

E

MIC

ON

OFF

ON

OFF

EQ

Disable

Enable

29 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

1 1

LINE_OUT_R29

LINE_OUT_L29

EC_MUTE#33

C7700.1U_0402_16V7K C7700.1U_0402_16V7K

C7750.1U_0402_16V7K C7750.1U_0402_16V7K

C7760.1U_0402_16V7K C7760.1U_0402_16V7K

C8170.1U_0402_16V7K C8170.1U_0402_16V7K

High Pass Freq: 125Hz

2 2

3 3

4 4

1 2

10U_0805_10V4Z

+VREFO UT_B29

MIC_EXTR29

MIC_EXTL29

+VDDA_CODEC

MIC_IN_L29 MIC_IN_R29

EC_MUTE#

R701

1 2

12.7K_0402_1%

12.7K_0402_1% R702

R702

1 2

12.7K_0402_1%

R703

1 2

12.7K_0402_1%

12.7K_0402_1% R704

R704

1 2

12.7K_0402_1%

Keep 10 mil width

2

C765

1

10U_0805_10V4Z

C970

C971 1U_0603_10V6K@C971 1U_0603_10V6K@

+3VS

INTM IC_ DE T#29

2

1

4.7K_0402_5%@

1 2 1 2

C818

ANA_MIC_DET33

R909 0_0402_5%R909 0_0402_5%

4.7K_0402_5%

MIC_EXTR

MIC_EXTL

R906 0_0402_5%@ R906 0_0402_5%@

1U_0603_10V6K@

R956 10K_0402_5%@R956 10K_0402_5%@

2N7002_SOT23-3@

12

R904

14

9

16

17

12

13

15

11

2

5

R907

12

U28

RS/D

LS/D

RIN+

RIN-

LIN+

LIN-

RBYPASS

LBYPASS

GND

12

13

D

S

B

RVDD

LVDD

ROUT+

ROUT-

LOUT+

LOUT-

THERMAL_PAD

1 2

12

C742 1U_0603_10V4ZC742 1U_0603_10V4Z

R908

4.7K_0402_5%

Analog MIC

1 2

12

C743 1U_0603_10V4Z @C743 1U_0603_10V4Z @

R905

4.7K_0402_5%

@

MICIN_L MICIN_R

2N7002_SOT23-3@

Q28

2

G

19

7

SPKR+

1

SPKR-

3

SPKL+

4

SPKL-

6

20

NC

18

NC

10

NC

8

NC

21

TPA6020A2RGWR_QFN20_5x5

+3VS

R555

10K_0402_5%@

1 2

1 2 3 4

5 6

13

D

Q27

2

G

S

12

R957

R957 100K_0402_5%@

100K_0402_5%@

C767

C766

10U_0805_10V4Z

JP20

1 2 3 4

GND1 GND2

ACES_88231-04001

CONN@

C

R594

1 2

10U_0805_10V4Z

+5VS+5VAMP

0_1206_5%

10K_0402_5%

HP_DE T# DOCK_R

SI: change 2n7002 to dual package

HP_OUTR29

HP_OUTL29

10K_0402_5%

+3VALW

R47

1 2

D

+3VALW

R46

1 2

61

2

3

5

Q20B

4

2N7002DW-7-F_SOT363-6

Q21

100U_6.3V_M

C940

+

1 2

C941

+

1 2

100U_6.3V_M

2

G

2N7002_SOT23-3

Q20A

2N7002DW-7-F_SOT363-6

HP_OUT_L

SP02000D000 S W-CONN ACES 85204-04001 4P P1.25

B+

12

13

D

S

HP_OUT_R

SPKL+ SPKLSPKR+ SPKR-

JACK_DET# 29,35

R871

330K_0402_5%

0.01U_0402_25V7K

1

C854

2

HP_OUTR29

HP_OUTL29

2N7002DW-7-F_SOT363-6

SI: change 2n7002 to dual package

1

C760

C761

2

@

47P_0402_50V8J

1

2

6 1

Q22A

1

C762

2

@

47P_0402_50V8J

EXTMIC_DET#29

CIR_IN33,35

5

3

Q22B

Q22B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2

SPEAKER

1

C763

2

@

47P_0402_50V8J

MIC_EXTR MIC_EXTL

HP_OUT_R HP_OUT_L

EXTMIC_DET# HP_DE T#

CIR_IN

+5VL

SI: Add cap & 62 ohm for dock

100U_6.3V_M

C945

+

4

DOCK_L

+

1 2

100U_6.3V_M

C946

+

1 2

HP OUT For Docking

JP15

1

2

3

4

5

GND1

6

GND2

ACES_88231-04001

CONN@

E

JP17

1

2

3

4

5

6

7

8

9

10

11

12

13

14

ACES_87213-1400G

CONN@

R602 40.2_0603_1%R602 40.2_0603_1%

1 2

R607 40.2_0603_1%R607 40.2_0603_1%

1 2

DOCK_LOUT_R 35

DOCK_LOUT_L 35

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

AMP & Audio Jack

LA-4091P

30 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

Left side USB CONNECTOR 0

B

C

D

E

Left side ESATA/USB combination Connector

U40

1

GND

2

IN

3

IN

1

C788

1 1

C788

4.7U_0805_10V4Z

2

USB_EN#

4

EN#

THERMAL_PAD

TPS2061IDGN_MSOP8~N

8

OUT

7

OUT

6

OUT OC#

1

5

+

9

C789

2

150U_D_6.3VM

W=100mils

1

C790

2

0.1U_0402_16V4Z

+USB_VCCA+5VALW

USB20_N420

1

C791

2

1000P_0402_50V7K

USB20_P420

+5VALW

USB20_N4_R

L46

1

4

WCM-2012-900T_0805

D8

4

IO1

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4@D8PRTR5V0U2X_SOT143-4@

2

1

USB Board Conn

JP47

0.1U_0402_16V4Z

USB20_P7

1

2

3

4

5

6

7

8

9

10

11

GND1

12

GND2

ACES_87213-1000G

CONN@

+3VS_FB

1

C832

2

USB20_N7 USB20_P7

1 2

R581 0_0603_5%

1 2

R582 0_0603_5%@ R582 0_0603_5%@

+3VS+3VALW

JP39

1 2 3 4 5 6 7 8

ACES_85201-06051

CONN@

1 2 3 4 5 6 GND GND

SI: Change finger print footprint

+5VALW +5VS

2 2

3 3

USB_EN#33

4 4

USB_EN#33 USB10_P12 20

USB20_N020 USB20_P020

USB20_N120 USB20_P120

1 2

R622 0_0603_5%@ R622 0_0603_5%@

Q31

S

D

13

SI2301BDS_SOT23@

G

2

USB20_N720 USB20_P720

D21

2

+5VALW

USB20_N7

4

IO1

VIN

1

3

GND

IO2

PRTR5V0U2X_SOT143-4@

2

3

USB20_P4_R

+USB_VCCA

USB20_N4_R USB20_P4_R

JP27

1

VCC

2

D-

3

D+

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020173MR004M598ZL

SI: change new footprint

Touch screen

JP18

1

2

3

4

5

6

GND1

7

GND2

ACES_88266-05001

CONN@

USB10_N12 20

WCM-2012-900T_0805

USB20_N220

USB20_P220

SATA_TXP521 SATA_TXN521

SATA_RXN5_C21 SATA_RXP5_C21

SATA_TXN5 SATA_TXP5

SATA_RXN5 SATA_RXP5

ACES_88231-08001

1

C798

0.1U_0402_16V4Z

1U_0603_10V4Z

0.1U_0402_16V4Z

2

BT_OFF21

SI: change to 10K ohm to make sure MOS can turn on

1

4

L51

C792 0.01U_0402_16V7KC792 0.01U_0402_16V7K C793 0.01U_0402_16V7KC793 0.01U_0402_16V7K

D11

4

CH3

5

Vp

6

CH4

CM1293-04SO_SOT23-6

@

BT Connector

JP32

1

2

3

4

5

R517 1K_0402_5%@R517 1K_0402_5%@

6

R518 1K_0402_5%@R518 1K_0402_5%@

7

8

9

GND1 GND2

CONN@

0612 no install

10

2

C802

1

R520

1 2

10K_0402_5%

1

4

12 12

CH2

CH1

USB20_P6 USB20_N6

1 2 1 2

+5VALW

12

2

3

2

Vn

1

USB20_N6

Q24 SI2301BDS_SOT23

S

R519

100K_0402_5%

2

3

G

2

USB20_N2_R USB20_P2_R

SATA_TXP5 SATA_TXN5

SATA_RXN5 SATA_RXP5

D16

4

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4@

D

13

0.01U_0402_16V7K

+USB_VCCA

JP28

1

B_VCC

2

B_D-

3

B_D+

4

B_GND

5

GND

6

A+

7

A-

8

GND

9

B-

10

B+

11

GND

TYCO_1759576-1

USB

ESATA

SHIELD SHIELD SHIELD SHIELD

12 13 14 15

SI: change new footprint

D9

USB20_N2_R

4

IO1

VIN

3

GND

IO2

PRTR5V0U2X_SOT143-4@D9PRTR5V0U2X_SOT143-4@

+5VALW+5VALW

SI: new add for ESD

2

IO1

1

0.1U_0402_16V4Z

1

C799

2

+3VAUX_BT

USB20_P6

1

C800

2

+3VAUX_BT+3VALW

1

C801

2

4.7U_0805_10V4Z

USB20_P6 20 USB20_N6 20 BT_LED 34 CH_DATA 26

CH_CLK 26

2

1

USB20_P2_R

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-4091P

E

of

31 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

+3VL+3VL

1

C803

0.1U_0402_16V4Z

1 1

SMB_EC_CK16,33,34,37 SMB_EC_DA16,33,34,37

2

U31

8

VCC

7

WP

6

SCL

5

SDA

GND

AT24C16AN-10SI-2.7_SO8

12

R521

R521 100K_0402_5%

100K_0402_5%

1

A0

2

A1

3

A2

4

12

R526

R526 100K_0402_5%

100K_0402_5%

EEPROM need merge to BIOS ROM

SPI Flash (8Mb*1)

0.1U_0402_16V4Z

SPI_CS#33

SPI_CLK33

EC_SO_SPI_SI33

SPI_CS# INT_SPI_CS#

SPI_CLK_R

2

1

SB_INT_FLASH_SEL21

+3VL

1

C484

2

1 2

R221 0_0402_5%@R221 0_0402_5%@

1 2

R227 0_0402_5%R227 0_0402_5%

R229 0_0402_5%R229 0_0402_5%

EC_SO_SPI_SI_R EC_SI_SPI_SO_R

12

C794

C794 10P_0402_25V8K

10P_0402_25V8K

@

SPI_CS#

EC_SI_SPI_SO_R

20mils

SPI_CLK_R

U29

8

VCC

VSS

3

W

7

HOLD

1

S

6

C

5

SST25LF080A_SO8-200mil

E&T_2941-G08N-00E~D@

D

JP50

112 334 556 778

Q

2 4 6 8

4

2

INT_FLASH_EN# SPI_CLK_R EC_SO_SPI_SI_R

12

R223 0_0402_5%R223 0_0402_5%

+3VALW

INT_SPI_CS#

EC_SI_SPI_SO 33

R385

1 2

22_0402_5%

+3VALW

U24

4

Y

C624

12

0.1U_0402_16V4Z

5

INT_FLASH_EN#

2

B

Vcc

SPI_CS#

1

A

G

NC7SZ32P5X_NL_SC70-5

3

R313

100K_0402_5%

1 2

C:Chg. PN to LTC00000200

2 2

LPC Debug Port

+3VS

TPM1.2 on board with 1.02 Firmware

+3VALW

1

C1019

2

TPM@

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME#

CLK_PCI_TCG19,23

1 2

R454 10_0402_5%@R454 10_0402_5%@

IN

OUT

1

4

PLT_ RST#

SIRQ

TPM_XTALO

TPM_XTALI

12

TPM_XTALO

3 3

4 4

4.7K_0402_5%@

0_0402_5%

R954 10K_0402_5%TPM@R954 10K_0402_5%TPM@

1 2

+3VS

12

R951

12

R952

TPM@

1 2

C891 10P_0402_50V8J@C891 10P_0402_50V8J@

C1022 18P_0402_50V8J

12

TPM@

Y8

TPM@Y8

TPM@

2

NC

3

32.768KHZ_12.5P_1TJS125BJ4A421P

NC

C1020 18P_0402_50V8J

12

TPM@

C1018

2

0.1U_0402_16V4Z

TPM@

26 23 20 17 22 16 28 27 21

15

7

14

13

TPM_XTALI

R953

R953 10M_0402_5%

10M_0402_5%

TPM@

C1006

2

0.1U_0402_16V4Z

TPM@

U62

LAD0 LAD1 LAD2 LAD3 LFRAME# LRESET# LPCPD# SERIRQ LCLK

˦˟˕ʳˌˉˆˈʳ˧˧ʳ˄ˁ˅

˦˟˕ʳˌˉˆˈʳ˧˧ʳ˄ˁ˅˦˟˕ʳˌˉˆˈʳ˧˧ʳ˄ˁ˅

CLKRUN#

PP

XTALO

XTALI/32K IN

24

25

1

5

10

19

VSB

VDD

GPIO

GPIO2

TEST1

TESTB1/BADD

GND

SLB 9635 TT 1.2_TSSOP28

4

11

18

TPM@

1

C1007

2

0.1U_0402_16V4Z

TPM@

6 2

Base I/O Address 0 = 02Eh 1 = 04Eh*

8 9

3

NC

12

NC

1

NC

TPM_G PIO TPM_G PIO2

R955 0_0402_5%

0_0402_5%

TPM@R955

TPM@

12

@

T42PAD@T42PAD

@

T43PAD@T43PAD

R948

4.7K_0402_5%

R950

4.7K_0402_5%@

+3VS+3VS

12

TPM@R948

TPM@

12

SIRQ19,33

LPC_AD319,33

LPC_AD119,33

LPC_FRAME#19,33

LPC Debug Port

+3VALW

7

LPC_AD3

8

LPC_AD1

9

LPC_FRAME#

10

H31

DEBUG_PAD@

JP41

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

ACES_85201-2005@

56

4

3

2

1

R137 0_0402_5%@R137 0_0402_5%@

PLT_ RST#

LPC_AD2

LPC_AD0

CLK_PCI_SIO

R232

22_0402_5%

@

1 2

2

C486

C486 22P_0402_50V8J

22P_0402_50V8J

1

@

+3VS

1 2

PLT_RST# 11,14,19,25,26,27,33

LPC_AD2 19,33

LPC_AD0 19,33

CLK_PCI_SIO 19,23

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

LPC_DRQ1#

PLT_ RST#

SIRQ

LPC_DRQ1# 19

CLK_14M_SIO 15

CLK_PCI_SIO2 19

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

TCG/BIOS ROM/PS2/LED/SW

LA-4091P

32 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

+3VL_EC

0.1U_0402_16V4Z

1

C805

C806

2

0.1U_0402_16V4Z

1 1

2 2

0205_Add Pull down R402 for SUSP#.

3 3

ACES_85205-0400

4 4

C806

2

SMB_EC_DA1

R528 4.7K_0402_5%R528 4.7K_0402_5%

SMB_EC_CK1

R529 4.7K_0402_5%R529 4.7K_0402_5%

SMB_EC_DA2

R531 4.7K_0402_5%R531 4.7K_0402_5%

SMB_EC_CK2

R532 4.7K_0402_5%R532 4.7K_0402_5%

SUSP#

12

R536

R536 100K_0402_5%

100K_0402_5%

ESB_CLK ESB_DAT

EC DEBUG port

@

JP34

1

2

3

4

0.1U_0402_16V4Z

1

C807

2

CLK_PCI_EC19,23

1 2 1 2

ON/OFF34,35

2

+3VL

+5VL

1000P_0402_50V7K

1 2 1 2

SYSON

12

R539

R539 100K_0402_5%

100K_0402_5%

R563 4.7K_0402_5%R563 4.7K_0402_5% R576 4.7K_0402_5%R576 4.7K_0402_5%

DOCK_SLP_BTN#34,35

LANPWR E51_TXD

1

C808

2

C810

1 2

15P_0402_50V8J@

R533

C811 0.1U_0402_16V4ZC811 0.1U_0402_16V4Z

+3VALW

12

+3VL

4.7K_0402_5%

1000P_0402_50V7K

C809

SI: Change to +5VL to support

+5VL

read battery in batt mode

+3VS

R530

1 2

33_0402_5%@

1 2

47K_0402_5%

12

R538

R538 10K_0402_5%

10K_0402_5%

LID_SW#

+3VL

R543

12

Y7

3

NC

2

NC

32.768KHZ_12.5PF_9H03200413

C813

C813 15P_0402_50V8J

15P_0402_50V8J

1 2

C815

C815 15P_0402_50V8J

15P_0402_50V8J

B

+3VL +3VL_EC

R527

1 2

0_0805_5%

U33

12

@

R545

R545 20M_0402_5%

20M_0402_5%

GATEA20 KB_RST# SIRQ LPC_LFRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC

PLT_ RST# ECRST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

SMB_EC_CK1 SMB_EC_DA1 SMB_EC_CK2 SMB_EC_DA2

SLP_S3# SLP_S5# EC_SMI# LID_SW# ESB_CLK ESB_DAT

E51_TXD LANPWR

CRY2

CRY1

GATEA2020 KB_RST#20

SIRQ19,32

LPC_FRAME#19,32

LPC_AD319,32 LPC_AD219,32 LPC_AD119,32 LPC_AD019,32

PLT_ RST#11,14,19,25,26,27,32

EC_SCI#20

HDARST#20,23

SMB_EC_CK16,32,34,37 SMB_EC_DA16,32,34,37 SMB_EC_CK26 SMB_EC_DA26

SLP_S3#20 SLP_S5#20 EC_LID_OUT# 20 EC_SMI#20

LID_SW#34 ESB_CLK34 ESB_DAT34

H_THERMTRIP#6,20

CONA#35

VLDT_EN36

LANPWR25

DIM_LED34

4

OSC

1

OSC

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN# /GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED# /GPIO1A

122

XCLK1

123

XCLK0

+3VL_EC

+EC_AVCC

9

LPC & MISC

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

12

L80

L80 0_0603_5%

0_0603_5%

1 2

C816 0.1U_0402_16V4ZC816 0.1U_0402_16V4Z

C

+EC_AVCC

22

33

96

111

125

VCC

INVT_PWM/PWM1/GPIO0F

ACOFF/FANPWM2/GPIO13

PWM Output

AD Input

DA Output

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Flash ROM

BATT_CHGI_LED#/GPIO52

GPIO

BATT_LOW_LED#/GPIO54

GPO

GPIO

GPI

GND

11

24

35

94

113

67

AVCC

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

BATT_ TEMP/A D0/GP IO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_ TX/GPIO41

FS TC HG/ SE LIO #/ GP IO5 0

CAPS_LED#/GPIO53

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

KB926QFC0_LQFP128_14X14

69

ECAGND

L81

1 2

0_0603_5%

INV_PWM

21

FAN_PWM

23 26

ACOFF

27

BATT_ TEMP

63

BATT_ OVP

64 65 66

TP_B TN#

75 76

68 70

IRE F

71 72

83 84 85 86

TP_CLK

87

TP_D ATA

88

97 98 99 109

119 120 126 128

CIR_IN

73 74

FSTCHG

89 90 91

BAT_LED#

92

ON/OFFBTN_LED#

93

SYSON

95

VR_ON

121

ACIN

127

EC_RSMRST#

100 101 102

WL_BLUE_LED#

103

SB_PWRGD

104

BKOFF#

105 106

TP_LED#

107 108

110 112 114 115

SUSP#

116

PWRBTN_OUT#

117 118

124

C814 4.7U_0805_10V4Z C814 4.7U_0805_10V4Z

SI: Mount C814 for KB926C

12

INV_PWM 17 FAN_PWM 4 EC_BEEP 29 ACOFF 38

CIR_IN 30,35

CAPS_LED# 34 BAT_LED# 34 ON/OFFBTN_LED# 34

SYSON 26,34,36,40

EC_RSMRST# 20

EC_ON 36,39

WL_BLUE_LED# 34 SB_PWRGD 6,20,43 BKOFF# 17

EC_THE RM# 21

PCI_SERR# 19

C812

BATT_ TEMP 37 BATT_ OVP 37 ADP_I 38 ADP_ID 37

TP_B TN# 34 ANA_MIC_DET 30

DAC_BRIG 17 VCTRL 38 IRE F 3 8 AC_SET 38

EC_MUTE# 30

USB_EN# 31

I2C _IN T 34

MUTE_LED 35 TP_CLK 34 TP_D ATA 34

DOCK_VOL_UP# 35 DOCK_VOL_DWN# 35 VGATE 43

EC_SI_SPI_SO 32 EC_SO_SPI_SI 32 SPI_CLK 32 SPI_CS# 32

TP_LED# 34

ENBKL 11 EAPD_CODEC 29

SUSP# 26,29,36,38,41 PWRBTN_OUT# 2 0

D

KBD CONN

CONN@

JP33

BATT_ OVP

12

C327100P_0402_50V8J C327100P_0402_50V8J

0.01U_0402_16V7K

ECAGND

1 2

27

G1

28

G2

ACES_85201-26051

select SPI ROM or LPC ROM, remove in ver C

CIR_IN

R541 10K_0402_5%R541 10K_0402_5%

12

R554 10K_0402_5%

FSTCHG 38

STD_ADP 38

VR_ON 43

12

KSO17

1

KSO16

2

KSO15

3

KSO10

4

KSO11

5

KSO14

6

KSO13

7

KSO12

8

KSO3

9

KSO6

10

KSO8

11

KSO7

12

KSO4

13

KSO2

14

KSI0

15

KSO1

16

KSO5

17

KSI3

18

KSI2

19

KSO0

20

KSI5

21

KSI4

22

KSO9

23

KSI6

24

KSI7

25

KSI1

26

KB Back Light Conn

JP48

1 2 3

4 G1 G2

ACES_85201-0405N

CONN@

+5VL

ACIN

CH751H-40PT_SOD323-2

E

For EMI

KSO17

C213 100P_0402_25V8K@C213 100P _0402_25V8K@

KSO9

C609 100P_0402_25V8K@C609 100P _0402_25V8K@

KSO16

C754 100P_0402_25V8K@C754 100P _0402_25V8K@

KSI6

C756 100P_0402_25V8K@C756 100P _0402_25V8K@

KSO14

C757 100P_0402_25V8K@C757 100P _0402_25V8K@

KSO11

C758 100P_0402_25V8K@C758 100P _0402_25V8K@

KSO10

C759 100P_0402_25V8K@C759 100P _0402_25V8K@

KSO15

C764 100P_0402_25V8K@C764 100P _0402_25V8K@

KSO6

C768 100P_0402_25V8K@C768 100P _0402_25V8K@

KSO3

C769 100P_0402_25V8K@C769 100P _0402_25V8K@

KSO12

C822 100P_0402_25V8K@C822 100P _0402_25V8K@

KSO13

C823 100P_0402_25V8K@C823 100P _0402_25V8K@

KSO2

C824 100P_0402_25V8K@C824 100P _0402_25V8K@

KSO4

C825 100P_0402_25V8K@C825 100P _0402_25V8K@

KSO7

C826 100P_0402_25V8K@C826 100P _0402_25V8K@

KSO8

C875 100P_0402_25V8K@C875 100P _0402_25V8K@

KSI3

C876 100P_0402_25V8K@C876 100P _0402_25V8K@

KSO5

C877 100P_0402_25V8K@C877 100P _0402_25V8K@

KSO1

C878 100P_0402_25V8K@C878 100P _0402_25V8K@

KSI0

C884 100P_0402_25V8K@C884 100P _0402_25V8K@

KSI4

C885 100P_0402_25V8K@C885 100P _0402_25V8K@

KSI5

C886 100P_0402_25V8K@C886 100P _0402_25V8K@

KSO0

C887 100P_0402_25V8K@C887 100P _0402_25V8K@

KSI2

C888 100P_0402_25V8K@C888 100P _0402_25V8K@

KSI1

C889 100P_0402_25V8K@C889 100P _0402_25V8K@

KSI7

C890 100P_0402_25V8K@C890 100P _0402_25V8K@

1 2 3 4 5 6

1 2

R542 0_0805_5%R542 0_0805_5%

TP_B TN#

TP_CLK

TP_D ATA

R560 100K_0402_5%R560 100K_0402_5%

1 2

D33

2 1

12

C326 100P_0402_50V8J

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

R540

1 2

R534

10K_0402_5%

1 2

R535

1 2

+3VALW

AC_IN 21,38,39

+5VS_LED

10K_0402_5%

+3VS

+5V_TP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

EC KB926/KB conn

LA-4091P

33 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

MDC 1.5 Conn.

Change type 4/25

JP25

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC _S YNC

9

IAC_SDATA_IN

11

IAC_RESET#

Connector for MDC Rev1.5

CONN@

2N7002DW-7-F_SOT363-6

12

R505

100K_0402_5%

WL_LED

100K_0402_5%

R506

12

GND13GND14GND15GND16GND17GND

10K_0402_5%

R577

Q141A

2

IAC _B ITC LK

61

5

R495

1 2

33_0402_5%

+3VS

1

C778

2

1000P_0402_50V7K

10K

2

HDA_SDOUT_MDC

HDA_SYNC_MDC

HDA_SDIN1_MDC

1

C779

2

0.1U_0402_16V4Z

+3VS

47K

DTA114YKAT146_SOT23-3

1 3

Q115

C780

4.7U_0805_10V4Z

@

BT_LED31

HDA_SDOUT_MDC20

HDA_SYNC_MDC20 HDA_SDIN120 HDA_RS T#_MDC20 HDA_BITCLK_MDC 20

1 1

2 2

WL_LED#26

2

RES0

4

RES1

6

3.3V

8

GND3

10

GND4

12

ACES_88018-124G

18

+3VS

12

3

Q141B

Q141B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

4

B

R496

R496 10_0402_5%@

10_0402_5%@

WL_BLUE_LED# 33

+3VS

C

CAPS LOCK LED

D

SI: Modify LED footprint

WHITE

D30

CAPS_LED#33

21

HT-F196BP5_WHITE

R552

1 2

470_0402_5%

E

+5VS_LED

POWER LED(Left 1)

12

1 2

C777

C777 10P_0402_25V8K@

10P_0402_25V8K@

for debug only

ON/OFFBTN_LED#

Battery Charge LED(Left 2)

BTN TOP

ON/OFF

R631

10K_0402_5%

2

+5VS

12

5

61

Q138A

Q138A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

3

Q138B

Q138B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

4

DIM LED

+5VALW

BAT_LED#33

HDD LED(Left 3)

GSENSOR_LED#21

Q32

SI2301BDS-T1-E3_SOT23-3

S

12

G

R587

10K_0402_5%

2

SW5

5

6

SMT1-05_4P

SATA_LED#21

3

4

1

5

6

3

4

SW6

SMT1-05_4P

2

1

2

WHITE

D27

HT-F196BP5_WHITE

WHITE

D28

HT-F196BP5_WHITE

QSMF-C16E_AMBER-WHITE

White

Amber

LED1

+5VALW_LED

D

13

1

C836

0.1U_0402_16V4Z

2

+5VS

R549

21

43

1 2

470_0402_5%

R550

1 2

470_0402_5%

1 2

R551 470_0402_5%R551 470_0402_5%

1 2

R559 470_0402_5%R559 470_0402_5%

SI2301BDS-T1-E3_SOT23-3

+5VALW_LED

+5VS_LED

+5VS

+5VS_LED

Q58

S

D

13

G

2

1

C845

0.1U_0402_16V4Z

2

13

D

Q51

DIM_LED33

3 3

T/P Board (Inculde T/P_ON/OFF)

+5V_TP

@

1

C819

0.1U_0402_16V4Z

+5VS_LED

@

C820

2

1

2

JP37

1

2

3

4

5

TP_B TN#

6

TP_LED#

7

8

9

GND

10

4 4

GND

ACES_85201-08051

CONN@

A

100P_0402_50V8J

1

@

C821

C821 100P_0402_50V8J

100P_0402_50V8J

2

TP_D ATA TP_CLK

EMI request

TP_CLK 33 TP_D ATA 33 TP_B TN# 33 TP_LED# 33

2

3

1

D31

D31 PSOT24C_SOT23-3

PSOT24C_SOT23-3

@

B

1 2

+5VALW +5V_TP

10K_0402_5%

SYSON26,33,36,40

SYSON

R235 0_0603_5%@R235 0_0603_5%@

SI2301BDS-T1-E3_SOT23-3

S

D

13

G

12

Q85

2

R645

13

D

Q34

2

2N7002_SOT23-3

G

S

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

SMB_EC_CK16,32,33,37 SMB_EC_DA16,32,33,37

ESB_CLK33 ESB_DAT33

2007/08/02 2008/08/02

R605 0_0402_5%@R605 0_0402_5%@

1 2

R606 0_0402_5%@R606 0_0402_5%@

1 2

R603 0_0402_5% R603 0_0402_5%

1 2

R604 0_0402_5% R604 0_0402_5%

1 2

Compal Secret Data

Deciphered Date

2

2N7002_SOT23-3

G

S

SWITCH BOARD.

ON/OFFBTN_LED#33

I2C _IN T33

10K_0402_5%

R558

D

12

+5VALW_LED

LID_SW#33

ON/OFF33,35

SI: Add +5VALW_LED to support PWR LED S3 flash function

SI: Change to +3VL to support Qplay bottom boot in BATT mode

+3VL+5VS_LED

CONN@

JP36

1

2

3

4

5

6

E

6

7

8

9

10

11

GND

12

GND

ACES_85201-1005N

34 53Thursday, November 08, 2007

LA-4091P

R_PWR_L ED

1 2

R705 150_0402_5%R705 150_0402_5%

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

MDC/KBD/ON_OFF/LID

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

Atlas/ Saturn Dock

+DOCKVIN

D43

+5VS

1 1

+3VALW

1 2

R586 1K_0402_5%R586 1K_0402_5%

1 2

R585 1K_0402_5%R585 1K_0402_5%

2N7002DW-7-F_SOT363-6

SYSON#36,42

DOCK_PWR_ON Spec 0V = Notebook S4/S5, Dock off

2.5V = Notebook S3, Dock on 4V = Notebook S0, Dock on

Q145A

61

2

3

R588

R588 10K_0402_5%

10K_0402_5%

1 2

D43

1

DAN202U_SC70

DOCK_PWR_ON DOCK_VOL_UP#

D_DDCDATA16

D_HSYNC16 D_DDCCLK16 USB20_N320 D_VSYNC16

USB20_P320

RJ45_MIDI1+25 RJ45_MIDI1-25 RJ45_MIDI0+25 RJ45_MIDI0-25

B+

GREEN_L16 RED_L16

BLUE_L16

PJP5

PAD-OPEN 2x2m

D_DDCDATA

D_HSYNC D_DDCCLK USB20_N3 D_VSYNC

USB20_P3

RJ45_MIDI1+ RJ45_MIDI1RJ45_MIDI0+ RJ45_MIDI0+V_B ATTERY

21

need change to reverse type connector

+3VALW

R565

1 2

3

5

4

R565 10K_0402_5%

10K_0402_5%

Q145B

Q145B 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

CONA# 33

1

2

C942

220P_0402_50V7K

2 2

DOCK_PRESENT

1 2

R572 1K_0402_5%R572 1K_0402_5%

12

R566

R566 47K_0402_5%

47K_0402_5%

43 44

40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

41 42

DOCK_LOUT_R

DOCK_LOUT_L

1

2

C943

220P_0402_50V7K

JP38

43 44

40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

8

6

4

2

41

SHIELD

42

SHIELD

FOX_QL1122L-H212AR-7F

CONN@

39

37

35

33

31

CIR_IN

29

DOCK_PWR_ON

27

MUTELED

25

DOCK_SLP_BTN#

23

HP_DE T#

21

R_VOL_UP# DOCK_VOL_UP#

19

R_VOL_DWN# DOCK_VOL_DWN#

17

SPDIFO_L

15

AUDIO_OGND

13

DOCK_LOUT_R

11

DOCK_LOUT_L

9

DOCK_MIC_R_C

7

DOCK_MIC_L_C

5

AUDIO_IGND

3

DOCK_PRESENT

1

45 46

CIR_IN 30,33

R591 1K_0402_5%R591 1K_0402_5%

R567 200_0402_5%R567 200_0402_5% R568 200_0402_5%R568 200_0402_5%

DOCK_LOUT_R 30 DOCK_LOUT_L 30

MMBT3904_NL_SOT23-3

SPDIFO_L

+1.5VS

Q7

C

1 2

1 2 1 2

R574

R574 33_0402_5%

33_0402_5%

1 2

2

B

E

3 1

R575

1 2

0_0402_5%

+3VS

12

R589 10K_0402_5%R589 10K_0402_5%

DOCK_VOL_DWN#

MUTE_LED 33 DOCK_SLP_BTN# 33,34 JACK_DET# 29,30

DOCK_VOL_UP# 33 DOCK_VOL_DWN# 33

1 2

0.1U_0402_16V7K

R573

R573 110_0402_5%

110_0402_5%

0.1U_0402_16V7K

C894

12

1

C944

2

220P_0402_50V7K

1 2

R647 150_0402_5%R647 150_0402_5%

12

R590 10K_0402_5%R590 10K_0402_5%

SPDIF_OUT 29

R_VOL_UP#

1

C843

C843 1000P_0402_50V7K

3 3

4 4

DOCK_MIC_R29

DOCK_MIC_L29

DOCK_MIC_L_C

MIC_Dock

10K_0402_5%

MMBT3904_NL_SOT23-3

R912

10K_0402_5%

1 2

R913

R913 47K_0402_5%

47K_0402_5%

1 2

1U_0603_10V6K

A

R914

2

1

Need 600 Ohm 500 mA

FBM-11-160808-601-T_0603

+3VS

10K_0402_5%

1 2

C

Q16

2

B

E

3 1

C978

L94

L94 FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

1 2

L93

C921

220P_0402_50V7K

R915

2

R915

B

E

13

D

1 2

2

G

C

S

Q18

3 1

MMBT3904_NL_SOT23-3

DOCK_MIC_R_C

DOCK_MIC_L_C

1

C922

2

220P_0402_50V7K

Q100

Q100 2N7002_SOT23-3

2N7002_SOT23-3

SENSE_B# 29

B

1000P_0402_50V7K

2

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

Issued Date

R_VOL_DWN#

1

C844

C844 1000P_0402_50V7K

1000P_0402_50V7K

2

C

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

DOCK CONN

LA-4091P

35 53Thursday, November 08, 2007

E

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

Screw Hole

H2

H1

H_7P0X5P0N

H_4P5X3P0N

@

+5VALW TO +5VS

+5VALW

1 1

1

2

4.7U_0805_10V4Z

Q35

8

D

7

D

6

D

5

D

SI4800BDY_SO8

C864

+5VS

4.7U_0805_10V4Z

C835

1

2

1

C833

1

S

2

S S

G

3 4

2

1U_0402_6.3V4Z

RUNON

+3VALW TO +3VS

+3VALW +3VS

Q14

1

2

4.7U_0805_10V4Z

Q14

8

D

7

D

6

D

5

D

SI4800BDY_SO8

C840

C839

1

S

2

S

3

S

4

G

1U_0402_6.3V4Z

RUNON

1

C834

2

0.01U_0402_25V7K

1

2

D

S

750K_0402_1%

13

Q17

Q17 2N7002_SOT23-3

2N7002_SOT23-3

1

C838 4.7U_0805_10V4ZC838 4.7U_0805_10V4Z

2

R152

12

B+

SUSP

2

G

+1.8V TO +1.8VS

+1.8V

Q4

IRF8113PBF_SO8

2 2

8 7

5

1

2

4.7U_0805_10V4Z

IRF8113PBF_SO8

C842

4

1.8VS_ENABLE

0.01U_0402_25V7K

1 2 36

1

C849

2

+1.8VS

1

C848

2

1U_0402_6.3V4Z

13

D

S

2

1

R138

1 2

750K_0402_1%

Q13

2

2N7002_SOT23-3

G

C841

C841 10U_0805_10V4Z

10U_0805_10V4Z

B+

SUSP

+1.2VALW TO +1.2V_HT

+1.2VALW +1.2V_HT

Q11

8 7

5

1

2

4.7U_0805_10V4Z

Q11

IRF8113PBF_SO8

C847

4

1 2 36

1

2

0.01U_0402_25V7K

1

C846

2

1U_0402_6.3V4Z

C837

C862 4.7U_0805_10V4ZC 862 4.7U_0805_10V4Z

R233

330K_0402_5%

13

D

Q12

2

2N7002_SOT23-3

G

S

1

2

VLDT_EN#

12

B+

@

H_7P0X5P0N

@

1

H5

H6

H_3P0

@

1

H16

H15

H_3P0

@

1

H21

H22

H_4P2

@

1

H25

H27

H_3P0

H_4P0

@

1

SYSON#35,42 SUSP 42

2N7002DW-7-F_SOT363-6

H3

H_3P4N

@

1

@

1

H7

H8

H9

H_3P0

H_4P2

Q142B

H9

H_3P0

@

1

H19

H18

H_3P0

@

1

H24

1

H33

H_4P0

@

1

12

R595

3

5

4

H_3P0

@

1

@

H23

H_4P2

@

1

H32

H_3P3

@

1

100K_0402_5%

SYSON# SUSP

H10

H_3P0

@

1

@

+5VL+5VL

12

R596

100K_0402_5%

61

Q142A

Q142A 2N7002DW-7-F_SOT363-6

2N7002DW-7-F_SOT363-6

2

H_3P3

1

H12

H11

H_3P0

@

1

H30

1

CF1CF1

@

1

CF3CF3

CF2CF2

1

SUSP# 26,29,33,38,41SYSON26,33,34,40

H_3P0

1

H14

H13

H_3P0

@

1

H29

H28

H_3P3

@

CF4CF4

1

Discharge circuit

2

G

2

G

+0.9V

+1.8VS

1 2

13

D

S

R279

R279 470_0805_5%

470_0805_5%

1 2

13

D

Q48

Q48 2N7002_SOT23-3

2N7002_SOT23-3

S

R292

R292 470_0805_5%

470_0805_5%

Q49

Q49 2N7002_SOT23-3

2N7002_SOT23-3

SUSP

3 3

4 4

+5VS

R239

R239 470_0805_5%

470_0805_5%

1 2

13

D

SUSP SUSP

SUSP

2

G

+3VS

S

1 2

13

D

S

Q46

Q46 2N7002_SOT23-3

2N7002_SOT23-3

R288

R288 470_0805_5%

470_0805_5%

Q47

Q47 2N7002_SOT23-3

2N7002_SOT23-3

A

SYSON#

+1.2V_HT +1.8V

R280

R280 470_0805_5%

470_0805_5%

1 2

13

D

2

G

2

G

+1.5VS

D

Q37

Q37 2N7002_SOT23-3

2N7002_SOT23-3

S

R293

R293 470_0805_5%

470_0805_5%

1 2

13

D

Q50

Q50 2N7002_SOT23-3

2N7002_SOT23-3

S

B

VLDT_EN# SYSON#

SUSP

2

G

1 2

13

D

S

+1.1VS

2

G

R284

R284 470_0805_5%

470_0805_5%

Q41

Q41 2N7002_SOT23-3

2N7002_SOT23-3

R294

R294 470_0805_5%

470_0805_5%

1 2

13

D

Q52

Q52 2N7002_SOT23-3

2N7002_SOT23-3

S

+1.2VALW

R368

470_0805_5%@

1 2

13

D

2

G

Issued Date

D

Q42

Q42 2N7002_SOT23-3

2N7002_SOT23-3

@

S

C

VLDT_EN#13

VLDT_EN33

Compal Secret Data

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

VLDT_EN#

VLDT_EN

2N7002DW-7-F_SOT363-6

D

100K_0402_5%

EC_ON#

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECT RONICS, INC.

2

Q143A

R597

+5VL

12

R598

R598 100K_0402_5%

100K_0402_5%

EC_ON#

3

61

Q143B

2N7002DW-7-F_SOT363-6

5

4

Title

Size Document Numbe r Rev

Custom

Date: Sheet of

EC_ON 33,39

Compal Electronics, Inc.

DC/DC Circuits

LA-4091P

E

0.1

36 53Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

+3VALW

PQ3

PQ3 TP0610K-T1-E3_SOT 23-3

TP0610K-T1-E3_SOT 23-3

1 1

1 3

5

4

3

2

1

1 2

PJSOT24C_SOT23-3

ACES_88334-057N

PJP1

2 2

PR8

PR8 100_0402_5%

100_0402_5%

ADP_SIGNAL

ADPINADP IN

PD1

2

1

1 2

PR3

PR3 10K_0402_5%

10K_0402_5%

3

AC_LED 38

12

PC2

12

PR2

PR2 10K_0402_5%

10K_0402_5%

12

PC3

PC3 1000P_0402_50V7K

1000P_0402_50V7K

100P_0402_50V8J

12

RLZ3.6B_LL34

PL1

SMB3025500YA_2P

1 2

PD4

PC4

100P_0402_50V8J

B

ADP_ID 33

12

PC12

PC12 1000P_0402_50V7K

1000P_0402_50V7K

VIN +DOCKVIN

PL2

SMB3025500YA_2P

12

PC5

1000P_0402_50V7K

C

D

BATT

12

+5VALW

PR1

340K_0402_1%

12

PR4

499K_0402_1%

12

PC6

0.01U_0402_25V7K

12

PR6

105K_0402_1%

12

PC1

0.01U_0402_25V7K

3

2

PU1A

LM358ADT_SO8

8

P

+

1

0

-

G

4

PR5

10K_0402_5%

12

BATT_OVP 33

VMB

PL3

SMB3025500YA_2P

12

PC8

PC8 1000P_0402_50V7K

1000P_0402_50V7K

SM24.TC_SOT23-3@

SMB3025500YA_2P

1 2

B

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PJP2

1

2

3

4

5

6

7

8

9

GND

10

3 3

4 4

GND

SUYIN_200275MR008GXOLZR@

1 2

10K_0402_5%

6.49K_0402_1%

1 2

12

PR17

PR17 1K_0402_5%

1K_0402_5%

PR16

PR9

A

EC_SMD EC_SMC

12

PR13

100_0402_5%

+3VL

BAT_ID 38

+3VL

3

2

12

PR14

PR14 100_0402_5%

100_0402_5%

BATT_TEMP 33

PD2

PD2 SM05_SOT23@

SM05_SOT23@

1

2

3

1

PD3

SMB_EC_DA1

SMB_EC_CK1

http://laptop-motherboard-schematic.blogspot.com/

BATT

12

PC9

0.01U_0402_50V4Z

SMB_EC_DA1 6,32,33,34

SMB_EC_CK1 6,32,33,34

0.22U_0603_10V7K

Issued Date

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C Recovery at 47 +-3 degree C

+5VS

CPU

12

PH1

PH1 10K_TH11-3H103FT_0603_1%

10K_TH11-3H103FT_0603_1%

PR10

15K_0402_1%

1 2

PR11

12

PC10

2007/05/29 2008/05/29

PR12

2.55K_0402_1%

+5VAL W

12

PR11

150K_0402_1%

PR15

150K_0402_1%

Compal Secret Data

Dec iphere d Dat e

C

12

PU1B

LM358ADT_SO8

5

6

12

PC11

PC11 1000P_0402_50V7K

1000P_0402_50V7K

47K_0402_1%

1 2

PR7

8

P

+

7

0

-

G

4

13

D

2

G

S

ENTRIP1 39

PQ1

PQ1 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

ENTRIP2 6,39

13

D

PQ2

2

SSM3K7002FU_SC70-3

G

S

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DC Connector/CPU_OTP

LA-4091P

D

of

37 52Thursday, November 08, 2007

of

37 52Thursday, November 08, 2007

of

37 52Thursday, November 08, 2007

0.1

A

VIN

PQ101

1 1

PR101

47K_0402_5%

1 2

12

PC101

47P_0402_50V8J

PR107

PR107 47K_0402_1%

47K_0402_1%

1 2

2

13

D

2

G

S

PACIN

2 2

ACOFF#

13

PQ105

PQ105 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PQ107

PQ107 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

PR111

3K_0402_1%

1 2

RLS4148_LL34-2

PD101

2

PQ101 AM4835EP-T1-PF_SO8

AM4835EP-T1-PF_SO8

8 7

5

DTA144EUA_SC70-3

PQ104

1 3

13

D

2

G

S

VCTRL33

PQ109

PQ109 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

4

1U_0603_10V6K

1 2 36

12

PC106

0.22U_0603_16V7K

PR114

PR114 0_0402_5%@

0_0402_5%@

1 2

PC117

P2

12

PR109

PR109 150K_0402_5%

150K_0402_5%

12

PR106

143K_0402_1%

PQ103

AM4835EP-T1-PF_SO8

1 2 3 6

4

AC_SET33

200K_0402_5%

12

PR113

12

PR115

PR115 100K_0402_1%

100K_0402_1%

SUSP#26,29,33,36, 41

8 7

5

0.01U_0402_16V7K@

PC112

1 2

1U_0603_6.3V6M

Charge Detector

ADP_I33

PR123

PR123 1M_0402_5%

3 3

VIN

12

PR131

133K_0402_1%

12

PR135

10K_0603_0.1%

1.24VREF

4 4

1M_0402_5%

1 2

P2

12

PR125

PR125 47_1206_5%

47_1206_5%

12

PC125

0.1U_0603_25V7K

8

3

P

+

1

O

2

-

G

PU102A

PU102A LM393DG_SO8

LM393DG_SO8

4

+3VL

12

PR129

10K_0402_1%

STD_ADP 33

BQ24740VREF

12

PR128

10K_0402_5%

13

D

2

G

S

FSTCHG33

CHGEN#

PQ112

PQ112 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

FSTCHG#

1 2

PR137

PR137 20K_0402_1%

20K_0402_1%

2

G

+3VL

PR132

12

100K_0402_5%

ACDET

PR104

PR104 0_0402_5%

0_0402_5%

1 2

PC107

PR110

PR110 0_0402_5%

0_0402_5%

1 2

PR116

39K_0402_5%

12

PC120

0.22U_0603_10V7K

12

13

D

PQ113

PQ113 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

PR138

100K_0402_1%

B

12

BQ24740VREF

+3VL

12

PR118

10K_0402_5%

1 2

0.1U_0402_10V7K

C

P4

B+

D

BATT

PQ102

PQ102 AM4835EP-T1-PF_SO8

AM4835EP-T1-PF_SO8

AC_LED37

12

PC114

4.7U_0805_25V6-K

PR130

2.15K_0402_1%

1 2

PC127

1 2 3 6

+3VL

PR112

0.02_1206_1%

1 2

PC118

0.1U_0402_10V7K

12

PL101

12

PC109

0.1U_0603_25V7K@

CHGEN#

1

2

ACN

CHGEN

PVCC

BTST

HIDRV

REGN

LODRV

PGND

DPMDET

CELLS

20

21

SSM3K7002FU_SC70-3

PR120

12

PL101 HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

1 2

29

TP

28

BST_CHG

27

DH_CHG

26

LX_CHG

25

PH

REGNVADJ

24

DL_CHG

23

22

PQ111

IREF 33

12

PC103

PC110

PC110 1U_0805_25V6K

1U_0805_25V6K

1 2

PD102

RLS4148_LL34-2

12

PC119

1U_0603_10V6K

100K_0402_5%

1 2

13

D

2

G

S

12

4.7U_0805_25V6-K

PR108

PR108 10_1206_5%

10_1206_5%

1 2

12

PR117

12

PC104

4.7U_0805_25V6-K

PC111

0.1U_0402_10V7K

1 2

12

PC124

PC105

47K_0402_5%@

PR119

0.1U_0603_25V7K

4.7U_0805_25V6-K

12

CHG_B+

578

BQ24740VREF

3 6

CHG_B+

241

PQ108

PQ108 AO4466_SO8

AO4466_SO8

PQ110

PQ110 AO4466_SO8

AO4466_SO8

BAT_ID 37

12

PC122

@0.1U_0603_25V7K

0.047U_0402_16V7K

PL102

PL102 10U_LF919AS-100M-P3_4.5A _20%

10U_LF919AS-100M-P3_4.5A _20%

1 2

12

PR126

133K_0402_1%

12

PC126

PC113

4.7U_0805_25V6-K

VIN

12

PR133

PR133 10K_0603_0.1%

10K_0603_0.1%

22P_0402_50V8J

PR102

0.012_2512_1%

1 2

ACDET

ACSET

7

6

LPREF

ACSET

8

IADSL P

9

AGND

10

VREF

11

VDAC

12

VADJ

13

EXTPWR

14

ISYNSET

IADAPT

SRSET

15

16

IADAPT

1 2

PC102

1U_0603_6.3V6M

12

PC108

0.1U_0603_25V7K

5

4

3

ACP

LPMD

ACDET

PU101

PU101 BQ24740RHDR_QFN28_5X5

BQ24740RHDR_QFN28_5X5

SRP

BAT

SRN

19

17

18

12

PC121

BATT

100P_0402_50V8J

49.9K_0402_1%

PC123

12

PR121

PR121 200K_0402_1%

200K_0402_1%

4

PR139

100K_0402_5%

1 2

PACIN

PR122

PR122 1M_0402_5%

1M_0402_5%

1 2

5

+

6

-

8 7

5

ACOFF#

2

G

BATT

12

PC115

4.7U_0805_25V6-K

8

PU102B

P

7

O

G

LM393DG_SO8

4

PR136

49.9K_0402_1%

1 2

4

REF

5

ANODE

LMV431ACM5X_SOT23-5

13

D

PQ114

S

SSM3K7002FU_SC70-3

12

PC116

4.7U_0805_25V6-K

PD103

RLZ4.3B_LL34

PU103

CATHODE

NC

VIN

12

PR127

PR127 10K_0402_1%

10K_0402_1%

12

3

2

1

PR103

47K_0402_5%

1 2

12

PR105

PR105 10K_0402_5%

10K_0402_5%

VIN

13

2

ACOFF 33

PQ106

PQ106 DTC115EUA_SC70-3

DTC115EUA_SC70-3

PR124

PR124 1K_0402_5%

1K_0402_5%

1 2

12

PR134

PR134 10K_0402_5%

10K_0402_5%

P2

PACIN

1.24VREF

AC_IN 21,33,39

PACIN

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Titl e

Size Document Number Rev

Date: Sheet

Charger

LA-4091P

D

of

38 52Thursday , November 08, 2007

of

38 52Thursday , November 08, 2007

of

38 52Thursday , November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

A

B

C

D

E

2VREF_51125

PC302

ENTRIP2

6

13

1 2

PR312

0_0402_5%@

PR317

PR317 0_0402_5%

0_0402_5%

+5VAL W

+3VAL W

12

0.22U_0603_10V7K

PR302

37.4K_0402_1%

1 2

PR304

24K_0402_1%

1 2

PR306

150K_0402_1%

ENTRIP1

1 2

1

4

2

5

3

VFB1

VFB2

VREF

TONSEL

GND

ENTRIP1

PGOOD

VBST1

DRVH1

DRVL1

VREG5

VIN

VCLK

17

16

18

TPS51125RGER_QFN24_4X4

VO1

24

23

22

21

20

LL1

19

ENTRIP2

SKIPSEL

EN0

14

15

VL

12

PC311

12

10U_0805_10V6K

B++

10U_0805_10V6K

PC312

0.1U_0603_25V7K

(4.5A,180mils ,Via NO.= 9)

(3A,120mils ,Via NO.= 6)

PR308

0_0402_5%

1 2

UG_5V

LX_5V

LG_5V

1 2

PR318 0_0402_5%

B++

12

PC304

2200P_0402_50V7K

PC308

0.1U_0402_10V7K

1 2

+3VL

12

PR316

VL

+3VLP

12

PR310

PR310 0_0402_5%

0_0402_5%

1 2

100K_0402_5%

3/5V_OK 41

PJP304

2 1

PAD-OPEN 2x2m

PJP301

2 1

PAD-OPEN 2x2m

12

PC313

PC305

4.7U_0805_25V6-K

UG1_5V

+5VL

+3VL

578

PQ302

AO4466_SO8

3 6

241

PL303

PL303 10U_LF919AS-100M-P3_4.5A_20%

10U_LF919AS-100M-P3_4.5A_20%

1 2

578

3 6

241

PQ304

FDS6690AS_NL_SO8

1

+

2

PC310

150U_D_6.3VM

+5VALWP

1 1

PR301

13.7K_0402_1%

1 2

PR303

B+

2 2

3 3

PL301

HCB2012KF-121T50_0805

1 2

B++

12

PC301

2200P_0402_50V7K

+3VALWP

12

PC303

4.7U_0805_25V6-K

4.7UH_SIQB74B-4R7PF_4A_20%

1

+

PC309

2

ENTRIP26,37ENTRIP137

PQ301

PQ301 AO4466_SO8

AO4466_SO8

PL302

PQ303

PQ303 AO4466_SO8

AO4466_SO8

150U_D_6.3VM

+3VLP

578

UG1_3V

PR309

0_0402_5%

3 6

241

12

3 6

241

0_0402_5%

1 2

578

12

PC306

10U_0805_6.3V6M

1 2

PC307

0.1U_0402_10V7K

LX_3V

LG_3V

PR307

1 2

0_0402_5%

PR303

20K_0402_1%

1 2

PR305

180K_0402_1%

1 2

PU301

25

P PAD

7

VO2

8

UG_3V

10

11

12

620K_0402_5%

VREG 3

9

VBST2

DRVH2

LL2

DRVL2

12

BST_3V BST_5V

PR311

2VREF_51125

13

D

PQ305

SSM3K7002FU_SC70-3

AC_IN21,33,38 EC_ON 33, 36

4 4

1 2

PR315

604K_0402_1%

2

G

S

PQ308

13

D

2

G

12

PC314

D

S

13

D

2

G

S

1 2

PR313

100K_0402_5%

13

PQ307

2

G

SSM3K7002FU_SC70-3

PQ306

PQ306 SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

VL

12

100K_0402_5%

100K_0402_5% PR314

PR314

+5VAL WP

+3VAL WP

PJP302

1 2

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP303

PJP303

1 2

PAD-OPEN 4x4m

Security Classification

0.022U_0603_25V7K

A

http://laptop-motherboard-schematic.blogspot.com/

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

C

Compal Secret Data

Dec iphere d Dat e

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

3.3VALWP/5VALWP

LA-4091P

E

of

39 52Thursday, November 08, 2007

of

39 52Thursday, November 08, 2007

of

39 52Thursday, November 08, 2007

0.1

A

1 1

PR401

0_0402_5%

SYSON

,34,36

2 2

3 3

1 2

12

PC401

1000P_0402_50V7K@

+5VAL W

+5VALW

12

PR403

+1.8VP

PR406

0_0402_5%

PR403

316_0402_1%

12

PC411

PC411 1U_0603_10V6K

1U_0603_10V6K

+1.8VP

PR411

1 2

14.3K_0603_0.1%

1 2

PC413

PC413 10P_0402_50V8J@

10P_0402_50V8J@

PR409

10K_0603_0.1%

PR405

PR405 255K_0402_1%

255K_0402_1%

1 2

12

1

PU401

2

TON

EN_PSV

3

VOUT

4

V5FIL T

5

VFB

6

PGOOD

B

BST_1.8V

15

14

TP

VBST

DRVH

LL

TRIP

V5DRV

DRVL

GND7PGND

8

TPS51117RGYR_QFN14_3.5x3.5

1 2

PR404

0_0402_5%

DH_1.8V_1

13

LX_1.8V

12

11

+5VAL W

10

DL_1.8V

9

PC407

1 2

0.1U_0402_10V7K

12

1 2

PR407

PR407 0_0402_5%

0_0402_5%

1 2

12.1K_0402_1%

PC415

4.7U_0805_10V6K

PR408

DH_1.8V

578

3 6

578

3 6

241

C

PQ401

PQ401 AO4466_SO8

AO4466_SO8

PQ402

PQ402 FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

1.8V_B+

4.7U_0805_25V6-K

PC406

12

2.2UH_PCMC063T-2R2MN_8A_20%

1 2

12

PR410

4.7_1206_5%@

PC410

680P_0603_50V7K@

1 2

4.7U_0805_25V6-K

PC403

12

PL402

PL401

HCB1608KF-121T30_0603

1 2

2200P_0402_50V7K

PC404

12

1

+

PC409

220U_6.3VM_R15

2

+1.8VP

D

B+

12

PC405

PC405 @680P_0402_50V7K

@680P_0402_50V7K

4 4

+1.8VP

A

PJP401

1 2

PAD-OPEN 4x4m

(7A,280mils ,Via NO.= 14)

+1.8V

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

http://laptop-motherboard-schematic.blogspot.com/

B

2007/05/29 2008/05/29

Compal Secret Data

Dec iphere d Dat e

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.8VP

LA-4091P

D

of

40 52Thursday, November 08, 2007

of

40 52Thursday, November 08, 2007

of

40 52Thursday, November 08, 2007

0.1

5

4

3

2

1

D D

B+++

12

PC501

PC516

4.7U_0805_25V6-K

C C

+1.1VSP

2.2UH_PCMC063T-2R2MN_8A_20%

+1.1VSP

1

12

+

PC508

220U_D2_4VM

B B

2

PC509

4.7U_0805_6.3V6K

12

PC502

2200P_0402_50V7K

4.7U_0805_25V6-K

PL501

FDS6690AS_NL_SO8

PQ501

AO4466_SO8

12

PQ503

578

3 6

241

578

3 6

241

SUSP#26,29,33, 36,38

+1.1VSP

1.1VS_POK

0.022U_0603_25V7K

PC506

0.1U_0402_10V7K

UG1_1.1V

21K_0402_1%

12

PR513

0.1U_0402_10V7K

PR506

PR506 0_0402_5%

0_0402_5%

12

PC513

11.5K_0402_1%

1 2

PC503

12

PR5080_0402_5% PR5080_0402_5%

PR501

12

BST_1.1V

UG_1.1V

LX_1.1V

LG_1.1V

1U_0603_10V6K

PR502

24.9K_0402_1%

1 2

PU501

25

P PAD

7

PGOOD2

8

EN2

9

VBST2

10

DR VH2

11

LL2

12

DR VL2

PR511

19.1K_0402_1%

1 2

12

PC514

PR505

0_0402_5%

6

VO2

PGND2

13

1 2

PR514

3.3_0402_5%

5

VFB2

TRIP2

14

1 2

4

TONSEL

V5FILT

15

PR503

18.7K_0402_1%

3

2

1

VO1

GND

VFB1

PGOOD1

EN1

VBST1

DR VH1

LL1

DR VL1

TRIP1

V5IN

PGND1

TPS51124RGER_QFN24_4x4

17

16

18

12

PR510

19.1K_0402_1%

+5VAL W

12

PC515

4.7U_0805_10V6K

12

24

23

22

21

20

19

BST_1.2V

UG_1.2V

LX_1.2V

LG_1.2V

PR504

11.5K_0402_1%

12

1 2

12

0_0402_5%

PR512

0_0402_5%

PC512

0.1U_0402_16V7K@

PR507

PR509

0_0402_5%

+1.2VALWP

12

PC507

0.1U_0402_10V7K

1 2

UG1_1.2V

3/5V_OK 39

PQ502

AO4466_SO8

PQ504

AO4466_SO8

B+++

HCB2012KF-121T50_0805

578

3 6

241

3.3UH_SIQB74B-3R3PF_5.9A_20%

578

3 6

241

PL502

12

PC504

4.7U_0805_25V6-K

PL503

1 2

4.7U_0805_6.3V6K

12

PC510

12

B+

PC505

2200P_0402_50V7K

+1.2VALWP

1

+

1 2

2

PC511

PC511 220U_6.3VM_R15

220U_6.3VM_R15

PJP501

5

1 2

PAD-OPEN 4x4m

PJP502

1 2

PAD-OPEN 4x4m

+1.1VSP

+1.2VALWP

A A

(6A,240mils ,Via NO.=12)

+1.1VS

(4A,160mils ,Via NO.=8)

+1. 2VALW

http://laptop-motherboard-schematic.blogspot.com/

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/05/29 2008/05/29

3

Compal Secret Data

Dec iphere d Dat e

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

1.1VSP/1.2VALWP

LA-4091P

1

of

41 52Thursday, November 08, 2007

of

41 52Thursday, November 08, 2007

of

41 52Thursday, November 08, 2007

0.1

5

D D

4

3

2

1

+1.8V

PU601

VIN1VCNTL

12

PC601

10U_0805_10V4Z

SYSON#35, 36

SUSP36

C C

B B

+0.9VP

+2.5VSP

+1.5VSP

PJP601

1 2

PAD-OPEN 3x3 m

PAD-OPEN 3x3 m PJP602

PJP602

1 2

PAD-OPEN 3x3 m

PJP603

1 2

PAD-OPEN 3x3 m

(2A,80mils ,Via NO.= 4)

+0.9V

(500mA,40mils ,Via NO.= 1)

+2.5VS

(1A,40mils ,Via NO.= 2)

+1.5VS

0_0402_5%

@

0_0402_5%

1 2

PR602

PQ601

SSM3K7002FU_SC70-3

PR604

12

PC606

0.1U_0402_16V7K@

2

+3VS

12

PC602

PR601

1K_0402_1%

@10U_0805_10V4Z

12

PR603

13

D

1K_0402_1%

G

S

12

PC607

1U_0603_6.3V6M

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC605

PC605 10U_0805_6.3V6M

10U_0805_6.3V6M

PC604

0.1U_0402_16V7K

(500mA,40mils ,Via NO.= 1)

PU602

PU602 APL5508-25DC-TRL_SOT89-3

APL5508-25DC-TRL_SOT89-3

2

IN

OUT

GND

1

3

+0.9VP

6

5

NC

7

NC

8

NC

9

TP

12

PC603

PC603 1U_0603_16V6K

1U_0603_16V6K

+5VALW

SUSP36

+2.5VSP

12

PR605

PR605 150_1206_5%@

150_1206_5%@

PC608

4.7U_0805_6.3V6K

PC613

10U_0805_10V4Z

SSM3K7002FU_SC70-3

1 2

PR608

0_0402_5%

+1.8V

PU603

VIN1VCNTL

12

PC609

PR606

PR606 1K_0402_1%

1K_0402_1%

10U_0805_10V4Z

@

VREF1.5V

PQ602

12

PC610

0.1U_0402_16V7K@

12

PR607

13

D

5.1K_0402_1%

2

G

S

2

GND

3

VREF

4

VOUT

G2992F1U_SO8

12

PC614

PC614 10U_0805_6.3V6M

10U_0805_6.3V6M

0.1U_0402_16V7K

PC611

NC

TP

+1.5VSP

6

5

7

8

9

12

PC612

PC612 1U_0603_16V6K

1U_0603_16V6K

+5VALW

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHE ET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/11/23 2007/11/23

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

0.9VSP/2.5VSP/1.5VSP

Size Document Number Rev

Date: Sheet of

Date: Sheet

2

Date: Sheet

LA-4091P

42 52Thursday, November 08, 2007

1

42 52Thursday, November 08, 2007

0.2

of

http://laptop-motherboard-schematic.blogspot.com/

5

+CPU_CORE_NB

VDD_NB_FB _H6

2_0402_5%

1 2

0.1U_0603_25V7K

1 2

PR212

0_0402_5%

1 2

PR213

0_0402_5%@

1 2

PR215

10K_0402_5%@

0_0402_5%

PR224

1 2

100K_0402_1%

PR232

1 2

6.81K_0402_1%

1 2

PC228

PC228 1000P_0402_50V7K

1000P_0402_50V7K

PR235 0_0402_5%P R235 0_0402_5%

PR237 0_0402_5%P R237 0_0402_5%

PR239 0_0402_5%PR239 0_0402_5%

PR241 0_0402_5%PR241 0_0402_5%

VDD_NB_FB _L6

+5VS

PR208

SVD

SVC

1 2

22K_0402_1%

1 2

1000P_0402_50V7K

PR205

2_0402_5%

1 2

0.1U_0402_16V7K

12

PC216

1

2

3

4

5

6

7

8

9

10

11

12

PR204

1 2

PC205

PC207

PU201

OFS/VFIXEN

PGOOD

PWROK

SVD

SVC

ENABLE

RBIAS

OCSET

VDIFF0

FB0

COMP0

VW0

D D

CPU_B+

+5VS

+3VS

C C

VGATE33

SB_PWRGD6,20, 33

CPU_SVD6

CPU_SVC6

VR_ON33

PR225

1 2

255_0402_1%

1 2

1K_0402_1%

PR230

1 2

54.9K_0402_1%

PC227

B B

PC227 180P_0402_50V8J

180P_0402_50V8J

CPU_VDD0_FB _H6

CPU_VDD0_FB _L6

CPU_VDD1_FB _L6

CPU_VDD1_FB _H6

1 2

4700P_0402_25V7K

PR227

1 2

1200P_0402_50V7K

1 2

PC223

PC225

PR216

10K_0402_1%

12

1 2

PR222

1 2

PR223

1 2

17.8K_0402_1%

PR218

0_0402_5%

12

48

VIN

ISP0

13

ISP 0

VSEN0

12

PC238

PC238 1000P_0402_50V7K

1000P_0402_50V7K

@

RTN0

RTN1

12

PC239

PC239 1000P_0402_50V7K

1000P_0402_50V7K

@

VSEN1

4

12

PC209

33P_0402_50V8K

12

46

45

47

VCC

FB_NB

COMP_NB

ISL6265IRZ-T_QFN48_6X6

RTN016ISN0

15

14

+CPU_CORE_0

PC208

1200P_0402_50V7K

PR210

44.2K_0402_1%

44

12

PR206 0_0402_5%PR206 0_0402_5%

VSEN_NB

43

FSET_NB

18

VSEN_NB

12

PR209 0_0402_5%PR209 0_0402_5%

RTN_NB

42

RTN_NB

VDIFF119RTN117VSEN0

4.7UH_SIQB74B-4R7PF_4A _20%

1

12

+

2

PC201

10U_0805_6.3V6M

12

PR207

11.3K_0402_1%

PHASE NB

LGATE NB

38

39

41

40

PGND_NB

LGATE_NB

PHASE_NB

OCSET_NB

VW1

COMP121ISP1

FB120VSEN1

22

23

PL201

PC202

PC202 220U_B2_2.5VM

220U_B2_2.5VM

0.1U_0603_16V7K

1_0603_5%

UGATE NB

37

BOOT_NB

UGATE_NB

BOOT0

UGATE0

PHASE0

PGND0

LGATE0

PVCC

LGATE1

PGND1

PHASE1

UGATE1

BOOT1

ISN1

TP

24

49

12

PC206

PR211

36

35

34

33

32

31

30

29

28

27

26

25

+CPU_CORE_1

ISP 1

12

BOOT_NB1

12

BOOT_NB

BOOT0

UGATE0

PHASE0

LGATE0

LGATE1

PHASE1

UGATE1

BOOT1

1000P_0402_50V7K

PR236

6.81K_0402_1%

1 2

PR228

2.2_0603_5%

PC230

12

3

1 2 3 6

2.2_0603_5%

2.2_0603_5% PR214

PR214

1 2

0_0603_5%

PR226

1 2

0_0603_5%

1 2

PC224

0.22U_0603_10V7K

12

1200P_0402_50V7K

4700P_0402_25V7K

PQ201

AO4466_SO8

4

LGATE NB

+5VS

12

PC210

2.2U_0603_6.3V6K

0.22U_0603_10V7K

0.22U_0603_10V7K PC217

PC217

1 2

PR219

PQ204

AO4456_SO8

PC231

180P_0402_50V8J

12

PC232

1K_0402_1%

12

PC233

8 7

5

PQ207

AO4456_SO8

12

PR238

54.9K_0402_1%

PR240

PR243

255_0402_1%

AO4466_SO8

1 2 3 6

PR203

0_0402_5%

PHASE NB

UGATE NB

UGATE0_1

578

3 6

241

UGATE1_1

578

3 6

241

12

4

1 2

PQ202

5

4

578

3 6

5

4

578

8 7

5

PC203

PC203 2200P_0402_50V7K

2200P_0402_50V7K

PQ203

D8D7D6D

SI4684DY-T1-E3_SO8

S1S2S3G

PQ205

AO4456_SO8

241

PQ206

D8D7D6D

SI4684DY-T1-E3_SO8

S1S2S3G

PQ208

3 6

241

AO4456_SO8

2

CPU_B+

12

PC204

4.7U_0805_25V6-K

CPU_B+

SMB3025500YA_2P

12

PC213

4.7U_0805_25V6-K

PL203

PR217

4.02K_0402_1%

1 2

12

2200P_0402_50V7K

12

4.02K_0402_1%

1 2

ISP 1

12

PR233

PL204

12

PC214

2200P_0402_50V7K

12

PC236

PC237

4.7U_0805_25V6-K

12

PR220

4.7_1206_5%

@

12

PC235

4.7U_0805_25V6-K

12

PC218

0.1U_0603_25V7K

680P_0603_50V8J

@

12

PC220

12

PR229

4.7_1206_5%@

12

PC226

680P_0603_50V8J@

0.1U_0603_25V7K

12

PC234

PC212

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

12

PR221

16.5K_0402_1%

PC219

ISP 0

12

PC222

PC221

4.7U_0805_25V6-K

0.36UH_PCMC104T-R36MN1R17_30A_20%

PR231

16.5K_0402_1%

PC229

CPU_B+

4.7U_0805_25V6-K

PL202

12

1

PC211

@47U_25V_M

1

+

2

+CPU_CORE_0

+CPU_CORE_1

B+

12

PC215

1000P_0402_50V7K

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERI NG DRAWI NG IS THE PROPR IETARY PROPERT Y OF COMPAL ELECTR ONICS, IN C. AND CON TAINS CONF IDENTIAL

THIS SHEET OF ENGINEERI NG DRAWI NG IS THE PROPR IETARY PROPERT Y OF COMPAL ELECTR ONICS, IN C. AND CON TAINS CONF IDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

http://laptop-motherboard-schematic.blogspot.com/

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/11/23 2007/11/23

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Titl e

+CPU_CORE

Size Doc ument Number Rev

Date: Sheet

2

Date: Sheet

LA-4091P

43 52Thursday, November 08, 2007

1

0.2

of

A

B

Version Change List ( P. I. R. List ) for Power Circuit

C

D

E

Page#

1

1 1

Title

Date

10/231.8VP for power requsetCompal40

Request Owner

Solution Description

PU401 change the IC from "S IC RT8204PQW WQFN 16P" to "S IC TPS51117RGYR QFN 14P".

Rev.Issue DescriptionItem

2 38 Charger 10/30 Compal for power requset PQ104 swap the PQ104 1,3 Pin

3 39 3V/5V 10/30 Compal for power requset Change PR301 to 13.7K modify output voltage

4 39 3V/5V 10/30 Compal for power requset Change PR305 to 180K modify OCP

5 39 3V/5V 10/30 Compal for power requset Change PR306 to 150K modify OCP

6 39 3V/5V 10/30 Compal for power requset Change PR311 to 620K

7 39 3V/5V 10/30 Compal for power requset Change PR315 to 604K modify sequence

41 +1.1VSP 10/30 Compal for power requset Change PR510 to 19.1K modify OCP

8

2 2

41 +1.2VALWP 10/30 Compal for power requset Change PR511 to 19.1K modify OCP9

38 Charger 10/3010 Compal for power requset Del PR119

11 43 CPU_CORE 10/30 Compal for power requset Change PC202 to B2 type for ME limit

43 CPU_CORE 10/30 Compal for power requset Change PR223 to 17.8K and PR224 to 100K modify OCP12

13

43 CPU_CORE 10/30 Compal for power requset Change PR221,PR231 to 16.5K and PR217,PR233 to 4.02K

for CPU_CORE compensation

14 37 DC connector 10/30 Compal for power requset Add PR3,PD4,PC12 for ADP_ID function

15

39 3V/5V 10/30 Compal for power requset Add PR317,PR318

38 Charger 10/30 Compal for power requset Change net from +3VLP to +3VL16

3 3

41 +1.1VSP 10/3017 Compal for power requset Change PR513 to 21K for HW power scquence.

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECT RONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECT RONICS, INC.

C

2007/08/02 2008/08/02

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Numbe r Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Power Changed-List History-1

LA-4111P

E

of

44 52Thursday, November 08, 2007

0.1

http://laptop-motherboard-schematic.blogspot.com/

5

4

3

2

1

HW4 Product Improvement Record (P.I.R.)

D D

C C

B B

ZZZ2

RTC

RTC45@

ZZZ

PCB

PCB 03X LA-4091P REV0 M/B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

http://laptop-motherboard-schematic.blogspot.com/

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

Compal Secret Data

Dec iphere d Dat e

Compal Electronics, Inc.

Title

2008/5/182007/5/18

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

PIR

45 53Thursday, November 08, 2007

1

0.1

of

HP DV7 AMD Schematics

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Frequently Asked Questions

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