HP dv5 1222er Schematics

http://mycomp.su/x/
1
2
3
4
5
6
7
8
PCB STACK UP
LAYER 1 : TOP LAYER 2 : SGND
AA
LAYER 3 : IN1 LAYER 4 : IN2 LAYER 5 : VCC LAYER 6 : IN3 LAYER 7 : SGND1 LAYER 8 : BOT
Docking
RJ-45 CIR/Pwr btn SPDIF Out
VGA
BB
Stereo MIC Headphone Jack USB Port
PAGE 37
VOL Cntr
X1
LAN
Realtek PCIE-LAN
RTL8102E/8111C
(10/100/GagaLAN)
PAGE 31,32
RJ45
PAGE 31
SYSTEM CHARGER(ISL6251A)
PAGE 44
SYSTEM POWER ISL6236IRZA-T
PAGE 38
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116REGR)
CC
VCCP +1.1V AND +1.2V(MAX8717)
PAGE 41
PAGE 39
VGACORE(1.1V~1.2V)Oz8118
PAGE 42
CPU CORE ISL6265A
PAGE 40
SMBUS TABLE
Clock gen/Robson/TV tuner
SB--SCL0/SD0
DD
EC --SCL/SD
EC--SCL2/SD2
/DDR2/DDR2 thermal/Accelerometer
epress card Wlan Card
Battery charge/discharge
VGA thermal/system thermal
1
2
DDRII-SODIMM1
PAGE 7,8
DDRII-SODIMM2
PAGE 7,8
Express Card
(NEW CARD)
TWO SATA - HDD
PAGE 33
SATA - CD-ROM
PAGE 33
E-SATA
PAGE 30
Accelerometer
LIS3LV02DL
Keyboard Touch Pad
CIR (AUDIO CONN)
Capacitive Sense
+3V
+3VS5
+3VPCU
+3V
SW
X1
PAGE 33
PAGE 28
PAGE 34 PAGE 34
PAGE 27
DDRII 667/800 MHz
DDRII 667/800 MHz
X3
Mini PCI-E Card
(Wireless LAN/TV TUNNER)
PAGE 36
SATA0,1 150MB
SATA0 150MB
SATA4 150MB
PAGE 34
3
PCI-E
SMBUS
ENE KBC
KB3926 Cx
FAN
PAGE 37
AMD Griffin
S1G2 Processor
638P (uPGA)/35W
PAGE 3,4,5,6
HT3
NORTH BRIDGE
RX781
21mm X 21mm, 528pin BGA
PAGE 8,9,10,11,
ALINK X4
A13
Lion Sabie
CPU THERMAL SENSOR
PAGE 5
PCI-Express 16X
HDMICable
PAGE 23
CRT
PAGE 24
LVDS
PAGE 23
CPU_CLK NBGFX_CLK NBGPP_CLK SBLINK_CLK
M86-ME
64 Bit,DDR2*4
PAGE 17,18,19
20,21,22,23
SBSRC_CLK
USB2.0
SOUTH BRIDGE
1,8,9
PAGE 30PAGE 30
X3
5
BlueflameUSB2.0 Ports
Webcam X1
SB700 A12
21mm X 21mm, 528pin BGA
4.5W(Ext)
4.3W(Int)
PAGE 12,13.14.15.16PAGE 27
LPC
MDC CONN
PCIE BUS
Azalia
IDT 92HP61B7
PAGE 27
PAGE 29
AUDIO Amplifier TPA6017A2
PAGE 35
SPI
AUDIO CONNDigital MIC
(Phone/ MIC)
PAGE 27PAGE 30
PAGE 28
Audio
Conn
PAGE 28
PAGE 35
4
5
6
JMICRON JMD380 for Discrete only
IEEE1394 connect for Discrete only
2
PAGE 30
Fingerprint
Memory CardReader
PAGE 25PAGE 26
14.318MHz
CLOCK GEN
ICS9LPRS476AKLFT-->HP SLG8SP626VTR-->HP RTM880N-795 -->HP
10
PCI-E WLAN Card x1
11
TV-TUNER Card x1
7
Express Card x1
4
Cable Docking x1
6
PAGE 30
3
Flash Media for UMA only RTS5158
PAGE 25
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
Block Diagram
Date:Sheet of
7
QT8G SYSTEM DIAGRAM
01
PAGE 2
PAGE 36
PAGE 36
PAGE 33
PAGE 37
Touch Screen for Discrete only
146Friday, August 29, 2008
8
1A
http://mycomp.su/x/
5
4
3
2
1
L61
+1.2V
BLM18PG181SN1D(180,1.5A)_6
600 ohms@100Mhz
DD
+3V
CC
BB
AA
DCR: 0.5 ohm
600 ohms@100Mhz
L63
BLM18PG181SN1D(180,1.5A)_6
can remove MOSFET level shift SB/clock gen / DDR2 is 3.3V/S0 power level
C885*10P/50V_4 C472*10P/50V_4 C476*10P/50V_4 C482*10P/50V_4 C488*10P/50V_4
60 ohm, 0.5A
C535
10U/6.3V_8
+3V_CLKVDD
C554
10U/6.3V_8
+3V_CLKVDD
BLM18PG181SN1D(180,1.5A)_6
CHIPSET_PCIE_SLOW_SB#14
when driven low to reduced setpoint
EXT_NB_OSC CLK_48M_USB CLK_48M_CR EVGA-XTALI OSC_SPREAD
5
C530
0.1U/10V_4
60 ohm, 0.5A
C480
0.1U/10V_4
0.1U/10V_4
L54
10U/6.3V_8
C47433P/50V_4
C47333P/50V_4
C508
0.1U/10V_4
C481
C524
0.1U/10V_4
Place very close to C/G
C471
Y2
14.318MHZ
1 2
PCLK_SMB6,7,13,29,37 PDAT_SMB6,7,13,29,37
D17*CH501H-40PT L-F
SB_SRC clocks slow
custom CG IC
+3V
if use clock request pin , need to pull Hi for default sttting
+1.2V_CLKVDDIO
C538
0.1U/10V_4
0.1U/10V_4
+3V_CLKVDD
C534
0.1U/10V_4
+3V_CLK_VDDA
0.1U/10V_4
+3V_CLK_VDDA
0.1U/10V_4
CG_XIN
CG_XOUT
21
R260*8.2K_4 R240*8.2K_4 R250*8.2K_4 R253*8.2K_4
C520
0.1U/10V_4
0.1U/10V_4
C486
C501
C533
0.1U/10V_4
C493
C478
+3V_CLKVDD
+1.2V_CLKVDDIO
CG_XIN CG_XOUT
CLK_PD#
PCLK_SMB PDAT_SMB
SB_SRC_SLOW#
only supported with
CLKREQ0# CLKREQ2# CLKREQ3# CLKREQ4#
4
C527
0.1U/10V_4
0.1U/10V_4
49 48
62 66
69 29 54 61 38 17 44
53 28 37 12 18
72 27
52 58 47 36 11 19
67 68
57
41
73 74 75
C483
0.1U/10V_4
U13A
VDDA GNDA
VDDREF GNDREF
VDD48 VDDATIG VDDCPU VDDHTT VDDSB_SRC VDDSRC VDDSATA
3
VDDDOT VDDCPU_IO
VDDATIG_IO VDDSB_SRC_IO VDDSRC_IO1 VDDSRC_IO2
GND48 GNDATIG1
6
GNDDOT GNDCPU GNDHTT GNDSATA GNDSB_SRC GNDSRC1 GNDSRC2
X1 X2
PD#
1
SMBCLK
2
SMBDAT
SB_SRC_SLOW#
SLG8SP626VTR
eGND73 eGND74 eGND75
U13B
SLG8SP626VTR
C479
THERMAL GND
C477
0.1U/10V_4
CPUKG0T_LPRS CPUKG0C_LPRS
ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS ATIG2T_LPRS ATIG2C_LPRS
SB_SRC0T_LPRS SB_SRC0C_LPRS SB_SRC1T_LPRS SB_SRC1C_LPRS
SRC0T_LPRS
SRC0C_LPRS
SRC1T_LPRS
SRC1C_LPRS
SRC2T_LPRS
SRC2C_LPRS
SRC3T_LPRS
SRC3C_LPRS
SRC4T_LPRS
SRC4C_LPRS
SRC5T_LPRS
SRC5C_LPRS
SRC6T/SATAT_LPRS
SRC6C/SATAC_LPRS
SRC7T_LPRS/27Mhz_SS
SRC7C_LPRS/27Mhz_NS
HTT0T/66M_LPRS
HTT0C/66M_LPRS
48MHz_0 48MHz_1
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#
eGND77 eGND76 eGND78
CLK_VGA_27M_SS CLK_VGA_27M_NSS
56 55
33 32 31 30 26 25
40 39 35 34
23 22 21 20 16 15 14 13 10 9 8 7 46 45 5 4
60 59 71 70
65 64 63
24 51 50 43 42
77 76 78
ICSICS9LPR476BKLFT--AJRS4760000
SLG8SP626VTR--AJ006260000
SLG
RTM880N-795-- AJ008800000RTL
* default
SEL_HTT66
SEL_SATA
SEL_271027MHz non-spreading singled clock
66 MHz 3.3V single ended HTT clock
1
*01100 MHz differential HTT clock
100 MHz non-spreading differential SRC clock
100 MHz spreading differential SRC clock
*0 *
100 MHz spreading differential SRC clock
3
NBGFX_CLKP NBGFX_CLKN
EXT_GFX_CLKP EXT_GFX_CLKN
NBGPP_CLKP NBGPP_CLKN
SBLINK_CLKP SBLINK_CLKN RP72 STUFFRP72 STUFF
CPUCLKP CPUCLKN
NBGFX_CLKP NBGFX_CLKN
EXT_GFX_CLKN EXT_GFX_CLKN
CLK_PCIE_CARD CLK_PCIE_CARD# CLK_PCIE_CARD#
PCIE_NEW_CLKP PCIE_NEW_CLKN PCIE_MINI1_CLKP PCIE_MINI1_CLKN
SBSRC_CLKP SBSRC_CLKP SBSRC_CLKN SBSRC_CLKN
PCIE_LAN_CLKN
CLK_VGA_27M_NSS
NBHTREFCLK0P NBHTREFCLK0N CLK_48M_CR_L
CLK48MUSB SEL_HT66SEL_HT66SEL_HT66SEL_HT66 SEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATASEL_SATA SEL_27
CLKREQ0# EXT_NWD_CLK_REQ# CLKREQ2# CLKREQ3# CLKREQ4#
RX780RS780CLOCKS name
RP64 STUFF
RP66 STUFFto M82-S external reference clock -RX780 only
RP64 STUFF
RP66 NC
RP70 STUFF RP70 NC
to NB for VGA reference clock
to NB for RX780 for PCIEX2 interface reference clock only RS780 is internal share with AC-LINK clock,RS780 not need
to NB for AC-LINK reference clock
R653,R656,R612 STUFF
RP30*0_4P2R_4
RP38*0_4P2R_4 RP37*0_4P2R_4
RP34*0_4P2R_4 RP39*0_4P2R_4
RP36*0_4P2R_4 RP35*0_4P2R_4 RP33*0_4P2R_4 RP32*0_4P2R_4 RP31*0_4P2R_4
R23133_4 R22875/F_4 R227100/F_4
RP41*0_4P2R_4
T40
Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.
R653,R656,R612 NC
Place within 0.5" of CLKGEN
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
R21233_4 R20333_4
R200*82.5/F_4 R201*130/F_4
PV stage Change to RP
1
1 2
EXT_NWD_CLK_REQ#34
+3V_CLKVDD
R204 *8.2K_4
R214
*8.2K_4
To M82-S 27Mhz - RX780 only
R208*261_4
CPUCLKP CPUCLKN
NBGFX_CLKP NBGFX_CLKN EXT_GFX_CLKPEXT_GFX_CLKP
PCIE_MINI2_CLKPPCIE_MINI2_CLKP PCIE_MINI2_CLKNPCIE_MINI2_CLKN CLK_PCIE_CARD
PCIE_NEW_CLKP PCIE_NEW_CLKN PCIE_MINI1_CLKP PCIE_MINI1_CLKN SBLINK_CLKPSBLINK_CLKP SBLINK_CLKNSBLINK_CLKN
PCIE_LAN_CLKPPCIE_LAN_CLKP PCIE_LAN_CLKN
OSC_SPREADCLK_VGA_27M_SS
NBHTREFCLK0P
NBHTREFCLK0N CLK_48M_CR CLK_48M_USB
R206
8.2K_4
R213 *8.2K_4
RS780M/RX780M
SEL_27 SEL_SATA SEL_HT66
2
Clock pin function
CPUCLKP3 CPUCLKN3
NBGFX_CLKP10 NBGFX_CLKN10 EXT_GFX_CLKP17 EXT_GFX_CLKN17
PCIE_MINI2_CLKP37 PCIE_MINI2_CLKN37 CLK_PCIE_CARD27 CLK_PCIE_CARD#27
PCIE_NEW_CLKP34 PCIE_NEW_CLKN34 PCIE_MINI1_CLKP37 PCIE_MINI1_CLKN37 SBLINK_CLKP10 SBLINK_CLKN10 SBSRC_CLKP12 SBSRC_CLKN12 PCIE_LAN_CLKP32 PCIE_LAN_CLKN32
OSC_SPREAD18 EVGA-XTALI18
NBHT_REFCLKP10
NBHT_REFCLKN10 CLK_48M_CR26 CLK_48M_USB13
EXT_SB_OSC12
1.2V
to NB for external Graphics reference clock to M82-S -RX780 only
to TV TUNER CARD to PCIE-CARD READER
to EPRESS CARD to WLAN to NB for AC-LINK reference clock to SB to PCIE-LAN
SI-1 Modified --remove
SSIN - for M82 - 3.3V level input X_TALIN --for M82 -1.8V level input
R194158/F_4 R19290.9/F_4
1 2
to ROBSON
Ra
Rb
RS780RX780
1.8V
82.5RRa
130R
Rb
RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15 RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00 RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15 RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11
EXT_NWD_CLK_REQ# CLK_PD# SB_SRC_SLOW#
1.1V
158R
90.9R
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
Clock Generator
Date:Sheet of
1
02
EXT_NB_OSC10
+3V
R2338.2K_4 R2178.2K_4 R2558.2K_4
1A
246Friday, August 29, 2008
http://mycomp.su/x/
5
PV change to use short pad
+1.2V +1.2V_VLDT
R414*0_8/S R413*0_8/S
DD
HT_NB_CPU_CAD_H[15..0]8 HT_NB_CPU_CAD_L[15..0]8 HT_NB_CPU_CLK_H[1..0]8 HT_NB_CPU_CLK_L[1..0]8 HT_NB_CPU_CTL_H[1..0]8 HT_NB_CPU_CTL_L[1..0]8 HT_CPU_NB_CAD_H[15..0]8 HT_CPU_NB_CAD_L[15..0]8 HT_CPU_NB_CLK_H[1..0]8 HT_CPU_NB_CLK_L[1..0]8
CC
HT_CPU_NB_CTL_H[1..0]8 HT_CPU_NB_CTL_L[1..0]8
FOX PZ63826-284R-41F DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) MLX 47296-4131 DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) TYC 4-1903401-2 DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)
+1.2V_VLDT
HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0]
HT_NB_CPU_CLK_H[1..0]
HT_NB_CPU_CLK_L[1..0]
HT_NB_CPU_CTL_H[1..0]
HT_NB_CPU_CTL_L[1..0] HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CTL_L[1..0]
C7324.7U/6.3V_6 C7334.7U/6.3V_6 C7350.22U/6.3V_4 C734180P/50V_4
HT_NB_CPU_CAD_H0 HT_NB_CPU_CAD_L0 HT_NB_CPU_CAD_H1 HT_NB_CPU_CAD_L1 HT_NB_CPU_CAD_H2 HT_NB_CPU_CAD_L2 HT_NB_CPU_CAD_H3 HT_NB_CPU_CAD_L3 HT_NB_CPU_CAD_H4 HT_NB_CPU_CAD_L4 HT_NB_CPU_CAD_H5 HT_NB_CPU_CAD_L5 HT_NB_CPU_CAD_H6 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_H8 HT_NB_CPU_CAD_L8 HT_NB_CPU_CAD_H9 HT_NB_CPU_CAD_L9 HT_NB_CPU_CAD_H10 HT_NB_CPU_CAD_L10 HT_NB_CPU_CAD_H11 HT_NB_CPU_CAD_L11 HT_NB_CPU_CAD_H12 HT_NB_CPU_CAD_L12 HT_NB_CPU_CAD_H13 HT_NB_CPU_CAD_L13 HT_NB_CPU_CAD_H14 HT_NB_CPU_CAD_L14 HT_NB_CPU_CAD_H15 HT_NB_CPU_CAD_L15
HT_NB_CPU_CLK_H0 HT_NB_CPU_CLK_L0 HT_NB_CPU_CLK_H1 HT_NB_CPU_CLK_L1
HT_NB_CPU_CTL_H0 HT_NB_CPU_CTL_L0 HT_NB_CPU_CTL_H1 HT_NB_CPU_CTL_L1
BLM21PG221SN1D(220,100M,2A)_8
+2.5V
C429
10U/6.3V_8
+1.2V_VLDT +1.2V_VLDT +1.2V_VLDT +1.2V_VLDT
L45
LS0805-100M-N
U32A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
SOCKET_638_PIN
4
HT LINK
+CPUVDDA
C397
4.7U/6.3V_6
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
3
W/S= 15 mil/20mil
C377
C392
0.22U/6.3V_4
3300P/50V_4
+1.2V_VLDT
AE2
+1.2V_VLDT
AE3
+1.2V_VLDT CPU_SVC_R
AE4
+1.2V_VLDT
AE5
HT_CPU_NB_CAD_H0
AD1
HT_CPU_NB_CAD_L0
AC1
HT_CPU_NB_CAD_H1
AC2
HT_CPU_NB_CAD_L1
AC3
HT_CPU_NB_CAD_H2
AB1
HT_CPU_NB_CAD_L2
AA1
HT_CPU_NB_CAD_H3
AA2
HT_CPU_NB_CAD_L3
AA3
HT_CPU_NB_CAD_H4
W2
HT_CPU_NB_CAD_L4
W3
HT_CPU_NB_CAD_H5
V1
HT_CPU_NB_CAD_L5
U1
HT_CPU_NB_CAD_H6
U2
HT_CPU_NB_CAD_L6
U3
HT_CPU_NB_CAD_H7
T1
HT_CPU_NB_CAD_L7
R1
HT_CPU_NB_CAD_H8
AD4
HT_CPU_NB_CAD_L8
AD3
HT_CPU_NB_CAD_H9
AD5
HT_CPU_NB_CAD_L9
AC5
HT_CPU_NB_CAD_H10
AB4
HT_CPU_NB_CAD_L10
AB3
HT_CPU_NB_CAD_H11
AB5
HT_CPU_NB_CAD_L11
AA5
HT_CPU_NB_CAD_H12
Y5
HT_CPU_NB_CAD_L12
W5
HT_CPU_NB_CAD_H13
V4
HT_CPU_NB_CAD_L13
V3
HT_CPU_NB_CAD_H14
V5
HT_CPU_NB_CAD_L14
U5
HT_CPU_NB_CAD_H15
T4
HT_CPU_NB_CAD_L15
T3
HT_CPU_NB_CLK_H0
Y1
HT_CPU_NB_CLK_L0
W1
HT_CPU_NB_CLK_H1
Y4
HT_CPU_NB_CLK_L1
Y3
HT_CPU_NB_CTL_H0
R2
HT_CPU_NB_CTL_L0
R3
HT_CPU_NB_CTL_H1
T5
HT_CPU_NB_CTL_L1
R5
CPU CLK
CPUCLKP2 CPUCLKN2
Keep trace from resisor to CPU within 0.6" keep trace from caps to CPU within 1.2"
C8574.7U/6.3V_6 C8440.22U/6.3V_4 C854180P/50V_4
CPUCLKIN CPUCLKP
CPUCLKN
SideBand Temp sense I2C
+1.8VSUS
CPUCLKP CPUCLKN
R153169/F_4
C4203900P/25V_4 C4213900P/25V_4
+1.2V_VLDT
CPUCLKIN#
CPU_LDT_RST#12
CPU_PWRGD12
CPU_LDT_STOP#10,12
CPU_SIC5 CPU_SID5
CPU_ALERT5
R11644.2/F_4 R15244.2/F_4
CPU_VDD0_RUN_FB_H41 CPU_VDD0_RUN_FB_L41
CPU_VDD1_RUN_FB_H41 CPU_VDD1_RUN_FB_L41
R67300/F_4
+1.8VSUS
R109300/F_4 R55300/F_4 R425300/F_4
R420300_4
R123*510/F_4
R157*510/F_4
R464*0_4/S
PV stage change to short pad
2
+CPUVDDA
W/S= 15 mil/20mil
+CPUVDDA +CPUVDDA
CPUCLKIN CPUCLKIN#
CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU
CPU_SIC CPU_SID CPU_ALERT
CPU_HTREF0 CPU_HTREF1
place them to CPU within 1.5"
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
CPUTEST23
CPUTEST18
T24
CPUTEST19
T29
CPUTEST25H CPUTEST25L
CPUTEST21 CPUTEST20 CPUTEST24 CPUTEST22 CPUTEST12
T17
CPUTEST27
CPU_THERMDC CPU_THERMDA
CPU_LDT_RST# CPU_LDT_STOP# CPU_PWRGD CPU_LDT_REQ#_CPU
F8 F9
A9 A8
B7 A7
F10
C6
AF4 AF5
AE6
R6 P6
F6 E6
Y6
AB6
G10 AA9 AC9 AD9 AF9
AD7 H10
G9 E9
E8
AB8 AF7 AE7 AE8 AC8 AF8
C2
AA6
A3 A5 B3 B5 C1
U32D
VDDA1 VDDA2
CLKIN_H CLKIN_L
RESET_L PWROK LDTSTOP_L LDTREQ_L
SIC SID ALERT_L
HT_REF0 HT_REF1
VDD0_FB_H VDD0_FB_L
VDD1_FB_H VDD1_FB_L
DBRDY TMS TCK TRST_L TDI
TEST23 TEST18
TEST19 TEST25_H
TEST25_L TEST21
TEST20 TEST24 TEST22 TEST12 TEST27
TEST9 TEST6
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5
SOCKET_638_PIN
R158300_4 R156300_4 R160300_4 R478300_4
KEY1 KEY2
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC THERMDA
VDDIO_FB_H VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H TEST28_L
TEST17 TEST16 TEST15 TEST14
TEST7
TEST10
TEST8
TEST29_H TEST29_L
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
H_THRMDC5 H_THRMDA5
+1.8V
M11 W18
A6
CPU_SVD_R
A4
CPU_THERMTRIP_L#
AF6
CPU_PROCHOT_L#
AC7
CPU_MEMHOT_L#
AA8
CPU_THERMDC
W7
CPU_THERMDA
W8
W9 Y9
H6 G6
CPU_DBREQ#
E10
CPU_TDO
AE9
CPUTEST28H
J7
CPUTEST28L
H8
CPUTEST17
D7
CPUTEST16
E7
CPUTEST15
F7
CPUTEST14
C7 C3
K8 C4
CPUTEST29H
C9
CPUTEST29L
C8
H18 H19 AA7 D5 C5
1
PV stage delete R480,R481
SVC SVD
TDO
03
CPU_VDDNB_RUN_FB_H41 CPU_VDDNB_RUN_FB_L41
R149300/F_4
+1.8VSUS
T25 T26
T33 T32 T28 T36
T34 T38
CNTR_VREF
BB
AA
R48420K/F_4
+3V
Q47*BSS138_NL/SOT23
1
R482*0_4/S
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
R5410K/F_4
R61300_4
CPU_MEMHOT_L# CPU_MEMHOT#
R41810K/F_4
R417300_4
CPU_PROCHOT_L#
C8680.1U/10V_4
R48534.8K/F_4
CNTR_VREF
2
3
PV stage change to short pad
2
2
Q37
1 3
MMBT3904
5
Q10 MMBT3904
13
CPU_LDT_REQ#10
CNTR_VREF5
CPU_THERMTRIP_L#5
CPU_PROCHOT#12
PV change to remove R159
2
CPU_LDT_RST#
12
CPU_MEMHOT#7,13
+1.8VSUS
+1.8VSUS
G1 *SHORT_ PAD1
for debug only
1
R5610K/F_4
R419300_4
CPU_THERMTRIP_L#
4
+3V
3
Q48 BSS138_NL/SOT23
2
Q9 MMBT3904
1 3
R486 1K/F_4
CPU_LDT_RST_HTPA#CPU_LDT_REQ#_CPU
CPU_THERMTRIP#13
Serial VID
R162*2.2K_4 R4761K/F_4
+1.8VSUS
CPU_SVC_R CPU_SVD_R CPU_SVD CPU_PWRGD
R4771K/F_4 R465*0_4/S
R466*0_4/S R163*0_4/S
R473*220_4 R468*220_4
C26*0.1U/10V_4
HDT Connector
+1.8VSUS
CPU_DBREQ# CPU_DBRDY
3
CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
C54*0.1U/10V_4
11 12 13 14 15 16 17 18 19 20 21 22 23 24
PV stage change to short pad
CPU_SVC
CPU_PWRGD_SVID_REG
1 2 3 4 5 6 7 8 9 10
CPU_LDT_RST_HTPA#
25
KEY
CN6*HDT CONN
2
CPU_SVC41 CPU_SVD41 CPU_PWRGD_SVID_REG41
VFIX MODE
VID Override Circuit
SVCSVDVoltage Output
00 0
1 0
1
11
CPUTEST22 CPUTEST12 CPUTEST15 CPUTEST14 CPUTEST19 CPUTEST18
R60300/F_4 R106*300/F_4 R122*300/F_4 R150*300/F_4 R119*300/F_4 R121*300/F_4
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
S1G2 HT,CTL I/F 1/3
Date:Sheet of
1
1.4V
1.2V
1.0V
0.8V
1A
346Friday, August 29, 2008
http://mycomp.su/x/
A
B
C
D
E
+0.9VSMVTT +0.9VSMVTT
PLACE THEM CLOSE TO CPU WITHIN 1"
R42439.2/F_4
MEM_MA0_ODT06,7 MEM_MA0_ODT16,7
MEM_MA0_CS#06,7 MEM_MA0_CS#16,7
MEM_MA_CLK1_P6 MEM_MA_CLK1_N6 MEM_MA_CLK7_P6 MEM_MA_CLK7_N6
MEM_MA_BANK06,7 MEM_MA_BANK16,7 MEM_MA_BANK26,7
MEM_MA_RAS#6,7 MEM_MA_CAS#6,7 MEM_MA_WE#6,7
MEM_MA_CKE06,7 MEM_MA_CKE16,7
R42339.2/F_4
T27
A
+1.8VSUS
44
MEM_MA_ADD[0..15]6,7
33
22
11
M_ZP M_ZN
MEM_MA_RESET#
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MB_CLK7_P
MEM_MB_CLK7_N MEM_MB_CLK1_P
MEM_MB_CLK1_N
U32B
D10 C10 B10
AD10
AF10
AE10
H16
T19 V22 U21 V19
T20 U19 U20 V20
J22 J20
N19 N20
E16 F16 Y16
AA16
P19 P20
N21 M20 N22 M19 M22
L20
M24
L21 L19 K22 R21 L22 K20 V24 K24 K19
R20 R23
J21
R19
T22 T24
SOCKET_638_PIN
+0.9VSMVTT
4.7U/6.3V_6
+0.9VSMVTT
1000P/50V_4
C739
1.5P/50V_4
C376
1.5P/50V_4
VTT1
MEM:CMD/CTRL/CLK
VTT2 VTT3 VTT4
MEMZP MEMZN
RSVD_M1 MA0_ODT0
MA0_ODT1 MA1_ODT0 MA1_ODT1
MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1
MA_CKE0 MA_CKE1
MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4
MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15
MA_BANK0 MA_BANK1 MA_BANK2
MA_RAS_L MA_CAS_L MA_WE_L
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CKE0 MB_CKE1
MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
Place close to socket
C257
C35
4.7U/6.3V_6
C205
C262
1000P/50V_4
Close to CPU within 1500 mils
VTT5 VTT6 VTT7 VTT8 VTT9
C28
4.7U/6.3V_6
C169
1000P/50V_4
W10 AC10 AB10 AA10 A10
CPU_VTT_SENSE
Y10
MEMVREF_CPU
W17
MEM_MB_RESET#
B18 W26
W23 Y26
V26 W25 U22
J25 H26
P22 R22 A17 A18 AF18 AF17 R26 R25
MEM_MB_ADD0
P24
MEM_MB_ADD1
N24
MEM_MB_ADD2
P26
MEM_MB_ADD3
N23
MEM_MB_ADD4
N26
MEM_MB_ADD5
L23
MEM_MB_ADD6
N25
MEM_MB_ADD7
L24
MEM_MB_ADD8
M26
MEM_MB_ADD9
K26
MEM_MB_ADD10
T26
MEM_MB_ADD11
L26
MEM_MB_ADD12
L25
MEM_MB_ADD13
W24
MEM_MB_ADD14
J23
MEM_MB_ADD15
J24 R24
U26 J26
U25 U24 U23
4.7U/6.3V_6
1000P/50V_4
B
C170
C189
750 mA
CPU_VTT_SENSE42
T37
MEM_MB0_ODT06,7 MEM_MB0_ODT16,7
MEM_MB0_CS#06,7 MEM_MB0_CS#16,7
MEM_MB_CKE06,7 MEM_MB_CKE16,7
MEM_MB_CLK1_P6 MEM_MB_CLK1_N6 MEM_MB_CLK7_P6 MEM_MB_CLK7_N6
MEM_MB_BANK06,7 MEM_MB_BANK16,7 MEM_MB_BANK26,7
MEM_MB_RAS#6,7 MEM_MB_CAS#6,7 MEM_MB_WE#6,7
C214
0.22U/6.3V_4
C188
180P/50V_4
MEM_MA_CLK7_P
MEM_MA_CLK7_N MEM_MA_CLK1_P
MEM_MA_CLK1_N
R104
2K/F_4
R97
2K/F_4
MEM_MB_ADD[0..15]6,7
C263
0.22U/6.3V_4
C192
180P/50V_4
C738
1.5P/50V_4
C378
1.5P/50V_4
+1.8VSUS
C167
0.22U/6.3V_4
C264
180P/50V_4
R105 *0_4
C200
0.1U/10V_4
0.22U/6.3V_4
180P/50V_4
MEM_MB_DATA[0..63]6
+0.9VSMVREF6,42
Reserved
C179
1000P/50V_4
MEM_MB_DM[0..7]6
C186
C171
C
Processor Memory Interface
U32C
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB_DQS0_P6 MEM_MB_DQS0_N6 MEM_MB_DQS1_P6 MEM_MB_DQS1_N6 MEM_MB_DQS2_P6 MEM_MB_DQS2_N6 MEM_MB_DQS3_P6 MEM_MB_DQS3_N6 MEM_MB_DQS4_P6 MEM_MB_DQS4_N6 MEM_MB_DQS5_P6 MEM_MB_DQS5_N6 MEM_MB_DQS6_P6 MEM_MB_DQS6_N6 MEM_MB_DQS7_P6 MEM_MB_DQS7_N6
G11
G25 G26
G23
G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20
AF20 AF24
AF23 AC20 AD20 AD18 AE18 AC14 AD14
AF19 AC18
AF16
AF15
AF13 AC12 AB11
AE14
AF14
AF11 AD11
AB26 AE22 AC16 AD12
AC25 AC26
AF21
AF22 AE16 AD16
AF12 AE12
C11 A11 A14 B14
E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24
C26 D26
Y11
A12 B16 A22 E25
C12 B12 D16 C16 A24 A23 F26 E26
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
SOCKET_638_PIN
MEM:DATA
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12
E12 C15 E19 F24 AC24 Y19 AB16 Y13
G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8
MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
MEM_MA_DATA[0..63]6
MEM_MA_DM[0..7]6
MEM_MA_DQS0_P6 MEM_MA_DQS0_N6 MEM_MA_DQS1_P6 MEM_MA_DQS1_N6 MEM_MA_DQS2_P6 MEM_MA_DQS2_N6 MEM_MA_DQS3_P6 MEM_MA_DQS3_N6 MEM_MA_DQS4_P6 MEM_MA_DQS4_N6 MEM_MA_DQS5_P6 MEM_MA_DQS5_N6 MEM_MA_DQS6_P6 MEM_MA_DQS6_N6 MEM_MA_DQS7_P6 MEM_MA_DQS7_N6
04
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
D
S1G2 DDRII MEMORY I/F 2/3
Date:Sheet of
E
446Friday, August 29, 2008
1A
http://mycomp.su/x/
5
4
3
2
1
U32F
AA4
VSS1
AA11
U32E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
DD
+CPUVDDNB
3A
+1.8VSUS
2A
CC
CNTR_VREF3
MBCLK218,36
MBDATA218,36
BB
PM_THERM#13
AA
MBCLK2
*BSS138_NL/SOT23
MBDATA2
*BSS138_NL/SOT23
SMBALERT#
MBCLK218,36 MBDATA218,36
+1.8VSUS
CPU_THERMTRIP_L#3
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SOCKET_638_PIN
2
Q15
3
R165
10K/F_4
5
1
3
*BSS138_NL/SOT23
R166
10K/F_4
R472*10K/F_4
CPU_THERMTRIP_L# SMBALERT#
VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8
VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
2
Q16
1
2
3
R164
10K/F_4
+VCORE1+VCORE0 +VCORE0
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
CPU_SIC
CPU_SID
Q14
CPU_ALERT
1
U37
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
MSOP
G786P8
R173 390_4
VCC DXP DXN
GND
+1.8VSUS
R483
200/F_6
1 2 3 5
+1.8VSUS
+3V+3V
R174 390_4
C870
0.1U/10V_4
SMBALERT#
R175 1K/F_4
C869 1000P/50V_4
CPU_SIC3
CPU_SID3
CPU_ALERT3
H_THRMDA3
H_THRMDC3
I2C ADDRESS: 98H
2
1 3
Q46 *MMBT3904
4
PQ60
*2N7002E-G
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
SOCKET_638_PIN
PROCESSOR POWER AND GROUND
R177*0_4
reserve for power shutdown ( if can )
PV stage change to short pad
R176*0_4/S
Q17
MMBT3904
2
1 3
3
1
R98*10K/F_4
2
ADD VGA TEMP_ FAIL function M8X is active Hi , M7X acvite Low
J6
VSS66
J8
VSS67
J10
VSS68
J12
VSS69
J14
VSS70
J16
VSS71
J18
VSS72
K2
VSS73
K7
VSS74
K9
VSS75
K11
VSS76
K13
VSS77
K15
VSS78
K17
VSS79
L6
VSS80
L8
VSS81
L10
VSS82
L12
VSS83
L14
VSS84
L16
VSS85
L18
VSS86
M7
VSS87
M9
VSS88
AC6
VSS89
M17
VSS90
N4
VSS91
N8
VSS92
N10
VSS93
N16
VSS94
N18
VSS95
P2
VSS96
P7
VSS97
P9
VSS98
P11
VSS99
P17
VSS100
R8
VSS101
R10
VSS102
R16
VSS103
R18
VSS104
T7
VSS105
T9
VSS106
T11
VSS107
T13
VSS108
T15
VSS109
T17
VSS110
U4
VSS111
U6
VSS112
U8
VSS113
U10
VSS114
U12
VSS115
U14
VSS116
U16
VSS117
U18
VSS118
V2
VSS119
V7
VSS120
V9
VSS121
V11
VSS122
V13
VSS123
V15
VSS124
V17
VSS125
W6
VSS126
Y21
VSS127
Y23
VSS128
N6
VSS129
SYS_SHDN#
SYS_SHDN#
D35
*CH500H
2 1
D34
2 1
CH501H-40PT
R17910K/F_4
3
3920_RST#
ECPWROK
TEMP_FAIL18
BOTTOM SIDE DECOUPLING
C304
22U/6.3V_8
+VCORE1
+CPUVDDNB
C239
22U/6.3V_8
C275
22U/6.3V_8
C320
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
C282
C240
C319
22U/6.3V_8
22U/6.3V_8
C296
22U/6.3V_8
C283
+1.8VSUS
C318
22U/6.3V_8
22U/6.3V_8
C253 22U/6.3V_8
0.22U/6.3V_4
C277
22U/6.3V_8
C298
C695
0.22U/6.3V_4
C297
C303
0.01U/16V_4
C235
0.01U/16V_4
C321
0.22U/6.3V_4
C314
180P/50V_4
C694
180P/50V_4
C252
0.22U/6.3V_4
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS
C807
0.01U/16V_4
EC3
*0.1U/10V_4
C770
4.7U/6.3V_6
C791
180P/50V_4
EC130.01U/16V_4
EC60.01U/16V_4
EC70.01U/16V_4
EC90.01U/16V_4
EC1*0.01U/16V_4 EC2*0.01U/16V_4
EC110.01U/16V_4 EC120.01U/16V_4
C114
0.22U/6.3V_4
C255
0.22U/6.3V_4
+3VPCU+1.8V
+3V
+3V
+1.8VSUS +5V
+3V
For fix HyperTransport nets across plane splits
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
S1G2 PWR & GND 3/3
Date:Sheet of
+1.8VSUS
SYS_SHDN#39,45
3920_RST#36,45
ECPWROK16,36
+3V
*0.1U/10V_4
C772
4.7U/6.3V_6
C164
0.22U/6.3V_4
EC10
0.22U/6.3V_4
*0.1U/10V_4
C808
4.7U/6.3V_6
C784
EC4
C806
4.7U/6.3V_6
C773
0.01U/16V_4
+1.8VSUS +3VPCU
+1.8V
+3VPCU
+5V
+VGA_CORE +1.8V
+3V +1.8V+3VS5 +3VS5
EC14
*0.1U/10V_4
2
C241
0.01U/16V_4
C771
180P/50V_4
+VCORE0 +VCORE1
EC50.01U/16V_4
EC80.01U/16V_4
1
05
C805
180P/50V_4
C680.01U/16V_4 C750.01U/16V_4 C640.01U/16V_4 C610.01U/16V_4
546Friday, August 29, 2008
+3VPCU+5V
1A
http://mycomp.su/x/
5
MEM_MA_ADD[0..15]4,7
DD
MEM_MA_BANK[0..2]4,7
MEM_MA_DQS0_P4 MEM_MA_DQS1_P4 MEM_MA_DQS2_P4 MEM_MA_DQS3_P4 MEM_MA_DQS4_P4 MEM_MA_DQS5_P4 MEM_MA_DQS6_P4
MEM_MA_CLK1_P4 MEM_MA_CLK1_N4 MEM_MA_CLK7_P4 MEM_MA_CLK7_N4
MEM_MA_CKE04,7 MEM_MA_CKE14,7
MEM_MA_RAS#4,7 MEM_MA_CAS#4,7 MEM_MA_WE#4,7 MEM_MA0_CS#04,7 MEM_MA0_CS#14,7
MEM_MA0_ODT04,7 MEM_MA0_ODT14,7
PDAT_SMB2,7,13,29,37 PCLK_SMB2,7,13,29,37
MEM_MA_DQS7_P4 MEM_MA_DQS0_N4
MEM_MA_DQS1_N4 MEM_MA_DQS2_N4 MEM_MA_DQS3_N4 MEM_MA_DQS4_N4 MEM_MA_DQS5_N4 MEM_MA_DQS6_N4 MEM_MA_DQS7_N4
2.2U/6.3V_6
CC
BB
AA
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8
MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
PDAT_SMB PCLK_SMB
+3V
C859
C398
1000P/50V_4
0.1U/10V_4C391
+1.8VSUS +1.8VSUS
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
DIM1_SA0 DIM1_SA1
C706
0.1U/10V_4
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
GND
GND
201
202
DDR SO-DIMM SOCKET 1.8V
H=5.2
R3310K/F_4 R3610K/F_4
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
SO-DIMM
59
103
111
104
112
117
VDD8
VDD7
VDD9
(Normal)
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
127
122
121
SMbus address A0
5
118
VDD10
VDD11
NC/TEST
VSS32
VSS31
132
128
DIM1_SA0 DIM1_SA1
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
VSS56 VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
CN27
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9
NC1 NC2 NC3 NC4
4
MEM_MA_DATA0
5
MEM_MA_DATA1
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA11
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA14
36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA24
61
MEM_MA_DATA25
63
MEM_MA_DATA26
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA30
74
MEM_MA_DATA31
76
MEM_MA_DATA36
123
MEM_MA_DATA37
125
MEM_MA_DATA35
135
MEM_MA_DATA39
137
MEM_MA_DATA38
124
MEM_MA_DATA32
126
MEM_MA_DATA33
134
MEM_MA_DATA34
136
MEM_MA_DATA40
141
MEM_MA_DATA41
143
MEM_MA_DATA46
151
MEM_MA_DATA47
153
MEM_MA_DATA44
140
MEM_MA_DATA45
142
MEM_MA_DATA42
152
MEM_MA_DATA43
154
MEM_MA_DATA52
157
MEM_MA_DATA49
159
MEM_MA_DATA54
173
MEM_MA_DATA55
175
MEM_MA_DATA53
158
MEM_MA_DATA48
160
MEM_MA_DATA51
174
MEM_MA_DATA50
176
MEM_MA_DATA61
179
MEM_MA_DATA60
181
MEM_MA_DATA63
189
MEM_MA_DATA62
191
MEM_MA_DATA56
180
MEM_MA_DATA57
182
MEM_MA_DATA58
192
MEM_MA_DATA59
194
MEMHOT_SODIMM#_1
50 69 83 120 163
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
4
3
MEM_MA_DATA[0..63]4
R125*0_4/S
PV change to use short pad
+0.9VSMVREF_DIMM+0.9VSMVREF_DIMM
+0.9VSMVREF_DIMM
+0.9VSMVREF4,42
R155*0_4
Only for reserved
MEM_MB_ADD[0..15]4,7 MEM_MB_DATA[0..63]4
MEM_MB_BANK[0..2]4,7
MEM_MB_DM[0..7]4MEM_MA_DM[0..7]4
MEM_MB_DQS0_P4 MEM_MB_DQS1_P4 MEM_MB_DQS2_P4 MEM_MB_DQS3_P4 MEM_MB_DQS4_P4 MEM_MB_DQS5_P4 MEM_MB_DQS6_P4 MEM_MB_DQS7_P4
MEM_MB_DQS0_N4 MEM_MB_DQS1_N4 MEM_MB_DQS2_N4 MEM_MB_DQS3_N4 MEM_MB_DQS4_N4 MEM_MB_DQS5_N4 MEM_MB_DQS6_N4 MEM_MB_DQS7_N4
MEM_MB_CLK1_P4 MEM_MB_CLK1_N4 MEM_MB_CLK7_P4 MEM_MB_CLK7_N4
MEM_MB_CKE04,7 MEM_MB_CKE14,7
MEM_MB_RAS#4,7 MEM_MB_CAS#4,7
MEM_MB_WE#4,7 MEM_MB0_CS#04,7 MEM_MB0_CS#14,7
MEM_MB0_ODT04,7
MEMHOT_SODIMM#7
C858
2.2U/6.3V_6
+0.9VSMVREF_DIMM
MEM_MB0_ODT14,7
+3V
C409
0.1U/10V_4
+1.8VSUS
R154 2K/F_4
R151 2K/F_4
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8
MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
DIM2_SA0 DIM2_SA1
PDAT_SMB PCLK_SMB
C707
0.1U/10V_4
C402 1000P/50V_4
102
A0
101
A1
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
o
3
VSS1
8
VSS2
o
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
GND
GND
59
202
201
DIM2_SA0 DIM2_SA1
SMbus address A2
3
2
103
111
104
112
117
118
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
SO-DIMM
(REVERSE)
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
132
128
127
122
121
R3510K/F_4 R2910K/F_4
2
CN28
MEM_MB_DATA4
5
DQ0
MEM_MB_DATA5
7
DQ1
MEM_MB_DATA2
17
DQ2
MEM_MB_DATA3
19
DQ3
MEM_MB_DATA0
4
DQ4
MEM_MB_DATA1
6
DQ5
MEM_MB_DATA6
14
DQ6
MEM_MB_DATA7
16
DQ7
MEM_MB_DATA13
23
DQ8
MEM_MB_DATA12
25
DQ9
MEM_MB_DATA11
35
DQ10
MEM_MB_DATA10
37
DQ11
MEM_MB_DATA8
20
DQ12
MEM_MB_DATA9
22
DQ13
MEM_MB_DATA14
36
DQ14
MEM_MB_DATA15
38
DQ15
MEM_MB_DATA16
43
DQ16
MEM_MB_DATA17
45
DQ17
MEM_MB_DATA18
55
DQ18
MEM_MB_DATA19
57
DQ19
MEM_MB_DATA20
44
DQ20
MEM_MB_DATA21
46
DQ21
MEM_MB_DATA22
56
DQ22
MEM_MB_DATA23
58
DQ23
MEM_MB_DATA24
61
DQ24
MEM_MB_DATA25
63
DQ25
MEM_MB_DATA26
73
DQ26
MEM_MB_DATA27
75
DQ27
MEM_MB_DATA28
62
DQ28
MEM_MB_DATA29
64
DQ29
MEM_MB_DATA30
74
DQ30
MEM_MB_DATA31
76
DQ31
MEM_MB_DATA37
123
DQ32
MEM_MB_DATA36
125
DQ33
MEM_MB_DATA34
135
DQ34
MEM_MB_DATA35
137
DQ35
MEM_MB_DATA33
124
DQ36
MEM_MB_DATA32
126
DQ37
MEM_MB_DATA38
134
DQ38
MEM_MB_DATA39
136
DQ39
MEM_MB_DATA40
141
DQ40
MEM_MB_DATA45
143
DQ41
MEM_MB_DATA47
151
DQ42
MEM_MB_DATA46
153
DQ43
MEM_MB_DATA44
140
DQ44
MEM_MB_DATA41
142
DQ45
MEM_MB_DATA43
152
DQ46
MEM_MB_DATA42
154
DQ47
MEM_MB_DATA52
157
DQ48
MEM_MB_DATA53
159
DQ49
MEM_MB_DATA50
173
DQ50
MEM_MB_DATA51
175
DQ51
MEM_MB_DATA48
158
DQ52
MEM_MB_DATA49
160
DQ53
MEM_MB_DATA54
174
DQ54
MEM_MB_DATA55
176
DQ55
MEM_MB_DATA56
179
DQ56
MEM_MB_DATA60
181
DQ57
MEM_MB_DATA58
189
DQ58
MEM_MB_DATA59
191
DQ59
MEM_MB_DATA61
180
DQ60
MEM_MB_DATA57
182
DQ61
MEM_MB_DATA62
192
DQ62
MEM_MB_DATA63
194
DQ63
MEMHOT_SODIMM#_2
50
NC1
69
NC2
83
NC3
120
NC4
163
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
DDR SO-DIMM SOCKET 1.8V
H=9.2
+3V
1
R120*0_4/S
MEMHOT_SODIMM#
PV change to use short pad
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
DDR2 SODIMMS: A/B CHANNEL
Date:Sheet of
1
06
1A
646Friday, August 29, 2008
http://mycomp.su/x/
5
4
3
2
1
MEM_MA_ADD[0..15]4,6 MEM_MA_BANK[0..2]4,6
DD
CC
MEM_MA_CKE04,6
MEM_MA_WE#4,6 MEM_MA_CAS#4,6 MEM_MA0_ODT14,6 MEM_MA0_CS#14,6
MEM_MA_CKE14,6
MEM_MA_RAS#4,6
MEM_MA0_ODT04,6
MEM_MA_CKE0 MEM_MA_BANK2 MEM_MA_ADD12 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD5 MEM_MA_ADD3 MEM_MA_ADD1 MEM_MA_ADD10 MEM_MA_BANK0 MEM_MA_WE# MEM_MA_CAS# MEM_MA0_ODT1 MEM_MA0_CS#1 MEM_MA_ADD15 MEM_MA_CKE1
MEM_MA_ADD7 MEM_MA_ADD14 MEM_MA_ADD6 MEM_MA_ADD11
MEM_MA_ADD2 MEM_MA_ADD4
MEM_MA_BANK1 MEM_MA_ADD0
MEM_MA0_CS#0
MEM_MA_ADD13 MEM_MA0_ODT0
+1.8VSUS
RP2847_4P2R_4 RP2447_4P2R_4 RP1847_4P2R_4 RP1647_4P2R_4 RP1147_4P2R_4 RP847_4P2R_4 RP247_4P2R_4 RP2747_4P2R_4
RP2247_4P2R_4 RP1947_4P2R_4
RP1447_4P2R_4
RP1247_4P2R_4
RP647_4P2R_4
RP447_4P2R_4
C123
0.1U/10V_4
C119
0.1U/10V_4
MEM_MA_ADD[0..15] MEM_MA_BANK[0..2]
+0.9VSMVTT
4
3
2
1
4
3
2
1
2
1
4
3
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
C254
0.1U/10V_4
C246
0.1U/10V_4
C1780.1U/10V_4 C2600.1U/10V_4 C2320.1U/10V_4 C1090.1U/10V_4 C2160.1U/10V_4 C980.1U/10V_4 C1450.1U/10V_4 C2740.1U/10V_4
C1490.1U/10V_4 C1030.1U/10V_4 C2090.1U/10V_4 C1040.1U/10V_4
C1150.1U/10V_4 C2450.1U/10V_4 C1430.1U/10V_4 C2780.1U/10V_4
C776
0.1U/10V_4
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
C251
0.1U/10V_4
MEM_MB_ADD[0..15]4,6 MEM_MB_BANK[0..2]4,6
MEM_MB_CKE04,6
MEM_MB_WE#4,6 MEM_MB_CAS#4,6 MEM_MB0_ODT14,6 MEM_MB0_CS#14,6 MEM_MB_CKE14,6
MEM_MB0_CS#04,6MEM_MA0_CS#04,6 MEM_MB_RAS#4,6
MEM_MB0_ODT04,6
MEM_MB_CKE0 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD5 MEM_MB_ADD3 MEM_MB_ADD1 MEM_MB_ADD10 MEM_MB_BANK0 MEM_MB_WE# MEM_MB_CAS# MEM_MB0_ODT1 MEM_MB0_CS#1 MEM_MB_CKE1 MEM_MB_ADD15
MEM_MB_ADD7 MEM_MB_ADD14
MEM_MB_ADD6 MEM_MB_ADD11
MEM_MB_ADD2 MEM_MB_ADD4
MEM_MB_BANK1 MEM_MB_ADD0
MEM_MB0_CS#0 MEM_MB_RAS#MEM_MA_RAS#
MEM_MB0_ODT0 MEM_MB_ADD13
+1.8VSUS
C122
0.1U/10V_4
MEM_MB_ADD[0..15] MEM_MB_BANK[0..2]
+0.9VSMVTT
RP2547_4P2R_4
4
3
2
RP2147_4P2R_4 RP1747_4P2R_4 RP1547_4P2R_4 RP947_4P2R_4 RP747_4P2R_4 RP147_4P2R_4 RP2647_4P2R_4
RP2347_4P2R_4
RP2047_4P2R_4
RP1347_4P2R_4
RP1047_4P2R_4
RP547_4P2R_4
RP347_4P2R_4
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
C229
0.1U/10V_4
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
2
1
4
3
C194
0.1U/10V_4
C798
0.1U/10V_4
C1630.1U/10V_4 C2480.1U/10V_4 C2100.1U/10V_4 C1020.1U/10V_4 C1390.1U/10V_4 C950.1U/10V_4 C1930.1U/10V_4 C940.1U/10V_4 C1570.1U/10V_4 C2680.1U/10V_4 C1770.1U/10V_4 C2690.1U/10V_4 C1290.1U/10V_4
C2670.1U/10V_4 C1810.1U/10V_4 C1100.1U/10V_4
C187
0.1U/10V_4
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
C768
0.1U/10V_4
07
+1.8VSUS
PLACE CLOSE TO SOCKET( PER EMI/EMC)
BB
+3V
R403 *10K/F_4
Close DDR2 socket
U1
A07+VS
+3V
+3V
PDAT_SMB PCLK_SMB
PDAT_SMB2,6,13,29,37 PCLK_SMB2,6,13,29,37
AA
6
A1
5
A2
1
SDA
2
SCL
*DS75U+T&R
R40010K/F_4
+3V
8
MEMHOT_SODIMM#
3
O.S
4
GND
Address:92h
MEMHOT_SODIMM#
C310.1U/10V_4
MEMHOT_SODIMM#6
2
Q36
*2N7002E-G
R401*33_4
3
1
2
Q35
*2N7002E-G
+3VS5
3
1
R402 *10K/F_4
CPU_MEMHOT#3,13
PLACE CLOSE TO SOCKET( PER EMI/EMC)
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
5
4
3
2
DDR2 SODIMMS TERMINATIONS
Date:Sheet of
746Friday, August 29, 2008
1
1A
http://mycomp.su/x/
5
HT_CPU_NB_CAD_H0 HT_CPU_NB_CAD_L0 HT_CPU_NB_CAD_H1 HT_CPU_NB_CAD_L1 HT_CPU_NB_CAD_H2 HT_CPU_NB_CAD_L2 HT_CPU_NB_CAD_H3 HT_CPU_NB_CAD_L3 HT_CPU_NB_CAD_H4 HT_CPU_NB_CAD_L4 HT_CPU_NB_CAD_H5 HT_CPU_NB_CAD_L5
DD
CC
HT_CPU_NB_CAD_H6 HT_CPU_NB_CAD_L6 HT_CPU_NB_CAD_H7 HT_CPU_NB_CAD_L7
HT_CPU_NB_CAD_H8 HT_CPU_NB_CAD_L8 HT_CPU_NB_CAD_H9 HT_CPU_NB_CAD_L9 HT_CPU_NB_CAD_H10 HT_CPU_NB_CAD_L10 HT_CPU_NB_CAD_H11 HT_CPU_NB_CAD_L11 HT_CPU_NB_CAD_H12 HT_CPU_NB_CAD_L12 HT_CPU_NB_CAD_H13 HT_CPU_NB_CAD_L13 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H15 HT_CPU_NB_CAD_L15
HT_CPU_NB_CLK_H0 HT_CPU_NB_CLK_L0 HT_CPU_NB_CLK_H1 HT_CPU_NB_CLK_L1
HT_CPU_NB_CTL_H0 HT_CPU_NB_CTL_L0 HT_CPU_NB_CTL_H1 HT_CPU_NB_CTL_L1
R455301/F_4
HT_RXCALP HT_RXCALN
4
AC24 AC25 AB25 AB24 AA24 AA25
W21 W20
AB23 AA22
M22 M23 R21 R20
C23
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
Y22 Y23
V21 V20 U20 U21 U19 U18
T22 T23
A24
U30A
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS780(RX780)
PART 1 OF 6
HYPER TRANSPORT CPU I/F
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP HT_TXCALN
HT_NB_CPU_CAD_H0
D24
HT_NB_CPU_CAD_L0
D25
HT_NB_CPU_CAD_H1
E24
HT_NB_CPU_CAD_L1
E25
HT_NB_CPU_CAD_H2
F24
HT_NB_CPU_CAD_L2
F25
HT_NB_CPU_CAD_H3
F23
HT_NB_CPU_CAD_L3
F22
HT_NB_CPU_CAD_H4
H23
HT_NB_CPU_CAD_L4
H22
HT_NB_CPU_CAD_H5
J25
HT_NB_CPU_CAD_L5
J24
HT_NB_CPU_CAD_H6
K24
HT_NB_CPU_CAD_L6
K25
HT_NB_CPU_CAD_H7
K23
HT_NB_CPU_CAD_L7
K22
HT_NB_CPU_CAD_H8
F21
HT_NB_CPU_CAD_L8
G21
HT_NB_CPU_CAD_H9
G20
HT_NB_CPU_CAD_L9
H21
HT_NB_CPU_CAD_H10
J20
HT_NB_CPU_CAD_L10
J21
HT_NB_CPU_CAD_H11
J18
HT_NB_CPU_CAD_L11
K17
HT_NB_CPU_CAD_H12
L19
HT_NB_CPU_CAD_L12
J19
HT_NB_CPU_CAD_H13
M19
HT_NB_CPU_CAD_L13
L18
HT_NB_CPU_CAD_H14
M21
HT_NB_CPU_CAD_L14
P21
HT_NB_CPU_CAD_H15
P18
HT_NB_CPU_CAD_L15
M18
HT_NB_CPU_CLK_H0
H24
HT_NB_CPU_CLK_L0
H25
HT_NB_CPU_CLK_H1
L21
HT_NB_CPU_CLK_L1
L20
HT_NB_CPU_CTL_H0
M24
HT_NB_CPU_CTL_L0
M25
HT_NB_CPU_CTL_H1
P19
HT_NB_CPU_CTL_L1
R18
HT_TXCALP
B24
HT_TXCALN
B25
3
R641R655
R454301/F_4
2
HT_CPU_NB_CAD_H[15..0] HT_CPU_NB_CAD_L[15..0] HT_CPU_NB_CLK_H[1..0] HT_CPU_NB_CLK_L[1..0] HT_CPU_NB_CTL_H[1..0] HT_CPU_NB_CTL_L[1..0] HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_H[15..0]3
HT_CPU_NB_CAD_L[15..0]3
HT_CPU_NB_CLK_H[1..0]3
HT_CPU_NB_CLK_L[1..0]3
HT_CPU_NB_CTL_H[1..0]3
HT_CPU_NB_CTL_L[1..0]3
HT_NB_CPU_CAD_H[15..0]3
HT_NB_CPU_CAD_L[15..0]3
HT_NB_CPU_CLK_H[1..0]3
HT_NB_CPU_CLK_L[1..0]3
HT_NB_CPU_CTL_H[1..0]3
HT_NB_CPU_CTL_L[1..0]3
signals RS780RX780
HT_TXCALP
HT_TXCALN
HT_RXCALP
HT_RXCALN
R641 301 ohm 1%
R655 301 ohm 1%
R641
1.21k ohm 1%
R655
1.21k ohm 1%
1
08
RES CHIP 1.21K 1/16W +-1%(0402) P/N : CS21212FB18
RES CHIP 301 1/16W +-1%(0402) P/N : CS13012FB14
This block is for side port memory only
U30D
MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)
MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)
MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)
MEM_CKP(NC) MEM_CKN(NC)
MEM_COMPP(NC) MEM_COMPN(NC)
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC) MEM_DQS1N(NC)
MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)
SBD_MEM/DVO_I/F
IOPLLVDD18(NC)
MEM_VREF(NC)
IOPLLVDD(NC) IOPLLVSS(NC)
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
IOPLLVDD18 - memory PLL not applicable to RX780
+1.8V +1.1V
IOPLLVDD- memory PLL not applicable to RX780
AB12 AE16
V11 AE15 AA12 AB16 AB14 AD14
BB
AA
AD13 AD15 AC16 AE13 AC14
AD16 AE17 AD17
W12
AD18 AB13 AB18
W14
AE12 AD12
Y14
Y12
V14
V15
RS780(RX780)
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
5
4
3
2
RS740/RS780-HT LINK I/F 1/5
Date:Sheet of
846Friday, August 29, 2008
1
1A
http://mycomp.su/x/
5
AE3
AD4
AE2 AD3 AD1 AD2
AA8
AA7
AA5
AA6
D4 C4
A3
B3 C2 C1
E5
F5 G5 G6 H5 H6
J6 J5 J7
J8 L5 L6
M8
L8 P7
M7
P5
M5 R8
P8
R6 R5
P4 P3 T4 T3
V5
W6 U5 U6 U8 U7
Y8 Y7
W5
Y5
U30B
GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N
SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F SB
PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)
PEG_RX15 PEG_RX#15 PEG_RX14 PEG_RX#14 PEG_RX13 PEG_RX#13 PEG_RX12 PEG_RX#12 PEG_RX11 PEG_RX#11 PEG_RX10
DD
PCIE_RXP6_LAN32
CC
PCIE_SB_NB_RX0P12 PCIE_SB_NB_RX0N12 PCIE_SB_NB_RX1P12 PCIE_SB_NB_RX1N12 PCIE_SB_NB_RX2P12 PCIE_SB_NB_RX2N12 PCIE_SB_NB_RX3P12 PCIE_SB_NB_RX3N12
PEG_RX#10 PEG_RX9 PEG_RX#9 PEG_RX8 PEG_RX#8 PEG_RX7 PEG_RX#7 PEG_RX6 PEG_RX#6 PEG_RX5 PEG_RX#5 PEG_RX4 PEG_RX#4 PEG_RX3 PEG_RX#3 PEG_RX2 PEG_RX#2 PEG_RX1 PEG_RX#1 PEG_RX0 PEG_RX#0
PCIE_RXP034 PCIE_RXN034 PCIE_RXP137 PCIE_RXN137
PCIE_RXP337 PCIE_RXN337
PCIE_RXP527 PCIE_TXP527 PCIE_RXN527
PCIE_RXP0 PCIE_RXN0 PCIE_RXP1 PCIE_RXN1 PCIE_RXP6_LAN PCIE_RXN6_LAN PCIE_TXN6_C PCIE_RXP3 PCIE_RXN3 PCIE_RXP4
T15
PCIE_RXN4
T18
PCIE_RXP5
4
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2
AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
C_PEG_TX15 C_PEG_TX#15 C_PEG_TX14 C_PEG_TX#14 C_PEG_TX13 C_PEG_TX#13 C_PEG_TX12 C_PEG_TX#12 C_PEG_TX11 C_PEG_TX#11 C_PEG_TX10 C_PEG_TX#10 C_PEG_TX9 C_PEG_TX#9 C_PEG_TX8 C_PEG_TX#8 C_PEG_TX7 C_PEG_TX#7 C_PEG_TX6 C_PEG_TX#6 C_PEG_TX5 C_PEG_TX#5 C_PEG_TX4 C_PEG_TX#4
C_PEG_TX#3 C_PEG_TX2 C_PEG_TX#2 C_PEG_TX1
C_PEG_TX0 C_PEG_TX#0
PCIE_TXP0_C PCIE_TXN0_C PCIE_TXP1_C PCIE_TXN1_C PCIE_TXP6_C
PCIE_TXP3_C PCIE_TXN3_C PCIE_TXP4_C PCIE_TXN4_C PCIE_TXP5_C PCIE_TXN5_CPCIE_RXN5
A_TX0P_CA_TX0P_C A_TX0N_CA_TX0N_C A_TX1P_CA_TX1P_C A_TX1N_CA_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C
NB_PCIECALRP NB_PCIECALRN
C8450.1U/10V_4 C8550.1U/10V_4 C8370.1U/10V_4 C8400.1U/10V_4 C8290.1U/10V_4 C8310.1U/10V_4 C8260.1U/10V_4 C8270.1U/10V_4 C8240.1U/10V_4 C8210.1U/10V_4 C8200.1U/10V_4 C8180.1U/10V_4 C8170.1U/10V_4 C8160.1U/10V_4 C8140.1U/10V_4 C8150.1U/10V_4 C8130.1U/10V_4 C8110.1U/10V_4 C8020.1U/10V_4 C8090.1U/10V_4 C7990.1U/10V_4 C7960.1U/10V_4 C8000.1U/10V_4 C8030.1U/10V_4 C7950.1U/10V_4 C7920.1U/10V_4 C7900.1U/10V_4 C7880.1U/10V_4 C7830.1U/10V_4 C7870.1U/10V_4 C7800.1U/10V_4 C7820.1U/10V_4
C7740.1U/10V_4 C7690.1U/10V_4 C1270.1U/10V_4 C1260.1U/10V_4 C1060.1U/10V_4 C1050.1U/10V_4 C7770.1U/10V_4 C7750.1U/10V_4
T12 T10
C1250.1U/10V_4 C1240.1U/10V_4
C7640.1U/10V_4 C7650.1U/10V_4 C7630.1U/10V_4 C7620.1U/10V_4 C1070.1U/10V_4 C1080.1U/10V_4 C7600.1U/10V_4 C7610.1U/10V_4
R4361.27K/F_4 R4372K/F_4
PEG_TX15 PEG_TX#15 PEG_TX14 PEG_TX#14 PEG_TX13 PEG_TX#13 PEG_TX12 PEG_TX#12 PEG_TX11 PEG_TX#11 PEG_TX10 PEG_TX#10 PEG_TX9 PEG_TX#9 PEG_TX8 PEG_TX#8 PEG_TX7 PEG_TX#7 PEG_TX6 PEG_TX#6 PEG_TX5 PEG_TX#5 PEG_TX4 PEG_TX#4 PEG_TX3C_PEG_TX3 PEG_TX#3 PEG_TX2 PEG_TX#2 PEG_TX1 PEG_TX#1C_PEG_TX#1 PEG_TX0 PEG_TX#0
PCIE_TXP034
PCIE_TXN034
PCIE_TXP137
PCIE_TXN137 PCIE_TXP6_LAN32 PCIE_TXN6_LAN32PCIE_RXN6_LAN32
PCIE_TXP337
PCIE_TXN337
PCIE_TXN527 PCIE_NB_SB_TX0P12
PCIE_NB_SB_TX0N12 PCIE_NB_SB_TX1P12 PCIE_NB_SB_TX1N12 PCIE_NB_SB_TX2P12 PCIE_NB_SB_TX2N12 PCIE_NB_SB_TX3P12 PCIE_NB_SB_TX3N12
3
+1.1V
PEG_RX#[15:0]17
PEG_RX[15:0]17
PEG_RX#[15:0] PEG_TX#[15:0]
Close to North Bridge
TO EPRESS CARD TO WLAN TO PCIE-LAN TO TV TUNNER
TO PCIE CARD READER
2
PEG_TX[15:0]PEG_RX[15:0]
PEG_TX#[15:0]17 PEG_TX[15:0]17
1
09
RS780(RX780)
RX780/RS740/RS780 difference table (PCIE LINK)
NB_PCIECALRP
GPP4
BB
AA
GPP5
RS740RX780/RS780
562R (GND)
NC
NC
1.27K (GND)
GPP4
GPP5
RS780 Display Port Support (muxed on GFX)
DP0
DP1
GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
5
4
3
2
RS740/RS780-PCIE I/F 2/5
Date:Sheet of
946Friday, August 29, 2008
1
1A
http://mycomp.su/x/
5
DD
CC
selects Loading of straps from EPROM 1 : use default vaule , default 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RX780 --RS780_AUX_CAL RS780 -- SUS_ATAT
Enables Debug Bus acess
BB
through memory T/O pads and GPIO. 0 : Enable RS780 , Default 1 : Disable RS780 (RS780 use VSYNC#)
Indicates if memory Side port is available or not 0: available RS780 , Default 1: Not available RS780 ( RS780 use HSYNC#)
RS780_AUX_CAL
VSYNC_INT
HSYNC_INT
For extrnal EEPROM Debug only
STRP_DATA
AA
Enables Debug Bus acess through memory T/O pads and GPIO. 1 : Enable RX780 , Default 0 : Disable RX780
R458*3K/F_4
R4602K/F_4
S-CD1
RX780
R4593K_4
RS780
R1403K_4
RS780
R1453K_4 R148*3K_4
RS780/RX780
RX780
R124*3K_4
+VDDG_NB
Reserved only
5
4
+3V_AVDD_NB +1.8V_AVDDDI_NB +1.8V_AVDDQ_NB
S-CD1
20mils width
20mils width
HSYNC_INTHSYNC_INT VSYNC_INTVSYNC_INT DDCDATA_INTDDCDATA_INT DDCCLK_INTDDCCLK_INT
DAC_RSET_NBDAC_RSET_NB +1.1V_PLLVDD
+1.8V_PLLVDD18
+1.8V_VDDA18HTPLL +1.8V_VDDA18PCIEPLL
NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP
NBHT_REFCLKP NBHT_REFCLKN
NBGFX_CLKP NBGFX_CLKN
NBGPP_CLKP NBGPP_CLKN
SBLINK_CLKP SBLINK_CLKN
T82
R630 0_6
+1.8V_PLLVDD18
+1.8V_PLLVDD18
R632 0_6
C359
2.2U/6.3V_6
C353
2.2U/6.3V_6
NB_I2C_DATANB_I2C_DATA NB_I2C_CLK
STRP_DATA
T81 T78 T35 T39
R135*715/F_6
PV stage change to short pad
NB_PLTRST#12
NB_PWRGD_IN16
NBHT_REFCLKP2
NBHT_REFCLKN2
EXT_NB_OSC2
+1.1V
R144
4.7K_4
NBGFX_CLKP2 NBGFX_CLKN2
T7 T6
SBLINK_CLKP2
SBLINK_CLKN2
T79 T84 T77 T80
+3V
AVDD-DAC Analog not applicable to RX780
+1.8V
+3V
PLLVDD18 - Graphics PLL not applicable to RX780
+3V
R128*0_4/S
PV stage delete R127
RS780
RX780 -->NC / RS780 --- ADD
*BLM18PG181SN1D(180,1.5A)_6
*BLM18PG181SN1D(180,1.5A)_6 L89
+1.8V
VDDA18PCIEPLL -PCIE PLL
BLM18PG181SN1D(180,1.5A)_6
R126
RS780
4.7K_4
L42
L40
L39
+3V_AVDD_NB
+1.8V_VDDA18PCIEPLL
VDDA18HTPLL -HT LINK PLL
+1.8V_VDDA18HTPLL
4
L35
BLM18PG181SN1D(180,1.5A)_6
3
F12 E12 F14
G15
H15 H14
E17 F17 F15
G18 G17
E18 F18 E19 F19
A11 B11
G14
A12 D14 B12
H17
A10 C10 C12
C25
NB_REFCLK_P NB_REFCLK_N
RS780_AUX_CAL
+1.1V
C24 E11
F11
B10
G11
L86
*BLM18PG181SN1D(180,1.5A)_6
+1.8V
R118*0_6
*BLM18PG181SN1D(180,1.5A)_6
L41
CPU_LDT_STOP#3,12
PV change to reomve R474
CPU_LDT_REQ#3
ALLOW_LDTSTOP12
3
U30C
AVDD1(NC) AVDD2(NC) AVDDDI(NC) AVSSDI(NC) AVDDQ(NC) AVSSQ(NC)
C_Pr(DFT_GPIO5) Y(DFT_GPIO2) COMP_Pb(DFT_GPIO4)
RED(DFT_GPIO0) REDb(NC) GREEN(DFT_GPIO1) GREENb(NC) BLUE(DFT_GPIO3) BLUEb(NC)
DAC_HSYNC(PWM_GPIO4) DAC_VSYNC(PWM_GPIO6)
E8
DAC_SDA(PCE_TCALRN)
F8
DAC_SCL(PCE_RCALRN) DAC_RSET(PWM_GPIO1) PLLVDD(NC)
PLLVDD18(NC) PLLVSS(NC)
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb POWERGOOD LDTSTOPb ALLOW_LDTSTOP
HT_REFCLKP
I
HT_REFCLKN REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
A9
I2C_DATA
B9
I2C_CLK
B8
DDC_DATA/AUX0N(NC)
A8
DDC_CLK/AUX0P(NC)
B7
AUX1P(NC)
A7
AUX1N(NC) STRP_DATA RSVD
C8
AUX_CAL(NC)
RS780(RX780)
+1.1V_PLLVDD
+1.8V_AVDDDI_NB
R6330_6
+1.8V_AVDDQ_NB
R6350_6
BSS138_NL/SOT23
PART 3 OF 6
I
I/O
I/O
R629 0_6
RS780
Q45 *BSS138_NL/SOT23
1
R462*0_4/S
RS780
Q44
1
R467*0_4
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC) TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC) TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
PMCLOCKs PLL PWR
MIS.
PLLVDD - Graphics PLL not applicable to RX780
AVDDI-DAC Digital not applicable to RX780
AVDDQ-DAC Bandgap Reference not applicable to RX780
RX780
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)
VDDLTP18(NC) VSSLTP18(NC)
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC)
LVTM
VDDLT33_2(NC)
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
TMDS_HPD(NC)
HPD(NC)
TVCLKIN(PWM_GPIO5)
THERMALDIODE_P THERMALDIODE_N
TESTMODE
+1.8V +VDDG_NB
3
+VDDG_NB
3
R463 *4.7K_4
PV stage change to short pad
RS780
R461
4.7K_4
NB_ALLOW_LDTSTOP
2
+1.8V
2
NB_LDT_STOP#
RX780
2
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
+1.8V_VDDLTP18_NB
A13 B13
+1.8V_VDDLT_18_NB
A15 B15
+3V_VDLT33_NB
A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
D9
PV change to short pad
D10 D12 AE8
AD8 D13
+1.8V
SUS_STAT#_NB
TEST_EN
L87
R146*0_4/S
R456
1.82K/F_4
*BLM18PG181SN1D(180,1.5A)_6
R6310_6
*BLM21PG221SN1D(220,100M,2A)_8
R6340_6
SUS_STAT#13
+1.8V_VDDLTP18_NB
VDDLTP18 - LVDS or DVI/HDMI PLL not applicable to RX780
+1.8V_VDDLT_18_NB
VDDLT18 - LVDS or DVI/HDMI digital not applicable to RX780
PV change capacitor to resistor and short to GND
R471*0_6/S
+3V
RS780
PV change to short pad
RS780
L88
+3V
*BLM21PG221SN1D(220,100M,2A)_8
VDDLT33 - LVDS or DVI/HDMI ANALOG RS740 only
SizeDocument NumberRev Custom
NB5/RD5
2
Date:Sheet of
1
10
+VDDG_NB
+3V_VDLT33_NB
C836
*2.2U/6.3V_6
PROJECT : QT8
Quanta Computer Inc.
RS740/RS780-SYSTEM I/F 3/5
1
1046Friday, August 29, 2008
1A
http://mycomp.su/x/
5
4
3
2
1
D11
E14
E15
J12
K14
M11
H7
U30F
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
DD
L7
VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15
VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
VSS2
VSS3G8VSS4
VSS1
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
GROUND
L15
J15
VSS5
VSS7
VSS8
VSS9
VSS6
VSS10
PIN NAME VDDHT VDDHTRX VDDHTTX VDDA18PCIE
PART 6/6
VDD18_MEM
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11
POWER
VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDDG33_1(NC) VDDG33_2(NC)
VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
AB15
AB17
AB19
C230
0.1U/10V_4
C832
0.1U/10V_4
C142
0.1U/10V_4
C184
0.1U/10V_4
VSS34
VSS33
K11
AE20
AB21
U30E
J17
VDDHT_1
AE25 AD24 AC23
AB22
AA21
W19
AE11 AD11
K16 M16
P16 R16 T16
H18 G19 F20 E21 D22 B23 A23
Y20 V18
U17 T17 R17 P17 M17
P10 K10 M10
T10 R10
AA9 AB9 AD9 AE9 U10
L16
J10
L10 W9
H9
Y9
F9
G9
PART 5/6
VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7
VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7
VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13
VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15
VDDG18_1(VDD18_1) VDDG18_2(VDD18_2) VDD18_MEM1(NC) VDD18_MEM2(NC)
RS780(RX780)
VSSAHT20
J22
L17
L22
L24
A25
E22
D23
G22
G24
CC
BB
VDDA18PCIE ­PCIE TX stage I/O for RX780/RS780
VDDHT - HT LINK digital I/O for RX780/RS780
VDDHTRX - HT LINK RX I/O for RX780/RS780
VDDHTTX - HT LINK TX I/O for RX780/RS780
+1.2V
L24
BLM21PG221SN1D(220,100M,2A)_8
+1.8V 1A for RS780M+SB700
+1.8V
BLM21PG221SN1D(220,100M,2A)_8
L25
H19
G25
P20
N22
M20
+1.1V
0.6A
BLM21PG221SN1D(220,100M,2A)_8
0.45A
BLM21PG221SN1D(220,100M,2A)_8
V19
R19
R22
R24
R25
U22
H20
PV change from Ohm to Bead
+1.1V 2A for RS780M
L81
L84
PV change from Ohm to Bead
0.5A
+1.2V 2A for RS780M+SB700
C113
4.7U/6.3V_6
L21
600mA
C146
4.7U/6.3V_6
W22
W24
Y21
W25
AD25
C131
0.1U/10V_4
C138
4.7U/6.3V_6
L12
M14
C758
4.7U/6.3V_6
C842
4.7U/6.3V_6
P12
P15
N13
C201
0.1U/10V_4
T12
R11
R14
C173
0.1U/10V_4
U14
U11
U15
C213
0.1U/10V_4
C347
0.1U/10V_4
C159
0.1U/10V_4
V12
W11
W15
AC12
C284
0.1U/10V_4
C838
0.1U/10V_4
C191
0.1U/10V_4
C271
0.1U/10V_4
Y18
AA14
AB11
+1.1V_VDDHT
+1.1V_VDDHTRX
+1.2V_VDDHTTX
+1.8V_VDDA18PCIE
PV change to short pad
VDD18 - RS780 I/O transform
PV change -­if not support side port ,those pin need to
AA
tied to GND
VDD18_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
+1.8V
+1.8V
R142*0_6/S
R435*0_6
0.005A
C286 1U/10V_4
0.005A
R637 0_6
+1.8V_VDDG18_NB
+1.8V_VDD18_MEM
RX780/RS780 POWER DIFFERENCE TABLE
RX780
+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 NC +1.1V+1.1V+1.8V +1.1V NC
+1.8V/1.5V
NC
+1.1V_VDD_PCIE
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
C217
0.1U/10V_4
C199
0.1U/10V_4
C231
0.1U/10V_4
+1.8V_VDD_MEM
+3V_VDDG33
C341
0.1U/10V_4
RS780
+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V
+1.1V
+3.3V +1.8VNC
PIN NAME IOPLLVDD
AVDDDI AVDDQ PLLVDD PLLVDD18 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33
C345
0.1U/10V_4
C247
0.1U/10V_4
R6360_6
C337
0.1U/10V_4
C289 1U/10V_4
C259
0.1U/10V_4
C227
0.1U/10V_4
R143*0_6/S
PV change to short pad
RX780RS780
NC
+1.1V
NC
+3.3VAVDD NC+1.8V NC+1.8V
+1.1V
NC NC
+1.8V
+1.8V +1.8V
+1.8V
+1.8V
NC
+1.8V
NC NC
NC
PV change from Ohm to Bead
0.7A
R457
C336 1U/10V_4
C272
0.1U/10V_4
C198
0.1U/10V_4
VDD_MEM For UMA RS780 only Not applicable to RX780 memory I/O transform
1.8V(0.15A)
RS780
BLM21PG221SN1D(220,100M,2A)_8
C843
4.7U/6.3V_6
VDDC - Core Logic power
7A
C749
10U/6.3V_8
C766
10U/6.3V_8
L22
*BLM21PG221SN1D(220,100M,2A)_8
3.3V(0.03A)
+3V
VDD33 - 3.3V I/O Not applicable to RX780
VDDPCIE - PCIE-E Main power
+1.1V
+1.1V
+1.8V
PV remove L22 and capacitor
11
PV change -­if not support side port ,those pin need to tied to GND
PV delete C130 , remove R435
5
4
3
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
2
RS740/RS780-POWER5/5
Date:Sheet of
1146Friday, August 29, 2008
1
1A
http://mycomp.su/x/
5
4
3
2
1
RB500V-40
D20
RB500V-40
20MIL
20MIL
BAT_CONN
12
D21
BT1
+3VPCU
+VCCRTC_2+BAT
12
NB_PLTRST#10 PCIE_RST#17 CARD_PLTRST#27 LAN_PLTRST#32 EPRESS_PLTRST#34 MINI_PLTRST#37
PCIE_SB_NB_RX0P9
DD
PLACE THESE PCIE AC COUPLING CAPS CLOSE TO U600
+1.2V
PCIE_SB_NB_RX0N9 PCIE_SB_NB_RX1P9 PCIE_SB_NB_RX1N9 PCIE_SB_NB_RX2P9 PCIE_SB_NB_RX2N9 PCIE_SB_NB_RX3P9 PCIE_SB_NB_RX3N9
PCIE_NB_SB_TX0P9
To RS780
PCIE_NB_SB_TX0N9 PCIE_NB_SB_TX1P9 PCIE_NB_SB_TX1N9 PCIE_NB_SB_TX2P9 PCIE_NB_SB_TX2N9 PCIE_NB_SB_TX3P9 PCIE_NB_SB_TX3N9
+1.2V_PCIE_VDDR
L55BLM18PG181SN1D(180,1.5A)_6
PCIE_PVDD-- PCIE PLL POWER
CC
SBSRC_CLKP2
Y7
R565
*20M_6
BB
4
32.768KHZ
R55920M_6
C929 18P/50V_4
RTC_X1
23
RTC_X2
1
C928 18P/50V_4
EXT_SB_OSC2
SBSRC_CLKN2
FOR A13 chip
EXT_SB_OSC
FOR A12 chip
+3VS5
ALLOW_LDTSTOP10 CPU_PROCHOT#3
CPU_PWRGD3
CPU_LDT_STOP#3,10
AA
CPU_LDT_RST#3
R56833_4 R60433_4 R57233_4 R58933_4 R58633_4 R60233_4
C8930.1U/10V_4 C8920.1U/10V_4 C8860.1U/10V_4 C8870.1U/10V_4 C8950.1U/10V_4 C8940.1U/10V_4 C8890.1U/10V_4 C8880.1U/10V_4
R497562/F_4 R4992.05K/F_4
R49810K/F_4
C496 10U/6.3V_8
R259 0_4
ALLOW_LDTSTOP CPU_PROCHOT# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_RST#
A_RST#_SB
A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C
PCIE_NB_SB_TX0P PCIE_NB_SB_TX0N PCIE_NB_SB_TX1P PCIE_NB_SB_TX1N PCIE_NB_SB_TX2P PCIE_NB_SB_TX2N PCIE_NB_SB_TX3P PCIE_NB_SB_TX3N
PCIE_CALRP_SB PCIE_CALRN_SB
+1.2V_PCIE_PVDD
40mA
C514 1U/10V_4
SBSRC_CLKPSBSRC_CLKPSBSRC_CLKPSBSRC_CLKP SBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKNSBSRC_CLKN
R638*0_4
RTC_X1
RTC_X2
U39A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700
IC CTRL(528P) SB700 A11(218S7EALA11FG) P/N : AJALA110T00
100MHZ
RTC XTAL
SB700
Part 1 of 5
PCI EXPRESS INTERFACE
CPU
PCI CLKS
PCI INTERFACE
CLOCK GENERATOR
LPCRTC
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4
PCICLK5/GPIO41
PCIRST#
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8
AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE0# CBE1# CBE2# CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP# PERR# SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70 REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72 GNT4#/GPIO73
CLKRUN#
LOCK#
INTE#/GPIO33
INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36
LPCCLK0 LPCCLK1
LAD0 LAD1 LAD2 LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
INTRUDER_ALERT#
VBAT
P4 P3
PCI_CLK2_R
P1
PCI_CLK3_R
P2
PCI_CLK4_R
T4
PCI_CLK5_R
T3
PCIRST#_L
N1
U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5
AD3 AC4 AE2 AE3
G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15
C3 C2 B2
R57533_4
AD23 AD24 AD25 AD26 AD27 AD28
All the PCI bus has build-in Pull-UP/Down resistors
SERR#
R547*0_4/S
PE_GPIO1 CLKRUN#_R
INTE# INTF# INTG# INTH#
LPC_CLK0 LPC_CLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0#_SB LDRQ1#_SB SB_GPIO65 SERIRQ
RTC_CLK INTRUDER_ALERT# +AVBAT
T65 T89
PCIRST#
PE_GPIO1
R3008.2K_4 R307*8.2K_4
SB_GPIO65
R285*100K/F_4
R29410K/F_4
AD2316 AD2416 AD2516 AD2616 AD2716 AD2816
+AVBAT
20MIL
C933
SERR#36
PV stage chagne to short pad
R562*0_4/S
T57
T92 T68 T90
INTH#29
R25122_4 R50110_4
LAD036,37 LAD136,37 LAD236,37 LAD336,37
LFRAME#36,37
T42 T53 T63
SERIRQ36
RTC_CLK16
20MIL
12
1U/10V_4
RF_OFF#37 D3E GPIO#27
PV stage delete R564
LCD_BK25
CLKRUN#36
PV stage chagne to short pad
R584*1M/F_4
G3 *SHORT_ PAD1
PCI_CLK_TPM16 PCI_CLK316 PCI_CLK416 PCI_CLK516
PCIRST#36
+3V
+3V
R606499/F_4
C934 1U/10V_4
+3VRTC_1
R60310_4
PV stage delete R305PV Reserve for SB700 A14 ASIC
LPC_CLK016 LPC_CLK116
PCLK_LPC_KB392036
C890
5.6P/50V_6
+AVBAT
C931
0.1U/10V_4
+AVBAT
INTRUDER_ALERT# Left not connected (Southbridge has 50-kohm internal pull-up to VBAT).
C512 22P/50V_4
+3VRTC
20MIL20MIL
PCLK_LPC_DEBUG37
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
5
4
3
2
SB700-PCIE/PCI/CPU/LPC 1/4
Date:Sheet of
1246Friday, August 29, 2008
1
1A
http://mycomp.su/x/
5
+3VSUS
NC only ,Can't be install
R304*2.2K_4
R249*2.2K_4
R293*2.2K_4
+3VSUS
DD
CC
R296*10K/F_4
+3V
SCL0/SDATA0 is 3V tolerance AMD datasheet define it
R2542.2K_4 R2562.2K_4
+3VS5
SCL1/SDATA1 is 3V/S5 tolerance AMD datasheet define it
R58110K/F_4 R59010K/F_4
remove pull hi ( chip internal have pull hi )
+3VS5
SCL2/SDATA2 is 3V/S5 tolerance AMD datasheet define it
R50910K/F_4 R50610K/F_4
+3V
R2804.7K_4
+3VS5
R5362.2K_4
R591*0_4
SB_TEST0
SB_TEST1
SB_TEST2
SWI#
PCLK_SMB PDAT_SMB
SB_SMBCLK1 SB_SMBDATA1
SB_SCLK2
SUS_STAT#
SYS_RST#
DNBSWON#
NEWCARD_DETECT34
Clock gen/Robson/TV tuner /DDR2/DDR2 thermal/Accelerometer
CPU_MEMHOT#3,7 PM_THERM#5
PCIE_WAKE#32,37
NEWCARD_WAKE#34
To Azalia
ACZ_SDOUT
BB
ACZ_SYNC
ACZ_BCLK
ACZ_RST#
ACZ_SDIN0_R
R57633_4
R29733_4
R57833_4
R30333_4
PV stage delete R301
C937*10P/50V_4
C580*10P/50V_4
C93910P/50V_4
ACZ_SDOUT_AUDIO28
ACZ_SYNC_AUDIO28
BIT_CLK_AUDIO28
ACZ_RST#_AUDIO28
ACZ_SDIN028
To Modem Board
ACZ_SDOUT
ACZ_SYNC
AA
ACZ_BCLK
ACZ_RST#
ACZ_SDIN1_R
R57733_4
C938*10P/50V_4
R30633_4
C588*10P/50V_4
R57933_4
C94010P/50V_4
R29933_4
PV stage delete R292
5
ACZ_SDOUT_AUDIO_MDC30
ACZ_SYNC_AUDIO_MDC30
BIT_CLK_AUDIO_MDC30
ACZ_RST#_AUDIO_MDC30
ACZ_SDIN130
4
PV stage change to short pad
NEWCARD_DETECT NEWCARD_DETECT_R
T91 T60
SUSB#36
SUSC#36
DNBSWON#36
SB_PWRGD_IN16
SUS_STAT#10
GATEA2036
RCIN#36
SCI#36
KBSMI#36
T69
PCIE_WAKE# PCIE_WAKE#_R
SWI#36
CPU_THERMTRIP#3
WD_PWRGD16
RSMRST#36
T43 T85
LAN_DISABLE#32,36
T45
ACZ_SPKR28,29
PCLK_SMB2,6,7,29,37 PDAT_SMB2,6,7,29,37
PM_BATLOW#36
D3E_SCI#27
+3VS5
R31010K/F_4 R30810K/F_4 R27710K/F_4 R60910K/F_4
ACZ_RST#16
CN15
SB JTAG
*S/W JTAG DEBUG
4
R284*0_4/S
R273*0_4 R209*0_4 R241*0_4
R47*0_4/S R224*0_4 R211*0_4/S
R268*0_4
PV stage change to short pad
R234*0_4
R312*0_4
T46 T50
T48
CPU_MEMHOT#_IN
SB_JTAG_TDO SB_JTAG_TCK SB_JTAG_TDI SB_JTAG_RST#
ACZ_SDIN0_R ACZ_SDIN1_R ACZ_SDIN2_R ACZ_SDIN3_R
+3VSUS
SB_JTAG_TCK SB_JTAG_TDO SB_JTAG_TDI SB_TEST1
SB_JTAG_RST#
SMBALERT#_1
R275*0_4 R28310K/F_4
R522*0_4
1 2 3 4 5 6 7 8
RI# SLP_S2 SUSB# SUSC# DNBSWON# SB_PWRGD_IN SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0 GATEA20 RCIN# SCI# KBSMI# GEVENT5# SYS_RST#
SWI# SB_THERMTRIP# WD_PWRGD
RSMRST#
SATA_IS1 LAN_DISABLE#_SB
SB_NWD_CLK_REQ# ACZ_SPKR
PCLK_SMB PDAT_SMB SB_SMBCLK1 SB_SMBDATA1
PM_BATLOW#SB_SDATA2 SES_INT
NEWCARD_WAKE#_R
ACZ_BCLK ACZ_SDOUT
ACZ_SYNC ACZ_RST#
HD audio interface is
3.3S5 voltage
C469 10P/50V_4
3
U39D
E1
PCI_PME#/GEVENT4#
E2
RI#/EXTEVNT0#
H7
SLP_S2/GPM9#
F5
SLP_S3#
G1
SLP_S5#
H2
PWR_BTN#
H1
PWR_GOOD
K3
SUS_STAT#
H5
TEST2
H4
TEST1
H3
TEST0
Y15
GA20IN/GEVENT0#
W15
KBRST#/GEVENT1#
K4
LPC_PME#/GEVENT3#
K24
LPC_SMI#/EXTEVNT1#
F1
S3_STATE/GEVENT5#
J2
SYS_RESET#/GPM7#
H6
WAKE#/GEVENT8#
F2
BLINK/GPM6#
J6
SMBALERT#/THRMTRIP#/GEVENT2#
W14
NB_PWRGD
D3
RSMRST#
AE18
SATA_IS0#/GPIO10
AD18
CLK_REQ3#/SATA_IS1#/GPIO6
AA19
SMARTVOLT/SATA_IS2#/GPIO4
W17
CLK_REQ0#/SATA_IS3#/GPIO0
V17
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
W20
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21
SPKR/GPIO2
AA18
SCL0/GPOC0#
W18
SDA0/GPOC1#
K1
SCL1/GPOC2#
K2
SDA1/GPOC3#
AA20
DDC1_SCL/GPIO9
Y18
DDC1_SDA/GPIO8
C1
LLB#/GPIO66
Y19
SHUTDOWN#/GPIO5
G5
DDR3_RST#/GEVENT7#
B9
USB_OC6#/IR_TX1/GEVENT6#
B8
USB_OC5#/IR_TX0/GPM5#
A8
USB_OC4#/IR_RX0/GPM4#
A9
USB_OC3#/IR_RX1/GPM3#
E5
USB_OC2#/GPM2#
F8
USB_OC1#/GPM1#
E4
USB_OC0#/GPM0#
M1
AZ_BITCLK
M2
AZ_SDOUT
J7
AZ_SDIN0/GPIO42
J8
AZ_SDIN1/GPIO43
L8
AZ_SDIN2/GPIO44
M3
AZ_SDIN3/GPIO46
L6
AZ_SYNC
M4
AZ_RST#
L5
AZ_DOCK_RST#/GPM8#
H19
IMC_GPIO0
H20
IMC_GPIO1
H21
SPI_CS2#/IMC_GPIO2
F25
IDE_RST#/F_RST#/IMC_GPO3
D22
IMC_GPIO4
E24
IMC_GPIO5
E25
IMC_GPIO6
D23
IMC_GPIO7
SB700
3
2
1
13
SB700
ACPI / WAKE UP EVENTS
USB OC
HD AUDIO
INTEGRATED uC
Part 4 of 5
USBCLK/14M_25M_48M_OSC
INTEGRATED uC
USB_RCOMP
USB MISC
USB_FSD13P USB_FSD13N
USB_FSD12P USB_FSD12N
USB 1.1
USB_HSD11P USB_HSD11N
USB_HSD10P USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB_HSD6N
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB 2.0
USB_HSD4N
GPIO
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
IMC_GPIO8 IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17
IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25
IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41
2
C8 G8
E6 E7
F7 E8
H11 J10
E11 F11
A11 B11
C10 D10
G11 H12
E12 E14
C12 D12
B12 A12
G12 G14
H14 H15
A13 B13
B14 A14
A18 B18 F21 D21 F19 E20 E21 E19 D19 E18
G20 G21 D25 D24 C25 C24 B25 C23
B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18
CLK_48M_USB USB_RCOMP_SB
USB_FSD13P USB_FSD13N
USB_FDS12P USB_FSD12N
USBP11+37 USBP11-37
USBP10+37 USBP10-37
USBP9+31 USBP9-31
USBP8+31 USBP8-31
USBP7+34 USBP7-34
USBP6+31 USBP6-31
USBP5+31 USBP5-31
USBP4+38 USBP4-38
USBP6_CR+26 USBP6_CR-26
USBP2+31 USBP2-31
USBP1+31 USBP1-31
USBP0+31 USBP0-31
SB_SCLK2 SB_SDATA2 SB_SCLK3 SB_SDATA3
SB_GPIO16 SB_GPIO17
SCLK_WLAN34,37
SDATA_WLAN34,37
CLK_48M_USB2
R26911.8K/F_6
T67 T88
T54 T59
TV Min-Card
WLAN Min-Card
USB Connector
USB Connector
NEW CARD
FINGERPRINT
BLUETOOTH
Docking
USB card reader
Carama USB
E-SATA and USB Connector
USB Connector
T44 T47
SB_GPIO1616 SB_GPIO1716
+3VS5
+3VS5
SPI/LPC define
R507 2K/04
3
2N7002EPT
R508 2K/04
3
+3V
2
Q49
+3V
2
Q502N7002EPT
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
SB700-ACPI/GPIO/USB 2/4
Date:Sheet of
1
1
1
CLK_48M_USB
C566 *2.2P/50V_4
PCLK_SMB
PDAT_SMB
1346Friday, August 29, 2008
1A
http://mycomp.su/x/
5
SATA PORT 0,1,2,3 can support AHCI mode
SATA1
DD
SATA ODD
E-SATA
SATA PORT 4,5 are only support IDE mode
CC
PLACE SATA_CAL RES VERY CLOSE TO BALL OF SB700
NOTE:
R361 IS 1K 1% FOR 25MHz XTAL, 4.99K 1% FOR 100MHz INTERNAL CLOCK
BB
PLACE SATA AC COUPLING CAPS CLOSE TO SB600
SATA_TXP034 SATA_TXN034
SATA_RXN034 SATA_RXP034
SATA_TXP434 SATA_TXN434
SATA_RXN434 SATA_RXP434
SATA_TXP231 SATA_TXN231
SATA_RXN231 SATA_RXP231
R2651K/F_4
PLVDD_SATA-­SATA PLL POWER
C5700.01U/16V_4 C5690.01U/16V_4
C5750.01U/16V_4 C5740.01U/16V_4
C5670.01U/16V_4 C5650.01U/16V_4
C5580.01U/16V_4 C5620.01U/16V_4
R361
+3V
SATA_TXP0_C SATA_TXN0_C
SATA_RXN0_C SATA_RXP0_C
SATA_TXP1_C SATA_TXN1_C
SATA_RXN1_C SATA_RXP1_C
SATA_RBIAS_PN
SATA_X1 SATA_X2
SB_SATA_LED#
R37510K/F_4
+3V
+1.2V_PLLVDD_SATA +3V_XTLVDD_SATA
XTLVDD_SATA-- SATA crystal power
C545
27P/50V_4
21
Y4 25MHZ
C529
27P/50V_4
R263 10M_6
SATA_X1
SATA_X2
4
U39B
AD9
SATA_TX0P
AE9
SATA_TX0N
AB10
SATA_RX0N
AC10
SATA_RX0P
AE10
SATA_TX1P
AD10
SATA_TX1N
AD11
SATA_RX1N
AE11
SATA_RX1P
AB12
SATA_TX2P
AC12
SATA_TX2N
AE12
SATA_RX2N
AD12
SATA_RX2P
AD13
SATA_TX3P
AE13
SATA_TX3N
AB14
SATA_RX3N
AC14
SATA_RX3P
AE14
SATA_TX4P
AD14
SATA_TX4N
AD15
SATA_RX4N
AE15
SATA_RX4P
AB16
SATA_TX5P
AC16
SATA_TX5N
AE16
SATA_RX5N
AD16
SATA_RX5P
V12
SATA_CAL
Y12
SATA_X1
AA12
SATA_X2
W11
SATA_ACT#/GPIO67
AA11
PLLVDD_SATA
W12
XTLVDD_SATA
SB700
SB700
Part 2 of 5
SATA PWR SERIAL ATA
IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23
ATA 66/100/133
IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
LAN_RST#/GPIO13
SPI ROM
ROM_RST#/GPIO14
FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49
FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52
TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53 VIN1/GPIO54
HW MONITOR
VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60
IDE_IORDY
IDE_IRQ
IDE_A0 IDE_A1 IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3#
AVDD AVSS
3
AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24
AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23
G6 D2 D1 F4 F3
U15 J1
M8 M5 M7
P5 P8 R8
C6 B6 A6 A5 B5
A4 B4 C4 D4 D5 D6 A7 B7
F6 G7
ID4 BIOS setting default 0 pull Hi
ROM_RST# SB_FANOUT0
SB_FANTACH0 SB_FANTACH1 PORT_80_PWR_DWN
R553*0_4
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4
5mA
+3V_VDD_HWM
C585 *0.1U/10V_4
2
ID2 BIOS setting default 0 pull Hi
820ohm
820ohm
ID3 BIOS setting default 0 pull Hi
820ohm
000
000
ID1 BIOS setting default 0 pull Hi
820ohm
ID0 base on H/W setting pull hi/low 用 10kohm
00
01
00010
00011
T61 T94 T95 T70
PV stage change to short pad
T64 R266*0_4/S T93
T55
T66 T58 T62
PV stage change to short pad
L64*0_6/S
C582 *2.2U/6.3V_6
BT_OFF#31
CHIPSET_PCIE_SLOW_SB#2
ACCLED_EN30
BT_COMBO_EN#37
+3VS5
AVDD--H/W monitor Analog power
+3VS5
R28610K_4
R279*820_4
R270*820_4
R549*820_4
R548*820_4
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
1
SKU name
CROFT 1.0 UMA
CROFT 1.0 discrete
CROFT 1.1 UMA
CROFT 1.1 discrete
R291*10K_4
R278*820_4
R262*820_4
R543*820_4
R544*820_4
14
C666
U22 TC7SH08FU
SATA_LED#30
AA
4
3 5
0.1U/10V_4
2 1
SB_SATA_LED#
+1.2V
( 1.2V @ 60mA)
L59 PBY201209T-181Y-N
+3V
( 3.3V @ 1.2mA)
L58
BLM18PG181SN1D(180,1.5A)_6
+1.2V_PLLVDD_SATA
C540
1U/10V_4
+3V_XTLVDD_SATA
77mA
C561
0.1U/10V_4
1mA
C548
1U/10V_4
Place near ball
C553
22U/6.3V_8
C552
22U/6.3V_8
PROJECT : QT8
Quanta Computer Inc.
SizeDocument NumberRev Custom
5
4
3
2
SB700-ACPI/GPIO/USB 2/4
Date:Sheet of
1446Friday, August 29, 2008
1
1A
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