HP LA-2392, Compaq nx9105, Compaq Presario R3000, Pavilion zv5000, Pavilion zv5200 Schematic

A
1 1
2 2
B
C
D
E
Compal confidential
Schematics Document
ClawHammer AMD K8 with
3 3
4 4
A
nVIDIA Chrush K8
2004-04-16
REV: 0.1
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
LA-2392
Cover Sheet
E
of
153Friday, April 16, 2004
A
B
C
D
E
Compal confidential
File Name : LA-1811
1 1
CRT Connector
TFT/HPA Panel Interface
page 17
TV OUT Connector
2 2
IDSEL:AD18 (PIRQC#,GNT#3,REQ#3)
IDSEL:AD16 (PIRQA#,GNT#0,REQ#0)
IEEE 1394 TSB43AB21A
page 21 page 22
page 18
Mini PCI socket
page 28
3.3V 33 MHz
IDSEL:AD17 (PIRQB#,GNT#1,REQ#1)
LAN
RTL 8101L
page 20
Fan Control
page 18
page 4
nVIDIA
MAP17
page 14, 15, 16
PCI BUS
IDSEL:AD20 (PIRQA#/B#,GNT#2,REQ#2)
CardBus Controller
TI PCI1620
AMD K8
Claw Ham mer Processor
page 4, 5, 6, 7
HT 16x16 800 MHZ
nVIDIA Crush K8
708 BGA
page 11, 12, 13
Thermal Sensor ADM1032
page 4
Memory BUS(DDR)
2.5V DDR- 200/266
USB2.0
AC-LINK
ATA-100 Primary IDE
Secondary IDE
ATA-100
DDR-SO-DIMM X2
BANK 0, 1, 2, 3
page 8, 9,10
USB conn
MDC & BT Conn
Audio CKT
AD1981B
HDD Connector
page 27
page 27
page 25
page 19
AMP & Audio Jack
page 26
CDROM
RJ45/11 CONN
3 3
page 20
RTC CKT.
Power OK CKT.
page 36
Power On/Off CKT.
page 33
EC I/O Bu ffer
DC/DC Int erface CKT.
4 4
page 37
Slot 0/1
Touch Pad
page 33
page 31
page 23
EC NS 97551
page 30
Int.KBD
BIOS
page 33
page 31
LPC BUS
VIA 1211
Super I/O
page 29
PARALLEL FIR
FDD
page 32
page 33page 32
Connector
page 19
SPR CONN.
page 34
*RJ45 CONN *PS2 x2 CONN *CRT CONN *LINE IN JACK *LINE OUT JACK *1394 CONN *SPDIF CONN *DVI CONN *DC JACK *TVOUT CONN *PRINTER PORT *COM PORT *USB CONN x2
Power Circuit DC/DC
page 38, 39, 40, 41, 42, 43, 44
A
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2392
Block Diagram
E
of
253Friday, April 16, 2004
Voltage Rails
A
power plane
State
S0
S1
S3
S5 S4/AC
S5 S4/AC don't exist
O MEANS ON
X MEANS OFF
+1.2VALW +3VALW +5VALW 12VALW
O
O O O
X
+1.25V +2.5V +3V +5V
OO
OO O
XX
+1.2V_HT +1.2VS +1.5VS +2.5VS +3VS +5VS
X XX
PCI Devices
1 1
PCI Device ID
INTERNAL
USB 2.0 AC97 MODEM AD17 N/A AC97 ATA 100 ETHERNET LPC I/F AD12 N / A SMBUS N/A
2 6 6 8 5 K 1 1
EXTERNAL
VGA AD16 E0N/A 1394 LAN CARD BUS Wireless LAN Mini-PCI (no use)
0 1 4 2 3
IDSEL # PIRQREQ/GNT #DEVICE
AD13
AD17 AD20 AD16
AD12
AD16 AD17 AD20 AD18 AD19
N/A
N/A N/A N/A
0 1 2 3 4
G M L
F
A B A, B C D
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2392
Notes List
of
353Friday, April 16, 2004
A
B
C
D
E
H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0
H_CLKIP1 H_CLKIN1 H_CLKIP0 H_CLKIN0
H_CTLIP1 H_CTLIN1 H_CTLIP0 H_CTLIN0
LVREF0
1
C6 1000P_0402_50V7K
2
2
C610
0.1U_0402_16V4Z
1
U3
1 6 4 5
ADM1032AR_SOP8
H_CADIP[0..15] H_CADIN[0..15]
T25 R25 U27 U26 V25
U25 W27 W26
AA27 AA26 AB25 AA25 AC27 AC26 AD25 AC25
T27
T28
V29
U29
V27
V28
Y29 W29
AB29 AA29 AB27 AB28 AD29 AC29 AD27 AD28
Y25 W25
Y27
Y28
R27
R26
T29
R29
AF27 AE26
VDD1 ALERT# THERM# GND
SDATA
U1A
Claw Hammer-DTR
L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0
L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0
L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLIN_H0 L0_CTLIN_L0
L0_REF1 L0_REF0
FOX_PZ75403-2941-42
Thermal Sensor ADM1032
THERMDA_CPU THERMDC_CPU
THERMDA_CPU
2
D+
THERMDC_CPU
3
D-
8
SCLK
7
B
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
HTT Interface
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
LDTSTOP_L
THERMDA_CPU <6> THERMDC_CPU <6>
1
C611 2200P_0402_25V7K
2
EC_SMC_2 <30> EC_SMD_2 <30>
H_CADIP[0..15]<11>
LA-1851
4 4
3 3
2 2
1 1
BDW0 0
LA-1452 REV 0
12
1
C5
2
W=15mil
12
R454 @10K_0402_5%
A
H_CLKIP1<11> H_CLKIN1<11> H_CLKIP0<11> H_CLKIN0<11>
H_CTLIP0<11> H_CTLIN0<11>
LVREF1
R10
44.2_0603_1%
12
+3VS
+1.2V_HT
R5 49.9_0402_1%
1 2
R6 49.9_0402_1%
1 2
+1.2V_HT +2.5VS
R8 44.2_0603_1%
1000P_0402_50V7K
H_CADOP[0..15] H_CADON[0..15]
H_CADOP[0..15] <11> H_CADON[0..15] <11>H_CADIN[0..15]<11>
Fan Control Circuit 1
H_CADOP15
N26
H_CADON15
N27
H_CADOP14
L25
H_CADON14
M25
H_CADOP13
L26
H_CADON13
L27
H_CADOP12
J25
H_CADON12
K25
H_CADOP11
G25
H_CADON11
H25
H_CADOP10
G26
H_CADON10
G27
H_CADOP9
E25
H_CADON9
F25
H_CADOP8
E26
H_CADON8
E27
H_CADOP7
N29
H_CADON7
P29
H_CADOP6
M28
H_CADON6
M27
H_CADOP5
L29
H_CADON5
M29
H_CADOP4
K28
H_CADON4
K27
H_CADOP3
H28
H_CADON3
H27
H_CADOP2
G29
H_CADON2
H29
H_CADOP1
F28
H_CADON1
F27
H_CADOP0
E29
H_CADON0
F29
H_CLKOP1
J26
H_CLKON1
J27
H_CLKOP0
J29
H_CLKON0
K29 N25
P25
H_CTLOP0
P28
H_CTLON0
P27
LDTSTOP#
AJ27
1 2
R7 1K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
H_CLKOP1 <11> H_CLKON1 <11> H_CLKOP0 <11> H_CLKON0 <11>
H_CTLOP0 <11> H_CTLON0 <11>
LDTSTOP# <11>
C
EN_FAN1<30>
+12VALW
Fan Control Circuit 2
EN_FAN2<30>
EN_FAN1
12
R2
10K_0402_5%
C775
0.1U_0402_25V4K
R11
10K_0402_5%
EN_FAN2
12
+12VALW
3
+IN
2
-IN
1 2
R3
5 6
1 2
R12
8
P
OUT
U2A
G
LM358A_SO8
4
8.2K_0402_5%
+IN
-IN
FAN1_ON
1
U2B
7
OUT
LM358A_SO8
8.2K_0402_5%
D
FAN_SPEED1<30>
FAN2_ON
FAN_SPEED2<30>
Q1
FMMT619_SOT23
R1
1 2
100_0402_5%
1N4148_SOT23
+3VS
FMMT619_SOT23
R9
1 2
100_0402_5%
+3VS
+5VS
1
B
2
2
C2
0.1U_0402_16V4Z
1
D2
R4
1 2
10K_0402_5%
+5VS
Q2
B
2
2
C7
0.1U_0402_16V4Z
1
D4
1N4148_SOT23
R13
1 2
10K_0402_5%
C
E
3
12
0.1U_0402_16V4Z
1
C
E
3
12
@1SS355_SOD323
FAN1
1
C3
2
@1SS355_SOD323
1
C8
2
10U_0805_10V4Z
FAN2
12
D1
1
C612 100P_0402_50V8K
2
12
D3
1
C614
0.1U_0402_16V4Z
2
1
C1 10U_0805_10V4Z
2
ACES_85205-0300
1
C613 1000P_0402_50V7K
2
1
C4 10U_0805_10V4Z
2
ACES_85205-0300
1
C615 1000P_0402_50V7K
2
JP1
JP2
1 2 3
1 2 3
Compal Electronics, Inc.
Title
Claw Harmmer CPU (Host Bus)
Size Document Number Rev Custom
LA-2392
Date: Sheet of
453Friday, April 16 , 2004
E
0.1
A
B
C
D
E
+2.5V
DDR_SDQ[0..63]<8>
1 1
2 2
3 3
DDR_SDM[0..7]<8>
DDR_SDQS[0..7]<8>
+1.25VREF_CPU
50 mil width
R1634.8_0603_1%
12
R1734.8_0603_1%
12
DDR_SDQ63 DDR_SDQ62 DDR_SDQ61 DDR_SDQ60 DDR_SDQ59 DDR_SDQ58 DDR_SDQ57 DDR_SDQ56 DDR_SDQ55 DDR_SDQ54 DDR_SDQ53 DDR_SDQ52 DDR_SDQ51 DDR_SDQ50 DDR_SDQ49 DDR_SDQ48 DDR_SDQ47 DDR_SDQ46 DDR_SDQ45 DDR_SDQ44 DDR_SDQ43 DDR_SDQ42 DDR_SDQ41 DDR_SDQ40 DDR_SDQ39 DDR_SDQ38 DDR_SDQ37 DDR_SDQ36 DDR_SDQ35 DDR_SDQ34 DDR_SDQ33 DDR_SDQ32 DDR_SDQ31 DDR_SDQ30 DDR_SDQ29 DDR_SDQ28 DDR_SDQ27 DDR_SDQ26 DDR_SDQ25 DDR_SDQ24 DDR_SDQ23 DDR_SDQ22 DDR_SDQ21 DDR_SDQ20 DDR_SDQ19 DDR_SDQ18 DDR_SDQ17 DDR_SDQ16 DDR_SDQ15 DDR_SDQ14 DDR_SDQ13 DDR_SDQ12 DDR_SDQ11 DDR_SDQ10 DDR_SDQ9 DDR_SDQ8 DDR_SDQ7 DDR_SDQ6 DDR_SDQ5 DDR_SDQ4 DDR_SDQ3 DDR_SDQ2 DDR_SDQ1 DDR_SDQ0
DDR_SDM7 DDR_SDM6 DDR_SDM5 DDR_SDM4 DDR_SDM3 DDR_SDM2 DDR_SDM1 DDR_SDM0
DDR_SDQS7 DDR_SDQS6 DDR_SDQS5 DDR_SDQS4 DDR_SDQS3 DDR_SDQS2 DDR_SDQS1 DDR_SDQS0
MEMZN MEMZP
AG12
D14 C14
A16 B15 A12 B11 A17 A15
C13
A11 A10
C11
AC1 AC3
AC2 AD1 AE1 AE3 AG3
AJ4 AE2 AF1 AH3
AJ3
AJ5
AJ6
AJ7 AH9 AG5 AH5
AJ9
AJ10
AH11
AJ11
AH15
AJ15
AG11
AJ12 AJ14 AJ16
A13
AA1 AG1 AH7
AH13
A14
AB1
AJ2
AJ8
AJ13
B9 C7 A6
A9 A5 B5 C5 A4 E2 E1 A3 B3 E3 F1 G2 G1 L3 L1 G3 J2
L2 M1 W1 W3
W2
Y1
R1
A7
C2
H1
T1
A8
D1
J1
U1B
MEMVREF1 MEMZN
MEMZP MEMDATA63
MEMDATA62 MEMDATA61 MEMDATA60 MEMDATA59 MEMDATA58 MEMDATA57 MEMDATA56 MEMDATA55 MEMDATA54 MEMDATA53 MEMDATA52 MEMDATA51 MEMDATA50 MEMDATA49 MEMDATA48 MEMDATA47 MEMDATA46 MEMDATA45 MEMDATA44 MEMDATA43 MEMDATA42 MEMDATA41 MEMDATA40 MEMDATA39 MEMDATA38 MEMDATA37 MEMDATA36 MEMDATA35 MEMDATA34 MEMDATA33 MEMDATA32 MEMDATA31 MEMDATA30 MEMDATA29 MEMDATA28 MEMDATA27 MEMDATA26 MEMDATA25 MEMDATA24 MEMDATA23 MEMDATA22 MEMDATA21 MEMDATA20 MEMDATA19 MEMDATA18 MEMDATA17 MEMDATA16 MEMDATA15 MEMDATA14 MEMDATA13 MEMDATA12 MEMDATA11 MEMDATA10 MEMDATA9 MEMDATA8 MEMDATA7 MEMDATA6 MEMDATA5 MEMDATA4 MEMDATA3 MEMDATA2 MEMDATA1 MEMDATA0
MEMDQS17 MEMDQS16 MEMDQS15 MEMDQS14 MEMDQS13 MEMDQS12 MEMDQS11 MEMDQS10 MEMDQS9 MEMDQS8 MEMDQS7 MEMDQS6 MEMDQS5 MEMDQS4 MEMDQS3 MEMDQS2 MEMDQS1 MEMDQS0
Claw Hammer-DTR
DDR Memory
A CHANGEL ADDRESSB CHANGEL ADDRESS
MEMCKEA MEMCKEB
MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0
MEMCS_L7 MEMCS_L6 MEMCS_L5 MEMCS_L4 MEMCS_L3 MEMCS_L2 MEMCS_L1 MEMCS_L0
MEMRASA_L MEMCASA_L
MEMWEA_L
MEMBANKA1 MEMBANKA0
MEMADDA13 MEMADDA12 MEMADDA11 MEMADDA10
MEMADDA9 MEMADDA8 MEMADDA7 MEMADDA6 MEMADDA5 MEMADDA4 MEMADDA3 MEMADDA2 MEMADDA1 MEMADDA0
MEMRASB_L MEMCASB_L
MEMWEB_L
MEMBANKB1 MEMBANKB0
MEMADDB_B13 MEMADDB_B12 MEMADDB_B11 MEMADDB_B10
MEMADDB_B9 MEMADDB_B8 MEMADDB_B7 MEMADDB_B6 MEMADDB_B5 MEMADDB_B4 MEMADDB_B3 MEMADDB_B2 MEMADDB_B1 MEMADDB_B0
MEMCHECK7 MEMCHECK6 MEMCHECK5 MEMCHECK4 MEMCHECK3 MEMCHECK2 MEMCHECK1 MEMCHECK0
AE8 AE7
D10 C10 E12 E11 AF8 AG8 AF10 AE10 V3 V4 K5 K4 R5 P5 P3 P4
D8 C8 E8 E7 D6 E6 C4 E5
H5 D4 G5
K3 H3
E10 AE6 AF3 M5 AE5 AB5 AD3 Y5 AB4 Y3 V5 T5 T3 N5
H4 F5 F4
L5 J5
E9 AF6 AF4 M4 AD5 AC5 AD4 AA5 AB3 Y4 W5 U5 T4 M3
N3 N1 U3 V1 N2 P1 U1 U2
DDR_CKE0 DDR_CKE1
DDR_CLK7 DDR_CLK7# DDR_CLK6 DDR_CLK6# DDR_CLK5 DDR_CLK5# DDR_CLK4 DDR_CLK4#
DDR_CLK1 DDR_CLK1# DDR_CLK0 DDR_CLK0#
DDR_SCS#3 DDR_SCS#2 DDR_SCS#1 DDR_SCS#0
DDR_SMAA13 DDR_SMAA12 DDR_SMAA11 DDR_SMAA10 DDR_SMAA9 DDR_SMAA8 DDR_SMAA7 DDR_SMAA6 DDR_SMAA5 DDR_SMAA4 DDR_SMAA3 DDR_SMAA2 DDR_SMAA1 DDR_SMAA0
DDR_CKE0 <8> DDR_CKE1 <8>
DDR_CLK7 <8> DDR_CLK7# <8> DDR_CLK6 <9> DDR_CLK6# <9> DDR_CLK5 <8> DDR_CLK5# <8> DDR_CLK4 <9> DDR_CLK4# <9>
R22 10K_0402_5%
1 2
R23 10K_0402_5% R24 10K_0402_5% R25 10K_0402_5%
1 2 1 2 1 2
DDR_SCS#3 <9> DDR_SCS#2 <9> DDR_SCS#1 <8,9> DDR_SCS#0 <8,9>
DDR_SRASA# <8,9> DDR_SCASA# <8,9> DDR_SWEA# <8,9>
DDR_SBSA1 <8,9> DDR_SBSA0 <8,9>
DDR_SMAA[0..13] <8,9>
+2.5V
DDR_CLK5/5# & DDR_CLK7/7# route to nearest DIMM DDR_CLK4/4# & DDR_CLK6/6# route to farthest DIMM
R18 120_0402_5%
DDR_CLK6 DDR_CLK5 DDR_CLK4
1 2
R19 120_0402_5%
1 2
R20 120_0402_5%
1 2
R21 120_0402_5%
1 2
within 1.00"
+2.5V
12
R26
100_0402_1%
12
R27
100_0402_1%
0.1U_0402_10V6K
1
C11
2
DDR_CLK7#DDR_CLK7 DDR_CLK6# DDR_CLK5# DDR_CLK4#
+1.25VREF_CPU
1
C12 1000P_0402_50V7K
2
4 4
A
FOX_PZ75403-2941-42
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Compal Electronics, Inc.
Title
Claw Harmmer (MEMORY BUS)
Size Document Number Rev Custom
LA-2392
Date: Sheet of
553Friday, April 16 , 2004
E
0.1
A
B
C
D
E
+1.25V
U1C
TP_M_RESET#
1 1
CPU_CLK<11>
CPU_CLK#<11>
Place 169 Ohm within 0.5" from CPU Route as DIF 5/5/5/20
+2.5VDDA
2 2
+2.5VS
3 3
4 4
C20 3900P_0402_50V7K
169_0402_1%
C30 3900P_0402_50V7K
L1 LQG21F4R7N00_0805
1 2
1
+
C40 100U_D2_10VM
2
4.7U_0805_6.3V6K
H_THERMTRIP#
12
R37 1K_0402_5% R38 330_0402_5% R39 330_0402_5%
@100_0402_5%
H_RST#
R563
JOPEN
DBREQ# DBRDY TCK TMS TDI TRST# TDO
H_RST#
12
H_PWRGD
12
J3
R40
@560_0402_5%
A
H_THERMTRIP#<11>
H_RST#<11>
12
12
Route as DIFF p air 10/5/10
1
C41
2
H_PWRGD<11>
12
R28
VDDIO_SENSE
3300P_0402_50V7K
1
C42
2
0.22U_0603_10V7K
0.22U_0603_10V7K
R29 80.6_0402_1%
Place within 0.5" from CPU Route as 80 Ohm DIFF impedence 8/5/20
COREFB<44> COREFB#<44>
+VDDA
1
C43
2
THERMDA_CPU<4> THERMDC_CPU<4>
1
C63
2
1 2
+2.5VS
@560_0402_5%
R41
12
12
@
@
12
12
R43
@560_0402_5%
@
R42 @560_0402_5%
0.22U_0603_10V7K
@560_0402_5%
R44
@
H_THERMTRIP# H_RST# H_PWRGD
CLKIN CLKIN# FBCLKOUT
12
FBCLKOUT#
COREFB COREFB#
VDDIO_SENSE
50 mils width
VID4<44> VID3<44> VID2<44> VID1<44> VID0<44>
DBRDY DBREQ#
TDO TMS TCK TRST# SCANCLK2 TDI
4.7U_0805_6.3V6K
1
2
12
@
R45 @560_0402_5%
1
C64
2
+1.25V +1.25V
TP_K8_A28 TP_K8_AJ28
R46
12
12
@560_0402_5%
@
C68
@
VID4 VID3 VID2 VID1 VID0
+2.5VS
A20
AF20
AE18
AJ21 AH21 AH19
AJ19
A23 A24 B23
AE12
AF12 AE11
AH25
AJ25 AG13
AF14 AG14
AF15 AE15
AH17 AE19
A26 A27
A22 E20 E17 B21 A21
D29 D27 D25 C28 C26 B29 B27
D17 A18 B17 C17 C16
A28
AJ28
@SAMTEC_ASP-68200-07
Claw Hammer-DTR
THERMTRIP_L RESET_L PWROK CLKIN_H
CLKIN_L FBCLKOUT_H FBCLKOUT_L
COREFB_H COREFB_L CORE_SENSE
VDDIOFB_H VDDIOFB_L VDDIO_SENSE
VDDA1 VDDA2
VID4 VID3 VID2 VID1 VID0
DBRDY DBREQ_L
THERMDA THERMDC
TDO TMS TCK TRST_L TDI
VLDT0_A VLDT0_A VLDT0_A VLDT0_A VLDT0_A VLDT0_A VLDT0_A
VTT_A VTT_A VTT_A VTT_A VTT_A
KEY1 KEY0
FOX_PZ75403-2941-42
JP3
@
B
Clock
Debug
JTAG
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
2423 26
Miscellaneous
VTT_SENSE
AG10
NC
E14
NC
D12
NC
E13
NC
C12
NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC
VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B VLDT0_B
VTT_B VTT_B VTT_B VTT_B VTT_B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D22 C22 B13 B7 C3 K1 R2 AA3 F3 C23 AG7 AE22 C24 A25 C9 AE23 AF23 AF22 AF21 C1 J3 R3 AA2 D3 AG2 B18 AH1 AE21 C20 AG4 C6 AG6 AE9 AG9 AF18 AJ23 AH23 AE24 AF24 C15 AG18 AH18 AG17 AJ18 C18 A19 D20 C21 D18 C19 B19
AH29 AH27 AG28 AG26 AF29 AE28 AF25
AG15 AF16 AG16 AH16 AJ17 AE13
TP_K8_D22 TP_K8_C22
CLAW_ANALOG3 CLAW_ANALOG2 CLAW_ANALOG1 CLAW_ANALOG0
BPSCLK BPSCLK# TP_K8_AE24 TP_K8_AF24 TP_K8_C15 TP_CPU_BP3 TP_CPU_BP2 BP1 BP0 SINCHN BRN# SCANCLK1
SCANEN SCANSHENB SCANSHENA
+1.2V_HT
VTT_SENSE
C
H_PWRGD
1
C793
470P_0402_50V7K
R30 820_0402_5%
1 2
R31 820_0402_5%
1 2
R32 680_0402_5%
1 2
R33 680_0402_5%
1 2
R34 680_0402_5%
1 2
R35 680_0402_5%
1 2
R36 680_0402_5%
1 2
VTT_SENSE
2
+2.5V
+2.5VS
470U_D2_2.5VM
4.7U_0805_6.3V6K
0.22U_0603_10V7K
470U_D2_2.5VM
1
2
+1.25V
1
2
+1.25V
1
2
1U_0603_10V6K
1
+
+
C14
C13
2
@330U_D_2VM_R15
4.7U_0805_6.3V6K
C21
0.22U_0603_10V7K
C31
+3VS +2.5VDDA
1
C22
2
4.7U_0805_6.3V6K
1
C32
2
0.22U_0603_10V7K
1
C734
1
2
1
2
2
VR_ON<11,44>
SCANCLK2 SCANCLK1 SCANEN SCANSHENB
+1.2V_HT
0.22U_0603_10V7K
250 mil
1
+
C59
2
100U_D2_10VM
D
@220U_D2_2.5VM
1
2
4.7U_0805_6.3V6K
C23
C33
1
+
C15
2
1
C24
2
4.7U_0805_6.3V6K
0.22U_0603_10V7K
1
C34
2
0.22U_0603_10V7K
1 2 3
RP1
4 5 3 6 2 7 1 8
680_1206_8P4R_5%
1
1
C60
C61
2
2
0.22U_0603_10V7K
Compal Electronics, Inc.
Title
ClawHarmmer ( MISC )
Size Document Number Rev Custom
LA-2392
Date: Sheet of
1
+
+
C16
2
330U_6.3V_M
4.7U_0805_6.3V6K
1
C25
2
0.22U_0603_10V7K
1
C35
2
U39
VIN
VOUT GND SD#
SI9183_SOT23-5
0.22U_0603_10V7K
1
C62
2
0.22U_0603_10V7K
C810
1
C26
2
1
C36
2
BP
1
2
+1.25V
100U_D2_10VM
4.7U_0805_6.3V6K
1
C27
2
4.7U_0805_6.3V6K
1
C37
2
0.22U_0603_10V7K
5
4
1
C736
0.01U_0402_16V7K
2
0.22U_0603_10V7K
1
C66
C65
2
Near SocketNear Power Supply
100U_D2_10VM
1
2
0.22U_0603_10V7K
E
1
+
C17
2
1
C28
2
4.7U_0805_6.3V6K
1
C38
2
0.22U_0603_10V7K
1
C735 1U_0603_10V6K
2
1
C67
2
0.22U_0603_10V7K
653Friday, April 16 , 2004
+
C18
1
C29
2
1
C39
2
0.1
A
AH20 AB21
+CPU_CORE +2.5V
U1D
L7
VDD
AC15
VDD
H18
VDD
B20
VDD
E21
VDD
1 1
2 2
3 3
4 4
H22
VDD
J23
VDD
H24
VDD
F26
VDD
N7
VDD
L9
VDD
V10
VDD
G13
VDD
K14
VDD
Y14
VDD
AB14
VDD
G15
VDD
J15
VDD
AA15
VDD
H16
VDD
K16
VDD
Y16
VDD
AB16
VDD
G17
VDD
J17
VDD
AA17
VDD
AC17
VDD
AE17
VDD
F18
VDD
K18
VDD
Y18
VDD
AB18
VDD
AD18
VDD
AG19
VDD
E19
VDD
G19
VDD
AC19
VDD
AA19
VDD
J19
VDD
F20
VDD
H20
VDD
K20
VDD
M20
VDD
P20
VDD
T20
VDD
V20
VDD
Y20
VDD
AB20
VDD
AD20
VDD
G21
VDD
J21
VDD
L21
VDD
N21
VDD
R21
VDD
U21
VDD
W21
VDD
AA21
VDD
AC21
VDD
F22
VDD
K22
VDD
M22
VDD
P22
VDD
T22
VDD
V22
VDD
Y22
VDD
AB22
VDD
AD22
VDD
E23
VDD
G23
VDD
L23
VDD
N23
VDD
R23
VDD
U23
VDD
W23
VDD
AA23
VDD
AC23
VDD
B24
VDD
D24
VDD
F24
VDD
K24
VDD
M24
VDD
P24
VDD
T24
VDD
V24
VDD
Y24
VDD
AB24
VDD
AD24
VDD
AH24
VDD
AE25
VDD
K26
VDD
P26
VDD
V26
VDD
FOX_PZ75403-2941-42
POWER
A
VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
E4 G4 J4 L4 N4 U4 W4 AA4 AC4 AE4 D5 AF5 F6 H6 K6 M6 P6 T6 V6 Y6 AB6 AD6 D7 G7 J7 AA7 AC7 AF7 F8 H8 AB8 AD8 D9 G9 AC9 AF9 F10 AD10 D11 AF11 F12 AD12 D13 AF13 F14 AD14 F16 AD16 D15 R4
N28 U28 AA28 AE27 R7 U7 W7 K8 M8 P8 T8 V8 Y8 J9 N9 R9 U9 W9 AA9 H10 K10 M10 P10 T10 Y10 AB10 G11 J11 AA11 AC11 H12 K12 Y12 AB12 J13 AA13 AC13 H14 AB26 E28 J28
+CPU_CORE
W22
M23
L24 AG25 AG27
AF2
AA8
AB9 AA10
B14
Y15 AE16
G20
R20
U20
W20 AA20 AC20 AE20 AG20
AJ20
D21 F21 H21 K21 M21 P21 T21 V21
Y21 AD21 AG21
B22
E22
G22
L22
N22
R22
U22 AG29 AA22 AC22 AG22 AH22
AJ22
D23
F23
H23
K23
P23
T23
V23
Y23 AB23 AD23 AG23
E24
G24
N24
R24
U24
W24 AA24 AC24 AG24
AJ24
B25 C25 B26 D26 H26 M26 T26 Y26
AD26
AF26
AH26
C27 B28 D28 G28 F15
H15 AB17 AD17
B16
G18 AA18 AC18
D19
F19
H19
K19
Y19 AB19 AD19
AF19
L20
N20
J12
J18
J22
J24
J20
B
U1E
B2
VSS VSS VSS VSS VSS VSS VSS VSS
D2
VSS VSS
W6
VSS
Y7
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
FOX_PZ75403-2941-42
B
L28
VSS
R28
VSS
W28
VSS
AC28
VSS
AF28
VSS
AH28
VSS
C29
VSS
F2
VSS
H2
VSS
K2
VSS
M2
VSS
P2
VSS
T2
VSS
V2
VSS
Y2
VSS
AB2
VSS
AD2
VSS
AH2
VSS
B4
VSS
AH4
VSS
B6
VSS
G6
VSS
J6
VSS
L6
VSS
N6
VSS
R6
VSS
U6
VSS
AA6
VSS
AC6
VSS
AH6
VSS
F7
VSS
H7
VSS
K7
VSS
M7
VSS
P7
VSS
T7
VSS
V7
VSS
AB7
VSS
AD7
VSS
B8
VSS
G8
VSS
J8
VSS
L8
VSS
N8
VSS
R8
VSS
U8
VSS
W8
VSS
AC8
VSS
AH8
VSS
F9
VSS
H9
VSS
K9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
M9 P9 T9 V9 Y9 AD9 B10 G10 J10 L10 N10 R10 U10 W10 AC10 AH10 F11 H11 K11 Y11 AB11 AD11 B12 G12 AA12 AC12 AH12 F13 H13 K13 Y13 AB13 AD13 AF17 G14 J14 AA14 AC14 AE14 D16 E15 K15 AB15 AD15 AH14 E16 G16 J16 AA16 AC16 AE29 AJ26 E18 F17 H17 K17 Y17
POWER
C
+CPU_CORE
330U_D_2VM_R15
+CPU_CORE
@330U_D_2VM_R15
+CPU_CORE
10U_1206_6.3V7K
+CPU_CORE
4.7U_0805_6.3V6K
330U_D_2VM_R15
+
C69
@330U_D_2VM_R15
+
C79
10U_1206_6.3V7K
C89
4.7U_0805_6.3V6K
C97
1
+
C70
2
1
+
C80
2
1
C90
2
10U_1206_6.3V7K
1
C98
2
4.7U_0805_6.3V6K
330U_D_2VM_R15
330U_D_2VM_R15
1
2
1
2
1
2
4 in Socket Cavity, 2 on backside under Socket
1
2
1
+
2
1
+
2
10U_1206_6.3V7K
1
C91
2
4.7U_0805_6.3V6K
1
C99
2
330U_D_2VM_R15
1
+
C71
2
@330U_D_2VM_R15
1
+
C81
2
1
C92
2
10U_1206_6.3V7K
1
C100
2
4.7U_0805_6.3V6K
C72
C82
1
2
1
2
D
330U_D_2VM_R15
1
+
C73
2
330U_D_2VM_R15
@330U_D_2VM_R15
1
+
C83
2
@330U_D_2VM_R15
10U_1206_6.3V7K
1
C94
C93
2
4.7U_0805_6.3V6K
1
C101
C102
2
4.7U_0805_6.3V6K
1
+
C74
2
@330U_D_2VM_R15
1
+
C84
2
@330U_D_2VM_R15
1
C103
2
CPU Decouping Capacitor
+2.5V+2.5V
4.7U_0805_6.3V6K
1
1
2
4.7U_0805_6.3V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
C111
C112
2
D
1
C113
2
0.22U_0603_10V7K
Near Socket
E
330U_D_2VM_R15
1
2
1
2
+CPU_CORE
+CPU_CORE
0.22U_0603_10V7K
0.22U_0603_10V7K
1
+
C76
2
@330U_D_2VM_R15
1
+
C85
2
1
C95 1000P_0402_50V7K
2
0.22U_0603_10V7K
1
C104
2
In Socket CavityClose to Socket
Loop Bandwidth KHz
20 50
* 300 3300
1
1
C114
2
2
0.22U_0603_10V7K
Compal Electronics, Inc.
Title
Claw Harmme r (P ower & Ground)
Size Document Number Rev Custom
LA-2392
Date: Sheet of
+
C77
@330U_D_2VM_R15
+
C86
@330U_D_2VM_R15
1
C105
2
0.22U_0603_10V7K
0.22U_0603_10V7K
1
C115
2
1
+
C78
2
1
+
C87
2
1
C110
0.1U_0402_10V6K
2
0.22U_0603_10V7K
1
1
2
C107
C106
2
0.22U_0603_10V7K
Bulk Cappacitance uF
23000 9000
0.22U_0603_10V7K
1
1
C117
C116
2
0.22U_0603_10V7K
2
0.22U_0603_10V7K
1
C108
2
C118
E
1
C109
2
Total ESR
2.5m ohm (AMD)
0.9m ohm
1.5m ohm
753Friday, April 16 , 2004
0.1
A
RP2
DDR_SDQ1 DDR_SDQ5 DDR_SDQ4 DDR_SDQ0
DDR_SDQS0
1 1
2 2
3 3
4 4
DDR_SDM0 DDR_DM0
DDR_SDQ6 DDR_SDQ3 DDR_SDQ7 DDR_DQ7 DDR_SDQ2
DDR_SDQ13 DDR_SDQ9 DDR_SDQ8 DDR_SDQ12
DDR_SDQS1 DDR_SDM1
DDR_SDQ15 DDR_SDQ14 DDR_DQ14 DDR_SDQ11 DDR_SDQ10
DDR_SDQ19 DDR_SDQ20 DDR_SDQ21 DDR_SDQ17
DDR_SDQS2 DDR_SDM2
DDR_SDQ22 DDR_SDQ18 DDR_DQ18 DDR_SDQ16 DDR_SDQ23
DDR_SDQ28 DDR_SDQ24 DDR_SDQ25 DDR_SDQ29
DDR_SDQS3 DDR_SDM3
DDR_SDQ30 DDR_SDQ26 DDR_DQ26 DDR_SDQ31 DDR_SDQ27
DDR_SDQS[0..7]<5> DDR_SDQ[0..63]<5>
DDR_SDM[0..7]<5> DDR_SMAA[0..13]<5,9>
A
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP4
1 4 2 3
10_0404_4P2R_5% RP6
1 8 2 7 3 6 4 5
10_0804_8P4R_5% RP8
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP10
1 4 2 3
10_0404_4P2R_5% RP12
1 8 2 7 3 6 4 5
10_0804_8P4R_5% RP14
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP16
1 4 2 3
10_0404_4P2R_5% RP18
1 8 2 7 3 6 4 5
10_0804_8P4R_5% RP20
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP22
1 4 2 3
10_0404_4P2R_5% RP24
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
DDR_DQ1 DDR_DQ5 DDR_DQ4 DDR_DQ0
DDR_DQS0
DDR_DQ6 DDR_DQ3
DDR_DQ2
DDR_DQ13 DDR_DQ9 DDR_DQ8 DDR_DQ12
DDR_DQS1 DDR_DM1
DDR_DQ15 DDR_DQ11
DDR_DQ10
DDR_DQ19 DDR_DQ20 DDR_DQ21 DDR_DQ17
DDR_DQS2 DDR_DM2
DDR_DQ22 DDR_DQ16
DDR_DQ23
DDR_DQ28 DDR_DQ24 DDR_DQ25 DDR_DQ29
DDR_DQS3 DDR_DM3
DDR_DQ30 DDR_DQ31
DDR_DQ27
DDR_SDQS[0..7]
DDR_SDQ[0..63] DDR_SDM[0..7]
DDR_SMAA[0..13]
B
RP3
DDR_SDQ37 DDR_SDQ32 DDR_SDQ36 DDR_SDQ33
DDR_SDQS4 DDR_SDM4
DDR_SDQ38 DDR_SDQ34 DDR_DQ34 DDR_SDQ35 DDR_SDQ39
DDR_SDQ44 DDR_SDQ40 DDR_SDQ41 DDR_SDQ45
DDR_SDQS5 DDR_SDM5
DDR_SDQ46 DDR_SDQ42 DDR_DQ42 DDR_SDQ47 DDR_SDQ43
DDR_SDQ49 DDR_SDQ48 DDR_SDQ53 DDR_SDQ52
DDR_SDQS6 DDR_SDM6
DDR_SDQ55 DDR_SDQ54 DDR_DQ54 DDR_SDQ50 DDR_SDQ51
DDR_SDQ56 DDR_SDQ60 DDR_SDQ57 DDR_SDQ61
DDR_SDQS7 DDR_SDM7
DDR_SDQ58 DDR_SDQ63 DDR_DQ63 DDR_SDQ59 DDR_SDQ62
DDR_CKE0<5>
DDR_CKE1<5> DDR_CKE1_SR <9>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP5
1 4 2 3
10_0404_4P2R_5% RP7
1 8 2 7 3 6 4 5
10_0804_8P4R_5% RP9
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP11
1 4 2 3
10_0404_4P2R_5% RP13
1 8 2 7 3 6 4 5
10_0804_8P4R_5% RP15
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP17
1 4 2 3
10_0404_4P2R_5% RP19
1 8 2 7 3 6 4 5
10_0804_8P4R_5% RP21
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
RP23
1 4 2 3
10_0404_4P2R_5% RP25
1 8 2 7 3 6 4 5
10_0804_8P4R_5%
R47 10_0402_5%
R48 10_0402_5%
DDR_DQ37 DDR_DQ32 DDR_DQ36 DDR_DQ33
DDR_DQS4 DDR_DM4
DDR_DQ38 DDR_DQ35
DDR_DQ39
DDR_DQ44 DDR_DQ40 DDR_DQ41 DDR_DQ45
DDR_DQS5 DDR_DM5
DDR_DQ46 DDR_DQ47
DDR_DQ43
DDR_DQ49 DDR_DQ48 DDR_DQ53 DDR_DQ52
DDR_DQS6 DDR_DM6
DDR_DQ55 DDR_DQ50
DDR_DQ51
DDR_DQ56 DDR_DQ60 DDR_DQ57 DDR_DQ61
DDR_DQS7 DDR_DM7
DDR_DQ58 DDR_DQ59
DDR_DQ62
1 2
1 2
C
C
Layout note Place these resistors
close to DIMM0, all trace length<500 mil
DDR_CKE0_SR
DDR_CKE1_SR
D
Note: DDR_SMAA13 Recommend for AMD
DDR_CKE0_SR <9>
D
E
+2.5V
JP4
1
VREF
3
DDR_DQ5 DDR_DQ1
DDR_DQS0 DDR_DQ2
DDR_DQ6 DDR_DQ8
DDR_DQ9 DDR_DQS1
DDR_DQ14 DDR_DQ15
DDR_CLK5<5> DDR_CLK5#<5>
DDR_DQ20 DDR_DQ16
DDR_DQS2 DDR_DQ18
DDR_DQ22 DDR_DQ24
DDR_DQ28 DDR_DQS3
DDR_DQ26 DDR_DQ30
DDR_CKE0_SR DDR_SMAA12
DDR_SMAA9 DDR_SMAA7
DDR_SMAA5 DDR_SMAA3 DDR_SMAA1
DDR_SMAA10
DDR_SBSA0<5,9> DDR_SWEA#<5,9> DDR_SCS#0<5,9>
DIMM_SMDATA<9,12>
DDR_SBSA0 DDR_SWEA# DDR_SCS#0 DDR_SMAA13
DDR_DQ33 DDR_DQ36
DDR_DQS4 DDR_DQ34
DDR_DQ38 DDR_DQ40
DDR_DQ44 DDR_DQS5
DDR_DQ42 DDR_DQ46
DDR_DQ48 DDR_DQ49
DDR_DQS6 DDR_DQ54
DDR_DQ55 DDR_DQ60
DDR_DQ56 DDR_DQS7
DDR_DQ63 DDR_DQ58
DIMM_SMCLK<9,12>
+3VS
E
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
AMP_1565918-1
F
DU/RESET#
SO-DIMM0
REVERSE
F
VREF
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
DQ12
VDD
DQ13
DM1
VSS DQ14 DQ15
VDD
VDD
VSS
VSS
DQ20 DQ21
VDD
DM2 DQ22
VSS DQ23 DQ28
VDD DQ29
DM3
VSS DQ30 DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
VSS
VSS
VDD
VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS# CAS#
VSS DQ36 DQ37
VDD
DM4 DQ38
VSS DQ39 DQ44
VDD DQ45
DM5
VSS DQ46 DQ47
VDD CK1#
CK1
VSS DQ52 DQ53
VDD
DM6 DQ54
VSS DQ55 DQ60
VDD DQ61
DM7
VSS DQ62 DQ63
VDD
SA0
SA1
SA2
A11
S1#
G
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122 124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
20mil
DDR_DQ0 DDR_DQ4
DDR_DM0 DDR_DQ7
DDR_DQ3 DDR_DQ12
DDR_DQ13 DDR_DM1
DDR_DQ10 DDR_DQ11
DDR_DQ17 DDR_DQ21
DDR_DM2 DDR_DQ19
DDR_DQ23 DDR_DQ29
DDR_DQ25 DDR_DM3
DDR_DQ27 DDR_DQ31
DDR_CKE0_SR DDR_SMAA11
DDR_SMAA8 DDR_SMAA6
DDR_SMAA4 DDR_SMAA2 DDR_SMAA0
DDR_SBSA1 DDR_SRASA# DDR_SCASA# DDR_SCS#1
DDR_DQ32 DDR_DQ37
DDR_DM4 DDR_DQ39
DDR_DQ35 DDR_DQ45
DDR_DQ41 DDR_DM5
DDR_DQ43 DDR_DQ47
DDR_DQ52 DDR_DQ53
DDR_DM6 DDR_DQ51
DDR_DQ50 DDR_DQ61
DDR_DQ57 DDR_DM7
DDR_DQ62 DDR_DQ59
Compal Electronics, Inc.
Title
DDR-SODIMM SLOT0
Size Document Number Rev Custom
LA-2392
Date: Sheet of
G
1
2
DDR_SBSA1 <5,9> DDR_SRASA# <5,9> DDR_SCASA# <5,9> DDR_SCS#1 <5,9>
DDR_CLK7# <5> DDR_CLK7 <5>
+1.25VREF_MEM
C119
0.1U_0402_10V6K
DDR_DQ[0..63] DDR_DQS[0..7] DDR_DM[0..7]
H
DDR_DQ[0..63] <9> DDR_DQS[0..7] <9> DDR_DM[0..7] <9>
853Friday, April 16 , 2004
H
0.1
A
+1.25V +1.25V
RP27
DDR_DQ0 DDR_DQ5 DDR_DQ4 DDR_DQ1
1 1
2 2
3 3
4 4
DDR_DM0 DDR_DQS0
68_0402_4P2R_5%
DDR_DQ7 DDR_DQ2 DDR_DQ3 DDR_DQ6
DDR_DQ12 DDR_DQ13 DDR_DQ8 DDR_DQ9
DDR_DM1 DDR_DQS1
68_0402_4P2R_5%
DDR_DQ10 DDR_DQ11 DDR_DQ14 DDR_DQ15
DDR_DQ17 DDR_DQ20 DDR_DQ40 DDR_DQ21 DDR_DQ16
DDR_DQS2 DDR_DM2
68_0402_4P2R_5%
DDR_DQ19 DDR_DQ18 DDR_DQ22 DDR_DQ23
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
18 27 36 45
68_0804_8P4R_5%
RP31
14 23
RP35
18 27 36 45
68_0804_8P4R_5% RP39
18 27 36 45
68_0804_8P4R_5%
RP43
14 23
RP47
18 27 36 45
68_0804_8P4R_5% RP51
18 27 36 45
68_0804_8P4R_5%
RP54
14 23
RP57
18 27 36 45
68_0804_8P4R_5%
DDR_DQS[0..7]<8> DDR_DQ[0..63]<8> DDR_DM[0..7]<8> DDR_SMAA[0..13]<5,8>
A
RP28
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP32
1 4 2 3
68_0402_4P2R_5%
RP36
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP40
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP44
1 4 2 3
68_0402_4P2R_5%
RP48
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP52
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP55
1 4 2 3
68_0402_4P2R_5%
RP58
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
DDR_DQS[0..7] DDR_DQ[0..63] DDR_DM[0..7]
DDR_SMAA[0..13]
DDR_DQ29 DDR_DQ24 DDR_DQ25 DDR_DQ28
DDR_DM3 DDR_DQS3
DDR_DQ27 DDR_DQ31 DDR_DQ26 DDR_DQ30
DDR_DQ32 DDR_DQ33 DDR_DQ36 DDR_DQ37
DDR_DQS4 DDR_DM4
DDR_DQ34 DDR_DQ38
DDR_DQ35
DDR_DQ45 DDR_DQ41
DDR_DQ44
DDR_DQS5 DDR_DM5
DDR_DQ43 DDR_DQ47 DDR_DQ42 DDR_DQ46
RP29
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP33
1 4 2 3
68_0402_4P2R_5%
RP37
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP41
1 8 2 7 3 6 4 5
68_0804_8P4R_5% RP45
1 4 2 3
68_0402_4P2R_5%
RP49
1 8 2 7 3 6 4 5
68_0804_8P4R_5%
Layout note Place these resistor
closely DIMM1, all trace length<=800mil
100_0402_1%
100_0402_1%
DDR_DQ52 DDR_DQ48 DDR_DQ53 DDR_DQ49
DDR_DM6 DDR_DQS6
DDR_DQ51 DDR_DQ54 DDR_DQ50 DDR_DQ55
DDR_DQ61 DDR_DQ57 DDR_DQ60 DDR_DQ56
DDR_DQS7 DDR_DM7
DDR_DQ63 DDR_DQ58DDR_DQ39 DDR_DQ62 DDR_DQ59
+2.5V
R49
R50
B
12
12
1
2
0.1U_0402_10V6K
B
+1.25VREF_MEM
C121
DDR_CLK4<5> DDR_CLK4#<5>
DDR_CKE1_SR<8>
Note: DDR_SMAA13 Recommend for AMD.
DDR_SBSA0<5,8> DDR_SWEA#<5,8>
DDR_SCS#2<5>
1
C122 1000P_0402_50V7K
2
DIMM_SMDATA<8,12>
DIMM_SMCLK<8,12>
C
+2.5V
JP5
1
VREF
3
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
5 7 9
VSS DQ0 DQ1 VDD DQS0 DQ2 VSS DQ3 DQ8 VDD DQ9 DQS1 VSS DQ10 DQ11 VDD CK0 CK0# VSS
DQ16 DQ17 VDD DQS2 DQ18 VSS DQ19 DQ24 VDD DQ25 DQS3 VSS DQ26 DQ27 VDD CB0 CB1 VSS DQS8 CB2 VDD CB3 DU VSS CK2 CK2# VDD CKE1 DU/A13 A12 A9 VSS A7 A5 A3 A1 VDD A10/AP BA0 WE# S0# DU VSS DQ32 DQ33 VDD DQS4 DQ34 VSS DQ35 DQ40 VDD DQ41 DQS5 VSS DQ42 DQ43 VDD VDD VSS VSS DQ48 DQ49 VDD DQS6 DQ50 VSS DQ51 DQ56 VDD DQ57 DQS7 VSS DQ58 DQ59 VDD SDA SCL VDD_SPD VDD_ID
AMP_1565917-1
DIMM1
DDR_DQ0 DDR_DQ4
DDR_DQS0 DDR_DQ7
DDR_DQ3 DDR_DQ12
DDR_DQ13 DDR_DQS1
DDR_DQ11
DDR_DQ17 DDR_DQ21
DDR_DQS2
DDR_DQ23 DDR_DQ29
DDR_DQ25 DDR_DQS3
DDR_DQ27 DDR_DQ31
DDR_CKE1_SR DDR_CKE1_SR DDR_SMAA12
DDR_SMAA9 DDR_SMAA7
DDR_SMAA5 DDR_SMAA3 DDR_SMAA1
DDR_SMAA10 DDR_SBSA0 DDR_SWEA# DDR_SCS#2 DDR_SCS#3 DDR_SMAA13
DDR_DQ32 DDR_DQ37
DDR_DQS4 DDR_DQ39
DDR_DQ35 DDR_DQ45
DDR_DQ41 DDR_DQS5
DDR_DQ47
DDR_DQ52 DDR_DQ53
DDR_DQS6 DDR_DQ51
DDR_DQ50 DDR_DQ61
DDR_DQ57 DDR_DQS7
DDR_DQ62 DDR_DQ59
+3VS
VREF
DQ12 DQ13
DQ14 DQ15
DQ20 DQ21
DQ22 DQ23
DQ28 DQ29
DQ30 DQ31
DU/RESET#
CKE0
DU/BA2
RAS# CAS#
DQ36 DQ37
DQ38 DQ39
DQ44 DQ45
DQ46 DQ47
DQ52 DQ53
DQ54 DQ55
DQ60 DQ61
DQ62 DQ63
VSS DQ4 DQ5 VDD DM0 DQ6 VSS DQ7
VDD DM1
VSS
VDD VDD VSS VSS
VDD DM2
VSS
VDD DM3
VSS
VDD CB4 CB5 VSS DM8 CB6 VDD CB7
VSS VSS VDD VDD
A11 VSS
VDD
BA1
S1# VSS
VDD DM4
VSS
VDD DM5
VSS
VDD
CK1#
CK1 VSS
VDD DM6
VSS
VDD DM7
VSS
VDD
SA0
SA1
SA2
D
+2.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102
A8
104 106
A6
108
A4
110
A2
112
A0
114 116 118 120 122 124
DU
126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
DU
50 mil width
DDR_DQ5 DDR_DQ1
DDR_DM0 DDR_DQ2
DDR_DQ6 DDR_DQ8
DDR_DQ9 DDR_DM1
DDR_DQ14DDR_DQ10 DDR_DQ15
DDR_DQ20 DDR_DQ16
DDR_DM2 DDR_DQ18DDR_DQ19
DDR_DQ22 DDR_DQ24
DDR_DQ28 DDR_DM3
DDR_DQ26 DDR_DQ30
DDR_SMAA11 DDR_SMAA8
DDR_SMAA6 DDR_SMAA4 DDR_SMAA2 DDR_SMAA0
DDR_SBSA1 DDR_SRASA# DDR_SCASA#
DDR_DQ33 DDR_DQ36
DDR_DM4 DDR_DQ34
DDR_DQ38 DDR_DQ40
DDR_DQ44 DDR_DM5
DDR_DQ42DDR_DQ43 DDR_DQ46
DDR_DQ48 DDR_DQ49
DDR_DM6 DDR_DQ54
DDR_DQ55 DDR_DQ60
DDR_DQ56 DDR_DM7
DDR_DQ63 DDR_DQ58
STANDARD
C
D
E
+1.25VREF_MEM
1
C120
0.1U_0402_10V6K
2
DDR_SCS#1<5,8>
DDR_SCS#0<5,8>
DDR_CKE0_SR<8>
DDR_SBSA1 <5,8> DDR_SRASA# <5,8> DDR_SCASA# <5,8> DDR_SCS#3 <5>
DDR_CLK6# <5> DDR_CLK6 <5>
DDR_SMAA7 DDR_SMAA9 DDR_SMAA12 DDR_SMAA11
DDR_SMAA4 DDR_SMAA6 DDR_SMAA5 DDR_SMAA8
DDR_SMAA0 DDR_SMAA2 DDR_SMAA1 DDR_SMAA3
DDR_SMAA13 DDR_SMAA10
DDR_SCS#1 DDR_SCS#3 DDR_SCASA# DDR_SCS#0
DDR_SCS#2 DDR_SWEA# DDR_SBSA0 DDR_SRASA#
DDR_SBSA1
DDR_CKE0_SR
DDR_CKE1_SR
RP26
47_0804_8P4R_5%
RP30
47_0804_8P4R_5%
RP34
47_0804_8P4R_5%
1 2
R479 47_0402_5%
1 2
R480 47_0402_5%
RP42
47_0804_8P4R_5%
RP46
47_0804_8P4R_5%
1 2
R481 47_0402_5%
1 2
R482 68_0402_5%
1 2
R483 68_0402_5%
Layout note Place these resistor
close by DIMM1, all trace length Max=0.8"
+3VS
Compal Electronics, Inc.
Title
DDR-SODIMM SLOT1
Size Document Number Rev Custom
LA-2392
Date: Sheet of
953Friday, April 16 , 2004
E
+1.25V
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
18 27 36 45
0.1
A
+2.5V
470U_D_4VM
1 1
1
2
470U_D_4VM
1
+
C123
+
2
C124
470U_D_4VM
1
+
C125
2
@220U_D2_4VM
1
+
C126
2
1
C127
2
4.7U_0805_6.3V6K
B
4.7U_0805_6.3V6K
1
C128
2
Near DIMMs
C
D
E
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
2 2
3 3
4 4
0.1U_0402_10V6K
+1.25V
0.1U_0402_10V6K
+1.25V
0.1U_0402_10V6K
+1.25V
0.1U_0402_10V6K
+1.25V
0.1U_0402_10V6K
+1.25V
0.1U_0402_10V6K
+1.25VS
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
A
1
C132
2
1
C144
2
1
C156
2
1
C168
2
1
C180
2
1
C192
2
1
C131
2
1
C143
2
1
C155
2
1
C167
2
1
C179
2
1
C191
2
1
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
C133
C145
C157
C169
C181
C193
0.1U_0402_10V6K
1
C134
2
0.1U_0402_10V6K
1
C146
2
0.1U_0402_10V6K
1
C158
2
0.1U_0402_10V6K
1
C170
2
0.1U_0402_10V6K
1
C182
2
0.1U_0402_10V6K
1
C194
2
1
C135
2
0.1U_0402_10V6K
1
C147
2
0.1U_0402_10V6K
1
C159
2
0.1U_0402_10V6K
1
C171
2
0.1U_0402_10V6K
1
C183
2
0.1U_0402_10V6K
1
C195
2
0.1U_0402_10V6K
B
0.1U_0402_10V6K
1
C136
2
0.1U_0402_10V6K
1
C148
2
0.1U_0402_10V6K
1
C160
2
0.1U_0402_10V6K
1
C172
2
0.1U_0402_10V6K
1
C184
2
0.1U_0402_10V6K
1
C196
2
1
C137
2
0.1U_0402_10V6K
1
C149
2
0.1U_0402_10V6K
1
C161
2
0.1U_0402_10V6K
1
C173
2
0.1U_0402_10V6K
1
C185
2
0.1U_0402_10V6K
1
C197
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C138
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C150
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C162
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C174
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C186
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C198
2
0.1U_0402_10V6K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
1
2
1
2
1
2
1
2
1
2
1
2
C139
C151
C163
C175
C187
C199
0.1U_0402_10V6K
1
C140
2
0.1U_0402_10V6K
1
C152
2
0.1U_0402_10V6K
1
C164
2
0.1U_0402_10V6K
1
C176
2
0.1U_0402_10V6K
1
C188
2
0.1U_0402_10V6K
1
C200
2
+2.5V
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
0.1U_0402_10V6K
1
2
1
2
1
2
1
2
C141
C153
C177
C189
0.1U_0402_10V6K
1
C142
2
0.1U_0402_10V6K
1
C154
2
0.1U_0402_10V6K
1
C178
2
+2.5V
0.1U_0402_10V6K
1
C190
2
+2.5V
D
+1.25V
10U_1206_6.3V7K
1
C165
2
10U_1206_6.3V7K
Title
Size Document Number Rev Custom
Date: Sheet
1
C166
2
Compal Electronics, Inc.
DDR SODIMM Decoupling LA-2392
10 53Friday, April 16 , 2004
E
of
0.1
5
4
3
2
1
+3VS
12
R68 10K_0402_5%
H_CADOP[0..15]
H_CADON[0..15] H_CADIP[0..15] H_CADIN[0..15]
H_CADIP0 H_CADIP1 H_CADIP2 H_CADIP3 H_CADIP4 H_CADIP5 H_CADIP6 H_CADIP7 H_CADIP8 H_CADIP9 H_CADIP10 H_CADIP11 H_CADIP12 H_CADIP13 H_CADIP14 H_CADIP15
H_CADIN0 H_CADIN1 H_CADIN2 H_CADIN3 H_CADIN4 H_CADIN5 H_CADIN6 H_CADIN7 H_CADIN8 H_CADIN9 H_CADIN10 H_CADIN11 H_CADIN12 H_CADIN13 H_CADIN14 H_CADIN15
H_CLKIP0 H_CLKIN0
H_CLKIP1 H_CLKIN1
H_CTLIP0 H_CTLIN0
LDTSTOP#
GATEA20 H_THERMTRIP# H_RST# H_PWRGD CPU_COMP
12
R71 549_0402_1%
U4A
AP18
HT1_TXD0
AP17
HT1_TXD1
AN16
HT1_TXD2
AP15
HT1_TXD3
AN13
HT1_TXD4
AP12
HT1_TXD5
AP11
HT1_TXD6
AN10
HT1_TXD7
AL18
HT1_TXD8
AJ16
HT1_TXD9
AJ15
HT1_TXD10
AL15
HT1_TXD11
AJ13
HT1_TXD12
AL12
HT1_TXD13
AJ12
HT1_TXD14
AJ10
HT1_TXD15
AN18
HT1_TXD0#
AN17
HT1_TXD1#
AM16
HT1_TXD2#
AN15
HT1_TXD3#
AM13
HT1_TXD4#
AN12
HT1_TXD5#
AN11
HT1_TXD6#
AM10
HT1_TXD7#
AM18
HT1_TXD8#
AK16
HT1_TXD9#
AK15
HT1_TXD10#
AM15
HT1_TXD11#
AK13
HT1_TXD12#
AM12
HT1_TXD13#
AK12
HT1_TXD14#
AJ11
HT1_TXD15#
AP14
HT1_TXCLK0
AN14
HT1_TXCLK0#
AJ14
HT1_TXCLK1
AK14
HT1_TXCLK1#
AP9
HT1_TXCTL
AN9
HT1_TXCTL#
AK17
HT1_STOP#
AN29
HT2_TXD0/NC
AM28
HT2_TXD1/NC
AN27
HT2_TXD2/NC
AN26
HT2_TXD3/NC
AP29
HT2_TXD0#/NC
AN28
HT2_TXD1#/NC
AP27
HT2_TXD2#/NC
AP26
HT2_TXD3#/NC
AM25
HT2_TXCLK0/NC
AN25
HT2_TXCLK0#/NC
AP30
HT2_TXCTL/NC
AN30
HT2_TXCTL#/NC
AM29
HT2_RSET/NC
F9
A20GATE/GPIO50
AJ19
THERMTRIP#/GPIO59
AL20
CPU_RST#
AK19
CPU_PWROK
AP20
CPU_COMP
CRUSHK8G A01_PBGA708
CrushK8M/G/GM
HyperTransport Interface
ONLY FOR CrushK8GM ,CrushK8M/G is "NC" pin
HT2_RXCLK0#/NC
HT1_RXD0 HT1_RXD1 HT1_RXD2 HT1_RXD3 HT1_RXD4 HT1_RXD5 HT1_RXD6 HT1_RXD7 HT1_RXD8
HT1_RXD9 HT1_RXD10 HT1_RXD11 HT1_RXD12 HT1_RXD13 HT1_RXD14 HT1_RXD15
HT1_RXD0# HT1_RXD1# HT1_RXD2# HT1_RXD3# HT1_RXD4# HT1_RXD5# HT1_RXD6# HT1_RXD7# HT1_RXD8# HT1_RXD9#
HT1_RXD10# HT1_RXD11# HT1_RXD12# HT1_RXD13# HT1_RXD14# HT1_RXD15#
HT1_RXCLK0
HT1_RXCLK0#
HT1_RXCLK1
HT1_RXCLK1#
HT1_RXCTL
HT1_RXCTL#
HT1_RSET
HT2_RXD0/NC HT2_RXD1/NC HT2_RXD2/NC HT2_RXD3/NC
HT2_RXD0#/NC HT2_RXD1#/NC HT2_RXD2#/NC HT2_RXD3#/NC
HT2_RXCLK0/NC
HT2_RXCTL/NC
HT2_RXCTL#/NC
HT2_STOP#/NC
HT2_REQ#/NC
CPUVDD_EN
HT1VDD_EN
HT1_VLD#
MEM_VLD# CPU_VLD#
CPU_CLK
CPU_CLK#
AL1 AM1 AN1 AN2 AN4 AN5 AN6 AM7 AM4 AL5 AJ5 AL6 AJ7 AJ8 AK10 AM9
AL2 AM2 AP1 AP2 AP4 AP5 AP6 AN7 AM3 AL4 AK5 AK6 AK7 AK8 AK9 AL9
AN3 AP3
AM6 AM5
AN8 AP8
AL3
AK28 AK27 AL30 AK26
AJ28 AJ27 AL29 AJ26
AL26 AL27
AK29 AJ29
AK25 AJ25
A2 C2 B1 B4 B2
AN19 AM19
H_CADOP0 H_CADOP1 H_CADOP2 H_CADOP3 H_CADOP4 H_CADOP5 H_CADOP6 H_CADOP7 H_CADOP8 H_CADOP9 H_CADOP10 H_CADOP11 H_CADOP12 H_CADOP13 H_CADOP14 H_CADOP15
H_CADON0 H_CADON1 H_CADON2 H_CADON3 H_CADON4 H_CADON5 H_CADON6 H_CADON7 H_CADON8 H_CADON9 H_CADON10 H_CADON11 H_CADON12 H_CADON13 H_CADON14 H_CADON15
H_CLKOP0 H_CLKON0
H_CLKOP1 H_CLKON1
H_CTLOP0 H_CTLON0
H_RSET
VR_ON HT1VDD_EN HT1_VLD# MEM_VLD# CPU_VLD#
CPU_CLK_R CPU_CLK_R#
H_CLKOP0 <4>H_CLKIP0<4> H_CLKON0 <4>
H_CLKOP1 <4> H_CLKON1 <4>
H_CTLOP0 <4> H_CTLON0 <4>
12
R63
51.1_0402_1%
VR_ON <6,44> HT1V DD_EN <13> HT1_VLD# <36> MEM_VLD# <36> CPU_VLD# <36>
1 2
R69 0_0402_5%
1 2
R70 0_0402_5%
+1.5VS
CPU_CLK <6> CPU_CLK# <6>
AGP_RBF#<14> AGP_WBF#<14>
AGP_FRAME#<14> AGP_IRDY#<14> AGP_TRDY#<14>
AGP_REQ#<14>
AGP_GNT#<14> AGP_STOP#<14> AGP_DEVSEL#<14> AGP_PAR<14>
AGP_PIPE#<14>
+3VS
1 2
R60 10K_0402_5%
R62 51.1_0402_1%
1 2 1 2
R64 51.1_0402_1%
+3VS +3VS
AGP_ADSTBF0 AGP_ADSTBS0 AGP_ADSTBF1 AGP_ADSTBS1
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
AGP_ST0 AGP_ST1 AGP_ST2 AGP_RBF# AGP_WBF# AGP_FRAME# AGP_IRDY# AGP_TRDY# AGP_REQ# AGP_GNT# AGP_STOP# AGP_DEVESL# AGP_PAR
VDD_PLL
RTC_XTALIN RTC_XTALOUT
U4B
CrushK8M/G/GM
M33
AGP_SBA0#
P32
AGP_SBA1#
P33
AGP_SBA2#
N33
AGP_SBA3#
T33
AGP_SBA4#
T32
AGP_SBA5#
U32
AGP_SBA6#
U33
AGP_SBA7#
R33
AGP_SBSTBF
R34
AGP_SBSTBS
AD32
AGP_ADSTBF0
AC33
AGP_ADSTBS0
AB30
AGP_ADSTBF1
AC30
AGP_ADSTBS1
V33
AGP_CBE0
AG33
AGP_CBE1
AG29
AGP_CBE2
AC29
AGP_CBE3
AGP Interface 4x/8x
L33
AGP_ST0
M32
AGP_ST1
L34
AGP_ST2
N32
AGP_RBF
M34
AGP_WBF
AH29
AGP_FRAME
AG31
AGP_IRDY
AK34
AGP_TRDY
R29
AGP_REQ
T30
AGP_GNT
AJ33
AGP_STOP
AJ32
AGP_DEVSEL
AH33
AGP_PAR
U30
AGP_DBI1
U29
AGP_DBI0
R30
AGP_8XDE#
P34
AGP_CAL_VDDQ
R32
AGP_CAL_GND
AJ20
DACA_VSYNC
AK20
DACA_HSYNC
AM23
DDC_DATA0
AL21
DDC_CLK0
AJ21
DACA_RED
AK22
DACA_BLUE
AJ22
DACA_GREEN
AM22
DACA_RSET
AM21
DACA_VREF
AN23
DACA_GND
AP23
DACA_VDD
E1
+3.3V_PLL
A11
XTALIN_RTC
B11
XTALOUT_RTC
CRUSHK8G A01_PBGA708
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 AGP_AD7 AGP_AD8
AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_PME#/GPIO32
AGP_CLK
APG_VREF
DACB_VSYNC DACB_HSYNC
DDC_DATA1
DDC_CLK1 DACB_RED
DACB_BLUE
DACB_GREEN
DACB_RSET DACB_VREF
DACB_GND
DACB_VDD
+3.3V_PLL_DUAL
AGP_AD0
AA33
AGP_AD1
AA32
AGP_AD2
AB32
AGP_AD3
Y33
AGP_AD4
AB33
AGP_AD5
Y32
AGP_AD6
AC32
AGP_AD7
W33
AGP_AD8
V32
AGP_AD9
AE32
AGP_AD10
AD33
AGP_AD11
AF33
AGP_AD12
AE33
AGP_AD13
AG32
AGP_AD14
AF32
AGP_AD15
AH32
AGP_AD16
AJ30
AGP_AD17
AF31
AGP_AD18
AF29
AGP_AD19
AE30
AGP_AD20
AF30
AGP_AD21
AD30
AGP_AD22
AD29
AGP_AD23
AC31
AGP_AD24
AA29
AGP_AD25
AA30
AGP_AD26
Y29
AGP_AD27
Y31
AGP_AD28
Y30
AGP_AD29
W30
AGP_AD30
V30
AGP_AD31
U31
E26
1 2
R59 10K_0402_5%
W32
1 2
R561 22_0402_5%
+AGP_VREF
V29
AK24 AJ24 AJ23 AK23 AM24 AN24 AP24 AP21 AN21 AL23
AN22
VDD_PLL
C1
+3VALW
AGP_CLK
AGP_CLK <14>
AGP_AD STBF[ 0..1] <14> AGP_AD STBS[0..1] <14> AGP_ AD[0..31] <14> AGP_ C/BE#[0..3] <14> AGP_ST [0..2] <14>
+1.5VS
12
R61 1K_0402_1%
12
R65 1K_0402_1%
1
C201
0.1U_0402_10V6K
2
H_CADOP[0..15]<4>
H_CADON[0..15]<4>
H_CADIP[0..15]<4>
D D
C C
B B
H_CADIN[0..15]<4>
H_CLKIN0<4> H_CLKIP1<4>
H_CLKIN1<4> H_CTLIP0<4>
H_CTLIN0<4>
LDTSTOP#<4>
GATEA20<30>
H_THERMTRIP#<6> H_RST#<6> H_PWRGD<6>
RTC_XTALIN
1
C211
18P_0402_50V8J
A A
5
4
3
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
Y1
14 23
32.768KHZ_12.5P
RTC_XTALOUT
1
C212 18P_0402_50V8J
2
+3VS
2
L3
1 2
BLM21P300S_0805
1
C207
0.1U_0402_10V6K
2
VDD_PLL
1
C208 10U_1206_6.3V7K
2
Title
Size Document N u mb er Re v
C
Date: Sheet
1
C209
0.1U_0402_10V6K
2
Compal Electronics, Inc.
nVIDIA CrushK8 (Host & AGP Bus)
LA-2392
1
1
C210
0.01U_0402_16V7K
2
11 53Friday, April 16, 2004
of
0.1
5
+RTCVCC
0.1U_0402_10V6K
4
C784
1
2
U45
2
1
S-817A14ANB-CUD-T2_SC82AB
3
VIN
VOUT
4
VSS
NC
+1.4VBAT
1
C783
0.1U_0402_10V6K
2
3
BOOT MODE SEL
SPKR
1 2
R72 @10K_0402_5%
1 2
1 = SAFE MODE BOOT INIT TABLE 0 = USER MODE BOOT INIT TABLE
R75 10K_0402_5%
2
BUF_SIO_CLK SEL
SPDIF
1 2
R73 @10K_0402_5%
1 2
R76 10K_0402_5%
1 = 24 MHZ 0 = 14.318 MHZ
*
XTAL SEL
AC97_RST#
1 = 27 MHZ 0 = 14.318 MHZ
1
1 2
R74 @10K_0402_5%
1 2
R77 10K_0402_5%
+3VALW+3VS+3VS
SDD[0..15]
SDA0 <19>PDA0<19> SDA1 <19> SDA2 <19> SDCS 1# <19> SDCS 3# <19> SDDA CK# <19> SDI OW# <19> IRQ15 <19>IRQ14<19> SDDREQ <19> SDIOR# <19> SDIORDY <19>
USBP0+ <27> USBP0- <27> USBP1+ <27> USBP1- <27> USBP2+ <27> USBP2- <27> USBP3+ <27> USBP3- <27> USBP4+ <34> USBP4- <34> USBP5+ <27> USBP5- <27>
OVCUR#0 <27> OVCUR#1 <27> OVCUR#2 <27>
D
S
1 3
Q68
G
2
SLP_S5#
2N7002_SOT23
1 2
Y2
12
14.31818MHZ_20P_6X1430004201
1
C216 22P_0402_50V8J
2
1
2
AC97_BITCLK
1
1
C261
0.1U_0402_10V6K
2
AC97_RST# <25,27> CLK_CODEC_14M <25> AC97_SDOUT <25,27> AC97_SDIN0 <25> AC97_SDIN1 <27> AC97_SYNC <25,27> AC97_BITCLK <25,27>
C217 22P_0402_50V8J
R564 @10_0402_5%
1 2 1
C776 @22P_0402_25V8K
2
12 53Friday, April 16, 2004
+3VALW
0.1
of
PDDACK#<19>
PDIORDY<19>
1 2
R98 60.4_0402_1%
+1.4VBAT
+3VALW
12
12
R107
100K_0402_5%
1
C785
@1P_0402_50V8C
2 1
C786
@1P_0402_50V8C
2
1
C789
@1P_0402_50V8C
2 1
C790
@1P_0402_50V8C
2
PDD[0..15]
PDA1<19>
PDA2<19> PDCS1#<19> PDCS3#<19>
PDIOW#<19>
PDDREQ<19>
PDIOR#<19>
SPKR<25>
LID_OUT#<30> EC_SCI#<30>
EC_FLASH#<31>
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
PDA0 PDA1 PDA2 SDA2 PDCS1# PDCS3# PDDACK# PDIOW# IRQ14 PDDREQ PDIOR# PDIORDY
+3VS
12
R95
60.4_0402_1%
SPKR
TEST
BATTLOW# ICH_ACIN
RP64
18 27 36 45
15K_1206_8P4R_5%
RP67
18 27 36 45
15K_1206_8P4R_5%
D D
LAD0 LAD1 LAD2 LAD3
LDRQ#0
R84
1 2
10_0402_5%
CLK_PCI_LP C
+3VS
1 2
R110 10K_0402_5%
1 2
R111 10K_0402_5%
1 2
R112 8.2K_0402_5%
1 2
R113 8.2K_0402_5%
RP62
1 2 3 4 5
8.2K_1206_10P8R_5%
RP66
1 2 3 4 5
8.2K_1206_10P8R_5%
5
PCI_AD[0..31]
LAD0<29,30> LAD1<29,30> LAD2<29,30> LAD3<29,30>
LDRQ#0<29>
SIRQ<22,29,30> 1 2
R88 22_0402_5%
DIMM_SMDATA DIMM_SMCLK PCI_DEVSEL# PCI_FRAME#
10 9 8 7 6
10 9 8 7 6
SMB_DATA0 SMB_CLK0 SMB_ALERT#
R580
1K_0402_5%
PIRQA# PIRQB# PIRQD# PIRQC#
PCI_REQ#4 PCI_REQ#5 PCI_IRDY# PCI_TRDY#
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
12
PCI_AD[0..31]<20,21,22,28>
+3VS
RP59
1 8 2 7 3 6 4 5
8.2K_1206_8P4R_5%
1 2
C C
+3VALW
B B
A A
@
R83 @8.2K_0402_5%
LFRAME#<29,30>
R463 2.7K_0402_5%
1 2
R464 2.7K_0402_5%
1 2
R96 1.2K _0402_5%
1 2
PIRQE# PCI_PERR# PCI_STOP# PCI_SERR#
+3VS
PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3
+3VS
LAD0 LAD1 LAD2 LAD3
LDRQ#0 SIRQ
+3VS
+3VS
U4C
C33
PCI_AD0
D30
PCI_AD1
E33
PCI_AD2
C31
PCI_AD3
D34
PCI_AD4
F28
PCI_AD5
B33
PCI_AD6
E32
PCI_AD7
B31
PCI_AD8
D33
PCI_AD9
A32
PCI_AD10
C34
PCI_AD11
E31
PCI_AD12
B34
PCI_AD13
D32
PCI_AD14
E34
PCI_AD15
G32
PCI_AD16
F33
PCI_AD17
G33
PCI_AD18
H32
PCI_AD19
H34
PCI_AD20
H33
PCI_AD21
H30
PCI_AD22
J30
PCI_AD23
J34
PCI_AD24
K33
PCI_AD25
J29
PCI_AD26
J33
PCI_AD27
K30
PCI_AD28
K29
PCI_AD29
K32
PCI_AD30
L32
PCI_AD31
H1
LPC_AD0
H2
LPC_AD1
H3
LPC_AD2
G2
LPC_AD3
F2
LPC_FRAME#
J3
LPC_DRQ0#
F1
LPC_DRQ1#
G3
SERIRQ
E2
PCI_CLK7
B15
PCI_CLK8/GPIO_8
B14
PCI_CLK9/GPIO_9
D2
PCI_CLK10/GPIO_17
B9
SMB_DATA1/GPIO44
B10
SMB_CLK1/GPIO43
G5
SMB_DATA0/GPIO42
H5
SMB_CLK0/GPIO41
C10
SMB_ALERT#/GPIO40
AP31
BUF_125_25MHZ
AP32
RGMII_TXD0/MII_TXD0
AL32
RGMII_TXD1/MII_TXD1
AL31
RGMII_TXD2/MII_TXD2
AM31
RGMII_TXD3/MII_TXD3
AP33
RGMII_TXCLK/MII_TXCLK
AN32
RGMII_TXCTL/MII_TXEN
AN34
RGMII_RXD0/MII_RXD0
AM33
RGMII_RXD1/MII_RXD1
AM34
RGMII_RXD2/MII_RXD2
AL33
RGMII_RXD3/MII_RXD3
AP34
RGMII_RXCLK/MII_RXCLK
AM32
RGMII_RXCTL/MII_RXDV
AN33
MII_RXER/GPIO21
AK31
MII_COL
AK33
RGMII_MDIO/MII_MDIO
AN31
MII_CRS
AL34
RGMII_MDC/MII_MDC
AK32
MII_PWRDWN
CRUSHK8G A01_PBGA708
+3VS
RP61
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
+3VALW
RP63
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
DIMM_SMCLK<8,9>
PCI_PERR#/GPIO47
PCI_PME#/GPIO37
PCI_RST3#/GPIO38 PCI_RST4#/GPIO39
PCI Interface
PCI_REQ3#/GPIO61 PCI_REQ4#/GPIO45 PCI_REQ5#/GPIO63
PCI_GNT3#/GPIO62 PCI_GNT4#/GPIO46 PCI_GNT5#/GPIO64
PCI_INTE#/GPIO48
EXT_SMI#/GPIO29
KBRDRSTIN#/GPIO60
FANRPM/GPIO52 FANCTL0/GPIO53 FANCTL1/GPIO54
CPU_SLP#/GPIO56
THERM#/GPIO58
SIO_PME#/GPIO28
SLP_S1#/GPIO57
EE_SEL/GPIO33 EE_CLK/GPIO34
EE_DATAO/GPIO35
EE_DATAI/GPIO36
KBRST# SLP_S1# RSMRST#
SIRQ
PCI_PME# PBTN_OUT# SIO_PME#
DIMM_SMCLK
PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3#
PCI_FRAME#
PCI_IRDY# PCI_TRDY# PCI_STOP#
PCI_DEVSEL#
PCI_PAR
PCI_SERR#
PCI_RST0# PCI_RST1# PCI_RST2#
PCI_REQ0# PCI_REQ1# PCI_REQ2#
PCI_GNT0# PCI_GNT1# PCI_GNT2#
PCI_INTW#
PCI_INTX#
PCI_INTY#
PCI_INTZ#
PCI_CLK0 PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 PCI_CLK6
PCI_CLKFB
INTRUDER#
PWRBTN#
RSTBTN#
PWRGD_SB
PWRGD
RI#/GPIO30
SLP_S5# SLP_S3#
4
G29 B32 F34 J32 J31 G30 F29 F31 F30 F32 A33 C32 F26 P29 L30 C25 K5 H6
C29 E29 D27 D26 A30 A31
E27 D29 E28 C26 B29 B30
M30 N29 M29 N30 P30
A29 C28 B28 B27 A27 B26 A26 B25
D11 A5 C6 A3 A8 D6 B3 E6 D5 C5 C3 F7 B5 C11 D9 C7 C8
B12 A12 B13 C13
+3VS
G
2
S
Q7 2N7002_SOT23
PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3 PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_STOP# PCI_DEVSEL# PCI_PAR PCI_SERR# PCI_PERR# PCI_PME#
R78 33_0402_5%
1 2
R79 33_0402_5%
1 2
R81 33_0402_5%
1 2
R82 33_0402_5%
1 2
PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3 PCI_REQ#4 PCI_REQ#5
PCI_GNT#0 PCI_GNT#1 PCI_GNT#2 PCI_GNT#3 PCI_GNT#4 PCI_GNT#5
PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#
R85 22_0402_5%
1 2
R86 22_0402_5%
1 2
R87 22_0402_5%
1 2
R89 22_0402_5%
1 2
R93 22_0402_5%
1 2
R92 22_0402_5%
1 2
INTRUDER# EC_SMI# PBTN_OUT# KBRST# RSMRST# PWRGD_SB PM_PWROK
EC_THRM# EC_SWI# SIO_PME# SLP_S5# SLP_S3# SLP_S1#
SMB_CLK0
13
D
SMB_DATA0
PCI_CBE#0 < 20,21, 22,28> PCI_CBE#1 < 20,21, 22,28> PCI_CBE#2 < 20,21, 22,28> PCI_CBE#3 < 20,21, 22,28> PCI_FRAME# < 20,21, 22,28> PCI_I RDY# <20,21,22,28> PCI_TR D Y # <20,21,22,28> PCI_STOP# <20,21,22,28> PCI_DEVSEL# <20,21,22,28> PCI_PAR <20,21,22,28> PCI_SER R# <20,21,22,28> PCI_PER R# <20,21,22,28>
PCI_ REQ#0 <21> PCI_ REQ#1 <20> PCI_ REQ#2 <22> PCI_ REQ#3 <28> PCI_ REQ#4 <28> PCI_REQ#5
PCI_GN T#0 <21> PCI_GN T#1 <20> PCI_GN T#2 <22> PCI_GN T#3 <28> PCI_GN T#4 <28> PCI_GNT#5
PIRQA # <21,22> PIRQB # <20,22> PIRQC# <28> PIRQD# PIRQE# <14>
EC_SMI# <30> PBTN_OUT# <30> KBRST# <30>
PM_PWROK <36>
EC_THRM# <30> EC_S WI# <30>
SLP_S5# <30> SLP_S3# <27,30> SLP_S1# <30>
2
G
DIMM_SMDATA
1 3
D
S
Q8 2N7002_SOT23
PCIRST_AGP# PCIRST#
PCIRST_IDE# PCIRST_LPC#
CLK_PCI_MINI CLK_PCI_PCM CLK_PCI_LA N CLK_PCI_1394 CLK_PCI_SIO
CLK_PCI_FB
1 2
R94 1M_0402_5%
DIMM_SMDATA <8,9>
PCIRST_AGP# <14> PCIRST# <20, 21, 22,28>
PCIRST_IDE # <19> PCIRST_LPC# <29,30>
CLK_PCI_MINI <28> CLK_PCI_PCM <22> CLK_ PCI_LA N <20> CLK_PCI_1394 <21>CLK_PCI_LPC<30> CLK_PCI_SI O <29>
+1.4VBAT
EC_RSMRST# <30,36> PWRGD _SB <30,36>
PM_BATLOW#<30>
ACIN<30,38,40>
3
match to within 6000 mil of each other
PDD[0..15]<19> SDD[0.. 15] <19>
1 2
R100 1K_0402_5%
+3VALW
R106 @100K_0402_5% D5 RB751V_SOD323
21
USBP3+
USBP3­USBP2+
USBP2-
USBP0+
USBP0­USBP1+
USBP1-
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
U4D
V1
IDE_DATA_P0
V5
IDE_DATA_P1
U6
IDE_DATA_P2
U1
IDE_DATA_P3
U3
IDE_DATA_P4
T3
IDE_DATA_P5
T5
IDE_DATA_P6
R6
IDE_DATA_P7
R5
IDE_DATA_P8
T6
IDE_DATA_P9
T2
IDE_DATA_P10
U2
IDE_DATA_P11
V3
IDE_DATA_P12
U5
IDE_DATA_P13
V6
IDE_DATA_P14
V2
IDE_DATA_P15
Y1
IDE_ADDR_P0
Y5
IDE_ADDR_P1
AA3
IDE_ADDR_P2
AA1
IDE_CS1_P#
AA2
IDE_CS3_P#
W6
IDE_DACK_P#
W2
IDE_IOW_P#
W5
IDE_INTR_P
W3
IDE_DREQ_P
Y3
IDE_IOR_P#
Y2
IDE_RDY_P
J5
SATA_CLK/TBC/TCK
N3
IDE_RDY_M/TxD4/TD4
P6
IDE_IOR_M#/TxD3/TD3
N5
IDE_DREQ_M/TxD1/TD1
P3
IDE_INTR_M/TxD6/TD6
P5
IDE_IOW_M#/TxD2/TD2
N2
IDE_DACK_M#/TxD5/TD5
R2
IDE_CS3_M#/CTL_T
R1
IDE_CS1_M#/CTL_R
R3
IDE_ADDR_M2/TxD9/TD9
P2
IDE_ADDR_M1/TxD7/TD7
P1
IDE_ADDR_M0/TxD8/TD8
N6
IDE_DATA_M15/TxD0/TD0
M1
IDE_DATA_M14/Rx_DATA_VALID/RD9
M6
IDE_DATA_M13/RxD8/RD7
L5
IDE_DATA_M12/RxD6/RD5
L1
IDE_DATA_M11/RxD4/RD3
L3
IDE_DATA_M10/RxD2/RD1
K3
IDE_DATA_M9/SATACLK
J1
IDE_DATA_M8/RBC0/COMINIT
K6
IDE_DATA_M7/ASIC_CLK/RCK
J2
IDE_DATA_M6/RBC1/PHYRDY
K2
IDE_DATA_M5/RxD1/RD0
L2
IDE_DATA_M4/RxD3/RD2
L6
IDE_DATA_M3/RxD5/RD4
M5
IDE_DATA_M2/RxD7/RD6
M3
IDE_DATA_M1/RxD9/RD8
M2
IDE_DATA_M0/RxD0/COMWAKE
AG1
IDE_COMP
D1
SUSCLK/GPIO31
E10
SPKR
B8
TEST
F11
+1.2V_VBAT
A4
BUF_SIO_CLK
B6
BUF_27_14MHZ/GPIO55
E4
GPIO_20/ASF1
E3
GPIO_19/ASF0
C4
GPIO_18
D3
GPIO_16
F8
GPIO_15
B7
GPIO_14
F13
GPIO_13
E13
GPIO_12
E11
GPIO_11/STOP_AGPCLK#
B17
GPIO_10/HT1_REQ#
E8
GPIO_7
F12
GPIO_6
D14
GPIO_5
E14
GPIO_4
E9
GPIO_3
AE2
GPIO_2
Y6
GPIO_1
CRUSHK8G A01_PBGA708
USBP4+
1
C787
USBP4-
@1P_0402_50V8C
2
USBP5+
1
C788
USBP5-
@1P_0402_50V8C
2
2
IDE_DATA_S0 IDE_DATA_S1 IDE_DATA_S2 IDE_DATA_S3 IDE_DATA_S4 IDE_DATA_S5 IDE_DATA_S6 IDE_DATA_S7 IDE_DATA_S8
IDE_DATA_S9 IDE_DATA_S10 IDE_DATA_S11 IDE_DATA_S12 IDE_DATA_S13 IDE_DATA_S14 IDE_DATA_S15
IDE_ADDR_S0
IDE_ADDR_S1
IDE_ADDR_S2
IDE_CS1_S# IDE_CS3_S#
IDE_DACK_S#
IDE_IOW_S# IDE_INTR_S
IDE_DREQ_S
IDE_IOR_S#
IDE_RDY_S
USB_0/6 USB_0#/6# USB_1/NC
USB_1#/NC
USB_2NC
USB_2#/NC
I/O POWER
USB_3/USB_OC6
USB_3#/USB_OC7#
USB_4/7 USB_4#/7# USB_5/NC
USB_5#/NC
USB2_0
USB2_0#
USB2_1
USB2_1#
USB2_2
USB2_2#
USB2_3
USB2_3#
USB2_4
USB2_4#
USB2_5
USB2_5#
USB_OC0# USB_OC1#/GPIO22 USB_OC2#/GPIO23 USB_OC3#/GPIO24 USB_OC4#/GPIO25 USB_OC5#/GPIO26
+3.3V_USB2_DUAL1 +3.3V_USB2_DUAL2
USB_RBIAS
SPDIF/GPIO51
AC_RESET#
AC97_CLK
AC_SDATA_OUT
AC_SDATA_IN0
AC_SDATA_IN1/GPIO27
AC_SYNC
AC_BITCLK
XTALIN
XTALOUT
RP68
15K_1206_8P4R_5%
SDD0
AD1
SDD1
AC1
SDD2
AC3
SDD3
AD5
SDD4
AC6
SDD5
AB5
SDD6
AA6
SDD7
AB3
SDD8
AB2
SDD9
AA5
SDD10
AB6
SDD11
AC5
SDD12
AD6
SDD13
AC2
SDD14
AD3
SDD15
AD2
SDA0
AF3
SDA1
AE3 AF2
SDCS1#
AF1
SDCS3#
AG3
SDDACK#
AG5
SDIOW#
AE5
IRQ15
AG6
SDDREQ
AE6
SDIOR#
AF5
SDIORDY
AF6
A20 B20 E21 F21 A21 B21 B22 C22 A23 B23 B24 C24
USBP0+
D20
USBP0-
C20
USBP1+
E22
USBP1-
F22
USBP2+
D21
USBP2-
C21
USBP3+
E23
USBP3-
F23
USBP4+
E24
USBP4-
F24
USBP5+
E25
USBP5-
F25
OVCUR#0
D18
OVCUR#1
E18
OVCUR#2
B18 C17 A18 D17
D24
R103
E19 A17
1 2
909_0402_1%
SPDIF
B16
AC97_RST#
E16
R104 33_0402_5%
C15 F17 F16 E15 E17
AC97_BITCLK
C16 B19
C19
18 27 36 45
Compal Electronics, Inc.
Title
nVIDIA CrushK8 (PCI & IDE & USB & MISC)
Size Document N u mb er Re v
C
LA-2392
Date: Sheet
5
4
3
2
1
U4E
+5VS
D D
C C
B B
A A
+3VS
+3VALW
+5VALW
+1.6VALW
+1.5VS
+1.6VS
+1.2V_HT
E30
+5V1
AA4
+5V2
A14
+3.3V1
D12
+3.3V2
E20
+3.3V3
D15
+3.3V4
C30
+3.3V5
H29
+3.3V6
H4
+3.3V7
L4
+3.3V8
V4
+3.3V9
R4
+3.3V10
AD4
+3.3V11
AF4
+3.3V12
E5
+3.3V13
M31
+3.3V14
V31
+3.3V15
AD31
+3.3V16
D8
+3.3V_DUAL1
C23
+3.3V_DUAL2
F27
+3.3V_DUAL3
G6
+3.3V_DUAL4
AK30
+3.3V_DUAL5
F15
+5V_DUAL1
F19
+5V_DUAL2
F4
+1.2V_DUAL1
F5
+1.2V_DUAL2
F6
+1.2V_DUAL3
R31
+1.5V1
U34
+1.5V2
Y34
+1.5V3
AA31
+1.5V4
AC34
+1.5V5
AF34
+1.5V6
AG30
+1.5V7
AJ34
+1.5V8
AG2
+1.2V1
AH2
+1.2V2
AH3
+1.2V3
AH5
+1.2V4
AH6
+1.2V5
AJ1
+1.2V6
AJ2
+1.2V7
AJ3
+1.2V8
AJ4
+1.2V9
AK1
+1.2V10
AK2
+1.2V11
AK3
+1.2V12
AK4
+1.2V13
AL8
+1.2V_HT1
AL11
+1.2V_HT2
AL14
+1.2V_HT3
AL17
+1.2V_HT4
AK18
+1.2V_HT5
AM27
+1.2V_HT6
N18
GND1
N17
GND2
N16
GND3
N15
GND4
N14
GND5
N13
GND6
P18
GND7
P17
GND8
P16
GND9
P15
GND10
P14
GND11
P13
GND12
R18
GND13
R17
GND14
R16
GND15
R15
GND16
R14
GND17
R13
GND18
T18
GND19
T17
GND20
T16
GND21
T15
GND22
T14
GND23
T13
GND24
U18
GND25
U17
GND26
U16
GND27
U15
GND28
U14
GND29
U13
GND30
V18
GND31
V17
GND32
V16
GND33
V15
GND34
V14
GND35
V13
GND36
V22
GND37
V21
GND38
V20
GND39
V19
GND40
U22
GND41
U21
GND42
U20
GND43
U19
GND44
T22
GND45
CRUSHK8G A01_PBGA708
POWER and GROUND
GND81 GND82 GND83 GND84 GND85 GND86 GND87 GND88 GND89 GND90 GND91 GND92 GND93 GND94 GND95 GND96 GND97 GND98
GND99 GND100 GND101 GND102 GND103 GND104 GND105 GND106 GND108 GND109 GND110 GND111 GND112 GND113 GND114 GND115 GND116 GND117 GND118 GND119 GND120 GND121 GND122 GND123 GND124 GND125 GND126 GND127 GND128 GND129 GND130 GND131 GND132 GND133 GND134 GND135 GND136 GND137 GND138 GND139 GND140 GND141 GND142 GND143 GND144 GND145 GND146 GND147 GND148 GND149 GND150 GND151 GND152 GND153 GND154 GND155 GND156 GND157 GND158 GND159
GND80
GND79
GND78
GND77
GND76
GND75
GND74
GND73
GND72
GND71
GND70
GND69
GND68
GND67
GND66
GND65
GND64
GND63
GND62
GND61
GND60
GND59
GND58
GND57
GND56
GND55
GND54
GND53
GND52
GND51
GND50
GND49
GND48
GND47
GND46
AA22 AA21 AA20 AA19 AA18 AA17 AA16 AA15 AA14 AA13 AB22 AB21 AB20 AB19 AB18 AB17 AB16 AB15 AB14 AB13 A34 A24 A15 A9 A6 A1 C18 C27 D23 C9 D31 C12 D4 E12 E7 F18 F20 F14 F10 F3 H31 J4 J6 L31 M4 P31 P4 T29 U4 V34 W29 Y4 AA34 AE29 AC4 AD34 AJ31 AG34 AG4 AH30 AL24 AK21 AJ18 AJ17 AK11 AJ9 AJ6 AM30 AM26 AN20 AM20 AM17 AM14 AM11 AM8 C14 AB29 L29 Y13 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y22 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 N19 N20 N21 N22 P19 P20 P21 P22 R19 R20 R21 R22 T19 T20 T21
+3VS
1
C270
4.7U_0805_6.3V6K
2
R118 100K_0402_5%
2N7002_SOT23
O
G3I
1
C220
0.1U_0402_10V6K
2
1
C228
0.1U_0402_10V6K
2
1
C237
0.1U_0402_10V6K
2
+1.2V_HT
1
C246
4.7U_0805_6.3V6K
2
1
C255
0.1U_0402_10V6K
2
1
C263
0.1U_0402_10V6K
2
+12VALW
1 2
13
2
G
Q11
Q12 DTC124EK_SC59
1
C271
0.1U_0402_10V6K
2
R116 100K_0402_5%
D
S
1
C221
0.1U_0402_10V6K
2
1
C229
0.1U_0402_10V6K
2
1
C238
0.1U_0402_10V6K
2
1
C247
0.1U_0402_10V6K
2
1
C256
0.1U_0402_10V6K
2
1
C264
0.1U_0402_10V6K
2
R119
100K_0402_5%
1 2
1
C273
0.047U_0402_16V4Z
2
1
C791
4.7U_0805_6.3V6K
2
+3VS
1
C792
0.1U_0402_10V6K
2
+1.6VS
1
C234
4.7U_0805_6.3V6K
2
+1.6VS
1
C243
4.7U_0805_6.3V6K
2
+1.5VS
1
C252
4.7U_0805_6.3V6K
2
+3VALW +1.6VALW
1
C260
4.7U_0805_6.3V6K
2
+5VALW +5VS
1
C268
4.7U_0805_6.3V6K
2
HT1VDD_EN<11>
2N7002_SOT23
1
C218
4.7U_0805_6.3V6K
2
1
C226
0.1U_0402_10V6K
2
1
C235
0.1U_0402_10V6K
2
1
C244
0.1U_0402_10V6K
2
1
C253
0.1U_0402_10V6K
2
2
C213
0.1U_0402_10V6K
1
1
C269
0.1U_0402_10V6K
2
+1.2V_HT
D
Q10
S
HT1VDD_EN
R117 1K_0402_5%
1 2 13
G
2
1
C219
0.1U_0402_10V6K
2
1
C227
0.1U_0402_10V6K
2
1
C236
0.1U_0402_10V6K
2
1
C245
0.1U_0402_10V6K
2
1
C254
0.1U_0402_10V6K
2
1
C262
0.1U_0402_10V6K
2
+12VALW
1 2
1
2
1
C222
0.1U_0402_10V6K
2
1
C230
0.1U_0402_10V6K
2
1
C239
0.1U_0402_10V6K
2
1
C248
0.1U_0402_10V6K
2
1
C257
0.1U_0402_10V6K
2
1
C265
4.7U_0805_6.3V6K
2
+1.2VS
1
2
1
D
Q9 SI2302DS_SOT23
S3G
2
0.1U_0402_10V6K
SI2302DS: N CHANNEL VGS: 4.5V, RDS: 85 mOHM VGS: 2.5V, RDS: 115mOHM Id(MAX): 2.8A VGS(MAX): +-8V
1
C223
0.1U_0402_10V6K
2
1
C231
0.1U_0402_10V6K
2
1
C240
0.1U_0402_10V6K
2
1
C249
0.1U_0402_10V6K
2
1
C258
0.1U_0402_10V6K
2
1
C266
0.1U_0402_10V6K
2
C272
4.7U_0805_6.3V6K
1
C274
2
+3VS
1
C796 1000P_0402_50V7K
2
+1.2V_HT
1
C275
2
4.7U_0805_6.3V6K
1
C224
0.1U_0402_10V6K
2
1
C232
0.1U_0402_10V6K
2
1
C241
0.1U_0402_10V6K
2
1
C250
0.1U_0402_10V6K
2
1
C259
0.1U_0402_10V6K
2
1
C267
0.1U_0402_10V6K
2
1
C225
0.1U_0402_10V6K
2
1
C233
0.1U_0402_10V6K
2
1
C242
0.1U_0402_10V6K
2
1
C251
0.1U_0402_10V6K
2
+3VS
1
C794 1000P_0402_50V7K
2
1
C797 1000P_0402_50V7K
2
1
C795 1000P_0402_50V7K
2
+3V
1
C798 1000P_0402_50V7K
2
1
C804 1000P_0402_50V7K
2
+3VALW
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONF IDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE C OMPETENT DIVIS ION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INF ORMATION IT CONT AINS
5
4
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WR ITT EN CO NSE NT OF COMPAL ELECTRONICS, INC.
2
nVIDIA CrushK8 (Power & Ground)
Size Document N u mb er Re v
C
LA-2392
Date: Sheet
1
13 53Friday, April 16, 2004
of
0.1
5
AGP_AD[0..31] <11> AGP_ADSTBF[0..1] <11> AGP_ADSTBS[0..1] <11> AGP_ST[0..2] <11>
AGP_C/BE#[0..3] <11>
D D
C C
B B
A A
+3VS +3VS
12
R493 10K_0402_5%
STOP_AGP
AGP_ADSTBS0 AGP_ADSTBS1
12
R508 @220K_0402_5%
DACRSET DACVREF
12
R512 113_0402_1%
DAC2REST DAC2VREF
12
R536
63.4_0402_1%
+1.5VS
12
R522 1K_0402_1%
+AGPVREF
12
R527 1K_0402_1%
1
2
C637
0.1U_0402_10V6K
12
R494 @10K_0402_5%
AGP_BUSY#
12
R509 @220K_0402_5%
1
C635
0.01U_0402_16V7K
2
1
C638
0.01U_0402_16V7K
2
+3VS
1
C772
4.7U_0805_6.3V6K
2
Place close to U43.6
+3VS
6
U43
VDD
1
X1/CLK
CLKOUT
7 8
X2
FS1 FS2
SS%
GND
P2180A_SO8
3
+3VS
27MOUT XTALSSIN
R557 1K_0402_5%
12 12
R558 1K_0402_5%
SST Ratio selection table for W180
Modulation setting
SS%
0 1.25% 1
5
0.1U_0402_10V6K
5
2
R559
4
1K_0402_5%
SST Ratio
3.75%
AGP_CLK
12
R556 @10_0402_5%
1
C746 @10P_0402_25V8K
2
1
C773
2
R590
1 2
22_0402_5%
12
PCIRST_AGP#<12> AGP_GNT#<11>
AGP_REQ#<11> AGP_FRAME#<11> AGP_IRDY#<11> AGP_TRDY#<11> AGP_DEVSEL#<11> AGP_STOP#<11> AGP_PAR<11> PIRQE#<12>
AGP_CLK<11>
AGP_RBF#<11> AGP_WBF#<11> AGP_PIPE#<11>
XTALSSIN
CRT_R<18> CRT_G<18>
CRT_B<18> CRT_HSYNC<18> CRT_VSYNC<18>
TV_CRMA<18,34> TV_LUMA<18,34> TV_COMPS<18,34>
XTALSSIN
12
R562 @10_0402_5%
1
C774 @10P_0402_25V8K
2
4
AD30 AE30 AD29 AE29 AD28 AG30 AF28 AG29 AH30 AC28 AH29 AE28
AJ30 AG28 AK30 AG27 AH23
AJ24 AH22 AK24 AH21
AJ22 AH20 AK22 AG21
AJ19 AG18 AK19 AG19
AJ18 AF19 AK18
AH28
AJ27 AK25 AF21
AH11 AG12 AK12 AH24
AJ25 AH25 AK27 AH26 AH27 AK11
AJ12
AJ13 AG15 AF18 AF10 AG10 AC30
AH16 AH17
AJ15 AF15 AK15 AG16 AK16 AF16
AJ16 AH18
AK21
AJ21 AK28
AJ28 AF12
AF13 AG13
AJ9
AJ10
AH8
AH10
AH9
AJ8
AK9
AA2
W3
AA3
W2
AJ7 AK7
AH7 AH6
B30 B29 A30 A29
AJ3
R537 10K_0402_5%
1 2
Y2
Y3 Y1
A9
U38A
PCIAD0 PCIAD1 PCIAD2 PCIAD3 PCIAD4 PCIAD5 PCIAD6 PCIAD7 PCIAD8 PCIAD9 PCIAD10 PCIAD11 PCIAD12 PCIAD13 PCIAD14 PCIAD15 PCIAD16 PCIAD17 PCIAD18 PCIAD19 PCIAD20 PCIAD21 PCIAD22 PCIAD23 PCIAD24 PCIAD25 PCIAD26 PCIAD27 PCIAD28 PCIAD29 PCIAD30 PCIAD31
PCICBE#0 PCICBE#1 PCICBE#2 PCICBE#3
PCIRST# PCIGNT# PCIREQ# PCIFRAME# PCIIRDY# PCITRDY# PCIDEVSEL# PCISTOP# PCIPAR PCIINTA#
PCICLK AGPRBF#
AGPWBF# AGPPIPE# AGPBUSY# AGPSTOP# AGPVREF
AGPSBSTB AGPSBSTB#
AGPSBA0 AGPSBA1 AGPSBA2 AGPSBA3 AGPSBA4 AGPSBA5 AGPSBA6 AGPSBA7
AGPADSTB1 AGPADSTB1# AGPADSTB0 AGPADSTB0#
AGPST0 AGPST1 AGPST2
DACRED DACGREEN DACBLUE CRTHSYNC CRTVSYNC DACRSET DACVREF
DAC2RED DAC2GREEN DAC2BLUE DAC2HSYNC DAC2VSYNC DAC2REST DAC2VREF
XTALIN XTALOUT
XTALSSIN XTALSOUTBUFF
MSTRAPSEL0 MSTRAPSEL1 MSTRAPSEL2 MSTRAPSEL3
BUFRST# TESTMODE
SA000040300(0304231100)
PCI/AGP BUS InterfaceDAC
CLOCK
GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6
GPIO7 ROMCS_ ROMA14
ROMA15
VIPD0 VIPD1 VIPD2 VIPD3 VIPD4 VIPD5 VIPD6 VIPD7
VIPHAD0 VIPHAD1 VIPPCLK VIPHCLK VIPHCTL
GPIO/VIP InterfaceI2C
DVOD0 DVOD1 DVOD2 DVOD3 DVOD4 DVOD5 DVOD6 DVOD7 DVOD8
DVOD9 DVOD10 DVOD11
DVOVSYNC DVOHSYNC
DVODE
DVOCLKOUT
DVOCLKOUT#
DVOCLKIN
DVO Interface
DVOVREF
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
I2C2SCL
I2C2SDA
IFP0VREF IFP0RSET IFP1VREF IFP1RSET
TXD0
TXD0#
TXD1
TXD1#
TXD2
TXD2#
TXD3
TXD3#
TXC0
TXC0#
TXD4
TXD4#
TXD5
TXD5#
TXD6
TXD6#
TXD7
TXD7#
TXC1
TXC1#
LVDS/TMDS
TXD8
TXD8#
TXD9 TXD9# TXD10
TXD10#
TXC2 TXC2#
FBACKE FBVREF
FBACLK1#/NC(440)
FBACLK1/NC(440) FBACLK0/NC(440)
FBACLK0#/NC(440)
SDRAM
AGP_AD0 AGP_AD1 AGP_AD2 AGP_AD3 AGP_AD4 AGP_AD5 AGP_AD6 MAP17_SUSP# AGP_AD7 AGP_AD8 AGP_AD9 AGP_AD10 AGP_AD11 AGP_AD12 AGP_AD13 AGP_AD14 AGP_AD15 AGP_AD16 AGP_AD17 AGP_AD18 AGP_AD19 AGP_AD20 AGP_AD21 AGP_AD22 AGP_AD23 AGP_AD24 AGP_AD25 AGP_AD26 AGP_AD27 AGP_AD28 AGP_AD29 AGP_AD30 AGP_AD31
AGP_C/BE#0 AGP_C/BE#1 AGP_C/BE#2 AGP_C/BE#3
AGP_BUSY# STOP_AGP +AGPVREF
AGP_ADSTBF1 AGP_ADSTBS1 AGP_ADSTBF0 AGP_ADSTBS0
AGP_ST0 AGP_ST1 AGP_ST2
CRT_R CRT_G CRT_B CRT_HSYNC CRT_VSYNC DACRSET DACVREF
TV_CRMA TV_LUMA TV_COMPS
DAC2REST DAC2VREF
XTALIN XTALOUT
27MOUT
STRAP0 STRAP1 STRAP2 STRAP3
4
3
C6 A6 A7 A8 C9 B9 C5 F3
AH2 J1
F2 K4
J3
VIPD2
H3
VIPD3
K5
VIPD4
G2
VIPD5
G1
VIPD6
F1
VIPD7
G3 C8
C7 B7 A5 B6
DVOD0
AK2
DVOD1
AK3
DVOD2
AH3
DVOD3
AJ1
DVOD4
AG1
DVOD5
AG2
DVOD6
AD3
DVOD7
AE1
DVOD8
AE3
DVOD9
AE2
DVOD10
AG3
DVOD11
AH1
AC3
DVOHSYNC
AB3 AK1 AD2 AD1
DVOCLKIN
AB2
DVOVREF
AB1
AK4 AJ4
I2C1SCL
AH5
I2C1SDA
AH4
I2C2SCL
AK6
I2C2SDA
AJ6
IFP0VREF
R2
IFP0RSET
R1
IFP1VREF
L2
IFP1RSET
L1
LVDSA0+
P5
LVDSA0-
P4
LVDSA1+
R5
LVDSA1-
R4
LVDSA2+
R3
LVDSA2-
P3 P1 P2
LVDSAC+
K2
LVDSAC-
K1
LVDSB0+
U5
LVDSB0-
U4
LVDSB1+
U3
LVDSB1-
T3
LVDSB2+
V5
LVDSB2-
V4 W5 W4
LVDSBC+
T5
LVDSBC-
T4
N3 M3 M5 M4 N5 N4 L3 K3
FBACKE
N28
FBVREF
A18
FBACLK0#
A4
FBACLK0
B4
FBACLK1
C21
FBACLK1#
C20
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
R583 1K_0402_5%
RP94
DDC_CLK_CRT
1 8
DDC_DAT_CRT
2 7
DDC_CLK_LCD
3 6
DDC_DAT_LCD
4 5
33_0804_8P4R_5%
LVDSA0+ <17> LVDSA0- <17> LVDSA1+ <17> LVDSA1- <17> LVDSA2+ <17> LVDSA2- <17>
LVDSAC+ <17> LVDSAC- <17>
LVDSB0+ <17> LVDSB0- <17> LVDSB1+ <17> LVDSB1- <17> LVDSB2+ <17> LVDSB2- <17>
LVDSBC+ <17> LVDSBC- <17>
12
R571 1K_0402_5%
DDC_CLK_CRT DDC_DAT_CRT DDC_CLK_LCD DDC_DAT_LCD
XTALIN
1
C642 22P_0402_50V8J
2
ENABLT <17,30> ENVDD <17>
DVOD3 DVOD4 DVOD5 DVOD2
2.2K_0804_8P4R_5%
RP91
1 8 2 7 3 6 4 5
10K_0804_8P4R_5%
DDC_CLK_CRT <18> DDC_DAT_CRT <18> DDC_CLK_LCD <17> DDC_DAT_LCD <17>
RP95
1 8 2 7 3 6 4 5
Y6
4 1
27MHz_16PF_6P27000126
+5VS +3VS
IFP0RSET
12
R532
1K_0402_1%
IFP1RSET IFP1VREF
12
R535
1K_0402_1%
3
GND
OUT
2
IN
GND
2
MAP17_SUSP#
1 8
VIPD6
2 7
DVOD0
3 6
DVOD11
4 5
10K_0804_8P4R_5%
VIPD2
1 8
DVOCLKIN
2 7
VIPD7
3 6 4 5
10K_1206_8P4R_5%
DVOD1
1 8
DVOD6
2 7
DVOD10
3 6
DVOD9
4 5
10K_0804_8P4R_5%
STRAP0 STRAP1 STRAP2 STRAP3
10K_0804_8P4R_5%
FBACKE
R534
10K_0402_5%
IFP0VREF
C639
0.047U_0402_10V4M
C641
0.047U_0402_10V4M
XTALOUT
1
C643 22P_0402_50V8J
2
2
RP93
RP89
RP90
RP92
1 8 2 7 3 6 4 5
1 2
1
2
1
2
+3VS
+3VS
11 1
11
0 1
00
DVOHSYNC
VIPD3
VIPD5
VIPD4
CRYSTAL
DVOD8 D VOD7
0
1
DVOD8
R501 @10K_0402_5% R502 @10K_0402_5%
DVOD7
R503 @10K_0402_5% R504 @10K_0402_5%
+2.5VS +2.5VS
VIPD3 VIPD4VIPD5DVOHSYNC
R523
@120_0402_5%
R528
@120_0402_5%
FBVREF
1
C640
0.1U_0402_10V6K
2
FBACLK1 FBACLK0
12
12
R525
32@100_0402_5%
FBACLK1#
12
+2.5VS
12
R530 1K_0402_1%
12
R533 1K_0402_1%
Compal Electronics, Inc.
Title
MAP17 AGP Inte rfac e(1/3)
Size Document Number Rev
Custom
LA-2392
Date: Sheet
1
DEVICE
0
R498 64@10K_0402_5% R499 32@10K_0402_5%
R490 32@10K_0402_5% R491 64@10K_0402_5%
R496 32@10K_0402_5% R497 64@10K_0402_5%
R492 64@10K_0402_5% R495 32@10K_0402_5%
MAP17-116(16MB)
* MAP17-232(32MB)
0
MAP17-464(64MB)
1
12 12
12 12
12 12
12 12
TVMODE
00
1
0
11
SECAM
* NTSC
PAL VGA
12 12
12 12
R524
@120_0402_5%
R529
@120_0402_5%
DVOVREF
1
C636
0.1U_0402_10V6K
2
1
12
12
12
+3VS
14 53Friday, April 16, 2004
R526
32@100_0402_5%
12
12
+3VS
+3VS
FBACLK0#
R511 1K_0402_1%
R515 1K_0402_1%
of
5
MAP17-116/232 MAP17-464
+VGA_CORE * +1.2VS +1.35VS
+2.5VS
D D
C C
B B
1.5A
1
C646
2
4.7U_0805_6.3V6K
1
C665
2
0.1U_0402_10V6K
1
C747
2
0.1U_0402_10V6K
+VGA_CORE
0.1U_0402_10V6K
1
C647
2
0.1U_0402_10V6K
1
C666
2
0.1U_0402_10V6K
1
C748
2
3.3A
1
2
4.7U_0805_6.3V6K
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C648
2
1000P_0402_50V7K
0.1U_0402_10V6K
1
C667
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C749
2
0.1U_0402_10V6K
4.7U_0805_6.3V6K
1
C682
C683
2
1000P_0402_50V7K
1
C696
C695
2
1
C649
2
0.1U_0402_10V6K
1
C668
2
0.1U_0402_10V6K
1
C750
2
0.1U_0402_10V6K
1
C684
2
0.1U_0402_10V6K
1
C697
2
10P_0402_50V8K
10P_0402_50V8K
1
C650
2
0.1U_0402_10V6K
1
C669
2
0.1U_0402_10V6K
1
C751
2
1000P_0402_50V7K
1
C685
2
0.1U_0402_10V6K
1
C698
2
1
C651
2
0.1U_0402_10V6K
1
C670
2
0.1U_0402_10V6K
1
C752
2
0.1U_0402_10V6K
1
C686
2
10P_0402_50V8K
1
C699
2
1000P_0402_50V7K
0.1U_0402_10V6K
1
C652
2
1000P_0402_50V7K
1
C671
2
0.1U_0402_10V6K
1
C753
2
0.1U_0402_10V6K
1
C687
2
10P_0402_50V8K
1
C700
2
4
1
C644
2
1
C672
2
1
C754
2
1
C645
2
0.1U_0402_10V6K
1
C673
2
10P_0402_50V8K
1
C755
2
0.1U_0402_10V6K
+VGA_CORE
+2.5VS
+1.2VS
2 1
4.7U_0805_6.3V6K
U38B
E4
VDDFBIO
G4
VDDFBIO
J4
VDDFBIO
AD4
VDDFBIO
AF4
VDDFBIO
D5
VDDFBIO
F5
VDDFBIO
D7
VDDFBIO
E6
VDDFBIO
AB27
VDDFBIO
AD27
VDDFBIO
AF27
VDDFBIO
AE26
VDDFBIO
D9
VDDFBIO
D22
VDDFBIO
D24
VDDFBIO
AG24
VDDFBIO
E25
VDDFBIO
AF25
VDDFBIO
D26
VDDFBIO
F26
VDDFBIO
AG26
VDDFBIO
E27
VDDFBIO
G27
VDDFBIO
J27
VDDFBIO
AG5
NC/VDDFBIO(440)
AF6
NC/VDDFBIO(440)
AG7
NC/VDDFBIO(440)
AE5
NC/VDDFBIO(440)
L6
VDD
P6
VDD
U6
VDD
Y6
VDD
D11
VDD
F11
VDD
AE11
VDD
D14
VDD
F14
VDD
AE14
VDD
D17
VDD
F17
VDD
AE17
VDD
D20
VDD
F20
VDD
AE20
VDD
L25
VDD
P25
VDD
U25
VDD
Y25
VDD
L27
VDD
P27
VDD
U27
VDD
Y27
VDD
SA000040300(0304231100)
JOPEN1
C663
+1.35VS
2 1 1
2
3
1
C743 22U_1206_10V4Z
2
JOPEN2
near JOPEN1,2
1
C664
0.1U_0402_10V6K
2
VDDAGP VDDAGP VDDAGP VDDAGP VDDAGP VDDAGP VDDAGP VDDAGP VDDAGP VDDAGP
VDDFBC VDDFBC VDDFBC VDDFBC VDDFBC VDDFBC VDDFBC
VDDFBC NC/VDDFBC(440) NC/VDDFBC(440) NC/VDDFBC(440) NC/VDDFBC(440) NC/VDDFBC(440) NC/VDDFBC(440) NC/VDDFBC(440) NC/VDDFBC(440)
VDD33 VDD33 VDD33 VDD33 VDD33 VDD33
VD50CLAMP VD50CLAMP
DACVDD
DAC2VDD
PLLVDD
VDDDVO
VDDDVO IFPAIOAVDD IFPAIOBVDD
IFPBIOVDD IFPAPLLVDD IFPBPLLVDD
+VGA_CORE
AG14 AK14 AG17 AK17 AG20 AK20 AK23 AK26 AK29 AF30
J25 G6 J6 F22 F24 F7 G25 F9 AB6 AD6 AE7 AE9 AE22 AE24 AB25 AD25
E1 H1 AC1 AF1 L4 Y4
D4 AG11
AK10 AA1 AK5 AF3 AG4 T1 U1 M1 V1 N1
+1.5VS
+2.5VS
+3VS
+5VS
+IFPBIOVDD +IFPBPLLVDD
0.1U_0402_10V6K
1
C653
2
+3VS +3VS +3VS
1
+3VS
+2.8VS
2
1
C654
2
10P_0402_50V8K
0.1U_0402_10V6K
1
C674
2
0.1U_0402_10V6K
1
C756
2
+3VS
C707
0.1U_0402_16V4Z
2
0.1U_0402_10V6K
1
C655
2
1
C675
2
0.1U_0402_10V6K
1
C689
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
2
1
C758
2
0.1U_0402_10V6K
1
2
1000P_0402_50V7K
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
C694
2
C757
0.1U_0402_10V6K
+5VS
0.1U_0402_10V6K
1
C656
2
1
C676
2
0.1U_0402_10V6K
1
2
0.1U_0402_10V6K
1
C714
2
1
C759
0.1U_0402_10V6K
2
+3VS
1
C799 1000P_0402_50V7K
2
1
C657
C658
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C681
2
0.1U_0402_10V6K
1
C690
2
0.1U_0402_10V6K
1
C715
2
0.1U_0402_10V6K
1
C659
2
C678
0.1U_0402_10V6K
C691
0.1U_0402_10V6K
1
C716
2
0.1U_0402_10V6K
1
C800 1000P_0402_50V7K
2
1
C660
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C679
2
0.1U_0402_10V6K
1
C688
2
0.1U_0402_10V6K
1
C717
2
1
C805 1000P_0402_50V7K
2
1
0.1U_0402_10V6K
1
C661
2
1
C680
2
1
C692
2
+3VS
1
C718
4.7U_0805_6.3V6K
2
+1.5VS
1
C662
2
4.7U_0805_6.3V6K
+2.5VS
2.1A
1
C677
2
4.7U_0805_6.3V6K
1
C693
2
0.1U_0402_10V6K
1
C806 1000P_0402_50V7K
2
+VGA_CORE
1
C762
2
0.1U_0402_10V6K
1
C768
2
0.1U_0402_10V6K
1000P_0402_50V7K
1
C763
2
10P_0402_50V8K
0.1U_0402_10V6K
1
C769
2
0.1U_0402_10V6K
1
1
2
0.1U_0402_10V6K
1
A A
2
0.1U_0402_10V6K
5
C760
0.1U_0402_10V6K
C766
C761
2
1
C767
2
1
C764
2
1
C770
2
0.1U_0402_10V6K
0.1U_0402_10V6K
1
C765
2
0.1U_0402_10V6K
1
C771
2
4
1
C733 10P_0402_50V8K
2
1
C731 4700P_0402_25V7K
2
1
C732 1U_0603_10V6K
2
+3VS
1
C710 10P_0402_50V8K
2
Close to pin#AK10 Close to pin#V1
+IFPBIOVDD +IFPBPLLVDD
12
R581 10K_0402_5%
12
R582 10K_0402_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
C706 10P_0402_50V8K
2
Close to pin#T1
1
C708 4700P_0402_25V7K
2
1
C704 4700P_0402_25V7K
2
1
C709 1U_0603_10V6K
2
1
C705 1U_0603_10V6K
2
2
+2.8VS
+3VS
1
C730 10P_0402_50V8K
2
1
C728 4700P_0402_25V7K
2
1
C729 1U_0603_10V6K
2
+3VS
Close to pin#AA1
1
C724 10P_0402_50V8K
2
+PLL_VDD
1
C722 4700P_0402_25V7K
2
1
C723 1U_0603_10V6K
2
+3VS
Close to pin#AK5
Compal Electronics, Inc.
Title
MAP17 Power (2/3)
Size Document Number Rev
Custom
LA-2392
Date: Sheet
1
of
15 53Friday, April 16, 2004
5
4
3
2
1
U38D
K10
GND/NO PIN(440)
L10
GND/NO PIN(440)
M10
GND/NO PIN(440)
N10
GND/NO PIN(440)
P10
GND/NO PIN(440)
R10
GND/NO PIN(440)
T10
GND/NO PIN(440)
U10
GND/NO PIN(440)
V10
D D
C C
B B
A A
W10
AA10
W11
AA11
W12
AA12
W13
AA13
W14
AA14
W15
AA15
W16
AA16
AD11 AF11
AJ11
AH12
AD14 AF14
AJ14
Y10 K11
L11 M11 N11
P11 R11
T11 U11
V11
Y11
K12
L12 M12 N12
P12 R12
T12 U12
V12
Y12
K13
L13 M13 N13
P13 R13
T13 U13
V13
Y13
K14
L14 M14 N14
P14 R14
T14 U14
V14
Y14
K15
L15 M15 N15
P15 R15
T15 U15
V15
Y15
K16
L16 M16 N16
P16 R16
T16 U16
V16
Y16
K17 AB7 AD7 AF7
B8 E9
G9 AD9 AF9
B11 E11
G11
B14 E14
G14
Y7
E17
G17
B17
GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440) GND/NO PIN(440)
SA000040300(0304231100)
5
L17 M17 N17 P17 R17 T17 U17 V17 W17 Y17 AA17 K18 L18 M18 N18 P18 R18 T18 U18 V18 W18 Y18 AA18 K19 L19 M19 N19 P19 R19 T19 U19 V19 W19 Y19 AA19 K20 L20 M20 N20 P20 R20 T20 U20 V20 W20 Y20 AA20 K21 L21 M21 N21 P21 R21 T21 U21 V21 W21 Y21 AA21 AF17
GND
AJ17
GND
B20
GND
E20
GND
G20
GND
AD20
GND
AF20
GND
AJ20
GND
E22
GND
G22
GND
AD22
GND
AF22
GND
B23
GND
AJ23
GND
E24
GND
G24
GND
J24
GND
L24
GND
P24
GND
U24
GND
Y24
GND
AB24
GND
AD24
GND
AF24
GND
D25
GND
F25
GND
AE25
GND
AG25
GND
B26
GND
E26
GND
G26
GND
J26
GND
L26
GND
P26
GND
U26
GND
Y26
GND
AB26
GND
AD26
GND
AF26
GND
AJ26
GND
F27
GND
AE27
GND
E29
GND
H29
GND
L29
GND
P29
GND
U29
GND
Y29
GND
AC29
GND
AF29
GND
AJ29
GND
4
U38C
AG9
AH15
M26
AD17 AG22 AH19
AK13
AC2
AD5
AG6
A1
NC
B1
NC
C1
NC
D1
NC
A2
NC
C2
NC
D2
NC
J2
NC
A3
NC
B3
NC
C3
NC
V3
NC
C4
NC
AA4
NC
AB4
NC
AA5
NC NC
A10
NC
C10
NC
D10
NC
E10
NC
A11
NC NC
A13
NC
C13
NC
E13
NC
A14
NC
C14
NC
A15
NC
B15
NC
C15
NC
D15
NC
E15
NC
A16
NC
B16
NC
C16
NC
D16
NC
E16
NC
A17
NC
C17
NC
B18
NC
C18
NC
D18
NC
E18
NC
B19
NC
C19
NC
D19
NC
E19
NC
A20
NC
A21
NC
B21
NC
D21
NC
E21
NC
A22
NC
B22
NC
C22
NC
A23
NC
C23
NC
B24
NC
C24
NC
A25
NC
B25
NC
C25
NC
T26
NC
C26
NC
K26
NC NC
N26
NC
R26
NC
A26
NC
A12
NC NC NC NC NC
B2
GND
E2
GND
H2
GND GND
AF2
GND
AJ2
GND
F4
GND
AE4
GND
B5
GND
E5
GND
G5
GND
J5
GND
L5
GND
Y5
GND
AB5
GND GND
AF5
GND
AJ5
GND
D6
GND
F6
GND
AE6
GND GND
P7
GND
NC(440)//FBACAS#
NC/NO PIN(440)
IFP1PLLGND IFP0PLLGND
GND GND
DAC2GND
DACGND
IFP1IOGND
IFPIOAGND IFPIOBGND
GND GND GND
C30
NC
V26
NC
W26
NC
A27
NC
B27
NC
C27
NC
D27
NC
K27
NC
M27
NC
N27
NC
R27
NC
T27
NC
V27
NC
Y17
NC
W27
NC
A28
NC
B28
NC
C28
NC
E28
NC
G28
NC
H28
NC
L28
NC
M28
NC
P28
NC
R28
NC
T28
NC
U28
NC
V28
NC
W28
NC
Y28
NC
AA28
NC
AB28
NC
C29
NC
D29
NC
F29
NC
G29
NC
J29
NC
K29
NC
M29
NC
N29
NC
T29
NC
V29
NC
F28
NC
K28
NC
AA26
NC
E12
NC
R29
NC
W29
NC
AA29
NC
AB29
NC
B13
NC
D30
NC
E30
NC
F30
NC
H30
NC
L30
NC
N30
NC
P30
NC
R30
NC
T30
NC
U30
NC
V30
NC
Y30
NC
AA30
NC
AB30
NC
D13
NC
J28
NC
AA27
NC
D28
NC
C11
NC
B10
NC
A24
NC
E3
NC
D3
NC
B12
NC
C12
NC
G30
NC
J30
NC
K30
NC
AH13
NC
A19
NC
M30
NC
W30
NC
AH14
NC
D12 AC4
L7 U7 W1 AK8 N2 M2 V2 T2 U2 E7 G7 J7
+3VS
1U_0603_10V6K
+3VS
R578 10K_0402_5%
C780
1
2
12
SA000040300(0304231100)
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
U44
4
VIN
2
SENSE or ADJ
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
+2.8VS
5
VOUT
GND
6 1 3
R576
1 2
61.9K_0603_1%
12
1
R577
C782
47K_0603_1%
2
1
C781 1U_0603_10V6K
2
0.01U_0402_16V7K
Compal Electronics, Inc.
Title
MAP17 NC/GND(3/3)
Size Document Number Rev
Custom
LA-2392
Date: Sheet
1
of
16 53Friday, April 16, 2004
A
B
C
D
E
F
G
H
1 1
LVDSA2+<14>
LVDSA2-<14>
LVDSA1+<14> LVDSA1-<14>
LVDSB2+<14> LVDSB2-<14>
LVDSA0+<14> LVDSA0-<14>
LVDSAC+<14> LVDSAC-<14>
LVDSB1+<14> LVDSB1-<14>
2 2
LCD Panel Connector
JP6
LVDSA2+ LVDSA2-
LVDSA1+
LVDSB2+ LVDSB2-
LVDSA0+ LVDSA0-
LVDSAC+ LVDSAC-
LVDSB1+ LVDSB1-
+3VS
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
ACES_88107-4001_40P
2
1
2
4
3
4
6
5
6
8
7
8
LVDSB0+
10
9
10
LVDSB0-LVDSA1-
12
11
12
14
13
14
LVDSBC+
16
15
16
LVDSBC-
18
17
18
20
19
20
DISPOFF#
22
21
22
24
23
24
26
25
26
28
27
28
DDC_CLK_LCD
30
29
30
DDC_DAT_LCD
32
31
32
34
33
34
36
35
36
38
37
38
40
39
40
LVDSB0+ <14>
LVDSB0- <14>
LVDSBC+ <14>
LVDSBC- <14>
INVT_PWM <30> DAC_BRIG <30>
INVPWR_B+
The cap.'s colsely to LCD CONN.
+LCDVDD_A
DDC_CLK_LCD <14> DDC_DAT_LCD <14>
1
C302
2
10U_0805_10V4Z
1000P_0402_50V7K
1
C303
2
+12VALW
L4
1 2
KC FBM-L11-201209-221LMAT_0805
1
C304
0.01U_0402_16V7K
2
EMI require
INVPWR_B+
1
C622
0.01U_0402_25V4Z
2
+LCDVDD
1
C623
0.01U_0402_25V4Z
2
+3VS
1
1
C305
4.7U_0805_10V4Z
2
+3VS
R141
4.7K_0402_5%
1 2
BKOFF#<30>
ENABLT<14,30>
KC FBM-L11-201209-221LMAT_0805
21
D7 RB751V_SOD323
21
D8 RB751V_SOD323
L5
1 2
DISPOFF#
INVPWR_B+B+
D
R146
+LCDVDD
+12VALW
Q14
12
R147 1K_0402_5%
13
D
S
R149 100K_0402_5%
1 2
2
G
3 3
2N7002_SOT23
1
O
Q16 DTC124EK_SC59
G
I
3
ENVDD<14>
ENVDD
2
2
G
100K_0402_5%
1 2
R148
150K_0402_5%
13
D
Q15
S
2N7002_SOT23
G
2
1
C306
2
1 2
0.047U_0402_16V4Z
0.1U_0402_16V4Z
SI2302DS: N CHANNEL VGS: 4.5V, RDS: 85 mOHM VGS: 2.5V, RDS: 115mOHM Id(MAX): 2.8A VGS(MAX): +-8V
S
3
C307
Q13 SI2302DS_SOT23
1
2
+LCDVDD
1
C308
4.7U_0805_10V4Z
2
4 4
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
E
F
Size Document Number Rev
LA-2392
Date: Sheet of
Compal Electronics, Inc.
LVDS Connector
G
0.1
17 53Friday, April 16 , 2004
H
A
B
C
D
E
@DAN217_SC59
CRT Connector
1 1
CRT_R<14>
CRT_G<14>
CRT_B<14>
2 2
CRT_HSYNC<14>
CRT_VSYNC<14>
75_0402_1%
R154
C811
0.1U_0402_16V4Z
CRT_VSYNC
12
R155
75_0402_1%
+5VS
75_0402_1%
12
R156
2 4
2 4
22P_0402_50V8J
12
135
U46 74AHCT1G125GW
135
U47 74AHCT1G125GW
1
C310
2
22P_0402_50V8J
1
2
R596
1K_0402_5%
C311
@DAN217_SC59
L6
1 2
FCM2012C-800_0805
L7
1 2
FCM2012C-800_0805
L8
1 2
FCM2012C-800_0805
1
C312 22P_0402_50V8J
2
1
D9
2
RED_L
GREEN_L
BLUE_L
1
C313 18P_0402_50V8J
2
L9
1 2
FBM-L11-160808-800LMT_0603 L10
1 2
FBM-L11-160808-800LMT_0603
D10
3
18P_0402_50V8J
1
C314
2
22P_0402_50V8J
1
2
C316
D11
3
1
2
1
2
1
3
2
C315 18P_0402_50V8J
D_HSYNC_LCRT_HSYNC
D_VSYNC_L
1
C317 22P_0402_50V8J
2
TV-Out Connector
+5VS
+3VS
@DAN217_SC59
F1
FUSE_1A
M_SEN#<30>
DDC_MD2
1
C318 100P_0402_50V8K
2
D13
D12
2 1
21
RB411D_SOT23
0.1U_0402_16V4Z
C319
220P_0402_50V7K
@DAN217_SC59
1
D14
C309
1
2
1
W=40mils
1
2
1
C320 220P_0402_50V7K
2
D15
+CRTVDD+RCRT_VCC
JP7
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
SUYIN_7849S-15G2T-HC
1
+3VS
DDC_DAT_CRT <14>
DDC_CLK_CRT <14>
2
@DAN217_SC59
3
S-Video
D
JP8
1 2 3 4 5 6 7
SUYIN_35138S-07T1-DF
Title
CRT & TVout Connector
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LA-2392
Friday, April 16, 2004
18 53
E
of
1 2
1 2
1 2
TV_GND
C
@DAN217_SC59
330P_0402_50V7K
3 3
TV_LUMA<14,34>
TV_CRMA<14,34>
TV_COMPS<14,34>
4 4
A
75_0402_1%
12
R163
12
B
12
75_0402_1%
J4 JOPEN
75_0402_1%
R164
12
R165
270P_0402_50V7K
1
C321
2
270P_0402_50V7K
1
C322
2
270P_0402_50V7K
L11 FLM1608081R8K_0603
L12 FLM1608081R8K_0603
L13 FLM1608081R8K_0603
1
C323
2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C324
2
2
LUMA_CL
CRMA_CL
COMPS_CL
3
330P_0402_50V7K
1
2
2
C325
3
1
C326
2
330P_0402_50V7K
A
B
C
D
E
F
G
H
I
J
1 1
HDD Connector
+5VS
PHDD_LED# SHDD_LED#
PDD[0..15]
PCIRST_IDE# PDD7 PDD6
PDD4 PDD3 PDD2 PDD1 PDD0
PDDREQ PDIOW# PDIOR#
PDDACK# IRQ14
D53 1N4148_SOT23
1 2 1 2
D54 1N4148_SOT23
JP9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
SUYIN_200006FA044S503ZU
+5VS
ACT_LED#
PDD8
PDD9 PDD10PDD5 PDD11 PDD12 PDD13 PDD14 PDD15
PCSEL
12
R474 100K_0402_5%
R170
1 2
470_0402_5%
PDA2 <12> PDCS3# <12>
+5VS
ACT_LED# <33>
+5VS
Placea caps . near HDD CONN.
@10U_0805_10V4Z
1
C328
2
1000P_0402_50V7K
Placea caps. near CDROM CONN.
+5VS
W=100 mils
1
C336
1000P_0402_50V7K
2
1
C329
2
1
C337
0.1U_0402_16V4Z
2
1
C330
2
10U_0805_10V4Z
1
C338 @1U_0805_25V4Z
2
@1U_0805_25V4Z
1
C331
2
1
C339 10U_0805_10V4Z
2
1
C332
2
0.1U_0402_16V4Z
PDD[0..15]<12>
Place closely to
2 2
3 3
4 4
JP31
PDIOW#
12
R167 @10_0402_5%
1
C333 @15P_0402_50V8J
2
PDD7
1 2
R172 10K_0402_5%
IRQ14
1 2
R173 10K_0402_5%
PDDREQ
1 2
R174 5.6K_0402_5%
1 2
C335 33P_0402_50V8J
PDIOR#
12
R168 @10_0402_5%
1
C334 @15P_0402_50V8J
2
1 2
+3VS
R169 4.7K_0402_5%
PDIORDY<12>
PDIORDY
+5VS
R171 100K_0402_5%
PHDD_LED#
1 2
PCIRST_IDE#<12>
PDDREQ<12> PDIOW#<12>
PDIOR#<12>
PDDACK#<12>
IRQ14<12>
PDA1<12> PDA0<12>
PDCS1#<12>
CD-ROM Connector
5 5
C344 @47P_0402_50V8J
SDD[0..15]<12>
6 6
7 7
SDD[0..15]
CDROM_L<25>
R176
4.7K_0402_5%
SHDD_LED#
+5VS
12
R179
100K_0402_5%
SDIOW#<12>
IRQ15<12> SDA1<12> SDA0<12> SDCS1#<12>
12
+3VS
SDIORDY<12>
8 8
A
B
12
R175 10K_0402_5%
12
CDROM_L
PCIRST_IDE#
SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0
+5VS +5VS +5VS
SEC_CSEL
R182 470_0402_5%
1 2
C
JP10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CD-ROM CONN.
D
CD_ AGND <25>
CDROM_R SDD8
SDD9 SDD10 SDD11 SDD12 SDD13 SDD14 SDD15
PDIAG#
W=80mils
C345 0.1U_0402_16V4Z
1 2
R181 @100K_0402_5%
CDROM_R <25>
SDDREQ <12> SDIOR# <12>
SDDACK# <12>
R177 @100K_0402_5%
1 2
SDA2 <12> SDCS3# <12>
+5VS +5VS
12
+5VS
IRQ15
1 2
R178 10K_0402_5%
SDDREQ
1 2
+5VS
THIS SHEET OF E NGI NEER ING DR AWI NG I S T HE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND C ONTAINS CONFID ENTIAL
AND TRADE S ECR ET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
R180 5.6K_0402_5%
1 2
C346 33P_0402_50V8J
G
Compal Elec tronics, Inc.
Title
IDE/FDD/CD-ROM Module
Size Document Number Re v
LA-2392
Custom
H
Date: Sheet
I
19 53Friday, April 16, 2004
J
0.1
of
5
4
3
2
1
+3VALW
1
C353 @1U_0603_10V6K
2
D D
1
C347
0.1U_0402_16V4Z
2
+2.5VLAN
1
C356
0.1U_0402_16V4Z
2
1
C348
0.1U_0402_16V4Z
2
1
2
Close to pin58
PCI_AD[0..31]<12,21,22,28>
C C
PCI_CBE#[0..3]<12,21,22,28>
PCI_PAR<12,21,22,28>
B B
A A
PCI_FRAME#<12,21,22,28>
PCI_IRDY#<12,21,22,28>
PCI_TRDY#<12,21,22,28>
PCI_DEVSEL#<12,21,22,28>
PCI_STOP#<12,21,22,28> PCI_PERR#<12,21,22,28>
PCI_SERR#<12,21,22,28>
PCI_REQ#1<12> PCI_GNT#1<12>
PIRQB#<12,22>
LAN_PME#<22,28,30,31>
PCIRST#<12,21,22,28>
CLK_PCI_LAN<12>
PCI_AD[0..31]
PCI_CBE#[0..3]
PCI_AD17
R200
@22_0402_5%
C373
@10P_0402_50V8K
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 LAN_RX­PCI_AD28
PCI_AD30 PCI_AD31
PCI_CBE#0 PCI_CBE#1 PCI_CBE#2 PCI_CBE#3
1 2
R193 100_0402_5%
1 2
R572 10K_0402_5%
12
+3VALW
1
2
U7
47
AD0
46
AD1
45
AD2
43
AD3
42
AD4
41
AD5
40
AD6
39
AD7
36
AD8
35
AD9
34
AD10
33
AD11
32
AD12
30
AD13
29
AD14
28
AD15
15
AD16
14
AD17
13
AD18
12
AD19
11
AD20
10
AD21
9
AD22
8
AD23
96
AD24
93
AD25
92
AD26
91
AD27
89
AD28
87
AD29
86
AD30
85
AD31
38
C/BE#0
27
C/BE#1
17
C/BE#2
84
C/BE#3
98
IDSEL
24
PAR
18
FRAME#
19
IRDY#
20
TRDY#
21
DEVSEL#
23
STOP#
25
PERR#
26
SERR#
83
REQ#
82
GNT#
80
INTA#
79
INTB#
57
PME#
81
RST#
97
PCICLK
50
CLKRUN#
6
VDD
22
VDD
37
VDD
49
VDD
90
VDD
95
VDD
RTL8101L_LQFP100
1
2
C357 22U_1206_10V4Z
AVDD25
Power
LAN I/F
PCI I/F
ISOLATE#
AC_RST# AC_SYNC AC_DOUT
AC_BCK
AC-Link
ROMCS/OE#
Power
C349
0.1U_0402_16V4Z
48
VDD25
94
VDD25
58 59
AVDD
70
AVDD
75
AVDD
52
EEDO
53
EEDI
54
EESK
55
EECS
78
LED0
77
LED1
76
LED2
72
TXD+
71
TXD-
68
RXIN+
67
RXIN-
61
X1
60
X2
64
LWAKE
74 65
RTSET
63
RTT3
56
VCTRL
1 3 4 5
AC_DIN
7
100
GPIO0
99
GPIO1
51 69
NC
2
DGND1
16
DGND2
31
DGND3
44
DGND4
88
DGND5
62
AGND1
66
AGND2
73
AGND3
1
C350
0.1U_0402_16V4Z
2
2
C355
0.1U_0402_16V4Z
1
1 2
KC FBM_L11-201209-601LMT 0805
LAN_IO
2
C363
0.1U_0402_16V4Z
ISOB
1
EEDO EEDI EESK EECS
ACTIVITY# LINK10_100#
LAN_TX+ LAN_TX-
LAN_RX+
CLKOUTPCI_AD29
XTALFB
R191 15K_0402_5%
1 2
R192 1K_0402_5%
R194 5.6K_0603_1%
1
C351
0.1U_0402_16V4Z
2
L44
2
C364
0.1U_0402_16V4Z
1
12
12
2
C352
0.1U_0402_16V4Z
1
+2.5VLAN
+2.5VLAN
L14
1 2
KC FBM_L11-201209-601LMT 0805
2
C365
0.1U_0402_16V4Z
1
1 2
R188 5.6K_0402_5%
+3VS
Y4
CLKOUT XTALFB
1 2
1
25MHZ_20P_1BX25000CK1A
C371 27P_0402_50V8J
2
+3VALW
U8
4
DO
GND
3
DI
NC
2
SK
NC
1
CS
VCC
AT93C46-10SI-2.7_SO8
+3VALW
2
C372 27P_0402_50V8J
1
5 6 7 8
+3VALW
RJ45_RXX-<34>
RJ45_RXX+<34>
RJ45_TXX-<34>
RJ45_TXX+<34>
+3VALW
RJ45_GND<34>
Close to RTL8101L
2
C366
0.1U_0402_16V4Z
1
+3VALW
LAN_TX­LAN_TX+
LAN_RX­LAN_RX+
49.9_0402_1%
49.9_0402_1%
1
C367
0.1U_0402_16V4Z
2
12
12
R189
C368 0.1U_0402_16V4Z
1 2
12
12
R197
2
C370
0.1U_0402_16V4Z
1
Layout Recommend :
1. LAN_RD+, LAN_RD- should be equal length as possible
2. LAN_TD+, LAN_TD- should be equal length as possible
3. The Maximum trace length between LAN chip(U22) and Magnetic(U24) is 12cm(4.7")
4. The distance between RJ45(Conn.) and Magnetic(U24) should be as short as possible
ACTIVITY#
1 2
R183 300_0402_5%
RJ45_RXX-
RJ45_RXX+ RJ45_TXX­RJ45_TXX+ LINK10_100#
1 2
R185 300_0402_5%
RJ45_GND
R190
49.9_0402_1% U9
7 6
3 2 1
NS0019_16P
R198
49.9_0402_1%
75_0402_1%
1:1
TD-8TX­TD+ CT
CT RD­RD+
R186
TX+
RX-
RX+
T=10mil
T=10mil
1 2
1 2
9 10 11
CT
14
CT
15 16
JP11
12
Amber LED-
11
Amber LED+
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
10
Green LED-
9
Green LED+
AMP RJ45 with LED
R187 75_0402_1%
1 2
C360 1000P_1206_2KV7K
RJ45_TXX­RJ45_TXX+
RJ45_RXX­RJ45_RXX+
75_0402_1%
1000P_1206_2KV7K
R195
12
C369
SHLD4 SHLD3
SHLD2 SHLD1
12
R196 75_0402_1%
RJ45_GND
1
2
16 15
14 13
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
LAN RealT ech8100BL
LA-2392
of
20 53Friday, April 16, 2004
1
5
D D
PCI_AD[0..31]<12,20,22,28>
C C
PCI_CBE#3<12,20,22,28> PCI_CBE#2<12,20,22,28> PCI_CBE#1<12,20,22,28> PCI_CBE#0<12,20,22,28> CLK_PCI_1394<12> PCI_GNT#0<12> PCI_REQ#0<12>
ID: AD16
PCI_FRAME#<12,20,22,28> PCI_IRDY#<12,20,22,28> PCI_TRDY#<12,20,22,28> PCI_DEVSEL#<12,20,22,28> PCI_STOP#<12,20,22,28> PCI_PERR#<12,20,22,28> PIRQA#<12,22>
PCI_SERR#<12,20,22,28> PCI_PAR<12,20,22,28>
B B
PCIRST#<12,20,22,28>
PCI_AD[0..31]
CLK_PCI_1394
PCI_AD16
1 2
R204 100_0402_5%
1 2
R573 10K_0402_5%
PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31
U10
84
PCI_AD0
82
PCI_AD1
81
PCI_AD2
80
PCI_AD3
79
PCI_AD4
77
PCI_AD5
76
PCI_AD6
74
PCI_AD7
71
PCI_AD8
70
PCI_AD9
69
PCI_AD10
67
PCI_AD11
66
PCI_AD12
65
PCI_AD13
63
PCI_AD14
61
PCI_AD15
46
PCI_AD16
45
PCI_AD17
43
PCI_AD18
42
PCI_AD19
41
PCI_AD20
40
PCI_AD21
38
PCI_AD22
37
PCI_AD23
32
PCI_AD24
31
PCI_AD25
29
PCI_AD26
28
PCI_AD27
26
PCI_AD28
25
PCI_AD29
24
PCI_AD30
22
PCI_AD31
34
PCI_C/BE3
47
PCI_C/BE2
60
PCI_C/BE1
73
PCI_C/BE0
16
PCI_CLK
18
PCI_GNT
19
PCI_REQ
36
PCI_IDSEL
49
PCI_FRAME
50
PCI_IRDY
52
PCI_TRDY
53
PCI_DEVSEL
54
PCI_STOP
56
PCI_PERR
13
PCI_INTA/CINT
21
PCI_PME/CSTSCHG
57
PCI_SERR
58
PCI_PAR
12
PCI_CLKRUN
85
PCI_RST
G_RST# connect to PCIRST#
14
CLK_PCI_1394
12
R214 @10_0402_5%
1
C394 @10P_0402_25V8K
2
** GPIO2 and GPIO3 defaults as an input and if it is not implemented, it is recommended that it be pulled low to ground with a 220 ohm resistor.
Power on
VCC(+3VS)
A A
RP88
1 8 2 7 3 6 4 5
SCL_1394
SDA_1394
220_1206_8P4R_5%
Entry S3 S3 Wake-up
G_RST
89
GPIO3
90
GPIO2
GLOBA_RESET#
T1
T1
PCI_PCIRST#
T2
5
T2
4
+3VS
VDDP20VDDP35VDDP48VDDP62VDDP
TSB43AB21 /(TSB43AB22)
PCI BUS INTERFACE
PLLGND18REG_EN9AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND17DGND23REG1830DGND33DGND44DGND55DGND64DGND68DGND75DGND83REG1893DGND
109
110
111
117
126
127
128
0.1U_0402_16V4Z
T1: >2ms T2: >=0
Note: GLOAB_RESET# Can Connect to PCI_PCIRST#
4
87
78
CYCLEIN
BIAS CURRENT
OSCILLATOR
FILTER
EEPROM 2 WIRE BUS
POWER CLASS
PHY PORT 1
1
C395
2
CLOSE CHIP
3
+3VS
+3VS
12
R201 10K_0402_5%
RP70
1 8 2 7 3 6 4 5
4.7K_1206_8P4R_5%
86
11
96
DVDD
CNA
DVDD
TEST1710TEST16
DVDD DVDD DVDD DVDD DVDD DVDD
CYCLEOUT/CARDBUS
PLLVDD
AVDD AVDD AVDD AVDD AVDD
CPS
NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)
FILTER0 FILTER1
SDA SCL PC0
PC1 PC2
TPBIAS0
TPA0+
TPA0-
TPB0 +
TPB0 -
TEST9 TEST8
TEST3 TEST2 TEST1 TEST0
TSB43AB21_PQFP128
103
1
C396
0.1U_0402_16V4Z
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VS
15 27 39 51 59 72 88 100 7 1 2 107 108 120
106
125 124 123 122 121
118
R0
119
R1
6
X0
5
X1
3 4 92 91 99
98 97
116 115 114 113 112
94 95
101 102 104 105
1
2
4.7U_0805_10V4Z
1 2
R202 1K_0402_5%
1 2
R203
6.34K_0402_1%
12
X1
24.576MHz_16P_3XG-24576-43E1
30ppm
1 2
C391
0.1U_0402_16V4Z
SDA_1394 SCL_1394
XTPBIAS0 XTPA0+ XTPA0­XTPB0+ XTPB0-
3
1
C374
0.1U_0402_16V4Z
2
L15
C387
BLM21A601SPT_0805
1
C388
0.01U_0402_16V7K
2
+PLLVDD
Near 1394 IC
1 2
C389 22P_0402_50V8J
1 2
C390 22P_0402_50V8J
EEPROM cancel, need System Support
1 2
1
C375
0.1U_0402_16V4Z
2
+3VS
1
C376 @0.1U_0402_16V4Z
2
C393
220P_0402_50V7K
2
1
C377
0.1U_0402_16V4Z
2
+3VS
1
C382 @1000P_0402_50V7K
2
12
R207
56.2_0402_1%
12
R210
56.2_0402_1%
1
2
Close Chip
2
1
C383 @1000P_0402_50V7K
2
12
R208
56.2_0402_1%
12
R211
56.2_0402_1%
12
R215
5.11K_0402_1%
1
1
C378 @0.1U_0402_16V4Z
2
1
2
Title
Size Document Number Rev
Date: Sheet of
1
C379
0.1U_0402_16V4Z
2
1
C384 @1000P_0402_50V7K
2
C392 1U_0805_25V4Z
JP12
4 3 2 1
AMP_440168-2
The connector depend on defferent project
Compal Electronics, Inc.
IEEE 1394 CONTROLLER
LA-2392
1
C380
0.1U_0402_16V4Z
2
1
C385 1000P_0402_50V7K
2
Connect To Shielding GND
1
C381
0.1U_0402_16V4Z
2
1
C386 1000P_0402_50V7K
2
21 53Friday, April 16 , 2004
1
0.1
A
1 2
+3V
R216 @10K_0402_5%
PCM_SUSP#<30>
PCM_SPK#<25>
SM_D3/MS_BS<24>
DQRYDRV<24>
SD_CD/DATA3<24>
@43K_0402_5%
SM_D4<24> SM_D5<24> SM_D6<24> SM_D7<24> SM_LVD<24>
SM_RE#<24> SM_WP#<24> SM_CLE<24>
SM_WE#<24> SD_DATA1<24> MC_WP#<24>
SD_DATA0<24> SD_CMD<24> SD_DATA2<24> MC_CD#<24>
SM_CE#<24>
SM_ALE<24>
SM_R/B#<24>
SQRY4<24>
SQRY3<24>
R220
1 2
1 1
SCLK
12
R591 47K_0402_5%
SM_D2/MS_SDIO<24> SM_D1/MS_RFU5<24>
2 2
SD_CLK/MS_CLK<24>
3 3
SM_D0/MS_RFU7<24>
PIRQB#<12,20> PIRQA#<12,21>
SDATA<23> SCLK<23> SLATCH<23>
0.1U_0402_16V4Z
U37
W10
B_CAD27/B_D0
U10
B_CAD29/B_D1
P10
B_RSVD/B_D2
H3
B_CAD0/B_D3
H1
B_CAD1/B_D4
J2
B_CAD3/B_D5
J5
B_CAD5/B_D6
K2
B_CAD7/B_D7
V10
B_CAD28/B_D8
R10
B_CAD30/B_D9
V11
B_CAD31/B_D10
H2
B_CAD2/B_D11
J1
B_CAD4/B_D12
J3
B_CAD6/B_D13
J6
B_RSVD/B_D14
K3
B_CAD8/B_D15
R8
B_CAD26/B_A0
W7
B_CAD25/B_A1
V7
B_CAD24/B_A2
P8
B_CAD23/B_A3
V6
B_CAD22/B_A4
U6
B_CAD21/B_A5
V5
B_CAD20/B_A6
U5
B_CAD18/B_A7
M6
B_CC/BE1#/B_A8
M2
B_CAD14/B_A9
K6
B_CAD9/B_A10
L6
B_CAD12/B_A11
T1
B_CC/BE2#/B_A12
N2
B_CPAR/B_A13
N6
B_CPERR#/B_A14
P5
B_CIRDY#/B_A15
P6
B_CCLK/B_A16
M3
B_CAD16/B_A17
M5
B_RSVD/B_A18
N3
B_CBLOCK#/B_A19
P2
B_CSTOP#/B_A20
P3
B_CDEVSL#/B_A21
R2
B_CTRDY#/B_A22
R3
B_CFRAME#/B_A23
W4
B_CAD17/B_A24
R6
B_CAD19/B_A25
W5
B_CRST#/B_RESET
N5
B_CGNT/B_WE#
M1
B_CAD15/B_IOWR#
L5
B_CAD13/B_IORD#
U7
B_CC/BE3#/B_REG#
L3
B_CAD11/B_OE#
R7
B_CREQ#/B_INPACK#
V8
B_CINT#/B_IREQ#
V9
B_CAUDIO/B_SPKR#
W9
B_CSERR#/B_WAIT#
U9
B_CSTSCHG/B_STSCHG#
R9
B_CCLKRUN/B_IOIS16#
U8
B_CVS1/B_VS1#
P7
B_CVS2/B_VS2#
K5
B_CC/BE0#/B_CE1#
L2
B_CAD10/B_CE2#
H5
B_CCD1#/B_CD1#
P9
B_CCD2#/B_CD2#
C407
1 2
B
R574 10K_0402_5%
1 2
F13
B15
MFUNC3
A15
MFUNC4
C14
MFUNC5
W11
MFUNC6
NC
CLK_48M
+3V
A12
VCCA7VCC
G19
VCCG1VCC
J19
N19
VCC
VCCN1VCC
VCCW8VCC
SCLK
F15
L1
F14
E18
K19
E5
NC
2.5V LATCH
VR_EN#
SPKROUT
E17
DATA
CLOCK
C15
SUSPEND#
D19
A16
MFUNC0
E14
MFUNC1
MFUNC2
FUNCTION
CARDBUS CONTROLLER PCI1520 PBGA 209
SLOT B
PCI INTERFACE
W13
POWER
C
+3VS
A10
VCCP
CARD_LED <35>
SIRQ <12,29,30>
+S1_VCC
+S2_VCC
P19
VCCA
R1
VCCB
A_CAD27/A_D0 A_CAD29/A_D1
A_RSVD/A_D2
A_CAD0/A_D3 A_CAD1/A_D4 A_CAD3/A_D5 A_CAD5/A_D6
A_CAD7/A_D7 A_CAD28/A_D8 A_CAD30/A_D9
A_CAD31/A_D10
A_CAD2/A_D11 A_CAD4/A_D12 A_CAD6/A_D13 A_RSVD/A_D14 A_CAD8/A_D15
A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6 A_CAD18/A_A7
A_CC/BE1#/A_A8
A_CAD14/A_A9 A_CAD9/A_A10
A_CAD12/A_A11
A_CC/BE2#/A_A12
A_CPAR/A_A13
A_CPERR#/A_A14
A_CIRDY#/A_A15
A_CCLK/A_A16
A_CAD16/A_A17
SLOT A
A_RSVD/A_A18
A_CBLOCK#/A_A19
A_CSTOP#/A_A20
A_CDEVSL#/A_A21
A_CTRDY#/A_A22
A_CFRAME#/A_A23
A_CAD17/A_A24 A_CAD19/A_A25
A_CRST#/A_RESET
A_CGNT#/A_WE#
A_CAD15/A_IOWR#
A_CAD13/A_IORD#
A_CC/BE3#/A_REG#
A_CAD11/A_OE#
A_CREQ#/A_INPACK#
A_CINT#/A_IREQ#
A_CAUDIO/A_SPKR#
A_CSERR#/A_WAIT#
A_CSTSCHG/A_STSCHG#
A_CCLKRUN#/A_IOIS16#
A_CVS1/A_VS1# A_CVS2/A_VS2#
A_CAD10/A_CE2#
A_CC/BE0#/A_CE1#
A_CCD1#/A_CD1# A_CCD2#/A_CD2#
+3V
0.1U_0402_16V4Z
2
C398
1
0.1U_0402_16V4Z
G17 F18 F17 P11 W12 U12 R12 U13 G14 G15 E19 R11 V12 P12 V13 P13
J14 J17 J18 K15 K18 L14 L17 M19 T19 U15 R13 P14 M17 P15 R18 N18 M14 W16 R17 N14 P17 N15 N17 M15 M18 L19
L15 P18 R14 V15 K14 W15 K17 H19 H17 H18 H14 H15
J15 L18
U14 V14
U11 G18
2
C399
1
0.1U_0402_16V4Z
S1_D0 S1_D1 S1_D2 S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_D8 S1_D9 S1_D10 S1_D11 S1_D12 S1_D13 S1_D14 S1_D15
S1_A0 S1_A1 S1_A2 S1_A3 S1_A4 S1_A5 S1_A6 S1_A7 S1_A8 S1_A9 S1_A10 S1_A11 S1_A12 S1_A13 S1_A14 S1_A15 S1_A16 S1_A17 S1_A18 S1_A19 S1_A20 S1_A21 S1_A22 S1_A23 S1_A24 S1_A25
D
0.1U_0402_16V4Z
2
2
C401
C400
1
1
S1_RST <23> S1_WE# <23> S1_IOWR# <23> S1_IORD# <23> S1_REG# <23> S1_OE# <23> S1_INPACK# <23> S1_RDY# <23> S1_BVD2 <23> S1_WAIT# <23> S1_BVD1 <23> S1_WP <23>
S1_VS1 <23> S1_VS2 <23>
S1_CE2# <23> S1_CE1# <23>
S1_CD1# <23> S1_CD2# <23>
0.1U_0402_16V4Z
2
C402
1
0.1U_0402_16V4Z
+3VS
Close to pin#A10
+3VS
12
R221 10K_0402_5%
1
C408
0.1U_0402_16V4Z
2
2
C403
1
0.1U_0402_16V4Z
2
C397
0.1U_0402_16V4Z
1
X4
4
VDD
1
OE
48MHZ_4P_FN4800002
0.1U_0402_16V4Z
2
C404
1
OUT
GND
2
2
C405
1
1
0.1U_0402_16V4Z
3
1 2
R222 22_0402_5%
2
C406
Close to pin#W11
E
JP24A2
CARDBUS HOUSING for PCI1620
@JP24A1
CARDBUS HOUSING for PCI1520
EMI require
CLK_48M
12
R468 @10_0402_5%
1
C621 @10P_0402_25V8K
2
CLK_48M
12
C409 @15P_0402_50V
CLK_48M <29>
GROUND
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD10D1AD9E3AD8F5AD7E2AD6F3AD5F2AD4G5AD3F1AD2H6AD1G3AD0
G2
PCI_AD1
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD0
4 4
PCI_AD[0..31]<12,20,21,28>
PCI_CBE#[0..3]<12,20,21,28>
S1_D[0..15]<23> S1_A[0..25]<23>
A
S1_D[0..15] S1_A[0..25]
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
B12
PCI_AD10
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD15
PCI_AD11
PCI_AD16
B
AD22B9AD21C9AD20F9AD19E9AD18A8AD17B8AD16C8AD15B5AD14E6AD13C5AD12A4AD11
F11
F12
F10
B10
PCI_AD25
PCI_AD19
PCI_AD18
PCI_AD17
PCM_PME#<20,28,30,31>
G_RST#<23,30>
PCI_AD26
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD27
PCI_AD24
+3V
C/BE3#
C/BE2#F8C/BE1#F6C/BE0#
G6
E12
A11
B11
E11
B14
C12
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD31
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
PCI_CBE#3
1 2
R225 @10K_0402_5%
1 2
C410 @0.1U_0402_16V4Z
GNDA6GNDA9GND
GNDE1GNDK1GNDP1GND
GNDW6GND
RI_OUT#/PME#
GRST#
PRST#
PCLK
GNT#
REQ#
SERR#C6PERR#E7IDSEL
DEVSEL#F7STOP#B6IRDY#B7TRDY#C7FRAME#E8PAR
A5
E13
B13
A13
C11
E10
C13
C10
1 2
R224 100_0402_5%
CLK_PCI_PCM
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
A14
PCI_AD20
GND
PCI1520GHK_PBGA209
F19
R19
W14
PCI_PAR <12,20,21,28> PCI_FRAME# <12,20,21,28> PCI_TRDY# <12,20,21,28> PCI_IRDY# <12,20,21,28> PCI_STOP# <12,20,21,28> PCI_DEVSEL# <12,20,21,28>
PCI_PERR# <12,20,21,28> PCI_SERR# <12,20,21,28>
PCI_REQ#2 <12>
PCI_GNT#2 <12> CLK_PCI_PCM <12> PCIRST# <12,20,21,28>
D
CLK_PCI_PCM
12
R565 @10_0402_5%
1
C777 @10P_0402_25V8K
2
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
CardBus Controller PCI1620
LA-2392
E
of
22 53Friday, April 16, 2004
S1_CE1#<22>
S1_RDY#<22>
S1_OE#<22>
S1_WE#<22>
S1_WP<22>
+S1_VCC +S1_VPP
S1_D3 S1_D4 S1_D5 S1_D6 S1_D7 S1_CE1# S1_A10 S1_OE# S1_A11 S1_A9 S1_A8 S1_A13 S1_A14 S1_WE# S1_RDY#
S1_A16 S1_A15 S1_A12 S1_A7 S1_A6 S1_A5 S1_A4 S1_A3 S1_A2 S1_A1 S1_A0 S1_D0 S1_D1 S1_D2 S1_WP
SOCKETCARDBUS PCMCIA POWER CTRL.
C411
JP13
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
69
GND
GND
71
GND
GND
73
GND
GND
75
GND
GND
77
GND
GND
79
GND
GND
81
GND
GND
83
GND
GND
FOX_WZ21131-G2-P4
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
46
46
47
47
48
48
49
49
50
50
51
51
52
52
53
53
54
54
55
55
56
56
57
57
58
58
59
59
60
60
61
61
62
62
63
63
64
64
65
65
66
66
67
67
68
68
70 72 74 76 78 80 82 84
S1_CD1# S1_D11 S1_D12 S1_D13 S1_D14 S1_D15 S1_CE2# S1_VS1 S1_IORD# S1_IOWR# S1_A17 S1_A18 S1_A19 S1_A20 S1_A21
S1_A22 S1_A23 S1_A24 S1_A25 S1_VS2 S1_RST S1_WAIT# S1_INPACK# S1_REG# S1_BVD2 S1_BVD1 S1_D8 S1_D9 S1_D10 S1_CD2#
1 2
1000P_0402_50V7K
S1_CD1# <22>
S1_CE2# <22> S1_VS1 <22> S1_IORD# <22> S1_IOWR# <22>
+S1_VCC +S1_VPP
S1_VS2 <22> S1_RST <22> S1_WAIT# <22> S1_INPACK# <22> S1_REG# <22> S1_BVD2 <22> S1_BVD1 <22>
S1_CD2# <22>
1
C424 1000P_0402_50V7K
2
S1_D[0..15]<22> S1_A[0..25]<22>
S1_D[0..15] S1_A[0..25]
+5V
+S1_VCC
+S2_VCC
C419
4.7U_0805_10V4Z
SDATA<22>
SCLK<22>
SLATCH<22>
G_RST#<22,30>
1 2
R227 @4.7K_0402_5%
+S1_VPP +S2_VPP
1
1
C420
4.7U_0805_10V4Z
2
2
U12
3
DATA
4
CLOCK
5
LATCH
12
RESET#
15
OC#
21
SHDN#
8
AVPP
19
BVPP
9
AVCC
10
AVCC
17
BVCC
18
BVCC
TPS2224ADBR_HTSSOP24
@0_0603_5%
20
12V
7
12V
14
3.3V
13
3.3V
24
5V
2
5V
1
5V
11
GND
23
NC
22
NC
16
NC
6
NC
+12VALW
R460
1 2
+3V
+5V
1 2
1 2 1 2
1 2 1 2 1 2
C412 @2.2U_0805_10V4Z
C413
4.7U_0805_10V4Z
C414
0.1U_0402_16V4Z
C416
4.7U_0805_10V4Z C417
0.1U_0402_16V4Z C418
0.1U_0402_16V4Z
+S1_VCC +S1_VPP
1
1
C422
0.1U_0402_16V4Z
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
C423 @0.1U_0402_16V4Z
2
C421
0.1U_0402_16V4Z
2
1
C630
0.1U_0402_16V4Z
2
Compal Electronics, Inc.
B
Title
CARD BUS SOCKET
Size Document Number Rev
LA-2392
Date: Sheet of
1
C631 @0.1U_0402_16V4Z
2
23 53Friday, April 16 , 2004
0.1
10
H H
G G
F F
SD_CLK/MS_CLK<22>
SM_D2/MS_SDIO<22>
E E
SM_D1/MS_RFU5<22>
SM_D0/MS_RFU7<22>
D D
9
MC_CD#<22>
DQRYDRV<22>
SQRY3<22> SQRY4<22>
SD_CD/DATA3<22>
SD_DATA1<22>
SD_DATA0<22>
SM_D6<22>
SM_ALE<22>
SD_CMD<22>
SM_D4<22>
SM_D3/MS_BS<22>
SM_D5<22>
SM_WE#<22>
SM_D7<22>
SM_LVD<22> SM_WP#<22>
SM_R/B#<22>
SM_RE#<22>
SD_DATA2<22>
MC_WP#<22>
SM_CLE<22>
SM_CE#<22>
MC_CD#
DQRYDRV
SQRY3 SQRY4
SD_CD/DATA3 SD_DATA1 SD_DATA0 SD_CLK/MS_CLK
SM_D6 SM_ALE SD_CMD
SM_D4 SM_D3/MS_BS SM_D5 SM_D2/MS_SDIO
SM_WE# SM_D1/MS_RFU5 SM_D7 SM_D0/MS_RFU7
SM_LVD SM_WP# SM_R/B# SM_RE#
SD_DATA2 MC_WP# SM_CLE SM_CE#
8
R233
10K_0402_5%
R239
10K_0402_5%
7
+3V
12
R228
@10K_0402_5%
D17
3
12
12
2
BAT54C_SOT23~D
3
2
BAT54C_SOT23~D
1
D18
SM_CD#
1
1 2
R246 @0_0402_5%
12
R229 @10K_0402_5%
6
R234
43K_0402_5%
1 2
+S2_VCC
1 2
5
R235 43K_0402_5%
R238
43K_0402_5%
MMBT3904_SOT23
R236 43K_0402_5%
1 2
1 2
MC_WP#
Q23
4
1
C
E3B
2
SD_WP
R237 43_0402_5%
1 2
SD_CD# SD_DATA1
SD_DATA0 SD_CLK/MS_CLK SD_CMD SD_CD/DATA3 SD_DATA2
SM_D4 SM_D3/MS_BS SM_D5 SM_D2/MS_SDIO SM_D6 SM_D1/MS_RFU5 SM_D7 SM_D0/MS_RFU7 SM_LVD SM_WP# SM_WE# SM_R/B# SM_ALE SM_RE# SM_CLE SM_CE# MC_WP#
+S2_VCC
1 2
R230 43K_0402_5%
+S2_VCC
3
1
C430 @0.1U_0402_16V4Z
2
JP15
1
SSFDC_10P/SD_6P/SD_3P(GND)
2
SD_SW_CD1
3
SD_SW_WP1
4
SD_8P(DAT1)
5
SD_7P(DAT0)
6
SD_5P(CLK)
7
SD_2P(CMD)
8
SD_1P(DAT3)
9
SD_9P(DAT2)
10
SSFDC_12P & SD_4P(VCC)
11
SSFDC_11P(CD)
12
SSFDC_13P(D4)
13
SSFDC_9P(D3)
14
SSFDC_14P(D5)
15
SSFDC_8P(D2)
16
SSFDC_15P(D6)
17
SSFDC_7P(D1)
18
SSFDC_16P(D7)
19
SSFDC_6P(D0)
20
SSFDC_17P(LVD)
21
SSFDC_5P(WP_IN)
22
SSFDC_4P(WE)
23
SSFDC_19P(BSY)
24
SSFDC_3P(ALE)
25
SSFDC_20P(RE)
26
SSFDC_2P(CLE)
27
SSFDC_21P(CE)
28
SSFDC_WP2(SW_WP2)
29
SSFDC_CD2(SW_CD2)
30
SSFDC_22P/MS_3P/MS/9P(VCC)
31
MS_2P(BS)
32
MS_4P(SDIO)
33
MS_5P(RESERVED1)
34
MS_6P(INS)
35
MS_7P(RESERVED2)
36
MS_8P(SCLK)
37
MS_10P & MS_1P/SSFDC_1P &SSFDC_18P(GND)
TAI_SOL 4 IN 1 MEMORY CONNECTOR
1
C431
0.1U_0402_16V4Z
2
2
1
R247
43K_0402_5%
1 2
R250
C C
43K_0402_5%
R253
43K_0402_5%
R257
43K_0402_5%
1 2
1 2
43K_0402_5%
43K_0402_5%
1 2
R248
1 2
R251
R254
43K_0402_5%
R258
43K_0402_5%
43K_0402_5%
1 2
1 2
1 2
R249
R252
43K_0402_5%
R255
43K_0402_5%
1 2
1 2
1 2
B B
A A
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
10
9
8
7
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
6
5
4
3
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
4 IN 1 CARD READER SOCKET
LA-2392
2
24 53Friday, April 16, 2004
0.1
of
1
A
+3VALW
1
C432
0.1U_0402_16V4Z
1 1
BEEP#<30>
2
4 5
+3VALW
12
14
U23B
P
A
6
O
B
G
SN74LVC32APWLE_TSSOP14
7
0.22U_0603_10V7K
R262 @100K_0402_1%
R265
1 2
10K_0402_1%
C439
PCM_SPK#<22>
B
+3VALW
14
U15A
P
1
O2I
G
1
SN74LVC14APWLE_TSSOP14
7
2
+3VALW
14
U15B
P
3
O4I
G
SN74LVC14APWLE_TSSOP14
7
C437
12
1U_0603_10V6K
C442
12
1U_0603_10V6K
C
1 2
560_0402_5%
R266
1 2
560_0402_5%
R272
+VDDA_CODEC
12
12
1
C
2
B
E
3
R267 10K_0402_1%
C440 1U_0603_10V6K
12
R269 10K_0402_1%
R270
MONO_IN
1 2
20K_0402_5%
Q24 2SC2411K_SOT23
D
C441
MONO_INC MONO_INR
1 2
1U_0603_10V6K
1 2
R271
2.4K_0402_5%
E
+5VS
C433
4.7U_0805_6.3V6K
+5VS
W=40Mil
1
1
C434
0.1U_0402_16V4Z
2
2
12
R268 10K_0402_5%
F
U13
4
VIN
2
DELAY ERROR7CNOISE
8
SD
SI9182DH-AD_MSOP8
VOUT
SENSE or ADJ
GND
5 6 1
1
C438
3
2
0.1U_0402_16V4Z
G
R263
1 2
28.7K_0402_1%
12
R264 10K_0402_1%
+VDDA_CODEC
1
C435 @4.7U_0805_6.3V6K
2
H
1
C436 @0.1U_0402_16V4Z
2
+3VALW
14
U15C
P
5
O6I
G
SN74LVC14APWLE_TSSOP14
7
CONA#<30,34>
CDROM_R_L
CDROM_R_R
CD_GNA
MIC1<26> MIC2<26>
C443
1U_0603_10V6K
HPS<26>
2
C617
1
@0.1U_0402_16V4Z
R273
1 2
12
560_0402_5%
@10K_0402_5%
S
2
C465 @0.1U_0402_16V4Z
1
C
12
R274
G
2
+3VS
13
D
+3VS
Q59 2N7002_SOT23
C453 1U_0603_10V6K
1 2
C454 1U_0603_10V6K
1 2
C455 1U_0603_10V6K
1 2
AC97_RST#<12,27>
AC97_SYNC<12,27>
AC97_SDOUT<12,27>
MUTE_LED<26,27>
SPDIFO<34>
R294
@4.7K_0402_5%
D19 RB751V_SOD323
2 1
MONO_INR
1 2
R471 @100K_0402_5%
1 2
R461 2.2K_0402_5%
1 2
R604 0.1U_0402_16V4Z
CDROM_RC_L CDROM_RC_R
MD_SPKRC
R295
1 2
D
CDGNDA
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
C456 1U_0603_10V6K
1 2
C616 1U_0603_10V6K
1 2
C459 0.1U_0402_16V4Z
R291 @1K_0402_5%
1 2
R292 @1K_0402_5%
1 2
1 2
L39 KC FBM-11-100505-601T 0402
1 2
R293 KC FBM-11-100505-601T 0402
4.7K_0402_5%
1 2
38
U16
AVDD125AVDD2
14
AUX_L
15
AUX_R
16
JS1
17
JS0
23
LINE_IN_L
24
LINE_IN_R
18
CD_L
20
CD_R
19
CD_GND
21
MIC1
22
MIC2
13
PHONE
11
RESET#
10
SYNC
5
SDATA_OUT
45
ID0
46
ID1
47
EAPD
48
SPDIFO
4
DVSS1
7
DVSS2
AD1981BJST_LQFP48
1
C444
0.1U_0402_16V4Z
2
2
C448
0.1U_0402_16V4Z
1
43
AVDD434AVDD3
LINE_OUT_L LINE_OUT_R
MONO_OUT HP_LOUT_L HP_LOUT_R
BIT_CLK
SDATA_IN
XTL_OUT
VREFOUT
E
DVDD11DVDD2
XTL_IN
VREF
AFILT1 AFILT2 AFILT3 AFILT4
NC NC
AVSS1 AVSS2 AVSS3 AVSS4
1
C445
0.1U_0402_16V4Z
2
9
35 36 37 39 41
6 8 2
3
28 27
29 30 31 32
12 42
26 40 44 33
9
11
13
CDROM_L<19>
CDROM_R<19>
CD_AGND<19>
GND
A
14
U15D
P
O8I
G
SN74LVC14APWLE_TSSOP14
7 14
U15E
P
O10I
G
SN74LVC14APWLE_TSSOP14
7 14
U15F
P
O12I
G
SN74LVC14APWLE_TSSOP14
7
R276 4.7K_0402_5% R277 4.7K_0402_5%
1 2
R279 4.7K_0402_5% R280 4.7K_0402_5%
1 2
R283 2.7K_0402_5%
1 2
R285 2.7K_0402_5%
1 2
L18 0_1206_5%
1 2
L19 @0_1206_5%
C470 @0.1U_0402_16V4Z
C471 @0.1U_0402_16V4Z
C472 @0.1U_0402_16V4Z
12
12
12
GNDA
12
SPKR<12>
12
12
GNDA
B
2 2
3 3
4 4
+VDDA_CODEC
1
C446
0.1U_0402_16V4Z
2
1
C449
0.1U_0402_16V4Z
2
MDMIC
R278 33_0402_5% R281 10_0402_5%
+CODEC_REF
AFILT1 AFILT2 AFILT3 AFILT4
1
C450
0.1U_0402_16V4Z
2
LINE_OUTL <26> LINE_OUTR <26>
L_HP <26> R_HP <26>
12 12
C457
@22P_0402_50V8J
C461
1 2
C466
1 2
C467 270P_0402_50V7K
1 2
C468 270P_0402_50V7K
1 2
F
+VDDA_CODEC
1
C447 10U_0805_10V4Z
2
1 2
KC FBM_L11-160808-601LMT 0603
1
C451 10U_0805_10V4Z
2
C452 1U_0603_10V6K
1 2 1 2
C626 @1000P_0402_50V7K
AC97_BITCLK <12,27> AC97_SDIN0 <12>
R284
12
@1M_0402_5%
X3
12
1
@24.576MHz_16P_3XG-24576-43E1
2
270P_0402_50V7K 270P_0402_50V7K
L38
1
2
+3VS
C458 @22P_0402_50V8J
AUD_REF
CLK_CODEC_14M
1
C462 1U_0603_10V6K
2
MD_MIC <27>
12
R286 @10_0402_5%
1
C460
2
1
C463
0.1U_0402_16V4Z
2
CLK_CODEC_14M <12>
@15P_0402_50V8J
R291 R292 FREQ. SEL
X X
StuffStuff
Title
Size Document Number Rev Custom
Date: Sheet
Compal Electronics, Inc.
LA-2392
G
24.576MHZ
14.318MHZ
AC97 CODEC
25 53Friday, April 16, 2004
H
Crystal
External
of
A
B
C
D
E
1
C476
2
JP16
1
1
2
2
3
3
4
4
ACES_85205-0400
SPKL+
L40 K C F B M -L11-201209-221LMAT_0805
1 1
10U_0805_10V4Z
15
6
16
VDD
PVDD1
1 2
C480 0.47U_0603_16V7K
LINE_OUTR<25>
2 2
LINE_OUTL<25>
EC_MUTE#<30>
C481 0.47U_0603_16V7K
C483 0.47U_0603_16V7K
C482 0.47U_0603_16V7K
1 2
1 2
1 2
LINE_C_OUTR
LINE_C_OUTL
EC_MUTE#
7
17
9
5
19
RIN+
RIN-
LIN+
LIN-
SHUTDOWN
PVDD2
BYPASS
GND41GND311GND213GND1
20
0.1U_0402_16V4Z
1
C477
2
U17
2
GAIN0
3
GAIN1
18
ROUT+
14
ROUT-
4
LOUT+
8
LOUT-
12
NC
10
TPA6017A2_TSSOP20
1
C478
2
SPKR+
SPKR-
SPKL+
SPKL-
1
C486
0.47U_0603_16V7K
2
1
C479
0.1U_0402_16V4Z
2
+5VS
@100K_0402_5%
100K_0402_5%
R296
R298
10 dB
12
R297
100K_0402_5%
12
R299
@100K_0402_5%
GAIN0
+5VS
12
12
GAIN1 0 0 1 0 1
Gain Settings
Av(inv) 0 1
1
6 dB
10 dB
15.6 dB
21.6 dB
1 2
SPKL-
L41 K C F B M -L11-201209-221LMAT_0805
1 2
SPKR+
L42 K C F B M -L11-201209-221LMAT_0805
1 2
SPKR-
L43 K C F B M -L11-201209-221LMAT_0805
1 2
1
C473
@47P_0402_50V8J
2
@47P_0402_50V8J
1
C474
2
@47P_0402_50V8J
1
C475
@47P_0402_50V8J
2
3 3
AUDIO CONNECTOR
MIC1<25>
+CODEC_REF
C484 100U_D2_10VM
R_HP<25> L_HP<25>
4 4
A
1 2
+
C485 100U_D2_10VM
1 2
+
12
R588
1K_0402_5%
12
R589 1K_0402_5%
MIC2<25>
INTSPK_CR+
DOCK_LOUT_L<34>
DOCK_LOUT_R<34>
B
INTSPK_CL+
D50 RB751V_SOD323
2 1
JP17
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
ACES_88028-1600_16P
HPS <25>
+5VS
VOLBTN+# <27,30,34> VOLBTN-# <27,30,34> WIRELESS_BTN# <30,35>
WIRELESS_LED <35> MUTE_LED <25,27>
+3VS
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Title
Size Document Number Rev Custom
Date: Sheet
Compal Electronics, Inc.
LA-2392
AMP & Audio Jack
E
of
26 53Friday, April 16, 2004
C803
1000P_0402_50V7K
Stitched capacitor
SLP_S3#<12,30> AC97_RST#<12,25>
TP_DATA<30> TP_CLK<30>
2
1
@10K_0402_5%
+3VALW
2
C802 1000P_0402_50V7K
1
C807
@0.1U_0402_16V4Z
SLP_S3# AC97_RST#
12
R600
+3V
5
1 2
3
+3V
2
C493
0.1U_0402_16V4Z
1
U48 @TC7SH08FU_SSOP5
4
Front Board CONNECTOR
Pavilion only
VOLBTN+#<26,30,34>
BATLED_0#<30,33>
VOLBTN-#<26,30,34>
ACT_LED<33>
+5VALW
+3VS
MUTE_LED<25,26>
PAV_LEDVCC<35>
PMLED_1#<30,33>
+5VS
Front Boand CONNECTOR
PRESARIO only
PMLED_1<33> BATLED_0<33> ACT_LED<33>
PRES_LEDVCC<30,35>
+5VS
TP CONNECTOR
+5V
JP26
8 7 6 5 4 3 2 1
ACES_87152-0807
MD_AC97_RST#
JP21
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
ACES_85201-1405
JP24
1 2 3 4 5 6 7 8
ACES_85201-0805
USBP5-<12> USBP5+<12>
1
C492
4.7U_0805_10V4Z
MD_AC97_RST#<12,25>
AC97_RST#
2
MD_MIC<25>
+3V
USB KEY
R325 FBM-11-100505-121
1 2 1 2
R324 FBM-11-100505-121
USB5­USB5+
MDC Conn.
1
C490
0.1U_0402_16V4Z
2
MD_AC97_RST#
0.1U_0402_16V4Z
4.7K_0402_1%
0.1U_0402_16V4Z
4.7K_0402_1%
+5V
+3V
@1000P_0402_50V7K
JP19
1
MONO_OUT/PC_BEEP
3
GND
5
AUXA_RIGHT
7
AUXA_LEFT
9
CD_GND
11
CD_RIGHT
13
CD_LEFT
15
GND
17
3.3Vaux
19
GND
21
3.3Vmain
23
AC97_SDATA_OUT
25
AC97_RESET#
27
GND
29
AC97_MSTRCLK
ACES_88021-3000
+5V
C496
R311
C501
R316
5
12
3
1 2
+5V
5
12
3
AATI4610AIGV-T1_SOT23-5
1 2
U18
OUT
IN
ON#
SET
GND
AATI4610AIGV-T1_SOT23-5
U19
OUT
IN
ON#
SET
GND
Note: PLACE CLOSE TO EACH USB PORT
JP25
1 2 3 4
ACES_85201-0405
BLUETOOTH_LED<35>
MINIPCI_AD22<28>
MINIPCI_PME#<28>
1
C487
2
1 4 2
1 4 2
@0.1U_0402_16V4Z
AUDIO_PWDN
MONO_PHONE
Bluetooth Enable
PRIMARY DN
AC97_SYNC AC97_SDATA_IN1 AC97_SDATA_IN0
AC97_BITCLK
USB_ON#
USB_ON#
20K_0402_5%
1
C488
2
GND
+5V
USB Data+
USB Data-
5Vd
GND
GND
20K_0402_5%
+USB_VCCB
R319
+5VMDC
2 4 6 8 10 12 14
R305 10K_0402_5%
16 18 20 22 24 26 28 30
+USB_VCCA
USB_ON# <30>
12
R310 10K_0402_5%
12
R314
12
R315 10K_0402_5%
12
1
C506 1000P_0402_50V7K
2
1 2
R303 @0_0805_5%
1 2
R307 10_0402_5%
R309 @10_0402_5%
1 2
1
C494 @22P_0402_25V8K
2
1
2
OVCUR#2
1
C500 1000P_0402_50V7K
2
1
C503 @0.47U_0603_16V7K
2
+5V
+3VS
12
C499 @0.47U_0603_16V7K
OVCUR#2 <12>
OVCUR#1 <12> OVCUR#0 <12>
R304 100K_0402_5%
1 2
+3V
MDC_DET# <29>
AC97_SYNC <12,25> AC97_SDIN1 <12>AC97_SDOUT<12,25>
AC97_BITCLK <12,25>
BT CONNECTOR
Q60 SI2301DS_SOT23
1
2
1 2 1 2
2
G
3
S
+3V_BT
1
D
1 2
C624 1U_0603_10V6K
JP23
1 2 3 4 5 6 7 8
ACES_85201-0805
BLUETOOTH_ON#<30>
+3VS
C625
1U_0603_10V6K
USBP3+<12> USBP3-<12>
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R486 100_0402_5% R487 100_0402_5%
RJ11 CONN.
FOXCONN_JM34613-L002-TR
JP18
3
0: Have primary CODEC on mother board
USB CONNECTOR 1
150U_D2_6.3VM
USBP2-<12> USBP2+<12>
USB CONNECTOR 2
150U_D2_6.3VM
USBP1-<12>
USBP1+<12>
USB CONNECTOR 3
150U_D2_6.3VM
USBP0-<12> USBP0+<12>
Title
Size Document Number Rev
Date: Sheet
5
3
5
6
446
112
2
JP36
TIP
1
1
MRING
2
2
MOLEX 53398-0290 2P
W=40mils
1
1
+
C497
C495
2
2
@0.1U_0402_16V4Z
USBP2­USBP2+
W=40mils
1
1
+
C504
C502
2
2
@0.1U_0402_16V4Z
USBP1­USBP1+
W=40mils
1
1
+
C507
C508
2
2
@0.1U_0402_16V4Z
USBP0­USBP0+
Compal Electronics, Inc.
MDC , Bluetooth & USB CONN.
LA-2392
+USB_VCCA
1
C498 @1000P_0402_50V7K
2
+USB_VCCB
1
C505 @1000P_0402_50V7K
2
+USB_VCCB
1
C509 @1000P_0402_50V7K
2
JP20
1 2 3 4
SUYIN_2569A-04G3T
JP22
1 2 3 4
SUYIN_2569A-04G3T
JP27
1 2 3 4
SUYIN_2569A-04G3T
of
27 53Friday, April 16, 2004
0.1
A
B
C
D
E
1 1
LAN RESERVED LAN RESERVED
TIP
D55
WL_ON<30>
+3VS
2 2
0.1U_0402_16V4Z
1
C618
2
4.7U_0805_10V4Z
1
C510
2
1000P_0402_50V7K
CLK_PCI_MINI
12
R334 @10_0402_5%
1
C516 @15P_0402_50V8J
2
1
C511
2
WL_ON
@0.1U_0402_16V4Z
1
C512
2
21
RB751V_SOD323
PIRQC#<12>
CLK_PCI_MINI<12>
PCI_REQ#3<12>
PCI_AD31<12,20,21,22> PCI_AD29<12,20,21,22>
PCI_AD27<12,20,21,22> PCI_AD25<12,20,21,22>
MINIPCI_AD22<27>
PCI_CBE#3<12,20,21,22>
PCI_AD23<12,20,21,22> PCI_AD21<12,20,21,22>
PCI_AD19<12,20,21,22> PCI_AD17<12,20,21,22>
PCI_CBE#2<12,20,21,22>
PCI_IRDY#<12,20,21,22>
PCI_SERR#<12,20,21,22> PCI_PERR#<12,20,21,22>
PCI_CBE#1<12,20,21,22>
PCI_AD14<12,20,21,22> PCI_AD12<12,20,21,22>
PCI_AD10<12,20,21,22>
PCI_AD8<12,20,21,22> PCI_AD7<12,20,21,22>
MINI_ON
CLK_PCI_MINI
MINIPCI_AD22
MINI_LED<35>
W=40mils
1 2
R575 10K_0402_5%
PCI_AD5<12,20,21,22> PCI_AD3<12,20,21,22>
+5VS
PCI_AD1<12,20,21,22>
3 3
+5VS
W=30mils
W=30mils
JP28
112
KEY KEY
334 556 778 9910 111112 131314 151516 171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152 535354 555556 575758 595960 616162 636364 656566 676768 696970 717172 737374 757576 777778 797980 818182 838384 858586 878788 898990 919192 939394 959596 979798 9999100
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
AMP_1318644-1
RING
2 4
6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102
102
104
104
106
106
108
108
110
110
112
112
114
114
116
116
118
118
120
120
122
122
124
124
W=30mils
W=40mils
W=40mils
1 2
R333 100_0402_5%
R336
1 2
@10K_0402_5%
W=40mils
WLAN_PME# MINIPCI_PME#
PCI_AD18
PCI_AD22
PCI_AD18
+5VS PIRQC# <12> PCI_GNT#4 <12>PCI_REQ#4<12> +3VALW PCIRST# <12,20,21,22>
PCI_GNT#3 <12> WLAN_PME# <20,22,30,31>
MINIPCI_PME# <27> PCI_AD30 <12,20,21,22>
PCI_AD28 <12,20,21,22> PCI_AD26 <12,20,21,22> PCI_AD24 <12,20,21,22>
IDSEL : AD18
PCI_AD22 <12,20,21,22> PCI_AD20 <12,20,21,22> PCI_PAR <12,20,21,22> PCI_AD18 <12,20,21,22> PCI_AD16 <12,20,21,22>
PCI_FRAME# <12,20,21,22> PCI_TRDY# <12,20,21,22> PCI_STOP# <12,20,21,22>
PCI_DEVSEL# <12,20,21,22> PCI_AD15 <12,20,21,22>
PCI_AD13 <12,20,21,22> PCI_AD11 <12,20,21,22>
PCI_AD9 <12,20,21,22> PCI_CBE#0 <12,20,21,22>
PCI_AD6 <12,20,21,22> PCI_AD4 <12,20,21,22> PCI_AD2 <12,20,21,22> PCI_AD0 <12,20,21,22>
+3VALW
0.1U_0402_16V4Z
1
C513
2
1
C514
2
1000P_0402_50V7K
@0.1U_0402_16V4Z
1
C515
2
C517
4.7U_0805_10V4Z
+3VALW
C522
@4.7U_0805_10V4Z
+3VS
1
C619
2
4.7U_0805_10V4Z
+5VS
1
1
C518
2
2
0.1U_0402_16V4Z
1
1
C523
2
2
0.1U_0402_16V4Z
1000P_0402_50V7K
1
C519
2
@1000P_0402_50V7K
1
C524
2
4 4
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Mini PCI Slot
LA-2392
of
28 53Friday, April 16, 2004
E
5
D D
+3VS
+3VS
1
2
0.1U_0402_16V4Z
C C
+3VS
B B
RTS1#
C527
1 2
10U_0805_10V4Z
@0.1U_0402_16V4Z
1
C528
C529
2
0.1U_0402_16V4Z
RP78
18 27 36 45
@10K_1206_8P4R_5%
RP79
18 27 36 45
10K_1206_8P4R_5%
R342 @10K_0402_5%
1 2
DTR1# SOUT1
R345 10K_0402_5%
1 2
0.1U_0402_16V4Z
1
1
C530
C531
2
2
DCD2# DSR2# CTS2# RI2#
DCD1# DSR1# CTS1# RI1# RI1#
+3VS+3VS
R343 @10K_0402_5%
1 2
R346 10K_0402_5%
1 2
+3VS
R344 @10K_0402_5%
1 2
R347 10K_0402_5%
1 2
LDRQ#0<12>
CLK_PCI_SIO CLK_48M
4
+3VS +3VS
12
R337
4.7K_0402_5%
+3VS
12
R340 @10_0402_5%
1
C532 @10P_0402_50V8J
2
PCIRST_LPC#<12,30>
CLK_PCI_SIO<12>
SIRQ<12,22,30>
LFRAME#<12,30>
LAD0<12,30> LAD1<12,30> LAD2<12,30> LAD3<12,30>
+3VS
1 2
R339 4.7K_0402_5%
MDC_DET#<27>
1 2
R592 @10K_0402_5%
R593
@10K_0402_5%
12
R341 @10_0402_5%
1
C533 @10P_0402_50V8J
2
CLK_PCI_SIO
SIRQ LDRQ#0 LFRAME#
FIR_DET#
12
LAD0 LAD1
LAD2
LAD3
1 2
@10K_0402_5%
R338
28 19 21 20 27
26 25 24 23
128 127 126 125 124 123 122 121
106 103
104 107 108 109
110 111
113 114 115 116 117 118
94 93 92 91 89 88 87 86 85 84 83 82 81 80 79 78 77 76 74 73 72 71 70 69 68 67 66
U20
LRESET# PCICLK SERIRQ LDRQ# LFRAME#
LAD0 LAD1 LAD2 LAD3
JAB1/GP10 JBB11/GP11 JACX/GP12 JBCX/GP13 JBCY/GP14 JACY/GP15 JBB2/GP16 JAB2/GP17
VREF UIC1
UIC2 UIC3 UIC4 UIC5
DTDN DTDP
FANIO2/GP21 FANIO1/DTEST FANOUT2/GP20 FANOUT1 OVTEMP# BEEP
XD0/GP30 XD1/GP31 XD2/GP32 XD3/GP33 XD4/GP34 XD5/GP35 XD6/GP36 XD7/GP37 XA0/GP40 XA1/GP41 XA2/GP42 XA3/GP43 XA4/GP44 XA5/GP45 XA6/GP46 XA7/GP47 XA8/GP50 XA9/GP51 XA10/GP52 XA11/GP53 XA12/GP54 XA13/GP55 XA14/GP56 XA15/GP57 XA16/GP60 XA17/GP61 XA18/GP62
3
5
22
VCC
VCC
LPC
GAME PORT
HARDWARE MONITOR
SERIAL POART 2
GP70/SCLK/ITMOFF/RI2#
GP22/ITMOFF//OVOLT/PLED
GP23/ATEST/OVFAN/COPEN
GNDD18GNDD60GNDD90GNDA
105
75
VCC45VCC
VCCA
FDD
WDATA# WGATE#
RDATA#
DSKCHG#
OVOLT/MSO/DSEL1
INDEX#PD0
TRK00#/PD1
WRTPRT#/PD2
RDATA#/PD3
DSKCHG#/PD4
WGATE#/SLCT
WDATA#/PE
MTR1#/BUSY
DS1#/ACK#
PARALLEL PART
HDSEL#/ERR#
STEP#/SLCTIN#
DIR#/PINIT#
DRVDEN0/AUTOFD#
IR
GP24/IRRX1
SERIAL POART 1
GP71/SMBDT/DCD2#
GP72/SMBCK/SOUT2
GP73/VID0/SIN2 GP74/VID1/DTR2# GP75/VID2/RTS2# GP76/VID3/DSR2# GP77/VID4/CTS2#
OVFAN/MSI/WDTO
GP25/MEMW#
GP26/MEMR#
GP27/ROMCS#
GNDD
VT1211_LQFP128
99
112
1
C525 @10U_0805_10V4Z
2
INDEX#
MTRA# DRVB# DRVA# MTRB#
DIR#
STEP#
TRK0#
WPT# HDSEL# DSEL0#
PD5 PD6 PD7
STB#
IRRX IRTX
DCD1# DSR1#
SIN1
RTS1#
SOUT1
CTS1# DTR1#
RI1#
CLKIN
SMI#
2
+3VS
1
C526
0.1U_0402_16V4Z
2
INDEX#
2 3 4 6 7 8 9 10 11
TRACK0#
12
WP#
13
RDATA#
14 15
DSKCHG#
16 1 120
LPD0
42
LPD1
41
LPD2
40
LPD3
39
LPD4
38
LPD5
37
LPD6
36
LPD7
35
LPTSLCT
29
LPTPE
30
LPTBUSY
31
LPTACK#
32
LPTERR#
33
LPTSLCTIN#
34
LPTINIT#
43
LPTAFD#
44
LPTSTB#
46 64
65 100
DCD1#
53
DSR1#
48
SIN1#
51
RTS1#
49
SOUT1
52
CTS1#
47
DTR1#
50 54
DCD2#
62
SOUT2
61
SIN2
59
DTR2#
58 57
DSR2#
56
CTS2#
55
RI2#
63 102
101 119
CLK_48M
17 98 97 96 95
INDEX# <32> MTR0# <32>
DRV0# <32> FDDIR# <32>
STEP# <32> WDATA# <32> WGATE# <32> TRACK0# <32> WP# <32> RDATA# <32> HDSEL# <32> DSKCHG# <32> 3MODE# <32>
LPD0 <32> LPD1 <32> LPD2 <32> LPD3 <32> LPD4 <32> LPD5 <32> LPD6 <32> LPD7 <32>
LPTSLCT <32> LPTPE <32> LPTBUSY <32> LPTACK# <32> LPTERR# <32> LPTSLCTIN# <32> LPTINIT# <32> LPTAFD# <32> LPTSTB# <32>
IRRX <33> IRTXOUT <33> IRMODE <33>
DCD 1# <34> DSR1# <34>
RTS1# <34> SOUT1 <34> CTS1# <34> DTR1# <34> RI1# <34>
12
R485 @10K_0402_5%
CLK_48M <22>
12
R484 10K_0402_5%
SIN1# <34>
1
A A
Base address 1:2Eh/2Fh Base address 0:4Eh/4Fh 1:Test Mode
0:Normal Opreation
Super I/O strapping for VT1211
5
0: Enable ROM I/F as GPIO 1:Enable Flash Rom
W
R348
SOUT2
1 2
For Winbond 48M strapping
@4.7K_0402_5%
4
+3VS
THIS SHEET OF E NGI NEER ING DR AWI NG I S T HE PROPRIETAR Y PROPERTY OF COMPAL ELECTRONIC S, INC. AND C ONTAINS CONFID ENTIAL
AND TRADE S ECR ET INFORMATION. THI S SHEET MAY NOT BE TRANSFERED FROM THE C USTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Compal Electronics, Inc.
Title
LPC SUPER I/O VIA VT1211
Size D o c ument Number R ev
LA-2392
Date: Sheet
1
of
29 53Friday, April 16, 2004
0.1
A
+EC_VCC
4.7U_0805_10V4Z
+EC_VCC
MURATA BLM11A20PT_0603
1 1
2 2
+5V
3 3
4 4
0.1U_0402_16V4Z
1
C534
C535
2
L22
1 2
0.1U_0402_16V4Z L23
1 2
MURATA BLM11A20PT_0603
CLK_PCI_LPC
12
R358 @10_0402_5%
1
C545 @15P_0402_50V8J
2
PS2_DATA PS2_CLK
FSEL# SELIO# FRD# EC_SMI#
EC_SMD_2 EC_SMC_2 EC_SMD_1 EC_SMC_1
+3VALW
1 2
R367 20K_0402_5%
+3VS
R369 10K_0402_5%
@10K_0402_5%
GPIO5 GPIO6 EC_TINIT# KBA0 KBA4
ENE@10K_0402_5%
1
1
C536
2
2
0.1U_0402_16V4Z
2
C542
1
ECAGND
+3VALW
RP80
10
9 8 7 6
10K_1206_10P8R_5%
SD307100207
RP81
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
SD3021002T2
RP82
1 8 2 7 3 6 4 5
10K_1206_8P4R_5%
LID_SW#
M_SEN#
12
+3VALW
@10K_0402_5%
R444
R445
ENE@10K_0402_5%
A
1
C537
0.01U_0402_16V7K
2
@1000P_0402_50V7K
1
C543
2
R352
1 2
10K_0402_5%
10K for NS 47K for ENE
KBD_DATA
1
KBD_CLK
2
TP_DATA
3
TP_CLK
4 5
+3VALW
+5VALW
10P_0402_50V8K
ENE@10K_0402_5%
@10K_0402_5%
R448
R446
R447
R449
@10K_0402_5%
@10K_0402_5%
+EC_AVCC
1
C809 ENE@0.1U_0402_16V4Z
2
+5V
R365 NS@20M_0603_5%
1 2
Y5
12
1
C546
2
32.768KHz_12.5P_CM155
R452
R450
@10K_0402_5%
R451
R453 @10K_0402_5%
+3VS
EC_SCI#<12>
GATEA20<11>
KBRST#<12>
KSI[0..7]<33,35>
KSO[0..15]<33>
PWR_ACTIVE_PAV#<35>
R366
1
C547 10P_0402_50V8K
2
B
1 2
R349 ENE@0_0603_5%
1 2
R350 NS@0_0603_5%
C539
@4.7U_0805_10V4Z
SIRQ<12,22,29>
LFRAME#<12,29>
LAD0<12,29> LAD1<12,29> LAD2<12,29> LAD3<12,29>
CLK_PCI_LPC<12>
J1 JOPEN
EC_SCI#
R353 NS@0_0402_5%
GATEA20 KBRST#
KSI[0..7] KSO[0..15]
KBD_CLK KBD_DATA PS2_CLK PS2_DATA
EC_SMI#<12>
G_RST#<22,23>
SLP_S1#<12>
SYSON<37,41,42> SUSP#<31,37>
ENABLT<14,17> BKOFF#<17>
FSEL#<31>
PWR_ACTIVE_PAV#
120K for NS 0 for ENE
SUSP#
12
B
TP_CLK TP_DATA LID_SW#
R579 10K_0402_5%
TP_CLK<27> TP_DATA<27> LID_SW#<33>
12
120K_0402_5%
EC_MUTE#<26> EC_SWI#<12>
BATLED_0#<27,33>
PWR_BACK#<35> EC_RSMRST#<12,36>
PCM_SUSP#<22>
+3VALW
1
1
C540
0.1U_0402_16V4Z
2
2
15 14 13
CLK_PCI_LPC EC_RST#
12
1 2
10 18 19 22 23
31
KSI0
71
KSI1
72
KSI2
73
KSI3
74
KSI4
77
KSI5
78
KSI6
79
KSI7
80
KSO0
49
KSO1
50
KSO2
51
KSO3
52
KSO4
53
KSO5
56
KSO6
57
KSO7
58
KSO8
59
KSO9
60
KSO10
61
KSO11
64
KSO12
65
KSO13
66
KSO14
67
KSO15
68
EC_TINIT#
105
EC_TCK
106
EC_TDO
107
EC_TDI
108
EC_TMS
109 110
111 114 115 116 117 118 119
CRY1
158
CRY2
160
EC_SMI#
62 63 69 70 75 76
148 149 155 156
27 28
FSEL#
173 174
47
PC87591L-VPCN01 A2_LQFP176
R603
1 2
1_0805_5%
U21
7
SERIRQ
8
LDRQ#
9
LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# SMI# PWUREQ#
IOPD3/ECSCI#
5
GA20/IOPB5
6
KBRST/IOPB6
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15
TINT# TCK TDO TDI TMS
PSCLK1/IOPF0 PSDAT1/IOPF1 PSCLK2/IOPF2 PSDAT2/IOPF3 PSCLK3/IOPF4 PSDAT3/IOPF5 PSCLK4/IOPF6 PSDAT4/IOPF7
32KX1/32KCLKIN 32KX2
IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO
IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11
3
IOPM4/D12
4
IOPM5/D13 IOPM6/D14 IOPM7/D15
SEL0# SEL1# CLK
+EC_VCC
16
VDD
VCC134VCC245VCC3
Host interface
Key matrix scan
JTAG debug port
PS2 interface
PORTJ-2
PORTM
GND117GND235GND346GND4
D59
551@SSM14_SMA
123
136
VCC4
GND5
GND6
122
159
167
ECAGND
C
21
+EC_AVCC
95
157
166
VCC5
VCC6
AD Input
DA output
PWM or PORTA
PORTB
IOPB7/RING/PFAIL/RESET2
PORTC
PORTD-1
IOPD2/EXWINT24/RESET2
PORTE
IOPE7/CLKRUN/EXWINT46
PORTH
PORTI
PORTJ-1
PORTD-2
PORTK
PORTL
AGND
GND7
96
137
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
161
AVCC
VBAT
IOPE0AD4 IOPE1/AD5 IOPE2/AD6 IOPE3/AD7
DP/AD8 DN/AD9
IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7
IOPB0/URXD IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1 IOPB4/SDA1
IOPC0 IOPC1/SCL2 IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT
IOPD0/RI1/EXWINT20 IOPD1/RI2/EXWINT21
IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPH0/A0/ENV0
IOPH1/A1/ENV1 IOPH2/A2/BADDR0 IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6 IOPH7/A7
IOPI0/D0 IOPI1/D1 IOPI2/D2 IOPI3/D3 IOPI4/D4 IOPI5/D5 IOPI6/D6 IOPI7/D7
IOPJ0/RD
IOPJ1/WR0
SELIO#
IOPD4 IOPD5 IOPD6 IOPD7
IOPK0/A8
IOPK1/A9 IOPK2/A10 IOPK3/A11 IOPK4/A12
IOPK5/A13_BE0 IOPK6/A14_BE1
IOPK7/A15_CBRD
IOPL0/A16 IOPL1/A17 IOPL2/A18 IOPL3/A19
IOPL4/WR1#
NC212NC320NC421NC585NC686NC791NC892NC997NC10
NC1
11
C627 551@1U_0603_10V6K
1 2
GPIO6
R602 ENE@0_0402_5%
GPIO5
C
AD0 AD1 AD2 AD3
DA0 DA1 DA2 DA3
98
12
81 82 83 84 87 88 89 90 93 94
99 100 101 102
32 33 36 37 38 39 40 43
153 154 162 163 164 165
168 169 170 171 172 175 176 1
26 29 30
2 44 24 25
124 125 126 127 128 131 132 133
138 139 140 141 144 145 146 147
150 151
152 41
42 54 55
143 142 135 134 130 129 121 120
113 112 104 103 48
2
C538 1U_0603_10V6K
1
PRES_DETECT
VOLBTN-#
TP_OFF_LED#
KSO16 KSO17 PMLED_1# EC_SMC_1 EC_SMD_1
EC_SMC_2 EC_SMD_2 FAN_SPEED1
ACIN
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
FRD# FWR#
SELIO# VOLBTN+#
KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15
KBA16 KBA17 KBA18 KBA19
EC_SCI#
R594 ENE@0_0603_5%
1 2 1 2
R595 NS@0_0603_5%
BATT_TEM P <45>
BID ADP_IR
1 2
C541
BATT_OVP <39>
WIRELESS_BTN# <26,35> VOLBTN-# <26,27,34>
DAC_BRIG <17>
EN_FAN1 <4> IREF <39> EN_FAN2 <4>
INVT_PWM <17> BEEP# <25>
ACOFF <39> PM_BATLOW# <12> EC_ON <33> LID_OUT# <12> TP_OFF_LED# <35>
KSO16 <35> KSO17 PMLED_1# <27,33> EC_SMC_1 <31,45> EC_SMD_1 <31,45>
PBTN_OUT# <12> EC_SMC_2 <4> EC_SMD_2 <4> FAN_SPEED1 <4> PME_EC# <20,22,28,31> EC_THRM# <12> FAN_SPEED2 <4> WL_ON <28>
ACIN <12,38,40> JACK_DET# <34> SLP_S3# <12,27>
ON/OFF# <33> SLP_S5# <12> M_SEN# <18> CONA# <25,34>
FRD# <31> FWR# <31>
SELIO# VOLBTN+# <26,27,34>
NUMLED# <35> CAPSLED# <35> PWR_ACTIVE_PRES# <35>
FSTCHG <39>
0.01U_0402_16V7K
D
+3VALW +RTCVCC+3VALW
ECAGND
USB_ON#
EEPROM/BATTERY
PCIRST_LPC#
THERMAL/DOCKING
ADB[0..7] KBA[0..19]
PRES_DETECT
D
1 2
R351 10K_0402_5%
1
C544
0.22U_0603_10V7K
2
USB_ON# <27>
PCIRST_LPC# <12,29>
WL_ON
2
G
ADB[0..7] <31> KBA[0..19] <31>
10K_0402_5%
VOLBTN+# VOLBTN-#
PCIRST_LPC#
R584
1 2
6.2K_0402_5%
R585 10K_0402_5%
1 2
E
BADDR1-0
0 0 0 1 1 0
*
1 1
For 591: NS@ For 551: NS@ + 551@ For ENE: ENE@
ADP_I <39>
SHBM=1: Enable shared memory with host BIOS TRIS=1: While in IRE and OBD, float all the signals for clip-on ISE use
+3VS
12
R472 1K_0402_5%
13
D
S
Q61 2N7002_SOT23
BLUETOOTH_ON# <27>
Index
(HCFGBAH, HCFGBAL)
KBA1
KBA2
KBA3
KBA5
2E 4E
(ENV1)
(BADDR0)
(BADDR1)
(SHBM)
I/O Address
(HCFGBAH, HCFGBAL)+1
Reserved
IRE OBD
*
DEV PROG
1 2
R354 NS@10K_0402_5%
1 2
R355 @10K_0402_5%
1 2
R356 NS@10K_0402_5%
1 2
R357 10K_0402_5%
+3VALW
BID
HR61 120W HR64 90W HR64 120W V
R370
1 2
+3VS
1 2
R371 10K_0402_5%
EC DEBUG port
JP29
1
1
EC_TINIT#
2
2
EC_TCK
12
R363 ENE@10K_0402_5%
PRES_LEDVCC <27,35>
Title
Size Document Number Rev
Date: Sheet
3
3
EC_TDO
4
4
EC_TDI
5
5
EC_TMS
6
6
7
7
KSO16
8
8
KSO17
9
9
PMLED_1#
10
10
@96212-1011S
Compal Electronics, Inc.
KBD EC CTRL -NS P C87591L
LA-2392
E
Data
2F 4F
ENV0
ENV1
0
0
1
0 1
0
0
1
1
+3VALW
12
R361 1K_0402_5%
12
R364 90W@1K_0402_5%
R364 R361
V
V
V
+5VALW
of
30 53Friday, April 16, 2004
TRIS
0 0
0
ADB[0..7]<30>
KBA[0..19]<30>
ADB[0..7] KBA[0..19]
INPUT OUTPUT
14
U23A
1
P
A
3
O
2
B
G
SN74LVC32APWLE_TSSOP14
7 14
U23D
12
P
A
11
O
13
B
G
SN74LVC32APWLE_TSSOP14
7
U24
KBA18
1
A18
KBA16
2
A16
KBA15
3
A15
KBA12
4
A12
KBA7
5
A7
KBA6
6
A6
KBA5
7
A5
KBA4
8
A4
KBA3
9
A3
KBA2
10
A2
KBA1
11
A1
KBA0
12
A0
ADB0
13
DQ0
ADB1
14
DQ1
ADB2
15
DQ2
16
VSS
512K8-90_PLCC32
KBA0 KBA1 KBA2 KBA3 KBA4 KBA5 KBA6 KBA7 KBA8 KBA9 KBA10 KBA11 KBA12 KBA13 KBA14 KBA15 KBA16 KBA17 KBA18 KBA19
FSEL#<30>
FRD#<30>
FSEL# FRD# FWE#
U25
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16
READY/BUSY#
40
A17
13
A18
37
A19
22
CE#
24
OE#
9
WE#
@SST39VF080-70_TSOP40
VCC0 VCC1
GND0 GND1
RP#
NC0 NC1
D0 D1 D2 D3 D4 D5 D6 D7
NC
WE#
VDD
OE# CE#
DQ7 DQ6 DQ5 DQ4 DQ3
32
FWE#
31
KBA17
30
A17
KBA14
29
A14
KBA13
28
A13
KBA8
27
A8
KBA9
26
A9
KBA11
25
A11
FRD#
24
KBA10
23
A10
FSEL#
22
ADB7
21
ADB6
20
ADB5
19
ADB4
18
ADB3
17
31 30
ADB0
25
ADB1
26
ADB2
27
ADB3
28
ADB4
32
ADB5
33
ADB6
34
ADB7
35
RESET#
10 11 12 29 38
23 39
1 2
R385 @100K_0402_5%
2
C550
0.1U_0402_16V4Z
1
+3VALW
1
C552 @0.1U_0402_16V4Z
2
+3VALW
FWE#
SN74LVC32APWLE_TSSOP14
+3VALW
U23C
+3VALW
8
O
+3VALW +3VALW
14
P
A B
G
7
KBA16 KBA15 KBA14 KBA13 KBA12 KBA11 KBA9 KBA8 FWE# RESET#
KBA18 KBA7 KBA6 KBA5
KBA3 KBA1
9 10
12
R373 100K_0402_5%
1 3
D
Q28 2N7002 1N_SOT23
JP30
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
@SUYIN-80065A-040G2T
2
G
S
SUSP# <30,37>
EC_FLASH# <12>
FWR# <30>
KBA17
KBA19 KBA10 ADB7 ADB6 ADB5 ADB4
ADB3 ADB2 ADB1 ADB0 FRD#KBA4
FSEL#KBA2 KBA0
+3VALW
WLAN_PME#<20,22,28,30>
PCM_PME#<20,22,28,30>
LAN_PME#<20,22,28,30>
0.1U_0402_16V4Z
EC_SMC_1<30,45> EC_SMD_1<30,45>
C551
12
R374
4.7K_0402_5%
PME_EC# <20,22,28,30>
+3VALW+3VALW
1
2
U26
8
VCC
7
WC
6
SCL
5
SDA
AT24C164-10SC_SO8
GND
12
R382 100K_0402_5%
1
A0
2
A1
3
A2
4
12
R383 100K_0402_5%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
BIOS & EC I/O Port
LA-2392
31 53Friday, April 16, 2004
of
0.1
5
4
3
2
1
Parallel Port
+5V_PRN
1SS355_SOD323
1 2
LPTACK#<29>
LPTBUSY<29>
LPTPE<29>
LPTSLCT<29>
FD4 FD5 FD6 FD7
D30
1
FD0 FD1 FD2 FD3
LPD3 LPD2 LPD1 LPD0 LPD7 LPD6 LPD5 LPD4
LPTSTB#<29>
C554 1U_0603_10V6K
2
LPTAFD#
LPTINIT# LPTSLCTIN#
LPD[0..7]<29>
RP84
1 2 3 4 5
2.7K_1206_10P8R_5%
RP86
1 2 3 4 5
2.7K_1206_10P8R_5%
RP87
1 2 3 4 5 6 7 8 9
68_1206_16P8R_5%
D D
LPTAFD#<29>
LPTERR#<29>
LPTINIT#<29>
LPTSLCTIN#<29>
C C
B B
A A
+5V_PRN
+5V_PRN
AFD/3M# LPTERR# PRNINIT# SLCTIN#
+5VS
LPTSTB#
R387 33_0402_5%
R388 33_0402_5%
1 2
R389 33_0402_5%
1 2
R390 33_0402_5%
1 2
LPD[0..7]
+5V_PRN
10 9 8 7 6
+5V_PRN
10
LPTACK#
9
LPTBUSY
8
LPTPE
7
LPTSLCT
6
FD3
16
FD2
15
FD1
14 13
FD7
12
FD6
11
FD5
10
FD4
+5V_PRN
w=10mils
12
12
R386
2.7K_0402_5%
PWRPRN
w=10mils
AFD/3M# FD0 LPTERR# FD1 PRNINIT# FD2 SLCTIN# FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
SLCTIN# PRNINIT# LPTERR#
AFD/3M#
220P_1206_8P4C_50V8K
LPTSLCT LPTPE LPTBUSY LPTACK#
220P_1206_8P4C_50V8K
FD3 FD2 FD1 FD0
220P_1206_8P4C_50V8K
FD7 FD6FD0 FD5 FD4
220P_1206_8P4C_50V8K
C555
1 2
47P_0402_50V8J
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
JP32
SUYIN_070536FR025S204AU
CP1
CP2
CP3
CP4
81 7 6
81 7 6
81 7 6
81 7 6
2 3 4 5
2 3 4 5
2 3 4 5
2 3 4 5
DSKCHG#<29>
WGATE#<29>
TRACK0#<29>
C629
4.7U_0805_10V4Z
INDEX#<29> DRV0#<29>
MTR0#<29>
FDDIR#<29>
3MODE#<29>
STEP#<29>
WDATA#<29>
WP#<29> RDATA#<29> HDSEL#<29>
1
2
FDD CONN.
+5VS
INDEX# DRV0# DSKCHG#
MTR0# FDDIR#
3MODE# STEP#
WDATA# WGATE# TRACK0# WP# RDATA# HDSEL#
+5VS
1
C557
0.1U_0402_16V4Z
2
WDATA# WGATE# HDSEL#
+5VS
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
RP85
6 7 8 9
10
@1K_1206_10P8R_5%
JP31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
ACES_85201-2605
DSKCHG# INDEX# WP# TRACK0#
RDATA#
RP83
1 8 2 7 3 6 4 5
1K_1206_8P4R_5%
1 2
R478 1K_0402_5%
5 4 3
DRV0#FDD IR#
2 1
EMI Requirement
INDEX# DRV0# DSKCHG# MTR0#
FDDIR# 3MODE# STEP# WDATA#
WGATE# TRACK0# WP# RDATA#
HDSEL#
+5VS
STEP# MTR0#
+5VS
CP11
CP12
CP13
C801
1 2
81 7 6
81 7 6
81 7 6
2 3 4 5
180P_1206_8P4C_50V8
2 3 4 5
180P_1206_8P4C_50V8
2 3 4 5
180P_1206_8P4C_50V8
180P_0402_50V8J~D
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Parallel port & FDD Connector
Size Document Number Rev
LA-2392 0.1
B
of
Date: Sheet
32 53Friday, April 16, 2004
1
5
4
3
2
1
Power BTN
INT_KBD CONN.
KSI[0..7] KSO[0..15]
D D
C C
KSI1 KSI7 KSI6 KSO9 KSI4 KSI5 KSO0 KSI2 KSI3 KSO5 KSO1 KSI0 KSO2 KSO4 KSO7 KSO8 KSO6 KSO3 KSO12 KSO13 KSO14 KSO11 KSO10 KSO15
ACES_85201-2405
JP33
24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KSI[0..7] <30,35> KSO[0..15] <30>
CP5
KSO8 KSO7
2
KSO4
3
KSO2
4 5
100P_1206_8P4C_50V8
CP6
KSI0 KSO1
2
KSO5
3
KSI3
4 5
100P_1206_8P4C_50V8
CP7
KSO9 KSI6
2
KSI7
3
KSI1
4 5
100P_1206_8P4C_50V8
CP8
KSI2 KSO0
2
KSI5
3
KSI4
4 5
100P_1206_8P4C_50V8
CP9
KSO13 KSO12
2
KSO3
3
KSO6
4 5
100P_1206_8P4C_50V8
CP10
KSO15 KSO10
2
KSO11
3
KSO14
4 5
100P_1206_8P4C_50V8
81 7 6
81 7 6
81 7 6
81 7 6
81 7 6
81 7 6
EC_ON<30>
ON/OFFBTN#
EC_ON
Q63
@2N7002_SOT23
+3VALW
12
13
D
S
1
D31 DAN202U_SC70
R392
4.7K_0402_5%
DTC124EK_SOT23
2
G
2
4
2
Q29
SW8
ESE11MV9_4P
3
2
22K
22K
R391 100K_0402_5%
1 2
ON/OFF#
13
1000P_0402_50V7K
1
3
3
2
D34 @PSOT03C
1
C558
2
+3VALW
ON/OFF# <30>
EC_PWR_ON# <38>
12
D33 RLZ20A_LL34
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
LID_SW# <30>
D32 @PSOT03C
C559
0.1U_0402_16V4Z
C563
0.1U_0402_16V4Z
ON/OFFBTN#
2 3
FIR Module
+3VS
1
12
2
1
2
R586 10_1206_5%
T = 20mil
SW1
2 4
TC010-PS11CET_5P
5
SW2
2 4
TC010-PS11CET_5P
5
U27
2
IRED_C
4
RXD
6
VCC
8
GND
TFDU6102-TR3_8P
1 3
1 3
IRED_A
SD/MODE
MODE
TXD
+3VS
1
C561
4.7U_0805_10V4Z
2
T = 40mil
+5VS_FIR
1 3 5 7
T = 12mil T = 12mil
T = 12mil
IRTXOUT IRMODE
IRRX
IRTXOUT <29> IRMODE <29>
IRRX <29>
Touch Pad & Status LED Conn.
+3VALW
B B
A A
5
PMLED_1#<27,30>
ACT_LED#<19>
PDTA114EK_SC59
PDTA114EK_SC59
Q30
Q32
3B2
E
C
1
R396
1 2
147_0402_5%
+5VS
3B2
E
C
1
R398
1 2
220_0402_5%
4
PMLED_1 <27> BATLED_0 <27>
ACT_LED <27>
BATLED_0#<27,30>
PDTA114EK_SC59
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VALW
3
2
Q31
3
E
B
C
1
R397
1 2
147_0402_5%
Title
Size Document Number Rev
2
Date: Sheet
Compal Electronics, Inc.
KBD,ON/OFF,T/P,LED & FIR
LA-2392
33 53Friday, April 16, 2004
1
of
A
B
C
D
E
+3VALW
12
R399
1 1
1 2
+3VS
R566 @1K_0402_5%
JACK_DET#
CONA#<25,30>
10K_0402_5%
1
C
E
JP35
33 34
1 2
+5VS
R560 1K_0402_5%
R568 200_0402_5%
VOLBTN-#<26,27,30>
1 2
1
2 2
1000P_0402_50V7K
2
+USB_VCCA
DOCK_PRESENT
TV_COMPS<14,18> TV_LUMA<14,18>
TV_CRMA<14,18>
USBP4-<12> USBP4+<12>
RJ45_GND<20>
RJ45_RXX-<20> RJ45_RXX+<20> RJ45_TXX-<20>
RJ45_TXX+<20>
+DOCKVIN +DOCKVIN
C779
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 35 36
BOSS137BOSS2
FOX_QL11183-C6HQ
38
DOCK_LOUT_L DOCK_LOUT_R
JACK_DET#
SIN1# SOUT1 DCD1# DTR1# RI1# DSR1# RTS1# CTS1#
DOCK_LOUT_L <26> DOCK_LOUT_R <26>
JACK_DET# <30>
SPDIFO <25> SIN1# <29>
SOUT1 <29> DCD1# <29> DTR1# <29> RI1# <29> DSR1# <29> RTS1# <29> CTS1# <29>
R567 200_0402_5%
1 2
1
C778
1000P_0402_50V7K
2
VOLBTN+# <26,27,30>
DOCK_PRESENT
470_0402_5%
EMI Requirement
SIN1# SOUT1
2
DCD1#
3
DTR1#
4 5
180P_1206_8P4C_50V8
RI1# DSR1#
2
RTS1#
3
CTS1#
4 5
CP14
CP15
R400
12
81 7 6
81 7 6
B
Q33
3
2
MMBT3904_SOT23
180P_1206_8P4C_50V8
+USB_VCCA
1
C565
0.1U_0402_16V4Z
3 3
2
1
2
4 4
A
B
1
C564 @22U_1206_10V4Z
2
L24
1 2
KC FBM-L18-453215-900LMA90T_1812 C567 1000P_0402_50V7K
1
C566 @1000P_0402_50V7K
2
+DOCKVINVIN
1
C568 1000P_0402_50V7K
2
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
SPDIFO
1
C634 470P_0402_50V7K
2
Title
Size Document Number Rev
D
Date: Sheet
Compal Electronics, Inc.
SPR Connector
LA-2392
34 53Friday, April 16, 2004
E
of
5
KSO16<30>
D D
C C
KSO16
FOR CARDREADER INDICATOR ( PAV /PRES )
B B
CARD_LED<22>
SW3
2 4
SW4
2 4
SW5
2 4
SW6
2 4
SW7
2 4
MMBT3904_SOT23
CARD_LED
R570
10K_0402_5%
1 3
TC010-PS11CET_5P
5
1 3
TC010-PS11CET_5P
5
1 3
TC010-PS11CET_5P
5
1 3
TC010-PS11CET_5P
5
1 3
TC010-PS11CET_5P
5
Q37
R569
1 2
12
1K_0402_5%
10K_0402_5%
+3VS
KSI0
KSI1
KSI2
KSI3
WIRELESS_BTN#
12
R466
@0.1U_0402_16V4Z
R407
1 2
220_0402_5%
1
C
E
B
3
2
FOR WIRLESS LED ( PAV )
BLUETOOTH_LED<27>
MINI_LED<28>
A A
WIRELESS_LED<26>
5
D56
1N4148_SOT23
D57
1N4148_SOT23
WIRELESS_LED
R473
10K_0402_5%
12
12
R475
1 2
12
1K_0402_5%
4
@0.1U_0402_16V4Z
2
2
C569
1
1
1
12-21UYOC/S530-A2/TR8_YEL
R410
220_0402_5%
21
D47 HSMB-C172 BLUE_0805
1
C
E
B
3
2
4
@0.1U_0402_16V4Z
2
2
C570
1
@0.1U_0402_16V4Z
D42
D43 HSMB-C172 BLUE_0805
PAV_LEDVCC
12
Q62 MMBT3904_SOT23
C571
PRES_LEDVCC
2 3
PAV_LEDVCC
21
C572
1
@0.1U_0402_16V4Z
3
KSI0 <30,33>
FOR POWER BUTTON BACKLIGHT ( PAV )
KSI1 <30,33>
KSI2 <30,33>
KSI3 <30,33>
2
1
WIRELESS_BTN# <26,30>
C573
NUMLED#<30>
PWR_ACTIVE_PAV#<30> PWR_ACTIVE_PRES#<30>
3
2
E
B
C
1
1 2
220_0402_5%
PWR_ACTIVE_PAV#
D40 17-21UYOC/S530-A2/TR8_ORG
D41 HSMB-C172 BLUE_0805
Q36 PDTA114EK_SC59
R406
PRES_LEDVCC
21
PAV_LEDVCC
21
2
B
FOR 3 PROGRAMING BUTTON BACKLIGHT (PAV)
FOR POWER BUTTON
2
+5V +5V
21
D35
HSMB-C172 BLUE_0805
3
E
Q34 PDTA114EK_SC59
C
1 12
R401 220_0402_5%
PWR_BACK#<30>
BACKLIGHT ( PRES )
D45 17-21UYOC/S530-A2/TR8_ORG
PRES_LEDVCC
21
PAV_LEDVCC
CAPSLED#<30>
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
B
3
C
1
1 2
220_0402_5%
3
E
R409
21
D48 HSMB-C172 BLUE_0805
Q39 PDTA114EK_SC59
PRES_LEDVCC <27,30>
PAV_LEDVCC <27>
TP_OFF_LED#<30>
2
1
21
D39
17-21UYOC/S530-A2/TR8_ORG
PWR_ACTIVE_PRES#
PWR_BACK#
Title
LED & Fan Circuit
Size Document Number Rev
LA-2392 0.1
B
Date: Sheet
3
2
E
B
C
1
2
B
C
1
3
2
E
B
C
1 12
R405 220_0402_5%
D36 HS MB - C 1 7 2 B LUE_0805
D37 HS MB - C 1 7 2 B LUE_0805
D38 HS MB - C 1 7 2 B LUE_0805
Q35 PDTA114EK_SC59
R404
1 2
220_0402_5%
D44 17-21UYOC/S530-A2/TR8_ORG
D46 HS MB - C 1 7 2 B LUE_0805
3
D58 HS MB - C 1 7 2 B LUE_0805
E
Q38 PDTA114EK_SC59
R408
1 2
220_0402_5%
Q69 PDTA114EK_SC59
PAV_LEDVCC
21
PAV_LEDVCC
21
PAV_LEDVCC
21
PRES_LEDVCC
21
PAV_LEDVCC
21
21
35 53Friday, April 16, 2004
1
of
A
B
C
D
E
F
G
H
I
J
1 1
+5VALW
R412
2
B
8.2K_0402_5%
1 2
1
C
E
3
2 2
Q42
MMBT3904_SOT23
+1.6VALW
3 3
1 2
R415 6.8K_0402_5%
1
C575 1U_0603_10V6K
2
4 4
2
G
+3VALW
R413 15K_0402_5%
1 2
13
D
S
Q43 2N7002_SOT23
PWRGD_SB <12,30>
MMBT3904_SOT23
+2.5V
1 2
R414 1K_0402_5%
MMBT3904_SOT23
1 2
R417 10K_0402_5%
VGATE<44>
+3VALW
Q41
B
2
2
C574
0.22U_0603_10V7K
1
+3VALW
Q44
B
2
1
C576 1U_0603_10V6K
2
R411 10K_0402_5%
1 2
1
C
E
3
R416 10K_0402_5%
1 2
1
C
E
3
CPU_VLD# <11>
DELAY 1 ms
MEM_VLD# <11>
DELAY 1 ms
5 5
+3VS
C579
1 2
0.1U_0402_16V4Z
1
U29
5
MR#
6 6
+5VS
R423 240K_0402_5%
1 2
100K_0402_5%
R425
12
1
C581
2
0.01U_0402_16V7K
1
C582 @0.1U_0402_16V4Z
2
3
PFI
MAX6342RUT-T_SOT23-6
6
RST#
VCC
4
PFO#
GND
2
PM_PWROK
R476 100K_0402_5%
1 2
PM_PWROK <12>
+1.2V_HT
MMBT3904_SOT23
1 2
R421 5.6K_0402_5%
+3VALW
Q45
B
2
2
C580
0.47U_0603_16V7K
1
R418 10K_0402_5%
1 2
1
C
E
3
HT1_VLD# <11>
DELAY 1 ms
Delay 100 ms
7 7
8 8
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
D
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
G
H
Compal Electronics, Inc.
Title
Power OK/Reset Conn.& MUTE Switch
Size Document Number Rev
LA-2392
Custom Date: Sheet
I
of
36 53Friday, April 16, 2004
J
0.1
A
B
C
D
E
F
G
H
I
J
+12VALW
12
R426
1 1
SYSON#
2N7002_SOT23
100K_0402_5%
0.01U_0402_16V7K
12
13
D
2
G
Q46
R429 1M_0402_5%
S
2 2
3 3
+3VALW
U31
8 7 6
R438 100K_0402_5%
D
S
5
SI4800 1N_SO8
1
C596 10U_0805_10V4Z
2
0.01U_0402_16V7K
12
R440 1M_0402_5%
1
+
C595 @33U_D2_10VM
4 4
5 5
2
SUSP
Q56
2N7002_SOT23
+12VALW
2
G
12
13
6 6
7 7
1
+
C608 100U_D2_10VM
2
+3VALW +3VS
8 8
A
+5VALW to +5V Transfer
+5VALW
1
C583
2
+5VALW +5VALW
1
C587
4.7U_0805_10V4Z
2
+3VALW to +3V Transfer
+3V
1
S1
D1
2
S2
D2
3
S3
D3
4
G
D4
+5VALW to +5VS Transfer
+5VALW
1
C602
2
C604
4.7U_0805_10V4Z
U34
S1
D1
S2
D2
S3
D3
G
D4
SI4800 1N_SO8
B
1 2 3 4
8 7 6 5
1
C609 10U_0805_10V4Z
2
1
S1
2
S2
3
S3
4
G
1
+
C586 @33U_D2_16VM
2
0.1U_0402_16V4Z
SUSON
1
S1
2
S2
3
S3
4
G
1
+
C605 @100U_D_16VM
2
+5V
1
C594
2
+5VS
1
2
U30
8 7 6 5
SI4800 1N_SO8
SUSON
1
C593 22U_1206_10V4Z
2
SUSON
U33
8
D1
7
D2
6
D3
5
D4
SI4800 1N_SO8
RUNON
+5VALW
1
2
D1 D2 D3 D4
+5VALW
+3VALW to +3VS Transfer
0.1U_0402_16V4Z
1
C606 22U_1206_10V4Z
2
RUNON
1
C584 22U_1206_10V4Z
2
12
R436 470_0402_5%
13
D
2
G
Q54
S
2N7002_SOT23
22U_1206_10V4Z
C600
0.1U_0402_16V4Z
12
1
C607
2
13
D
S
C
0.1U_0402_16V4Z
1
C585
2
SYSON#
1
C601
2
D
S
R442 82_0402_5%
SUSP
2
G
Q58 2N7002_SOT23
12
R430 470_0402_5%
13
D
Q49
S
2N7002_SOT23
12
R439 470_0402_5%
13
2
G
Q57 2N7002_SOT23
G
2
SUSP
SYSON#
D
+2.5V +2.5VS
U40
8 7 6 5
1
2
+1.6VALW
8 7 6 5
1
2
1
S1
D1
2
S2
D2
3
S3
D3
4
G
D4
SI4800 1N_SO8
C739 @10U_1206_6.3V6M
U32
1
S1
D1
2
S2
D2
3
S3
D3
4
G
D4
SI4800 1N_SO8
C599 10U_0805_10V4Z
+1.6VS
E
+2.5V to +2.5VS Transfer
SUSP<43>
2N7002_SOT23
JOPEN
RUNON
1
C737 22U_1206_10V4Z
2
RUNON <41>
0.1U_0402_16V4Z
1
C738
2
12
R552 470_0402_5%
13
D
S
SUSP
2
G
Q64 2N7002_SOT23
+1.6VALW to +1.6VS Transfer
0.1U_0402_16V4Z
1
C597 22U_1206_10V4Z
2
RUNON
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
1
R437
C598
470_0402_5%
2
13
D
SUSP
2
G
Q55
S
2N7002_SOT23
F
G
J2
W=20mils
1 2
H31 HOLEA
1
SUSP
2
G
Q51
+RTCVCC
1
CF1
CF10
H1 HOLEA
H11 HOLEA
H21 HOLEA
+12VALW
12
R427 10K_0402_5%
13
D
Q47 2N7002_SOT23
S
+1.25V
12
R431 470_0402_5%
13
D
SYSON#
2
G
S
+3VALW
21
D52 @RB751V_SOD323
D49
3
C603
0.1U_0402_16V4Z
For customer request ,they don't wanna charge RTC
FM1
FM2
1
CF3
CF2
1
1
1
CF12
CF11
1
1
1
H2 HOLEA
1
1
H12 HOLEA
1
1
H22 HOLEA
1
1
H
2
BAS40-04_SOT23
W=15mils
FM3
1
1
CF4
CF6
CF5
1
1
CF13
CF15
CF14
1
1
H3
H4
HOLEA
HOLEA
1
1
H13
H14
HOLEA
HOLEA
1
1
H24
H23
HOLEA
HOLEA
1
1
Compal Electronics, Inc.
Title
DC/DC Circuit
Size Document Number Rev
LA-2392
Custom Date: Sheet
FM4
CF7
1
CF16
1
H5 HOLEA
1
H25 HOLEA
1
SYSON<30,41,42>SUSP#<30,31>
1
1
1
1
CF8
H6 HOLEA
H16 HOLEA
H26 HOLEA
I
1
1
1
2N7002_SOT23
BATT1.1
W=20mils
CHGRTC
FM5
CF9
1
SYSON#
Q65
+
1 2
FM6
1
1
H7
H8
HOLEA
HOLEA
1
H18
H17
HOLEA
HOLEA
1
H27
H28
HOLEA
HOLEA
1
+12VALW
12
13
D
2
G
S
+2.5V
12
13
D
S
BATT1
ML1220T13RE
H9 HOLEA
1
H19 HOLEA
1
H29 HOLEA
1
R428 47K_0402_5%
Q48 2N7002_SOT23
R553 470_0402_5%
SYSON#
2
G
-
H10 HOLEA
1
1
1
H30 HOLEA
1
1
37 53Friday, April 16, 2004
0.1
of
J
A
B
C
D
E
2 3 2 3
12
SBM1040-13_POWERMITE3
1000P_0402_50V7K
+1.5VS
+1.25V
+1.35VS
PD45
PD46
1
VIN
1
MAINPWON<40,45>
ACON<39>
Vin Detector
18.202 17.841 17.481
17.568 17.210 16.858
VIN
VL
5V
ACIN
Precharge detector
16.421 15.817 15.229
14.108 13.657 13.002
PJP9 3MM
+1.6VALWP +1.6VALW
+1.2VSP
21
PJP2 3MM
21
+1.2VS
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
12
PC6
0.047U_0603_16V7K
PD5
2
3
RB715F_SOT323
VIN
12
PR2
150K_0603_0.1%
12
PR7
19.6K_0603_0.1%
PD4
1N4148_SOD80
PR18
10K_0402_5%
1 2
1
PR5
22K_0402_1%
1 2
12
12
PC7
PR1
1M_0402_1%
1 2
VS
12
PC5
8
P
+
O
-
G
PU1A
4
LM393M_SO8
12
RTCVREF
1 2
1 2
1 2
1 2
PR19
1M_0402_1%
PU1B
LM393M_SO8
8
5
P
+
6
-
G
4
PC11
PR25
10K_0402_5%
PR27
@66.5K_0603_1%
D
0.01U_0402_50V7K
1
PR11
1.5K_1206_5%
PR12
1.5K_1206_5%
PR13
1.5K_1206_5%
PR15
1.5K_1206_5%
12
12
1000P_0402_50V7K
12
3
0.1U_0402_16V4Z
2
PR10
10K_0402_5%
VS1
7
O
12
PC12
0.1U_0402_16V4Z
VL
5V
VIN
12
PR3
3.2V
12
PZD1 RLZ4.3B_LL34
12
PR22 499K_0402_1%
2N7002_SOT23
13
D
G
S
1 2
Title
Size Document Number Rev
B
Date: Sheet
10K_0805_1%
PQ2
2
Detector
LA-2392
PR4
10K_0402_5%
1 2
PACIN
12
PR8 10K_0402_5%
PR26
47K_0402_5%
1
O
PQ3 DTC115EUA_SC70
G3I
2
Compal Electronics, Inc.
12
PC3
100P_0402_50V8J
PC9
0.1U_0603_50V4Z
21
21
21
21
21
SBM1040-13_POWERMITE3
PC4
PL1
FBM-L18-453215-900LMA90T_1812
12
PC2 1000P_0402_50V7K
PR6
1 2
PR9
1 2
12
2
1
1
+5VALWP
+1.5VSP
+1.25VP
+1.35VSP
1 2
PQ1 TP0610T_SOT23
3
S
2
G
CHGRTCP
12
2
12
VS
1
D
12
PR20 200_0805_5%
PZD3 RLZ16B_LL34
2 1
PC13 1U_0805_25V4Z
B
PJP11 3MM
PJP3 3MM
PJP4 3MM
PJP6 3MM
PJP8 3MM
12
PD2
1N4148_SOD80
12
12
PR14
12
PC14
4.7U_0805_10V4Z
21
21
21
21
21
PC1
100P_0402_50V8J
12
200_1206_5%
200_1206_5%
12
12
PC8
100K_0402_5%
0.22U_1206_25V7K
PU2 S-81233SGUP-T1_SOT89
3
3
+3VALW +5VALW
+2.5V
+12VALW
PCN1
1 2 3
3.3V
4
CHGRTC
1 2
200_0805_5%
EC_PWR_ON#<33>
PR23
+3VALWP
+2.5VP
+12VALWP
FOX_JPD1021-W03-TR
1 1
2 2
3 3
4 4
EC10QS04_SOD106
VMB
CHGRTCP
PR24
1 2
200_0805_5%
A
ADPIN
ADPGND
VIN
PD3
1N4148_SOD80
PZD2 RLZ4.3B_LL34
1 2
PR16
22K_0402_5%
PD1
RTCVREF
PJP10 3MM
PJP1 3MM
PJP12 3MM
PJP7 3MM
PJP5
2MM
ACIN <12,30,40>
PACIN <39>
12
PR17 432K_0402_1%
12
PR21 499K_0402_1%
PACIN
12
E
Detector
B+
12
1000P_0402_50V7K
+5VALWP
38 53Friday, April 16, 2004
PC10
0.1
of
A
B
C
D
E
Charger
1 1
Iadp=0~6.0A
12
P3
ADP_I<30>
12
PR37
10K_0402_1%
1 2
PR43
162K_0402_1%
PR28
0.01_2512_1%(1W)
1.2V
12
PR36
31.6K_0603_1%
12
5.0V
PC25
0.1U_0402_16V7K
12
PR46
90.9K_0603_1%
12
1 2
PC23
4700P_0402_25V7K_A34
1 2
PC26
1500P_0402_50V7K
12
PC32
0.01U_0402_50V7K
PR34
47K_0402_1%
1 2
1K_0402_1%
1 2
PR44
10K_0402_1%
12
PR38
12
PR40 1K_0402_1%
PU3
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3887_SSOP24
B+
FBM-L18-453215-900LMA90T_1812
1 2
24
+INC2
23
GND
22
CS
21
VCC(o)
20
OUT
0.1U_0402_25V4K
19
VH
18
VCC
17
RT
16
-INE3
15
FB3
14
CTL
13
+INC1
PL2
CS
PC24
1 2
1 2
PR41
66.5K_0402_1%
PR45
1 2
47K_0402_1%
1 2
PC33
@10P_0402_50V8K
12
PC15
10U_1210_25V6K_V1
12
PR32 0_0402_5%
PC20
2200P_0402_50V7K
1 2
1 2
PC21
0.1U_0603_50V4Z
PC27
0.1U_0603_50V4Z
1 2
PC28
1 2
1500P_0402_50V7K
12
PC16
@10U_1210_25V6K_V1
SKS30-04AT_TSMA
ACON
12
12
PC17
PR47 @10K_0402_5%
P2
VIN
12
PR30 20K_0402_5%
2 2
ACOFF#
PACIN<38>
ACON<38>
PQ5
8
D
7
D
6
D
5
D
AO4407_SO8
PD6
1SS355_SOD323
1 2
PR39
3K_0402_5%
1 2
ACON
1
S
2
S
3
S
4
G
200K_0402_5%
PR29
2
G
12
12
PR35 150K_0402_5%
13
D
S
PQ6
1
S
2
S
3
S
4
G
AO4407_SO8
PQ10 2N7002_SOT23
IREF<30>
8
D
7
D
6
D
5
D
PC22
0.1U_0402_16V7K
IREF=1.113*Icharge IREF=0.373~3.3V
3 3
B++
PC19
PR42
0.02_2512_1%
1 2
1 2
0.01U_0402_50V7K
1 2 1
O
G3I
12
PC18
2200P_0402_50V7K
0.1U_0805_25V7K
36
241
PQ8 SI4835DY_SO8
ACOFF#
578
LXCHRG
PL3
15U_SPC-1204P-150_4A_20%
1 2
2 1
PD8
@SKS30-04AT_TSMA
2 1
PD7
PQ4
1
S
D
2
S
D
3
S
D
4
G
D
AO4407_SO8 PQ7
1
S
D
2
S
D
3
S
D
4
G
D
@AO4407_SO8
1 2
PR31
47K_0402_5%
PR33 10K_0402_5%
PQ9 DTC115EUA_SC70
2
ACOFF <30>
CC=0(0.5A) ~ 3A CV=16.8V (12 CELLS)
BATT+
12
PC29
4.7U_1206_25V6K
8 7 6 5
8 7 6 5
VIN
BATT+
12
12
PC31
PC30
4.7U_1206_25V6K
4.7U_1206_25V6K
OVP voltage : LI-MH 12 CELL(4S2P)
BATT+
BATT+ : 18.0V--> BATT_OVP : 2.0V (BATT_OVP voltage = 0.1109*BATT+)
12
PR50
VS
12
PC35
3
P
+
2
-
G
PU4A LM358A_SO8
0.1U_0603_50V4Z
8
4 4
BATT_OVP<30> FSTCHG<30>
12
PC37
@0.1U_0402_16V7K
A
PR53
2.2K_0402_5%
12
1
0
4
604K_0402_1%
12
PR52 1M_0402_1%
12
12
PR54 200K_0402_1%
PC36
0.01U_0402_50V7K
B
12
PR48
49.9K_0603_0.1%
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
4.2V
PR49
150K_0603_0.1%
1 2
PC34
22P_0402_50V8J
12
+3VALWP
12
PR51 47K_0402_5%
1
O
PQ12 DTC115EUA_SC70
G
3I2
D
CS
1
O
PQ11 DTC115EUA_SC70
G
I
3
2
Title
Size Document Number Rev
B0.1
Date: Sheet
Compal Electronics, Inc.
Charger
LA-2392
of
39 53Friday, April 16, 2004
E
A
B
C
D
E
+3.3V/+5V/+12V
B++
1 1
PL4
FBM-L18-453215-900LMA90T_1812
1 2
PD10
PD11
12
BST3 DH3 LX3
DL3
CSH3 CSL3 FB3 SKIP# SHDN#
TIME/ON5 RUN/ON3
PR77 47K_0402_5%
1 2
DAP202U_SOT323
2
VL
VS
1 2
21
22
V+
PU5
MAX1902_SSOP28
GND
8
VL
3
1
12
PC45
4.7U_0805_10V4Z
2N7002_SOT23
ACIN
4
12OUT
VL
5
VDD
18
BST5
16
DH5
17
LX5
19
DL5
20
PGND
14
CSH5
13
CSL5
12
FB5
15
SEQ
9
REF
6
SYNC
11
RST#
1 2
PR72 @0_0402_5%
MAINPWON <38,45>
VL
PQ15
2
G
BST51BST31
12
PR60
2.7K_1206_5%
13
D
S
1 2
PR73
0_0402_5%
+12VALWP
12
PR58 0_0402_5%
PC51
4.7U_1210_25V6K
BST5
2.5VREF
12
PC58
4.7U_0805_10V4Z
PC40
0.1U_0603_50V4Z
1 2
8
G2
7 6 5
PR155
1.24K_0402_1% PC53
1 2
0.47U_0805_16V7K
PR153
1 2
ACIN<12,30,38>
PC57 100P_0402_50V8K
1 2
12
PR57
0_0402_5%
619_0402_1%
10K_0402_5%
@300K_0402_5%
VS
DL3
LX3
DH3
1 2
PR68
PR70
12
PR74 47K_0402_1%
12
PC63 @0.047U_0402_16V4Z
12
12
PR59 0_0402_5%
1SS355_SOD323
12
PC59 680P_0402_50V7K
12
PC49
0.1U_0603_50V4Z
25 27 26
24
1 2
3 10 23
7 28
PC64
1U_0805_25V4Z
B+++
12
12
12
PC42
PC43
2200P_0402_50V7K
2 2
10U_SPC-1204P-100_4.5A_20%
PC44
4.7U_1206_25V6K @4.7U_1206_25V6K
12
PL5
+3VALWP
1
1
+
150U_D_4VM
2
+
PC56
2
@150U_D_4VM
SKS10-04AT_TSMA
PD12
2 1
PC55
3 3
PR64
1M_0402_1%
PQ13
1 2 3 4
AO4906_SO8
12
PC52 47P_0402_50V8J
1 2
PR69
3.57K_0402_1%
D2 D2
D1/S2/K
G1
D1/S2/K D1/S2/K
S1/A
1 2
PR62
1.27K_0402_1%
1 2
PR65 0_0402_5%
12
1 2
PR75
1 2
10K_0402_1%
1 2
1 2
DH5
PC41
0.1U_0603_50V4Z
PR61 0_0402_5%
1 2
SKS30-04AT_TSMA
LX5
DL5
0.47U_0805_16V7K PR154
1 2
0_0402_5%
AO4404_SO8
PD26
2 1
PC54
PQ37
12
D8D7D6D
S1S2S3G
D8D7D6D
S1S2S3G
5
4
5
PQ38 AO4406_SO8
4
12
PR156 698_0402_1%
PR71
10.2K_0402_1%
12
1 2
SNB
12
PC46
2200P_0402_50V7K
PR66
1.54K_0402_1%
12
1 2
PR67
0_0402_5%
12
PC62 100P_0402_50V8K
12
PR76 10K_0402_1%
PC39 470P_0805_100V7K
PR56 22_1206_5%
B+++
12
PC47
@10U_1206_25VAK
PD13
SKS10-04AT_TSMA
2 1
12
12
FLYBACK
PC48
10U_1206_25VAK
PC38
4.7U_1206_25VFZ
1 2
12
PD9 EC11FS2_SOD106
12
PR55 0_0402_5%
1 4
3 2
PT1 9U_SDT-1204P-9R0-120_4.5A_20%
12
PC50 47P_0402_50V8J
12
PR63 2M_0402_5%
1
1
+
+
PC60
2
2
120U_D_6.3VM
+5VALWP
PC61
@120U_D_6.3VM
4 4
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
B 1.0
Date: Sheet
Compal Electronics, Inc.
3.3V / 5V / 12V
LA-2392
of
40 53Friday, April 16, 2004
E
5
4
3
2
1
D D
2200P_0402_50V7K
PQ17
1
G2
D2
2
D2
D1/S2/K
3
G1
D1/S2/K
4
D1/S2/K
S1/A
AO4906_SO8
+1.5VSP
C C
1
12
+
PC77
PD15
2
2 1
SKS10-04AT_TSMA
220U_B2_2.5VM
PL7
12
5U_TPRH6D38-5R0M-N_2.9A_20%
PC78
4.7U_0805_6.3V6K
1845-1_VCC
RUNON<37>
B B
@4.7U_1206_25V6K
12
PC65
8 7 6 5
LX1.5
DL1.5
PR197
680K_0402_5%
1 2
316K_0402_1%
PC66
12
PR198
12
PC67
4.7U_1206_25V6K
DAP202U_SOT323
PC75
0.1U_0603_50V4Z
12
PD14
1 2
12
1
2
3
BST1.5B
1 2
PR79
0_0402_5%
12
PR82 0_0402_5%
PR84
0_0402_5%
PC180 @0.1U_0402_16V4Z
DH1.5
12
0_0402_5%
4.7U_1210_25V6K PC69
0.1U_0603_50V4Z PC73
BST1.5A
25
BST1
26
DH1
27
LX1
24
DL1
28
CS1
1
OUT1
2
FB1
11
ON1
1 2
1845B+
PR78
1 2
12
1U_0805_25V4Z
12
4
V+
PU6 MAX1845EEI_QSOP28
GND
OVP
8
23
PR158
0_0402_5%
0.22U_0603_16V7K
PC74
1845-1_VCC
12
22
VCC
SKIP
6
PC82
PR80
20_0402_5%
1 2
9
VDD
UVP
BST2
DH2
LX2 DL2 CS2
OUT2
FB2
ON2
PGOOD
TON
ILIM2 ILIM1
REF
PR86
10
13.7K_0402_1%
PR87
12
57.6K_0402_1%
100K_0402_1%
21 19
18 17 20 16
15 14 12
7 5
13 3
12 12
+5VALWP
1.759V
1.269V
PR88
12
PC68
4.7U_0805_10V4Z
PR81
0_0402_5%
1 2
BST2.5A
DH2.5
12
BST2.5B
12
0_0402_5%
1 2
PR89
100K_0402_1%
PC76
0.1U_0603_50V4Z
12
PR83
LX2.5
12
PR85
0_0402_5%
2.5HG
DL2.5
5
PQ18
AO4404_SO8
4
5
PQ19
AO4406_SO8
4
SYSON <30,37,42>
D8D7D6D
S1S2S3G
4.7U_SPC-1204P4R7_5.7A_20%
D8D7D6D
S1S2S3G
12
PR206 0_0402_5%
PL6
FBM-L18-453215-900LMA90T_1812
1 2
12
12
PC70
PC71
2200P_0402_50V7K
@10U_1206_25VAK
PL8
1 2
PD32
SKS30-04AT_TSMA
2 1
PR164
@0_0402_5%
12
PR204 @0_0402_5%
12
PR205 @0_0402_5%
12
4.7U_0805_6.3V6K
12
PC181 @2200P_0402_50V7K
12
PC182 @2200P_0402_50V7K
12
PC81
1 2
12
PC72
10U_1206_25VAK
1
+
2
PR165
0_0402_5%
B++
+2.5VP
1
+
PD16
PC80
PC79
2 1
2
150U_D_4VM
150U_D_4VM
SKS10-04AT_TSMA
+2.5V
A A
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Title
Size Document Number Rev
B
Date: Sheet
COMPAL ELEC TRONICS, INC
DDR POWER 2.5VP & +1.5VALWP
LA-2392
1
0.1
of
41 53Friday, April 16, 2004
5
4
3
2
1
+5VALWP
D D
C C
12
PR168 0_0603_5%
IN1.4V
12
4.7U_0805_10V4Z PC156
PC157
2200P_0402_50V7K
PD39 RB751V_SOD323
1 2
NODE1
1 2
PR169
12
1K_0402_5%
E3B
C
1
2
PQ40
2SA1036K_SOT23
PQ41 HMBT2222A_SOT23
1
C
E
B
3
2
LM393M_SO8
PU13B
7
12
PR170
10K_0402_5%
NODE2
COMP1.4V
LM393M_SO8 PU13A
8
P
O
G
4
4 5
1
5
+
6
-
SI3445DV_TSOP6 PQ39
D
S
6 2
1
G
3
VL
12
8
3
P
+
O
2
-
G
4
PL16
5U_TPRH6D38-5R0M-N_2.9A_20%
SN1.4V
1 2
PD40 SKS30-04AT_TSMA
191K_0402_1%
2 1
PC158
0.1U_0402_16V4Z
12
PC160 4700P_0402_25V7K_A34
12
PR172 200K_0402_1%
PR171
FB1.4V REF1.4V
12
12
PC159 470P_0402_50V7K
1 2
PR173 107K_0402_1%
1
+
2
2.5VREF
PC161 220U_B2_2.5VM
1
+
PC162
2
@220U_B2_2.5VM
+1.6VALWP
+2.5VP
12
PR166
SYSON< 30,37,41>
B B
+2.5VP
22U_1206_10V4Z
(1.25V)
PC85
22U_1206_10V4Z
12
12
PC86
12
PC87
0.1U_0402_16V7K
PU7
7
STANDBY
4
VD RefOut8VttSense
1
VSS
NE57814_HSO8
VDD
ExtRefIn
VTT
5 6 2 3
1
+
PC89
2
220U_B2_2.5VM
0.1U_0402_16V4Z
+1.25VP
12
PC90
0.1U_0402_16V7K
PC83
12
12
PC88
0.1U_0402_16V4Z
@0_0402_5%
PR167
1 2
0_0402_5%
12
PC84 10U_0805_10V4Z
+2.5V
A A
COMPAL ELECTRONICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size Document Number Rev
B
Date: Sheet
+1.6VALWP & +1.25VP
LA-2392 0.1
42 53Friday, April 16, 2004
1
of
5
4
3
2
1
+5VALWP
33P_0402_50V8J
12
PC97
2
G
12
PR91 0_1206_5%
1 2
12
PC149 10U_1206_6.3V7K
COMP1.2
13
D
S
1.2VIN
PU8
1
HSD
2
COMP
4
GND
MAX1954EUB_10UMAX
PQ16 2N7002_SOT23
PD17 1SS355_SOD323
5
IN
BST
DH
DL
PGND
FB
1 2
BST1.2
10
12
0.1U_0402_25V4K PC94
DH1.2
8
LX1.2
9
LX
DL1.2
6
7
FB1.2
3
PQ20
1
D2
2
D2
3
G1
4
S1/A
AO4906_SO8
12
PC92 22U_1206_10V4Z
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
220P_0603_50V8J
PL9
2.2UH_PLFC1235P-2R2A_6A_30%
1 2
12
PR90 68_0805_5%
12
PC150
12
4.87K_0603_1% PR92
220U_D_2VM
12
PR94
9.09K_0603_1%
PC95
1
+
2
+1.2VSP
1
+
PC96
@220U_D2_2VM
2
D D
PC98
PR174
0_0402_5%
1 2
PC163
0.1U_0402_10V6K
12
12
PR93 332K_0402_1%
C C
470P_0402_50V7K
SUSP<37>
+5VALWP
12
PR159 0_1206_5%
1.35VIN
BST1.35
DH1.35
LX1.35
DL1.35
FB1.35
PD34 1SS355_SOD323
1 2 12
PC151
0.1U_0402_25V4K
5
PU12
B B
PC91
10U_1206_6.3V7K
12
PR175
0_0402_5%
SUSP<37>
1 2
PC164
0.1U_0402_10V6K
13
D
2
G
12
S
220K_0402_1%
PQ42 2N7002_SOT23
560P_0402_50V7K
PR160
PC93
12
12
COMP1.35
12
PC99
10P_0402_50V8K
1
2
4
IN
HSD
COMP
GND
MAX1954EUB_10UMAX
BST
PGND
10
8
DH
9
LX
6
DL
7
3
FB
PQ36
1
D2
2
D2
3
G1
4
S1/A
AO4906_SO8
12
PC152 22U_1206_10V4Z
8
G2
7
D1/S2/K
6
D1/S2/K
5
D1/S2/K
PC153
1200P_0603_50V7K
PL15
2.2UH_PLFC1235P-2R2A_6A_30%
1 2
12
PR161
2.7_0603_5%
12
12
PR162
7.32K_0402_1%
@220U_B2_2.5VM
12
PR163
10.5K_0402_1%
PC154
1
+
2
+1.35VSP
1
+
PC155
220U_B2_2.5VM
2
A A
<>
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
3
2
Size Document Number Rev
Date: Sheet
COMPAL ELEC TRONICS, INC
1.25V / VGA_CORE
LA-2392
0.1
of
43 53Friday, April 16, 2004
1
5
4
3
2
1
+5VS
5
PQ45
4
IRF7832_SO8
5
PQ49
4
IRF7832_SO8
CPUB+
3 5
D8D7D6D
S1S3G
S
2
CPUB+
3 5
D8D7D6D
S1S3G
S
2
10U_1210_25V6M
PQ44 SI7392DP_SO8
241
5
4
PQ46 IRF7832_SO8
10U_1210_25V6M
PQ48 SI7392DP_SO8
241
5
4
PQ50 IRF7832_SO8
PC183
PC197
12
12
10U_1210_25V6M
PC185
12
PC184
10U_1210_25V6M
12
PR219 @1M_0603_1%
12
PC194 @1U_0603_6.3V6M
10U_1210_25V6M
PC199
12
PC198
10U_1210_25V6M
12
PR244 @1M_0603_1%
12
PC205 @1U_0603_6.3V6M
2200P_0402_50V7K
PC187
FBM-L18-453215-900LMA90T_1812
12
12
12
PC186
0.1U_0603_25V7K
PL18
1 2
0.56UH_ETQP4LR56WFC_21A_20%
PD47
2 1
SKS30-04AT_TSMA
2200P_0402_50V7K
PC201
12
12
12
PC200
0.1U_0603_25V7K
PL19
1 2
0.56UH_ETQP4LR56WFC_21A_20%
PD48
2 1
SKS30-04AT_TSMA
PL17
1 2
+CPU_CORE
+CPU_CORE
PC188
47U_25V_M
CPUB+
12
PR208
30 32
1 2
3 25 27
6
7
9 10
5 26
28 13 14 19
12
PU15
VID4 VID3 VID2 VID1 VID0 PGOOD EN
COMP FB IOUT VDIFF OFS FS
GND GND GND GND
@90.9K_0402_1%
12
PC191 @1U_0402_6.3V4Z
29
VCC
OVP
PWM1 ISEN1
PWM2 ISEN2
PWM3 ISEN3
VSEN
RGND PWM4
ISEN4
NC4NC8NC
31
1 2 1 2
15 21
1.2K_0603_0.5%
22 20
1.2K_0603_0.5%
18
16
1.2K_0603_0.5%
17
11
12
12 24
1 2
PR233
23
0_0402_5%
ISL6559CR-T_QFN32
PR236 0_0402_5%
PR237 0_0402_5%
D D
VGATE
VR_ON
>
C C
+3VS
12
PR213 10K_0402_5%
VID4<6> VID3<6> VID2<6> VID1<6> VID0<6>
1 2
PR229
PC195
2.43K_0603_1%
1 2
1 2
1500P_0603_50V7K
PR230
1.21K_0603_1%
1 2
3300P_0402_25V7K
PC202
1 2
1 2
PR234
1 2 1 2 1 2 1 2 1 2
1 2
PC193 @330P_0402_25V8K
470_0402_5%
PR215 0_0402_5% PR216 0_0402_5% PR217 0_0402_5% PR220 0_0402_5% PR222 0_0402_5%
PR223 0_0402_5%
1 2
PR227 0_0402_5%
PR231
12
12
2.49K_0402_1%
@10K_0402_5%
PR232 107K_0402_1%
PR210
COREFB<6> COREFB#<6>
+CPU_CORE
10_0402_5%
1 2
12
PC189 1U_0805_25V4Z
PR211
1 2
@0_0402_5%
PR221
1 2
PR224
1 2
PR228
1 2
PC196 @1U_0805_25V4Z
12
@0_0402_5%
PR240
PR207
12
PR241@0_0402_5%
12
PR242
12
PC190 1U_0805_25V4Z
PR214
1 2
@10_0402_5%
12
PR225 499K_0402_1%
+5VS
PR239
1 2
@10_0402_5%
12
PC204
499K_0402_1%
1U_0805_25V4Z
PQ43 SI7392DP_SO8
1 2
PR209
0_0805_5%
PR212
12
PC192
0.15U_0805_16V7K
BOOT
UGATE
PHASE LGATE
PR226
1 2
0_0402_5%
2
2.2_0805_5%
1 8 5
6
VCC
3
PWM
7
DELAY
12
4
GND
ISL6209CB-T_SO8
PR218
50K_0603_5%
1 2
3 5
241
D8D7D6D
S1S3G
S
2
PQ47 SI7392DP_SO8
PR235
1 2
0_0805_5%
PR238
12
PC203
0.15U_0805_16V7K
3 5
241
D8D7D6D
S1S3G
S
2
12
PR243
PU16
6 3 7 4
ISL6209CB-T_SO8
50K_0603_5%
VCC PWM DELAY GND
BOOT UGATE PHASE LGATE
PR245
1 2
0_0402_5%
1 2
2
2.2_0805_5%
1 8 5
B+
1
1
+
+
PC101
2
2
47U_25V_M
B B
+5VS
PR246
1 2
0_0805_5%
PR247
PU17
6
BOOT
VCC
3
PWM
PR248
1 2
@10_0402_5%
12
PC212 1U_0805_25V4Z
12
PR250
12
PR249 499K_0402_1%
A A
7 4
ISL6209CB-T_SO8
50K_0603_5%
DELAY GND
UGATE PHASE LGATE
PR252
1 2
0_0402_5%
1 2
2 1 8 5
2.2_0805_5%
12
PC211
0.15U_0805_16V7K
PQ51 SI7392DP_SO8
3 5
241
5
D8D7D6D
S1S3G
S
PQ53
4
2
IRF7832_SO8
CPUB+
D8D7D6D
S1S3G
3 5
241
5
S
4
2
PQ54 IRF7832_SO8
10U_1210_25V6M
PQ52 SI7392DP_SO8
PC206
12
10U_1210_25V6M
12
PC207
10U_1210_25V6M
12
PR251 @1M_0603_1%
12
PC213 @1U_0603_6.3V6M
2200P_0402_50V7K
PC208
12
PC210
12
12
PC209
0.1U_0603_25V7K
PL20
1 2
0.56UH_ETQP4LR56WFC_21A_20%
PD49
2 1
SKS30-04AT_TSMA
+CPU_CORE
THIS SHEET OF EN GINEE RING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Title
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
B
Date: Sheet
COMPAL ELEC TRONICS, INC
+CPU_CORE
1
44 53Friday, April 16, 2004
of
A
B
C
D
VMB
PCN2
1 1
SUYIN_200275MR007G135ZL_7P
BATT+ BATT+
SMD SMC GND GND
1 2
TS_A
3
TS
EC_SMD
4
EC_SMC
5 6 7
12
PL14
FBM-L18-453215-900LMA90T_1812
1 2
PC135 1000P_0402_50V7K
12
PC136
0.01U_0402_50V7K
BATT+
CPU
PTH1 10K_1%
12
PR139
100_0402_5%
2 2
PD29
@BAS40-04_SOT23
3
+5VALWP
PR140
100_0402_5%
1
2
12
PR144 1K_0402_5%
1 2
2
1
EC_SMC_1
1
3
1 2
PR141
25.5K_0402_1%
@BAS40-04_SOT23
EC_SMD_1
PD30 @BAS40-04_SOT23
3
PD28
2
+3VALWP
BATT_TEMP <30>
EC_SMD_1 <30,31>
EC_SMC_1 <30,31>
PC140
0.22U_0603_16V7K
PR138
0_0402_5%
L_10T
12
PH1 under CPU botten side :
CPU thermal protection at 90 +-3 degree C Recovery at 50 +-3 degree C
VL
L_10
12
12
PR145
2.74K_0402_1%
12
PR142
16.9K_0402_1%
1 2
1 2
VL
PR143 100K_0402_1%
PC137 @0.1U_0402_10V6K
REV
PR146
100K_0402_1%
47K_0402_1%
12
1 2
PR136
3
+
2
-
12
PC139 1000P_0402_50V7K
VS
8
PU11A
P
O
G
LM393M_SO8
4
PC138
12
0.1U_0603_50V4Z
1
VL
PR137 47K_0402_1%
1 2
OTP_C
PH2 near main Battery CONN :
BAT. thermal protection at 84 +-3 degree C Recovery at 45 +-3 degree C
VL
PD27
1SS355_SOD323
12
MAINPWON<38,40>
DTC115EKA_SC59
PQ35
1
O
G
I
3
2
12
PR150
16.9K_0402_1%
1 2
PC141 @0.1U_0402_10V6K
REV
C
PR147
47K_0402_1%
1 2
5
+
6
-
8
P
O
G
4
PU11B LM393M_SO8
VL
PR149 47K_0402_1%
1 2
7
OTP_B
12
PD31
1SS355_SOD323
Title
BATTERY CONN / OTP
Size Document Number Rev
B 1.0
LA-2392
Date: Sheet
COMPAL ELECTRONICS, INC
D
45 53Friday, April 16, 2004
of
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFOR MATI ON. THIS SHEET MAY NOT BE TRANSF ERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
BATTERY
PC142
0.22U_0603_16V7K
PTH2
10K_1%
PR148
0_0402_5%
L_11T
12
L_11
12
12
PR151
3.32K_0402_1%
5
4
3
2
1
POWER PIR LIST
PHASE
D D
DB2
page Reason for change Modify list
40
Modify 3V / 5V Vout and OCP
Change PR66 from 6.49K_0603_1% to 1.54K_0603_1% Change PR156 from 11.8K_0402_1% to 698_0402_1% Change PR154 from 4.12K_0603_1% to 0_0603_5% Change PC54, PC53 from 0.1U_0805_25V7K to 0.47U_0805_25V4Z Change PR62 from 5.76K_0603_1% to 1.27K_0603_1% Change PR155 from 27K_0603_1% to 1.24K_0603_1% Change PR153 from 4.7K_0402_1% to 619_0402_1%
44,45
42 42 41
38 For solving cable dock shutdown issue Add PD45, SKS80-04CT
C C
SI
B B
PV
38 For thermal issue Change PD45 from SKS80-04CT to SBM1040 38 Change VIN detector sensing point
39 Improvment noise issue 41 Modify 2.5V / 1.5V OCP Change PR87 from 24.9k_0402_1% to 57.6k_0402_1%
43 VGA with 32M VRAM Remove 1.35V regulator that is for VGA with 64M VRAM
44,45 Modify CPU_CORE current balance issue Change the connection of PC122 and PC168 from
38 Change PR1, PR2, PR5, PR7, PC6, and re-connect the reference
39 Improve the accuracy of Constant Voltage
41 reserve devices for the adjustment
44 Improve the transient response Add PR203, PC111, and remove PR202
PV-2
For CPU_CORE thermal issue Change PQ21, PQ26, PQ31, PQ46 From IRLR7821 to SI7392DP
For 1.6V voltage accuracy Change PR173 from 113K_0402_1% to 107K_0402_1% For layout pad issue For power sequence setting
because of DOCK issue
Improve the VIN detector accuracy.
mode of charger.
of 2.5V
Delete PD23, PD43, SC11N4148T8
Change PC85, PC86 from 22U_1210_10V4Z to 22U_1206_10V4Z Add PR197, 680K_0603_1%
Add PR198, 316K_0603_1%
Change PR2 from 174k_0603_1% to 150k_0603_0.1% Change PR7 from 75k_0402_1% to 66.5k_0402_1%
Change PR88 from 0_0603_1% to 13.7k_0402_1% Add PR89, 100k_0402_1%
14 pin of PU9 to ground. Remove PD22 and PD44.
voltage that is VL connected to PR10 to RTC charger output.
Change PR48, PR49
Add PR204, PR205, PR206, PC181, PC182
Change PC168 and PR183Improve the compensation46
46 Modify the control signal of MAX1980
A A
(strat the MAX1980 at the same time with MAX1937)
Delete PR180 and add PR208 from pin 13 of MAX1937 to pin 13 of MAX1980
COMPAL ELE CTRO NICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
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PIR
Size Document Number Rev
LA-2392
Date: Sheet
1
of
46 53Friday, April 16, 2004
0.1
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1
POWER PIR LIST
PHASE
D D
DB2
page Reason for change Modify list
40
Modify 3V / 5V Vout and OCP
Change PR66 from 6.49K_0603_1% to 1.54K_0603_1% Change PR156 from 11.8K_0402_1% to 698_0402_1% Change PR154 from 4.12K_0603_1% to 0_0603_5% Change PC54, PC53 from 0.1U_0805_25V7K to 0.47U_0805_25V4Z Change PR62 from 5.76K_0603_1% to 1.27K_0603_1% Change PR155 from 27K_0603_1% to 1.24K_0603_1% Change PR153 from 4.7K_0402_1% to 619_0402_1%
44,45
42 42 41
C C
SI
B B
38 For solving cable dock shutdown issue Add PD45, SKS80-04CT
38 For thermal issue Change PD45 from SKS80-04CT to SBM1040 38 Change VIN detector sensing point
39 Improvment noise issue 41 Modify 2.5V / 1.5V OCP Change PR87 from 24.9k_0402_1% to 57.6k_0402_1%
43 VGA with 32M VRAM Remove 1.35V regulator that is for VGA with 64M VRAM
44,45 Modify CPU_CORE current balance issue Change the connection of PC122 and PC168 from
38 Change PR1, PR2, PR5, PR7, PC6, and re-connect the reference
PV
39 Improve the accuracy of Constant Voltage
41 reserve devices for the adjustment
44 Improve the transient response Add PR203, PC111, and remove PR202
PV-2
For CPU_CORE thermal issue Change PQ21, PQ26, PQ31, PQ46 From IRLR7821 to SI7392DP
For 1.6V voltage accuracy Change PR173 from 113K_0402_1% to 107K_0402_1% For layout pad issue For power sequence setting
because of DOCK issue
Improve the VIN detector accuracy.
mode of charger.
of 2.5V
Delete PD23, PD43, SC11N4148T8
Change PC85, PC86 from 22U_1210_10V4Z to 22U_1206_10V4Z Add PR197, 680K_0603_1%
Add PR198, 316K_0603_1%
Change PR2 from 174k_0603_1% to 150k_0603_0.1% Change PR7 from 75k_0402_1% to 66.5k_0402_1%
Change PR88 from 0_0603_1% to 13.7k_0402_1% Add PR89, 100k_0402_1%
14 pin of PU9 to ground. Remove PD22 and PD44.
voltage that is VL connected to PR10 to RTC charger output.
Change PR48, PR49
Add PR204, PR205, PR206, PC181, PC182
Change PC168 and PR183Improve the compensation46
46 Modify the control signal of MAX1980
A A
(strat the MAX1980 at the same time with MAX1937)
Delete PR180 and add PR208 from pin 13 of MAX1937 to pin 13 of MAX1980
COMPAL ELE CTRO NICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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PIR
Size Document Number Rev
LA-2392
Date: Sheet
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47 53Friday, April 16, 2004
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POWER PIR LIST (2)
PHASE
D D
page
39
Reason for change Modify list
Modify charger for using 90W adapter
Change PR34 from 47K_0402_1% To 10K_0402_1% Change PR38 from 1K_0402_1% To 10K_0402_1% Change PR28 from 0.01_2512_1% To 0.012_2512_1% Change PR36 from 31.6K_0603_1% To 37.4K_0603_1% Change DC Jack
39,40,41
C C
B B
Change capacitor size for cost down
Change PC48, PC72 from 10u_1210_25V to 10u_1206_25V Change PC29, PC30, PC31, PC43, PC67 from 4.7u_1210_25V to 4.7u_1206_25V
A A
COMPAL ELE CTRO NICS, INC
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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PWR PIR(2)
Size Document Number Rev
LA-2392
Date: Sheet
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48 53Friday, April 16, 2004
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Version change list (P.I.R. List) Page 1 of 4
H H
1
Reason for change PAGE Modify ListFixed IssueItem
Fixed USB 1.1 rising/falling time error P12 Delete C785, C786, C787, C788, C789, & C790 0.3
2 Fixed TV- out no display P14 Swap TV_CRMA and TV_COMPS 0.3
3 Prevent PCI1620 latched up P22 Reserve G_RST# to pin U37.C11 0.3
M.B. Ver.
G G
Design change (solve for HR60 audio issue) P26 Move two load resis tors from sub -board to M/B and swap JP17.2 and
JP17.3
0.34
5 Supported wake up f rom TP P27 Change TP connector JP2 6's power pin from +5VS to +5V 0.3
6 EMI required (solve for 48 MHz noise from FDD connector) P32 Add CP11, CP12, CP13, and C 801
7 Design change (TFDU6102 design guide) P33 Delete C560 and C562 & add R586
F F
Change C561 from 10uf to 4.7uf
8 EMI required (solve for 48 MHz noise from serial port) P34 Add CP14, and CP15
0.3
0.3
0.3
9 ID required (for Pavillion) P35 Add D58 0.3
10 EMI required P25 Add L38 , a n d L3 9 0.3
E E
11 P27 Add C802, C803, C804, C805, and C806 0.3Add bypass cap. to solve for AC97 link cross a split plane
12 P07 Delete C75, and C88Design change (reserve spac e for power placement and no need too
0.3
many caps.)
13 RealTech 8101L design guide P20 Change R194 to 5.6K +/- 1%
0.3
14 Solve for SPDIF no output P34 Delete C634 0.3
D D
15 P11CPU_CLK is current drive from CK8. So, delete damping resistors. Change R69, and R70 from 15 ohm to 0 ohm
16 Solve for burst frequency error P14 Change C642, and C643 from 18 pF to 22 pF
17 Solve for chromin a n ce and burst level P18 Change L11, L12, and L13 to 1 . 8uH
0.3
0.3
0.3
C C
B B
A A
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
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MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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Compal Electronics, Inc.
Title
P.I.R HISTORY
Size Document Number Rev
LA-2392
Custom Date: Sheet
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49 53Friday, April 16, 2004
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Version change list (P.I.R. List) Page 2 of 4
H H
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Reason for change PAGE Modify ListFixed IssueItem
AMD change Tdiode spec up to 127 degree P4 Ch a n ge U3 from MAX 6649 to ADM1032 0.4
2 Support wake from Lan P20 Populate R188 0.4
3 To avoid PCI1620 unknow action P22 Reserve R591 0.4
M.B. Ver.
G G
To restrain audio noise P25 Change R267 pull up to +5VAMP_CODEC, and delete C626 0.44
5 USB_OC# high should be between 2.5V to 5.5V P27 Change R310 and R315 to 10K / R314 and R319 to 20K 0.4
6 To d etect FIR P29 Add R592 and R593
7 TP should be pull up to +5V P30 RP80 pull up to +5V
F F
8 In order to compatible with NS97551
-- changing pin87 ~ 90 to GPIO
9 In order to compatible with NS97551
P30 BID routed from pin88 to pin82
P30 A dd R594 and R595
0.4
0.4
0.4
0.4
-- removing +RTCVCC
10 To prevent noise ge nerated from FAN to +5VS cause audio noise
P4 Delete D1 and D3 / add C3, C8, C612, and C614 0.4
while shut down
E E
11 Solve for PCI1620 working abnormal -- fine tune G_RST# timming P22 Populate R587, delete R225, C410 0.4
12 Doub le mount issue, already exis t a t audio board. P30 Delete D28 and D29 0.4
Fast power on for battery only13 P33 Change R392 from 100K to 4.7K 0.4
14 Presa rio LED color should be amber P35 Change D39, D40, D42, D44, and D45 from XX_GRN to XX_ORG 0.4
D D
15 To develop SI9182 max effect P25 Change C438 from 0.01U F to 0.1UF 0.4
16 For EMI P26 A dd L40, L41, L42, and L43 / delete C473, C474, C475, and C476 0.4
17 For VGA HSYNC/VSYNC average peak to peak issue P18 Add R159 and R160 0.4
18 For 512MB non-JEDEC module ( 16 chips ) P9 Change RP42, RP46, and R481 from 68 Ohm to 47 Ohm 0.4
C C
B B
A A
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
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MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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Compal Electronics, Inc.
Title
P.I.R HISTORY
Size Document Number Rev
LA-2392
Custom Date: Sheet
2
of
50 53Friday, April 16, 2004
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0.1
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Version change list (P.I.R. List) Page 3 of 4
H H
1
Reason for change PAGE Modify ListFixed IssueItem
To use the same source as HR60 P4 Change U3 footp rint to SOP8 0.5
2 To reset CK8 w hile boot up co n trol by EC P12 Add R97 to link EC_RS MRST# and PWRGD_SB 0.5
M.B. Ver.
3 For EMI P15 Change C648, C672, C685, C696, C699, C763, and C656 to 1000P
0.5
Change C651, C673, C686, C697, C700, C764, C654, C733, C710,
G G
4
P18To solve vol t a ge level of HSYNC and VSYNC is over spec
5
F F
6
7
8
9
E E
D D
10
11
Due to MD_SPK is no longer use, so preven t input pin floating. P25 Delete R287 and change R288 to 0_0402_5%. Also add C808. 0.5
12 Due t o USB data has leakage problem, so need to delay USB_VCC
power up timing controlled by EC to solv e f o r u nknow device while power on with battery only.
P27 P30
C730, C706, and C724 to 10P
Add U46 and U 47, and R596, R597, and R598 on CRT_HSYNC and CRT_VSYNC
Change U9 from NS0013 to NS0019P20Solve for dat a lost while transfer data from LAN
Populate R591P22TI recommandation --- avoid unknow state while initiate
R263 and R264 change footprint to R_0402P25Mechanical restricted area
L39 and R293 change to CHB1608U301_0402P25For EMI
L40, L41, L42, and L43 change to KC FBM-L11-201209-221LMAT_0805P26
Wired R368.2 to U18.4 and U19.4 1.0
0.5
0.5
0.5
0.5
0.5
0.5For EMI
0.5Add U48, C807, R599, and R600P27nVIDIA recommandation for WOR
C C
B B
A A
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
10
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MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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Compal Electronics, Inc.
Title
P.I.R HISTORY
Size Document Number Rev
LA-2392
Custom Date: Sheet
2
of
51 53Friday, April 16, 2004
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Version change list (P.I.R. List) -- For Cost Down (LA-1851 ---> LA-2391) Page 4 of 4
1
H H
1
Reason for change PAGE Modify ListFixed IssueItem
Cost Down P4 C hange C1, C4, C8, C330, C339, C447, C596, C599, C609
M.B. Ver.
0.5C
from 10U_1206_10V4Z to 10U_0805_10V4Z
2 P6 Delete C15 (330U_D_2VM_R15), Add C810 (330U_6.3V_M) 0.5C
G G
3
4
F F
6
7
8
E E
9
10
Cost Down
P25
Delete 0_0402_5% -- R97, R105, R108, R282, R288, R289, R300, R312, R313, R317, R318, R320, R321, R326, R327, R359, R368,
P26
R375, R377, R381, R393, R469, R587, R597, R598, R219
P27
Delete 0_0603_5% -- R462, L26, L27, L30, L32, L33, L34
P29
Delete 0_0805_5% -- R459, R465, L16, L20,
P30
Delete 0_1206_5% -- R394,
P31
Delete R502 and R503P14Cost Down (VBIOS can cover it)
Add C811P18
Change D12 from RB491D_SOT23 to RB411D_SOT23P18Cost Down
Delete Q22, C353, C354, C358, C359 and add L44P20
0.5C
0.5C
0.5C
0.5C
0.5CCost Down (RTL8101L integrate those parts)
Cost Down
Improve reliability
P12 P14 P15 P18 P20 P22
0.5CDelete C376, C378, C382, C383, C384P21Cost Down
Cost Down (EC can control it) P22 Delete D16 and R218 0.5C
P23 Delete R227 0.5CInternal pull up11
12 Cost Down P23 Delete C423 and C631 0.5C
D D
13
P24 D elete R231, R232, R240, R241, R242, R243, R244, R245, R256,
0.5CCost Down (No reserve PCI1520)
R259, R260, RP71, RP71, RP73, RP74, RP75, RP76, RP77, C430
14 P25 Delete C435, C436, C808, and add R604Cost Down 0.5C
15 Cost Down P28 Delete C512, C515, C522, C524 0.5C
C C
16 Cost Down P29 Delete C525, C529 0.5C
17 Cost Down P30 Change U21 from 87591L to 97551, delete C539 and C543,
0.5C
add R603, D59, C627
B B
A A
19 Cost Down P43 Delete C564, C566 0.5C
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
10
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MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
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P.I.R HISTORY
Size Document Number Rev
LA-2392
Custom Date: Sheet
2
52 53Friday, April 16, 2004
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Add/Del/Change Loc Old Description New Description Function H/W Compal Comment Change C1 10U_1206_10V4Z 10U_0805_10V4Z FAN Minor layout modification
C4 10U_1206_10V4Z 10U_0805_10V4Z FAN Minor layout modification Same material, only size change C8 10U_1206_10V4Z 10U_0805_10V4Z FAN Minor layout modification Same material, only size change C330 10U_1206_10V4Z 10U_0805_10V4Z HDD Minor layout modification Same material, only size change C339 10U_1206_10V4Z 10U_0805_10V4Z ODD Minor layout modification Same material, only size change
D D
C447 10U_1206_10V4Z 10U_0805_10V4Z Audio Minor layout modification Same material, only size change C596 10U_1206_10V4Z 10U_0805_10V4Z +3VALW to +3V Minor layout modification Same material, only size change C599 10U_1206_10V4Z 10U_0805_10V4Z +1.6VALW to +1.6VS Minor layout modification Same material, only size change C609 10U_1206_10V4Z 10U_0805_10V4Z +3VALW to +3VS Minor layout modification Same material, only size change U21 NS87591 NS97551 EC Minor layout modification Pin to pin compatible, delete some GPIOs not use in HR61 at all D12 RB491D_SOT23 RB411D_SOT23 CRT Minor layout modification Max. current 1A --> 0.5A, it is as same as Ford. C357 0.1U_0402_16V4Z 22U_1206_10V4Z LAN Power Minor layout modification Follow Realtek design guide, it is same as Ford. PR34 47K_0402 1% 10K_0402 1% Charger BOM change For 90W adapter, modify the CP mode of charger PR38 1K_0402 1% 10K_0402 1% Charger BOM change For 90W adapter, modify the CP mode of charger PR28 0.01_2512 1% 0.12_2512 1% Charger BOM change For 90W adapter, modify the CP mode of charger PC23 4700P_0402_25V7K 2200P_0402_25V7K Charger BOM change For 90W adapter, modify the CP mode of charger PR36 31.6K_0603 1% 37.4K_0603 1% 1.8V BOM change For 90W adapter, modify the CP mode of charger PCN1 DC Jack for 120W DC Jack for 90W DC Input BOM change Change the DC jack for 90W adapter PC78 10U_1210_25V 10U_1206_25V +1.5VSP Minor layout modification Same material, only size change PC72 10U_1210_25V 10U_1206_25V 1845B+ Minor layout modification Same material, only size change PC29 4.7U_1210_25V 4.7U_1206_25V BATT+ Minor layout modification Same material, only size change PC30 4.7U_1210_25V 4.7U_1206_25V BATT+ Minor layout modification Same material, only size change PC31 4.7U_1210_25V 4.7U_1206_25V BATT+ Minor layout modification Same material, only size change PC43 4.7U_1210_25V 4.7U_1206_25V BATT+ Minor layout modification Same material, only size change PC67 4.7U_1210_25V 4.7U_1206_25V 1845B+ Minor layout modification Same material, only size change R594 @10K_0402_5% @0_0603_5% EC Minor layout modific Add C811 0.1U_0402_16V4Z CRT Minor layout modification The capacitor is located close to Vcc pin L44 KC FBM_L11-201209-601LMT 0805 LAN Power (+2.5V) Minor layout modification Follow Realtek design guide, it is same as Ford. C627 1U_0603_10V6K EC BOM change Follow NS97551 design guide. R603 1_0805_5% EC Minor layout modification Follow NS97551 design guide. D59 SSM14_SMA EC Minor layout modification Follow NS97551 design guide. C810 330U_6.3V_M DDR Minor layout modification VTT decoupling capacitor, low ESR requirement, it is same as Lopze R602 @0_0402_5% EC Minor layout modification only Reserve for ENE Del C15 330U_D_2VM_R15 DDR BOM change R97 0_0402_5% CK8 Minor layout modification No EMI concern R105 0_0402_5% CK8 Minor layout modification No EMI concern R108 0_0402_5% CK8 Minor layout modification No EMI concern R282 0_0402_5% Audio CLK Minor layout modification No EMI concern
C C
R288 0_0402_5% Audio Minor layout modification No EMI concern R289 0_0402_5% Audio Minor layout modification No EMI concern R300 0_0402_5% Audio AMP Minor layout modification No EMI concern R312 0_0402_5% USB Minor layout modification No EMI concern R313 0_0402_5% USB Minor layout modification No EMI concern R317 0_0402_5% USB Minor layout modification No EMI concern R318 0_0402_5% USB Minor layout modification No EMI concern R320 0_0402_5% USB Minor layout modification No EMI concern R321 0_0402_5% USB Minor layout modification No EMI concern R326 0_0402_5% USB Minor layout modification No EMI concern R327 0_0402_5% USB Minor layout modification No EMI concern R359 0_0402_5% EC Minor layout modification No EMI concern R368 0_0402_5% EC Minor layout modification No EMI concern R375 0_0402_5% EC I/O Port Minor layout modification No EMI concern R377 0_0402_5% EC I/O Port Minor layout modification No EMI concern R381 0_0402_5% EC I/O Port Minor layout modification No EMI concern R393 0_0402_5% Power BTN Minor layout modific R469 0_0402_5% CardBus Controller PCI1620 Minor layout modification No reserve for PCI1520 R587 0_0402_5% CardBus Controller PCI1620 Minor layout modification No reserve for PCI1520 R597 0_0402_5% CRT Minor layout modification No EMI concern R598 0_0402_5% CRT Minor layout modification No EMI concern R219 0_0402_5% CardBus Controller PCI1620 Minor layout modification No reserve for PCI1520 R462 0_0603_5% TV-GND Minor layout modification No EMI concern L26 0_0603_5% VGA Power Minor layout modification No EMI concern L27 0_0603_5% VGA Power Minor layout modification No EMI concern L30 0_0603_5% VGA Power Minor layout modification No EMI concern L32 0_0603_5% VGA Power Minor layout modification No EMI concern L33 0_0603_5% VGA Power Minor layout modification No EMI concern L34 0_0603_5% SSC Power Minor layout modification No EMI concern R459 0_0805_5% LAN Minor layout modification Follow Realtek design guide, it is same as Ford. R465 0_0805_5% LPC(VT1211) Minor layout modification No EMI concern L16 0_0805_5% Audio Power Minor layout modification No EMI concern L20 0_0805_5% Audio AMP Power Minor layout modification No EMI concern
B B
R394 0_1206_5% FIR Minor layout modification Follow Vishay design guide. R502 10K_0402_5% VGA BOM change VBIOS can cover it R503 10K_0402_5% VGA BOM change VBIOS can cover it Q22 2SA1036K_SOT23 LAN Power Minor layout modification Follow Realtek design guide, it is same as Ford. C353 1U_0603_10V6K LAN Power BOM change Follow Realtek design guide, it is same as Ford. C354 1U_0603_10V6K LAN Power Minor layout modification Follow Realtek design guide, it is same as Ford. C358 10U_0805_10V4Z LAN Power Minor layout modification Follow Realtek design guide, it is same as Ford. C359 0.1U_0402_16V4Z LAN Power Minor layout modification Follow Realtek design guide, it is same as Ford. C376 0.1U_0402_16V4Z 1394 BOM change Confirmed by TI C378 0.1U_0402_16V4Z 1394 BOM change Confirmed by TI C382 1000P_0402_50V7K 1394 BOM change Confirmed by TI C383 1000P_0402_50V7K 1394 BOM change Confirmed by TI C384 1000P_0402_50V7K 1394 BOM change
4
Same material, only size change
ation Reserve for ENE
Replace C810
ation No EMI concern
Confirmed by TI
3
D16 RB751V_SOD323 CardBus Controller PCI1620 Minor layout modific R218 10K_0402_5% CardBus Controller PCI1620 Minor layout modific
R227 4.7K_0402_5% PCMCIA POWER CTRL. BOM change
C423 0.1U_0402_16V4Z PCMCIA POWER BOM change
C631 0.1U_0402_16V4Z PCMCIA POWER BOM change
R231 0_0402_5% CardReader socket Minor layout modificatio
R232 0_0402_5% CardReader socket Minor layout modificatio
R240 0_0402_5% CardReader socket Minor layout modificatio
R241 0_0402_5% CardReader socket Minor layout modificatio
R242 0_0402_5% CardReader socket Minor layout modificatio
R243 0_0402_5% CardReader socket Minor layout modificatio
R244 0_0402_5% CardReader socket Minor layout modificatio
R245 0_0402_5% CardReader socket Minor layout modificatio
R256 0_0402_5% CardReader socket Minor layout modificatio
R259 0_0402_5% CardReader socket Minor layout modificatio
R260 0_0402_5% CardReader socket Minor layout modificatio
RP71 0_1206_8P4R_5% CardReader socket Minor layout modificatio
RP72 0_1206_8P4R_5% CardReader socket Minor layout modificatio
RP73 0_1206_8P4R_5% CardReader socket Minor layout modificatio
RP74 0_1206_8P4R_5% CardReader socket Minor layout modificatio
RP75 0_1206_8P4R_5% CardReader socket Minor layout modificatio
RP76 0_1206_8P4R_5% CardReader socket Minor layout modificatio
RP77 0_1206_8P4R_5% CardReader socket Minor layout modificatio
C430 0.1U_0402_16V4Z CardReader socket Minor layout modificatio
C435 4.7U_0805_6.3V6K Audio BOM change
C436 0.1U_0402_16V4Z Audio BOM change
C512 0.1U_0402_16V4Z Mini-PCI BOM change
C515 0.1U_0402_16V4Z Mini-PCI BOM change
C522 4.7U_0805_10V4Z Mini-PCI BOM change
C524 1000P_0402_50V7K Mini-PCI BOM change
C525 10U_1206_10V4Z LPC(VT1211) BOM change
C529 0.1U_0402_16V4Z LPC(VT1212) BOM change
C539 4.7U_0805_10V4Z EC BOM change
C543 1000P_0402_50V7K EC BOM change
C564 22U_1206_10V4Z SPR_USB BOM change This is contr
C566 1000P_0402_50V7K SPR_USB BOM change This is contr
C329 10U_1206_10V4Z HDD BOM change Verifi
C331 1U_0805_25V4Z HDD BOM change Verifi
C338 1U_0805_25V4Z CDROM BOM change Verifi
R226 @0_0402_5% CardBus Controller PCI1620 Minor layout modification
R470 @0_0402_5% CardBus Controller PCI1620 Minor layout modification
JP14 @FOX_WZ21131-G2-P4 CardBus socket Minor layout modification
C427 @1000P_0402_50V7K CardBus socket Minor layout modification
C429 @1000P_0402_50V7K CardBus socket Minor layout modification
C425 @0.1U_0402_16V4Z CardBus socket Minor layout modification
C426 @0.1U_0402_16V4Z CardBus socket Minor layout modification
C428 @0.1U_0402_16V4Z CardBus socket Minor layout modification
C632 @0.1U_0402_16V4Z CardBus socket Minor layout modification
C633 @0.1U_0402_16V4Z CardBus socket Minor layout modification
R287 @0_0402_5% Audio Minor layout modification
R288 0_0402_5% Audio Minor layout modification
C464 @0.1U_0402_16V4Z Audio Minor layout modification
U22 @SN74HCT273PW_TSSOP20 EC Minor layout modificat
C548 @0.1U_0402_16V4Z EC Minor layout modificat
C549 @1U_0603_10V6K EC Minor layout modificat
R372 @20K_0402_5% EC Minor layout modificat
R384 100K_0402_5% EC Minor layout modification Wi
JP2 ACES_85205-0300 FAN2 BOM change For 90W adap
Q2 FMMT619_SOT23 FAN2 BOM change For 90W adap
C4 10U_0805_10V4Z FAN2 BOM change For 90W adap
C7 0.1U_0402_16V4Z FAN2 BOM change For 90W adap
R13 10K_0402_5% FAN2 BOM change For 90W adap
R9 100_0402_5% FAN2 BOM change For 90W adap
R12 8.2K_0402_5% FAN2 BOM change For 90W adap
D4 1N4148_SOT23 FAN2 BOM change For 90W adap
C8 10U_0805_10V4Z FAN2 BOM change For 90W adap
C614 0.1U_0402_16V4Z FAN2 BOM change For 90W adap
C615 1000P_0402_50V7K FAN2 BOM change For 90W adap
Note: In order to identify different PCA from Diaz-1.0, Diaz-1.1 90W and Diaz-1.1 120W. We suggest t Add R361 1K_0402_5% EC BOM change For 90W and 120W adapter Delete R364 1K_0402_5% EC BOM change For 120W adapter only
2
ation EC can control it ation EC can control it
Follow PCI1620 design guide Follow PCI1620 design guide
Follow PCI1620 design guide n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520 n No reserve for PCI1520
Follow AD1981 design guide
Follow AD1981 design guide
Verified by test Verified by test Verified by test Verified by test Verified by test Verified by test Verified by test Verified by test
only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No reserve for PCI1520 only No support Mono phone No support Mono phone only No support Mono phone
ion only No reserve purpose ion only No reserve purpose ion only No reserve purpose ion only No reserve purpose
o implement BID function.
1
ol pin, not power pin, so reduce
ol pin, not power pin, so reduce ed by test, it is same as Lopze ed by test, it is same as Lopze ed by test, it is same as Lopze
re pull down resistor together
ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only. ter, only support one Fan1 only.
A A
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Cost Down PIR (customer)
Size Document Number Rev
LA-2392
Custom Date: Sheet
1
of
53 53Friday, April 16, 2004
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